1 // SPDX-License-Identifier: GPL-2.0+ 2 // 3 // Copyright (c) 2012-2014 Samsung Electronics Co., Ltd 4 // http://www.samsung.com 5 6 #include <dt-bindings/regulator/samsung,s2mpg10-regulator.h> 7 #include <linux/bug.h> 8 #include <linux/cleanup.h> 9 #include <linux/err.h> 10 #include <linux/gpio/consumer.h> 11 #include <linux/slab.h> 12 #include <linux/module.h> 13 #include <linux/of.h> 14 #include <linux/regmap.h> 15 #include <linux/platform_device.h> 16 #include <linux/regulator/driver.h> 17 #include <linux/regulator/machine.h> 18 #include <linux/regulator/of_regulator.h> 19 #include <linux/mfd/samsung/core.h> 20 #include <linux/mfd/samsung/s2mpg10.h> 21 #include <linux/mfd/samsung/s2mpg11.h> 22 #include <linux/mfd/samsung/s2mps11.h> 23 #include <linux/mfd/samsung/s2mps13.h> 24 #include <linux/mfd/samsung/s2mps14.h> 25 #include <linux/mfd/samsung/s2mps15.h> 26 #include <linux/mfd/samsung/s2mpu02.h> 27 #include <linux/mfd/samsung/s2mpu05.h> 28 29 enum { 30 S2MPG10_REGULATOR_OPS_STD, 31 S2MPG10_REGULATOR_OPS_EXTCONTROL, 32 }; 33 34 /* The highest number of possible regulators for supported devices. */ 35 #define S2MPS_REGULATOR_MAX S2MPS13_REGULATOR_MAX 36 struct s2mps11_info { 37 int ramp_delay2; 38 int ramp_delay34; 39 int ramp_delay5; 40 int ramp_delay16; 41 int ramp_delay7810; 42 int ramp_delay9; 43 44 enum sec_device_type dev_type; 45 46 /* 47 * One bit for each S2MPS11/S2MPS13/S2MPS14/S2MPU02 regulator whether 48 * the suspend mode was enabled. 49 */ 50 DECLARE_BITMAP(suspend_state, S2MPS_REGULATOR_MAX); 51 }; 52 53 #define to_s2mpg10_regulator_desc(x) container_of((x), struct s2mpg10_regulator_desc, desc) 54 55 struct s2mpg10_regulator_desc { 56 struct regulator_desc desc; 57 58 /* Ramp rate during enable, valid for bucks only. */ 59 unsigned int enable_ramp_rate; 60 61 /* Registers for external control of rail. */ 62 unsigned int pctrlsel_reg; 63 unsigned int pctrlsel_mask; 64 /* Populated from DT. */ 65 unsigned int pctrlsel_val; 66 }; 67 68 static int get_ramp_delay(int ramp_delay) 69 { 70 unsigned char cnt = 0; 71 72 ramp_delay /= 6250; 73 74 while (true) { 75 ramp_delay = ramp_delay >> 1; 76 if (ramp_delay == 0) 77 break; 78 cnt++; 79 } 80 81 if (cnt > 3) 82 cnt = 3; 83 84 return cnt; 85 } 86 87 static int s2mps11_regulator_set_voltage_time_sel(struct regulator_dev *rdev, 88 unsigned int old_selector, 89 unsigned int new_selector) 90 { 91 struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev); 92 int rdev_id = rdev_get_id(rdev); 93 unsigned int ramp_delay = 0; 94 int old_volt, new_volt; 95 96 switch (rdev_id) { 97 case S2MPS11_BUCK2: 98 ramp_delay = s2mps11->ramp_delay2; 99 break; 100 case S2MPS11_BUCK3: 101 case S2MPS11_BUCK4: 102 ramp_delay = s2mps11->ramp_delay34; 103 break; 104 case S2MPS11_BUCK5: 105 ramp_delay = s2mps11->ramp_delay5; 106 break; 107 case S2MPS11_BUCK6: 108 case S2MPS11_BUCK1: 109 ramp_delay = s2mps11->ramp_delay16; 110 break; 111 case S2MPS11_BUCK7: 112 case S2MPS11_BUCK8: 113 case S2MPS11_BUCK10: 114 ramp_delay = s2mps11->ramp_delay7810; 115 break; 116 case S2MPS11_BUCK9: 117 ramp_delay = s2mps11->ramp_delay9; 118 } 119 120 if (ramp_delay == 0) 121 ramp_delay = rdev->desc->ramp_delay; 122 123 old_volt = rdev->desc->min_uV + (rdev->desc->uV_step * old_selector); 124 new_volt = rdev->desc->min_uV + (rdev->desc->uV_step * new_selector); 125 126 return DIV_ROUND_UP(abs(new_volt - old_volt), ramp_delay); 127 } 128 129 static int s2mps11_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) 130 { 131 struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev); 132 unsigned int ramp_val, ramp_shift, ramp_reg = S2MPS11_REG_RAMP_BUCK; 133 unsigned int ramp_enable = 1, enable_shift = 0; 134 int rdev_id = rdev_get_id(rdev); 135 int ret; 136 137 switch (rdev_id) { 138 case S2MPS11_BUCK1: 139 if (ramp_delay > s2mps11->ramp_delay16) 140 s2mps11->ramp_delay16 = ramp_delay; 141 else 142 ramp_delay = s2mps11->ramp_delay16; 143 144 ramp_shift = S2MPS11_BUCK16_RAMP_SHIFT; 145 break; 146 case S2MPS11_BUCK2: 147 enable_shift = S2MPS11_BUCK2_RAMP_EN_SHIFT; 148 if (!ramp_delay) { 149 ramp_enable = 0; 150 break; 151 } 152 153 s2mps11->ramp_delay2 = ramp_delay; 154 ramp_shift = S2MPS11_BUCK2_RAMP_SHIFT; 155 ramp_reg = S2MPS11_REG_RAMP; 156 break; 157 case S2MPS11_BUCK3: 158 enable_shift = S2MPS11_BUCK3_RAMP_EN_SHIFT; 159 if (!ramp_delay) { 160 ramp_enable = 0; 161 break; 162 } 163 164 if (ramp_delay > s2mps11->ramp_delay34) 165 s2mps11->ramp_delay34 = ramp_delay; 166 else 167 ramp_delay = s2mps11->ramp_delay34; 168 169 ramp_shift = S2MPS11_BUCK34_RAMP_SHIFT; 170 ramp_reg = S2MPS11_REG_RAMP; 171 break; 172 case S2MPS11_BUCK4: 173 enable_shift = S2MPS11_BUCK4_RAMP_EN_SHIFT; 174 if (!ramp_delay) { 175 ramp_enable = 0; 176 break; 177 } 178 179 if (ramp_delay > s2mps11->ramp_delay34) 180 s2mps11->ramp_delay34 = ramp_delay; 181 else 182 ramp_delay = s2mps11->ramp_delay34; 183 184 ramp_shift = S2MPS11_BUCK34_RAMP_SHIFT; 185 ramp_reg = S2MPS11_REG_RAMP; 186 break; 187 case S2MPS11_BUCK5: 188 s2mps11->ramp_delay5 = ramp_delay; 189 ramp_shift = S2MPS11_BUCK5_RAMP_SHIFT; 190 break; 191 case S2MPS11_BUCK6: 192 enable_shift = S2MPS11_BUCK6_RAMP_EN_SHIFT; 193 if (!ramp_delay) { 194 ramp_enable = 0; 195 break; 196 } 197 198 if (ramp_delay > s2mps11->ramp_delay16) 199 s2mps11->ramp_delay16 = ramp_delay; 200 else 201 ramp_delay = s2mps11->ramp_delay16; 202 203 ramp_shift = S2MPS11_BUCK16_RAMP_SHIFT; 204 break; 205 case S2MPS11_BUCK7: 206 case S2MPS11_BUCK8: 207 case S2MPS11_BUCK10: 208 if (ramp_delay > s2mps11->ramp_delay7810) 209 s2mps11->ramp_delay7810 = ramp_delay; 210 else 211 ramp_delay = s2mps11->ramp_delay7810; 212 213 ramp_shift = S2MPS11_BUCK7810_RAMP_SHIFT; 214 break; 215 case S2MPS11_BUCK9: 216 s2mps11->ramp_delay9 = ramp_delay; 217 ramp_shift = S2MPS11_BUCK9_RAMP_SHIFT; 218 break; 219 default: 220 return 0; 221 } 222 223 if (!ramp_enable) 224 goto ramp_disable; 225 226 /* Ramp delay can be enabled/disabled only for buck[2346] */ 227 if ((rdev_id >= S2MPS11_BUCK2 && rdev_id <= S2MPS11_BUCK4) || 228 rdev_id == S2MPS11_BUCK6) { 229 ret = regmap_update_bits(rdev->regmap, S2MPS11_REG_RAMP, 230 1 << enable_shift, 1 << enable_shift); 231 if (ret) { 232 dev_err(&rdev->dev, "failed to enable ramp rate\n"); 233 return ret; 234 } 235 } 236 237 ramp_val = get_ramp_delay(ramp_delay); 238 239 return regmap_update_bits(rdev->regmap, ramp_reg, 0x3 << ramp_shift, 240 ramp_val << ramp_shift); 241 242 ramp_disable: 243 return regmap_update_bits(rdev->regmap, S2MPS11_REG_RAMP, 244 1 << enable_shift, 0); 245 } 246 247 static int s2mps11_regulator_enable(struct regulator_dev *rdev) 248 { 249 struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev); 250 int rdev_id = rdev_get_id(rdev); 251 unsigned int val; 252 253 switch (s2mps11->dev_type) { 254 case S2MPS11X: 255 if (test_bit(rdev_id, s2mps11->suspend_state)) 256 val = S2MPS14_ENABLE_SUSPEND; 257 else 258 val = rdev->desc->enable_mask; 259 break; 260 case S2MPS13X: 261 case S2MPS14X: 262 if (test_bit(rdev_id, s2mps11->suspend_state)) 263 val = S2MPS14_ENABLE_SUSPEND; 264 else if (rdev->ena_pin) 265 val = S2MPS14_ENABLE_EXT_CONTROL; 266 else 267 val = rdev->desc->enable_mask; 268 break; 269 case S2MPU02: 270 if (test_bit(rdev_id, s2mps11->suspend_state)) 271 val = S2MPU02_ENABLE_SUSPEND; 272 else 273 val = rdev->desc->enable_mask; 274 break; 275 case S2MPU05: 276 val = rdev->desc->enable_mask; 277 break; 278 default: 279 return -EINVAL; 280 } 281 282 return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, 283 rdev->desc->enable_mask, val); 284 } 285 286 static int s2mps11_regulator_set_suspend_disable(struct regulator_dev *rdev) 287 { 288 int ret; 289 unsigned int val, state; 290 struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev); 291 int rdev_id = rdev_get_id(rdev); 292 293 /* Below LDO should be always on or does not support suspend mode. */ 294 switch (s2mps11->dev_type) { 295 case S2MPS11X: 296 switch (rdev_id) { 297 case S2MPS11_LDO2: 298 case S2MPS11_LDO36: 299 case S2MPS11_LDO37: 300 case S2MPS11_LDO38: 301 return 0; 302 default: 303 state = S2MPS14_ENABLE_SUSPEND; 304 break; 305 } 306 break; 307 case S2MPS13X: 308 case S2MPS14X: 309 switch (rdev_id) { 310 case S2MPS14_LDO3: 311 return 0; 312 default: 313 state = S2MPS14_ENABLE_SUSPEND; 314 break; 315 } 316 break; 317 case S2MPU02: 318 switch (rdev_id) { 319 case S2MPU02_LDO13: 320 case S2MPU02_LDO14: 321 case S2MPU02_LDO15: 322 case S2MPU02_LDO17: 323 case S2MPU02_BUCK7: 324 state = S2MPU02_DISABLE_SUSPEND; 325 break; 326 default: 327 state = S2MPU02_ENABLE_SUSPEND; 328 break; 329 } 330 break; 331 default: 332 return -EINVAL; 333 } 334 335 ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &val); 336 if (ret < 0) 337 return ret; 338 339 set_bit(rdev_id, s2mps11->suspend_state); 340 /* 341 * Don't enable suspend mode if regulator is already disabled because 342 * this would effectively for a short time turn on the regulator after 343 * resuming. 344 * However we still want to toggle the suspend_state bit for regulator 345 * in case if it got enabled before suspending the system. 346 */ 347 if (!(val & rdev->desc->enable_mask)) 348 return 0; 349 350 return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, 351 rdev->desc->enable_mask, state); 352 } 353 354 static int s2mps11_of_parse_gpiod(struct device_node *np, 355 const char *con_id, bool optional, 356 const struct regulator_desc *desc, 357 struct regulator_config *config) 358 { 359 struct gpio_desc *ena_gpiod; 360 int ret; 361 362 ena_gpiod = fwnode_gpiod_get_index(of_fwnode_handle(np), con_id, 0, 363 GPIOD_OUT_HIGH | 364 GPIOD_FLAGS_BIT_NONEXCLUSIVE, 365 desc->name 366 ? : dev_name(config->dev)); 367 if (IS_ERR(ena_gpiod)) { 368 ret = PTR_ERR(ena_gpiod); 369 370 /* Ignore all errors except probe defer. */ 371 if (ret == -EPROBE_DEFER) 372 return ret; 373 374 if (ret == -ENOENT) { 375 if (optional) 376 return 0; 377 378 dev_info(config->dev, 379 "No entry for control GPIO for %d/%s in node %pOF\n", 380 desc->id, desc->name, np); 381 } else { 382 dev_warn_probe(config->dev, ret, 383 "Failed to get control GPIO for %d/%s in node %pOF\n", 384 desc->id, desc->name, np); 385 } 386 387 return 0; 388 } 389 390 dev_info(config->dev, "Using GPIO for ext-control over %d/%s\n", 391 desc->id, desc->name); 392 393 config->ena_gpiod = ena_gpiod; 394 395 return 0; 396 } 397 398 static int s2mps11_of_parse_cb(struct device_node *np, 399 const struct regulator_desc *desc, 400 struct regulator_config *config) 401 { 402 const struct s2mps11_info *s2mps11 = config->driver_data; 403 404 if (s2mps11->dev_type == S2MPS14X) 405 switch (desc->id) { 406 case S2MPS14_LDO10: 407 case S2MPS14_LDO11: 408 case S2MPS14_LDO12: 409 break; 410 411 default: 412 return 0; 413 } 414 else 415 return 0; 416 417 return s2mps11_of_parse_gpiod(np, "samsung,ext-control", false, desc, 418 config); 419 } 420 421 static int s2mpg10_of_parse_cb(struct device_node *np, 422 const struct regulator_desc *desc, 423 struct regulator_config *config) 424 { 425 const struct s2mps11_info *s2mps11 = config->driver_data; 426 struct s2mpg10_regulator_desc *s2mpg10_desc = to_s2mpg10_regulator_desc(desc); 427 static const u32 ext_control_s2mpg10[] = { 428 [S2MPG10_EXTCTRL_PWREN] = S2MPG10_PCTRLSEL_PWREN, 429 [S2MPG10_EXTCTRL_PWREN_MIF] = S2MPG10_PCTRLSEL_PWREN_MIF, 430 [S2MPG10_EXTCTRL_AP_ACTIVE_N] = S2MPG10_PCTRLSEL_AP_ACTIVE_N, 431 [S2MPG10_EXTCTRL_CPUCL1_EN] = S2MPG10_PCTRLSEL_CPUCL1_EN, 432 [S2MPG10_EXTCTRL_CPUCL1_EN2] = S2MPG10_PCTRLSEL_CPUCL1_EN2, 433 [S2MPG10_EXTCTRL_CPUCL2_EN] = S2MPG10_PCTRLSEL_CPUCL2_EN, 434 [S2MPG10_EXTCTRL_CPUCL2_EN2] = S2MPG10_PCTRLSEL_CPUCL2_EN2, 435 [S2MPG10_EXTCTRL_TPU_EN] = S2MPG10_PCTRLSEL_TPU_EN, 436 [S2MPG10_EXTCTRL_TPU_EN2] = S2MPG10_PCTRLSEL_TPU_EN2, 437 [S2MPG10_EXTCTRL_TCXO_ON] = S2MPG10_PCTRLSEL_TCXO_ON, 438 [S2MPG10_EXTCTRL_TCXO_ON2] = S2MPG10_PCTRLSEL_TCXO_ON2, 439 [S2MPG10_EXTCTRL_LDO20M_EN2] = S2MPG10_PCTRLSEL_LDO20M_EN2, 440 [S2MPG10_EXTCTRL_LDO20M_EN] = S2MPG10_PCTRLSEL_LDO20M_EN, 441 }; 442 static const u32 ext_control_s2mpg11[] = { 443 [S2MPG11_EXTCTRL_PWREN] = S2MPG11_PCTRLSEL_PWREN, 444 [S2MPG11_EXTCTRL_PWREN_MIF] = S2MPG11_PCTRLSEL_PWREN_MIF, 445 [S2MPG11_EXTCTRL_AP_ACTIVE_N] = S2MPG11_PCTRLSEL_AP_ACTIVE_N, 446 [S2MPG11_EXTCTRL_G3D_EN] = S2MPG11_PCTRLSEL_G3D_EN, 447 [S2MPG11_EXTCTRL_G3D_EN2] = S2MPG11_PCTRLSEL_G3D_EN2, 448 [S2MPG11_EXTCTRL_AOC_VDD] = S2MPG11_PCTRLSEL_AOC_VDD, 449 [S2MPG11_EXTCTRL_AOC_RET] = S2MPG11_PCTRLSEL_AOC_RET, 450 [S2MPG11_EXTCTRL_UFS_EN] = S2MPG11_PCTRLSEL_UFS_EN, 451 [S2MPG11_EXTCTRL_LDO13S_EN] = S2MPG11_PCTRLSEL_LDO13S_EN, 452 }; 453 u32 ext_control; 454 455 if (s2mps11->dev_type != S2MPG10 && s2mps11->dev_type != S2MPG11) 456 return 0; 457 458 if (of_property_read_u32(np, "samsung,ext-control", &ext_control)) 459 return 0; 460 461 switch (s2mps11->dev_type) { 462 case S2MPG10: 463 switch (desc->id) { 464 case S2MPG10_BUCK1 ... S2MPG10_BUCK7: 465 case S2MPG10_BUCK10: 466 case S2MPG10_LDO3 ... S2MPG10_LDO19: 467 if (ext_control > S2MPG10_EXTCTRL_TCXO_ON2) 468 return -EINVAL; 469 break; 470 471 case S2MPG10_LDO20: 472 if (ext_control < S2MPG10_EXTCTRL_LDO20M_EN2 || 473 ext_control > S2MPG10_EXTCTRL_LDO20M_EN) 474 return -EINVAL; 475 break; 476 477 default: 478 return -EINVAL; 479 } 480 481 ext_control = ext_control_s2mpg10[ext_control]; 482 break; 483 484 case S2MPG11: 485 switch (desc->id) { 486 case S2MPG11_BUCK1 ... S2MPG11_BUCK3: 487 case S2MPG11_BUCK5: 488 case S2MPG11_BUCK8: 489 case S2MPG11_BUCK9: 490 case S2MPG11_BUCKD: 491 case S2MPG11_BUCKA: 492 case S2MPG11_LDO1: 493 case S2MPG11_LDO2: 494 case S2MPG11_LDO8: 495 case S2MPG11_LDO13: 496 if (ext_control > S2MPG11_EXTCTRL_LDO13S_EN) 497 return -EINVAL; 498 break; 499 500 default: 501 return -EINVAL; 502 } 503 504 ext_control = ext_control_s2mpg11[ext_control]; 505 break; 506 507 default: 508 return -EINVAL; 509 } 510 511 /* 512 * If the regulator should be configured for external control, then: 513 * 1) the PCTRLSELx register needs to be set accordingly 514 * 2) regulator_desc::enable_val needs to be: 515 * a) updated and 516 * b) written to the hardware 517 * 3) we switch to the ::ops that provide an empty ::enable() and no 518 * ::disable() implementations 519 * 520 * Points 1) and 2b) will be handled in _probe(), after 521 * devm_regulator_register() returns, so that we can properly act on 522 * failures, since the regulator core ignores most return values from 523 * this parse callback. 524 */ 525 s2mpg10_desc->pctrlsel_val = ext_control; 526 s2mpg10_desc->pctrlsel_val <<= (ffs(s2mpg10_desc->pctrlsel_mask) - 1); 527 528 s2mpg10_desc->desc.enable_val = S2MPG10_PMIC_CTRL_ENABLE_EXT; 529 s2mpg10_desc->desc.enable_val <<= (ffs(desc->enable_mask) - 1); 530 531 ++s2mpg10_desc->desc.ops; 532 533 return s2mps11_of_parse_gpiod(np, "enable", true, desc, config); 534 } 535 536 static int s2mpg10_enable_ext_control(struct s2mps11_info *s2mps11, 537 struct regulator_dev *rdev) 538 { 539 const struct s2mpg10_regulator_desc *s2mpg10_desc; 540 int ret; 541 542 switch (s2mps11->dev_type) { 543 case S2MPG10: 544 case S2MPG11: 545 s2mpg10_desc = to_s2mpg10_regulator_desc(rdev->desc); 546 break; 547 548 default: 549 return 0; 550 } 551 552 ret = regmap_update_bits(rdev_get_regmap(rdev), 553 s2mpg10_desc->pctrlsel_reg, 554 s2mpg10_desc->pctrlsel_mask, 555 s2mpg10_desc->pctrlsel_val); 556 if (ret) 557 return dev_err_probe(rdev_get_dev(rdev), ret, 558 "failed to configure pctrlsel for %s\n", 559 rdev->desc->name); 560 561 /* 562 * When using external control, the enable bit of the regulator still 563 * needs to be set. The actual state will still be determined by the 564 * external signal. 565 */ 566 ret = regulator_enable_regmap(rdev); 567 if (ret) 568 return dev_err_probe(rdev_get_dev(rdev), ret, 569 "failed to enable regulator %s\n", 570 rdev->desc->name); 571 572 return 0; 573 } 574 575 static int s2mpg10_regulator_enable_nop(struct regulator_dev *rdev) 576 { 577 /* 578 * We need to provide this, otherwise the regulator core's enable on 579 * this regulator will return a failure and subsequently disable our 580 * parent regulator. 581 */ 582 return 0; 583 } 584 585 static int s2mpg10_regulator_buck_enable_time(struct regulator_dev *rdev) 586 { 587 const struct s2mpg10_regulator_desc * const s2mpg10_desc = 588 to_s2mpg10_regulator_desc(rdev->desc); 589 const struct regulator_ops * const ops = rdev->desc->ops; 590 int vsel, curr_uV; 591 592 vsel = ops->get_voltage_sel(rdev); 593 if (vsel < 0) 594 return vsel; 595 596 curr_uV = ops->list_voltage(rdev, vsel); 597 if (curr_uV < 0) 598 return curr_uV; 599 600 return (rdev->desc->enable_time 601 + DIV_ROUND_UP(curr_uV, s2mpg10_desc->enable_ramp_rate)); 602 } 603 604 static int s2mpg1x_regulator_buck_set_voltage_time(struct regulator_dev *rdev, 605 int old_uV, int new_uV, 606 unsigned int ramp_reg, 607 unsigned int ramp_mask) 608 { 609 unsigned int ramp_sel, ramp_rate; 610 int ret; 611 612 if (old_uV == new_uV) 613 return 0; 614 615 ret = regmap_read(rdev->regmap, ramp_reg, &ramp_sel); 616 if (ret) 617 return ret; 618 619 ramp_sel &= ramp_mask; 620 ramp_sel >>= ffs(ramp_mask) - 1; 621 if (ramp_sel >= rdev->desc->n_ramp_values || 622 !rdev->desc->ramp_delay_table) 623 return -EINVAL; 624 625 ramp_rate = rdev->desc->ramp_delay_table[ramp_sel]; 626 627 return DIV_ROUND_UP(abs(new_uV - old_uV), ramp_rate); 628 } 629 630 static int s2mpg10_regulator_buck_set_voltage_time(struct regulator_dev *rdev, 631 int old_uV, int new_uV) 632 { 633 unsigned int ramp_reg; 634 635 ramp_reg = rdev->desc->ramp_reg; 636 if (old_uV > new_uV) 637 /* The downwards ramp is at a different offset. */ 638 ramp_reg += S2MPG10_PMIC_DVS_RAMP4 - S2MPG10_PMIC_DVS_RAMP1; 639 640 return s2mpg1x_regulator_buck_set_voltage_time(rdev, old_uV, new_uV, 641 ramp_reg, 642 rdev->desc->ramp_mask); 643 } 644 645 static int s2mpg11_regulator_buck_set_voltage_time(struct regulator_dev *rdev, 646 int old_uV, int new_uV) 647 { 648 unsigned int ramp_mask; 649 650 ramp_mask = rdev->desc->ramp_mask; 651 if (old_uV > new_uV) 652 /* The downwards mask is at a different position. */ 653 ramp_mask >>= 2; 654 655 return s2mpg1x_regulator_buck_set_voltage_time(rdev, old_uV, new_uV, 656 rdev->desc->ramp_reg, 657 ramp_mask); 658 } 659 660 /* 661 * We assign both, ::set_voltage_time() and ::set_voltage_time_sel(), because 662 * only if the latter is != NULL, the regulator core will call neither during 663 * DVS if the regulator is disabled. If the latter is NULL, the core always 664 * calls the ::set_voltage_time() callback, which would give incorrect results 665 * if the regulator is off. 666 * At the same time, we do need ::set_voltage_time() due to differing upwards 667 * and downwards ramps and we can not make that code dependent on the regulator 668 * enable state, as that would break regulator_set_voltage_time() which 669 * expects a correct result no matter the enable state. 670 */ 671 static const struct regulator_ops s2mpg10_reg_buck_ops[] = { 672 [S2MPG10_REGULATOR_OPS_STD] = { 673 .list_voltage = regulator_list_voltage_linear_range, 674 .map_voltage = regulator_map_voltage_linear_range, 675 .is_enabled = regulator_is_enabled_regmap, 676 .enable = regulator_enable_regmap, 677 .disable = regulator_disable_regmap, 678 .enable_time = s2mpg10_regulator_buck_enable_time, 679 .get_voltage_sel = regulator_get_voltage_sel_regmap, 680 .set_voltage_sel = regulator_set_voltage_sel_regmap, 681 .set_voltage_time = s2mpg10_regulator_buck_set_voltage_time, 682 .set_voltage_time_sel = regulator_set_voltage_time_sel, 683 .set_ramp_delay = regulator_set_ramp_delay_regmap, 684 }, 685 [S2MPG10_REGULATOR_OPS_EXTCONTROL] = { 686 .list_voltage = regulator_list_voltage_linear_range, 687 .map_voltage = regulator_map_voltage_linear_range, 688 .enable = s2mpg10_regulator_enable_nop, 689 .get_voltage_sel = regulator_get_voltage_sel_regmap, 690 .set_voltage_sel = regulator_set_voltage_sel_regmap, 691 .set_voltage_time = s2mpg10_regulator_buck_set_voltage_time, 692 .set_voltage_time_sel = regulator_set_voltage_time_sel, 693 .set_ramp_delay = regulator_set_ramp_delay_regmap, 694 } 695 }; 696 697 #define s2mpg10_buck_to_ramp_mask(n) (GENMASK(1, 0) << (((n) % 4) * 2)) 698 699 /* 700 * The ramp_delay during enable is fixed (12.5mV/μs), while the ramp during 701 * DVS can be adjusted. Linux can adjust the ramp delay via DT, in which case 702 * the regulator core will modify the regulator's constraints and call our 703 * .set_ramp_delay() which updates the DVS ramp in ramp_reg. 704 * For enable, our .enable_time() unconditionally uses enable_ramp_rate 705 * (12.5mV/μs) while our ::set_voltage_time() takes the value in ramp_reg 706 * into account. 707 */ 708 #define regulator_desc_s2mpg1x_buck_cmn(_name, _id, _supply, _ops, \ 709 _vrange, _vsel_reg, _vsel_mask, _en_reg, _en_mask, \ 710 _r_reg, _r_mask, _r_table, _r_table_sz, \ 711 _en_time) { \ 712 .name = "buck" _name, \ 713 .supply_name = _supply, \ 714 .of_match = of_match_ptr("buck" _name), \ 715 .regulators_node = of_match_ptr("regulators"), \ 716 .of_parse_cb = s2mpg10_of_parse_cb, \ 717 .id = _id, \ 718 .ops = &(_ops)[0], \ 719 .type = REGULATOR_VOLTAGE, \ 720 .owner = THIS_MODULE, \ 721 .linear_ranges = _vrange, \ 722 .n_linear_ranges = ARRAY_SIZE(_vrange), \ 723 .n_voltages = _vrange##_count, \ 724 .vsel_reg = _vsel_reg, \ 725 .vsel_mask = _vsel_mask, \ 726 .enable_reg = _en_reg, \ 727 .enable_mask = _en_mask, \ 728 .ramp_reg = _r_reg, \ 729 .ramp_mask = _r_mask, \ 730 .ramp_delay_table = _r_table, \ 731 .n_ramp_values = _r_table_sz, \ 732 .enable_time = _en_time, /* + V/enable_ramp_rate */ \ 733 } 734 735 #define regulator_desc_s2mpg10_buck(_num, _vrange, _r_reg) \ 736 regulator_desc_s2mpg1x_buck_cmn(#_num "m", S2MPG10_BUCK##_num, \ 737 "vinb"#_num "m", s2mpg10_reg_buck_ops, _vrange, \ 738 S2MPG10_PMIC_B##_num##M_OUT1, GENMASK(7, 0), \ 739 S2MPG10_PMIC_B##_num##M_CTRL, GENMASK(7, 6), \ 740 S2MPG10_PMIC_##_r_reg, \ 741 s2mpg10_buck_to_ramp_mask(S2MPG10_BUCK##_num \ 742 - S2MPG10_BUCK1), \ 743 s2mpg10_buck_ramp_table, \ 744 ARRAY_SIZE(s2mpg10_buck_ramp_table), 30) 745 746 #define s2mpg10_regulator_desc_buck_cm(_num, _vrange, _r_reg) \ 747 .desc = regulator_desc_s2mpg10_buck(_num, _vrange, _r_reg), \ 748 .enable_ramp_rate = 12500 749 750 #define s2mpg10_regulator_desc_buck_gpio(_num, _vrange, _r_reg, \ 751 _pc_reg, _pc_mask) \ 752 [S2MPG10_BUCK##_num] = { \ 753 s2mpg10_regulator_desc_buck_cm(_num, _vrange, _r_reg), \ 754 .pctrlsel_reg = S2MPG10_PMIC_##_pc_reg, \ 755 .pctrlsel_mask = _pc_mask, \ 756 } 757 758 #define s2mpg10_regulator_desc_buck(_num, _vrange, _r_reg) \ 759 [S2MPG10_BUCK##_num] = { \ 760 s2mpg10_regulator_desc_buck_cm(_num, _vrange, _r_reg), \ 761 } 762 763 /* ops for S2MPG1x LDO regulators without ramp control */ 764 static const struct regulator_ops s2mpg10_reg_ldo_ops[] = { 765 [S2MPG10_REGULATOR_OPS_STD] = { 766 .list_voltage = regulator_list_voltage_linear_range, 767 .map_voltage = regulator_map_voltage_linear_range, 768 .is_enabled = regulator_is_enabled_regmap, 769 .enable = regulator_enable_regmap, 770 .disable = regulator_disable_regmap, 771 .get_voltage_sel = regulator_get_voltage_sel_regmap, 772 .set_voltage_sel = regulator_set_voltage_sel_regmap, 773 .set_voltage_time_sel = regulator_set_voltage_time_sel, 774 }, 775 [S2MPG10_REGULATOR_OPS_EXTCONTROL] = { 776 .list_voltage = regulator_list_voltage_linear_range, 777 .map_voltage = regulator_map_voltage_linear_range, 778 .enable = s2mpg10_regulator_enable_nop, 779 .get_voltage_sel = regulator_get_voltage_sel_regmap, 780 .set_voltage_sel = regulator_set_voltage_sel_regmap, 781 .set_voltage_time_sel = regulator_set_voltage_time_sel, 782 } 783 }; 784 785 /* ops for S2MPG1x LDO regulators that have ramp control */ 786 static const struct regulator_ops s2mpg10_reg_ldo_ramp_ops[] = { 787 [S2MPG10_REGULATOR_OPS_STD] = { 788 .list_voltage = regulator_list_voltage_linear_range, 789 .map_voltage = regulator_map_voltage_linear_range, 790 .is_enabled = regulator_is_enabled_regmap, 791 .enable = regulator_enable_regmap, 792 .disable = regulator_disable_regmap, 793 .get_voltage_sel = regulator_get_voltage_sel_regmap, 794 .set_voltage_sel = regulator_set_voltage_sel_regmap, 795 .set_voltage_time_sel = regulator_set_voltage_time_sel, 796 .set_ramp_delay = regulator_set_ramp_delay_regmap, 797 }, 798 [S2MPG10_REGULATOR_OPS_EXTCONTROL] = { 799 .list_voltage = regulator_list_voltage_linear_range, 800 .map_voltage = regulator_map_voltage_linear_range, 801 .enable = s2mpg10_regulator_enable_nop, 802 .get_voltage_sel = regulator_get_voltage_sel_regmap, 803 .set_voltage_sel = regulator_set_voltage_sel_regmap, 804 .set_voltage_time_sel = regulator_set_voltage_time_sel, 805 .set_ramp_delay = regulator_set_ramp_delay_regmap, 806 } 807 }; 808 809 #define regulator_desc_s2mpg1x_ldo_cmn(_name, _id, _supply, _ops, \ 810 _vrange, _vsel_reg, _vsel_mask, _en_reg, _en_mask, \ 811 _ramp_delay, _r_reg, _r_mask, _r_table, _r_table_sz) { \ 812 .name = "ldo" _name, \ 813 .supply_name = _supply, \ 814 .of_match = of_match_ptr("ldo" _name), \ 815 .regulators_node = of_match_ptr("regulators"), \ 816 .of_parse_cb = s2mpg10_of_parse_cb, \ 817 .id = _id, \ 818 .ops = &(_ops)[0], \ 819 .type = REGULATOR_VOLTAGE, \ 820 .owner = THIS_MODULE, \ 821 .linear_ranges = _vrange, \ 822 .n_linear_ranges = ARRAY_SIZE(_vrange), \ 823 .n_voltages = _vrange##_count, \ 824 .vsel_reg = _vsel_reg, \ 825 .vsel_mask = _vsel_mask, \ 826 .enable_reg = _en_reg, \ 827 .enable_mask = _en_mask, \ 828 .ramp_delay = _ramp_delay, \ 829 .ramp_reg = _r_reg, \ 830 .ramp_mask = _r_mask, \ 831 .ramp_delay_table = _r_table, \ 832 .n_ramp_values = _r_table_sz, \ 833 .enable_time = 130, /* startup 20+-10 + ramp 30..100μs */ \ 834 } 835 836 #define s2mpg10_regulator_desc_ldo_cmn(_num, _supply, _ops, _vrange, \ 837 _vsel_reg_sfx, _vsel_mask, _en_reg, _en_mask, \ 838 _ramp_delay, _r_reg, _r_mask, _r_table, _r_table_sz, \ 839 _pc_reg, _pc_mask) \ 840 [S2MPG10_LDO##_num] = { \ 841 .desc = regulator_desc_s2mpg1x_ldo_cmn(#_num "m", \ 842 S2MPG10_LDO##_num, _supply, _ops, \ 843 _vrange, \ 844 S2MPG10_PMIC_L##_num##M_##_vsel_reg_sfx, \ 845 _vsel_mask, \ 846 S2MPG10_PMIC_##_en_reg, _en_mask, \ 847 _ramp_delay, _r_reg, _r_mask, _r_table, \ 848 _r_table_sz), \ 849 .pctrlsel_reg = _pc_reg, \ 850 .pctrlsel_mask = _pc_mask, \ 851 } 852 853 /* standard LDO via LxM_CTRL */ 854 #define s2mpg10_regulator_desc_ldo(_num, _supply, _vrange) \ 855 s2mpg10_regulator_desc_ldo_cmn(_num, _supply, \ 856 s2mpg10_reg_ldo_ops, _vrange, CTRL, GENMASK(5, 0), \ 857 L##_num##M_CTRL, BIT(7), \ 858 0, 0, 0, NULL, 0, \ 859 0, 0) 860 861 /* standard LDO but possibly GPIO controlled */ 862 #define s2mpg10_regulator_desc_ldo_gpio(_num, _supply, _vrange, \ 863 _pc_reg, _pc_mask) \ 864 s2mpg10_regulator_desc_ldo_cmn(_num, _supply, \ 865 s2mpg10_reg_ldo_ops, _vrange, CTRL, GENMASK(5, 0), \ 866 L##_num##M_CTRL, GENMASK(7, 6), \ 867 0, 0, 0, NULL, 0, \ 868 S2MPG10_PMIC_##_pc_reg, _pc_mask) 869 870 /* LDO with ramp support and possibly GPIO controlled */ 871 #define s2mpg10_regulator_desc_ldo_ramp(_num, _supply, _vrange, \ 872 _en_mask, _r_reg, _pc_reg, _pc_mask) \ 873 s2mpg10_regulator_desc_ldo_cmn(_num, _supply, \ 874 s2mpg10_reg_ldo_ramp_ops, _vrange, CTRL1, GENMASK(6, 0), \ 875 LDO_CTRL2, _en_mask, \ 876 6250, S2MPG10_PMIC_##_r_reg, GENMASK(1, 0), \ 877 s2mpg10_ldo_ramp_table, \ 878 ARRAY_SIZE(s2mpg10_ldo_ramp_table), \ 879 S2MPG10_PMIC_##_pc_reg, _pc_mask) 880 881 #define S2MPG10_VOLTAGE_RANGE(_prefix, _idx, _offs_uV, _min_uV, \ 882 _max_uV, _step_uV) \ 883 static const struct linear_range _prefix##_vranges##_idx[] = { \ 884 REGULATOR_LINEAR_VRANGE(_offs_uV, _min_uV, _max_uV, _step_uV) \ 885 }; \ 886 static const unsigned int _prefix##_vranges##_idx##_count = \ 887 ((((_max_uV) - (_offs_uV)) / (_step_uV)) + 1) 888 889 /* voltage range for s2mpg10 BUCK 1, 2, 3, 4, 5, 7, 8, 9, 10 */ 890 S2MPG10_VOLTAGE_RANGE(s2mpg10_buck, 1, 200000, 450000, 1300000, STEP_6_25_MV); 891 892 /* voltage range for s2mpg10 BUCK 6 */ 893 S2MPG10_VOLTAGE_RANGE(s2mpg10_buck, 6, 200000, 450000, 1350000, STEP_6_25_MV); 894 895 static const unsigned int s2mpg10_buck_ramp_table[] = { 896 6250, 12500, 25000 897 }; 898 899 /* voltage range for s2mpg10 LDO 1, 11, 12 */ 900 S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 1, 300000, 700000, 1300000, STEP_12_5_MV); 901 902 /* voltage range for s2mpg10 LDO 2, 4, 9, 14, 18, 19, 20, 23, 25, 29, 30, 31 */ 903 S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 2, 700000, 1600000, 1950000, STEP_25_MV); 904 905 /* voltage range for s2mpg10 LDO 3, 5, 6, 8, 16, 17, 24, 28 */ 906 S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 3, 725000, 725000, 1300000, STEP_12_5_MV); 907 908 /* voltage range for s2mpg10 LDO 7 */ 909 S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 7, 300000, 450000, 1300000, STEP_12_5_MV); 910 911 /* voltage range for s2mpg10 LDO 13, 15 */ 912 S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 13, 300000, 450000, 950000, STEP_12_5_MV); 913 914 /* voltage range for s2mpg10 LDO 10 */ 915 S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 10, 1800000, 1800000, 3350000, STEP_25_MV); 916 917 /* voltage range for s2mpg10 LDO 21, 22, 26, 27 */ 918 S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 21, 1800000, 2500000, 3300000, STEP_25_MV); 919 920 /* possible ramp values for s2mpg10 LDO 1, 7, 11, 12, 13, 15 */ 921 static const unsigned int s2mpg10_ldo_ramp_table[] = { 922 6250, 12500 923 }; 924 925 static const struct s2mpg10_regulator_desc s2mpg10_regulators[] = { 926 s2mpg10_regulator_desc_buck_gpio(1, s2mpg10_buck_vranges1, DVS_RAMP1, 927 PCTRLSEL1, GENMASK(3, 0)), 928 s2mpg10_regulator_desc_buck_gpio(2, s2mpg10_buck_vranges1, DVS_RAMP1, 929 PCTRLSEL1, GENMASK(7, 4)), 930 s2mpg10_regulator_desc_buck_gpio(3, s2mpg10_buck_vranges1, DVS_RAMP1, 931 PCTRLSEL2, GENMASK(3, 0)), 932 s2mpg10_regulator_desc_buck_gpio(4, s2mpg10_buck_vranges1, DVS_RAMP1, 933 PCTRLSEL2, GENMASK(7, 4)), 934 s2mpg10_regulator_desc_buck_gpio(5, s2mpg10_buck_vranges1, DVS_RAMP2, 935 PCTRLSEL3, GENMASK(3, 0)), 936 s2mpg10_regulator_desc_buck_gpio(6, s2mpg10_buck_vranges6, DVS_RAMP2, 937 PCTRLSEL3, GENMASK(7, 4)), 938 s2mpg10_regulator_desc_buck_gpio(7, s2mpg10_buck_vranges1, DVS_RAMP2, 939 PCTRLSEL4, GENMASK(3, 0)), 940 s2mpg10_regulator_desc_buck(8, s2mpg10_buck_vranges1, DVS_RAMP2), 941 s2mpg10_regulator_desc_buck(9, s2mpg10_buck_vranges1, DVS_RAMP3), 942 s2mpg10_regulator_desc_buck_gpio(10, s2mpg10_buck_vranges1, DVS_RAMP3, 943 PCTRLSEL4, GENMASK(7, 4)), 944 /* 945 * Standard LDO via LxM_CTRL but non-standard (greater) V-range and with 946 * ramp support. 947 */ 948 s2mpg10_regulator_desc_ldo_cmn(1, "vinl3m", s2mpg10_reg_ldo_ramp_ops, 949 s2mpg10_ldo_vranges1, 950 CTRL, GENMASK(6, 0), 951 L1M_CTRL, BIT(7), 952 6250, S2MPG10_PMIC_DVS_RAMP6, 953 GENMASK(5, 4), s2mpg10_ldo_ramp_table, 954 ARRAY_SIZE(s2mpg10_ldo_ramp_table), 955 0, 0), 956 s2mpg10_regulator_desc_ldo(2, "vinl9m", s2mpg10_ldo_vranges2), 957 s2mpg10_regulator_desc_ldo_gpio(3, "vinl4m", s2mpg10_ldo_vranges3, 958 PCTRLSEL5, GENMASK(3, 0)), 959 s2mpg10_regulator_desc_ldo_gpio(4, "vinl9m", s2mpg10_ldo_vranges2, 960 PCTRLSEL5, GENMASK(7, 4)), 961 s2mpg10_regulator_desc_ldo_gpio(5, "vinl3m", s2mpg10_ldo_vranges3, 962 PCTRLSEL6, GENMASK(3, 0)), 963 s2mpg10_regulator_desc_ldo_gpio(6, "vinl7m", s2mpg10_ldo_vranges3, 964 PCTRLSEL6, GENMASK(7, 4)), 965 /* 966 * Ramp support, possibly GPIO controlled, non-standard (greater) V- 967 * range and enable reg & mask. 968 */ 969 s2mpg10_regulator_desc_ldo_cmn(7, "vinl3m", s2mpg10_reg_ldo_ramp_ops, 970 s2mpg10_ldo_vranges7, 971 CTRL, GENMASK(6, 0), 972 LDO_CTRL1, GENMASK(4, 3), 973 6250, S2MPG10_PMIC_DVS_RAMP6, 974 GENMASK(7, 6), s2mpg10_ldo_ramp_table, 975 ARRAY_SIZE(s2mpg10_ldo_ramp_table), 976 S2MPG10_PMIC_PCTRLSEL7, GENMASK(3, 0)), 977 s2mpg10_regulator_desc_ldo_gpio(8, "vinl4m", s2mpg10_ldo_vranges3, 978 PCTRLSEL7, GENMASK(7, 4)), 979 s2mpg10_regulator_desc_ldo_gpio(9, "vinl10m", s2mpg10_ldo_vranges2, 980 PCTRLSEL8, GENMASK(3, 0)), 981 s2mpg10_regulator_desc_ldo_gpio(10, "vinl15m", s2mpg10_ldo_vranges10, 982 PCTRLSEL8, GENMASK(7, 4)), 983 s2mpg10_regulator_desc_ldo_ramp(11, "vinl7m", s2mpg10_ldo_vranges1, 984 GENMASK(1, 0), DVS_SYNC_CTRL3, 985 PCTRLSEL9, GENMASK(3, 0)), 986 s2mpg10_regulator_desc_ldo_ramp(12, "vinl8m", s2mpg10_ldo_vranges1, 987 GENMASK(3, 2), DVS_SYNC_CTRL4, 988 PCTRLSEL9, GENMASK(7, 4)), 989 s2mpg10_regulator_desc_ldo_ramp(13, "vinl1m", s2mpg10_ldo_vranges13, 990 GENMASK(5, 4), DVS_SYNC_CTRL5, 991 PCTRLSEL10, GENMASK(3, 0)), 992 s2mpg10_regulator_desc_ldo_gpio(14, "vinl10m", s2mpg10_ldo_vranges2, 993 PCTRLSEL10, GENMASK(7, 4)), 994 s2mpg10_regulator_desc_ldo_ramp(15, "vinl2m", s2mpg10_ldo_vranges13, 995 GENMASK(7, 6), DVS_SYNC_CTRL6, 996 PCTRLSEL11, GENMASK(3, 0)), 997 s2mpg10_regulator_desc_ldo_gpio(16, "vinl5m", s2mpg10_ldo_vranges3, 998 PCTRLSEL11, GENMASK(7, 4)), 999 s2mpg10_regulator_desc_ldo_gpio(17, "vinl6m", s2mpg10_ldo_vranges3, 1000 PCTRLSEL12, GENMASK(3, 0)), 1001 s2mpg10_regulator_desc_ldo_gpio(18, "vinl10m", s2mpg10_ldo_vranges2, 1002 PCTRLSEL12, GENMASK(7, 4)), 1003 s2mpg10_regulator_desc_ldo_gpio(19, "vinl10m", s2mpg10_ldo_vranges2, 1004 PCTRLSEL13, GENMASK(3, 0)), 1005 s2mpg10_regulator_desc_ldo_gpio(20, "vinl10m", s2mpg10_ldo_vranges2, 1006 PCTRLSEL13, GENMASK(7, 4)), 1007 s2mpg10_regulator_desc_ldo(21, "vinl14m", s2mpg10_ldo_vranges21), 1008 s2mpg10_regulator_desc_ldo(22, "vinl15m", s2mpg10_ldo_vranges21), 1009 s2mpg10_regulator_desc_ldo(23, "vinl11m", s2mpg10_ldo_vranges2), 1010 s2mpg10_regulator_desc_ldo(24, "vinl7m", s2mpg10_ldo_vranges3), 1011 s2mpg10_regulator_desc_ldo(25, "vinl10m", s2mpg10_ldo_vranges2), 1012 s2mpg10_regulator_desc_ldo(26, "vinl15m", s2mpg10_ldo_vranges21), 1013 s2mpg10_regulator_desc_ldo(27, "vinl15m", s2mpg10_ldo_vranges21), 1014 s2mpg10_regulator_desc_ldo(28, "vinl7m", s2mpg10_ldo_vranges3), 1015 s2mpg10_regulator_desc_ldo(29, "vinl12m", s2mpg10_ldo_vranges2), 1016 s2mpg10_regulator_desc_ldo(30, "vinl13m", s2mpg10_ldo_vranges2), 1017 s2mpg10_regulator_desc_ldo(31, "vinl11m", s2mpg10_ldo_vranges2) 1018 }; 1019 1020 static const struct regulator_ops s2mpg11_reg_buck_ops[] = { 1021 [S2MPG10_REGULATOR_OPS_STD] = { 1022 .list_voltage = regulator_list_voltage_linear_range, 1023 .map_voltage = regulator_map_voltage_linear_range, 1024 .is_enabled = regulator_is_enabled_regmap, 1025 .enable = regulator_enable_regmap, 1026 .disable = regulator_disable_regmap, 1027 .get_voltage_sel = regulator_get_voltage_sel_regmap, 1028 .set_voltage_sel = regulator_set_voltage_sel_regmap, 1029 .set_voltage_time = s2mpg11_regulator_buck_set_voltage_time, 1030 .set_voltage_time_sel = regulator_set_voltage_time_sel, 1031 .enable_time = s2mpg10_regulator_buck_enable_time, 1032 .set_ramp_delay = regulator_set_ramp_delay_regmap, 1033 }, 1034 [S2MPG10_REGULATOR_OPS_EXTCONTROL] = { 1035 .list_voltage = regulator_list_voltage_linear_range, 1036 .map_voltage = regulator_map_voltage_linear_range, 1037 .enable = s2mpg10_regulator_enable_nop, 1038 .get_voltage_sel = regulator_get_voltage_sel_regmap, 1039 .set_voltage_sel = regulator_set_voltage_sel_regmap, 1040 .set_voltage_time = s2mpg11_regulator_buck_set_voltage_time, 1041 .set_voltage_time_sel = regulator_set_voltage_time_sel, 1042 .enable_time = s2mpg10_regulator_buck_enable_time, 1043 .set_ramp_delay = regulator_set_ramp_delay_regmap, 1044 } 1045 }; 1046 1047 #define s2mpg11_buck_to_ramp_mask(n) (GENMASK(3, 2) << (((n) % 2) * 4)) 1048 1049 #define regulator_desc_s2mpg11_buckx(_name, _id, _supply, _vrange, \ 1050 _vsel_reg, _en_reg, _en_mask, _r_reg) \ 1051 regulator_desc_s2mpg1x_buck_cmn(_name, _id, _supply, \ 1052 s2mpg11_reg_buck_ops, _vrange, \ 1053 S2MPG11_PMIC_##_vsel_reg, GENMASK(7, 0), \ 1054 S2MPG11_PMIC_##_en_reg, _en_mask, \ 1055 S2MPG11_PMIC_##_r_reg, \ 1056 s2mpg11_buck_to_ramp_mask(_id - S2MPG11_BUCK1), \ 1057 s2mpg10_buck_ramp_table, \ 1058 ARRAY_SIZE(s2mpg10_buck_ramp_table), 30) 1059 1060 #define s2mpg11_regulator_desc_buck_xm(_num, _vrange, _vsel_reg_sfx, \ 1061 _en_mask, _r_reg, _en_rrate) \ 1062 .desc = regulator_desc_s2mpg11_buckx(#_num"s", \ 1063 S2MPG11_BUCK##_num, "vinb"#_num"s", \ 1064 _vrange, \ 1065 B##_num##S_##_vsel_reg_sfx, \ 1066 B##_num##S_CTRL, _en_mask, \ 1067 _r_reg), \ 1068 .enable_ramp_rate = _en_rrate 1069 1070 #define s2mpg11_regulator_desc_buck_cm(_num, _vrange, _vsel_reg_sfx, \ 1071 _en_mask, _r_reg) \ 1072 [S2MPG11_BUCK##_num] = { \ 1073 s2mpg11_regulator_desc_buck_xm(_num, _vrange, \ 1074 _vsel_reg_sfx, _en_mask, _r_reg, 12500), \ 1075 } 1076 1077 #define s2mpg11_regulator_desc_buckn_cm_gpio(_num, _vrange, \ 1078 _vsel_reg_sfx, _en_mask, _r_reg, _pc_reg, _pc_mask) \ 1079 [S2MPG11_BUCK##_num] = { \ 1080 s2mpg11_regulator_desc_buck_xm(_num, _vrange, \ 1081 _vsel_reg_sfx, _en_mask, _r_reg, 12500), \ 1082 .pctrlsel_reg = S2MPG11_PMIC_##_pc_reg, \ 1083 .pctrlsel_mask = _pc_mask, \ 1084 } 1085 1086 #define s2mpg11_regulator_desc_buck_vm(_num, _vrange, _vsel_reg_sfx, \ 1087 _en_mask, _r_reg) \ 1088 [S2MPG11_BUCK##_num] = { \ 1089 s2mpg11_regulator_desc_buck_xm(_num, _vrange, \ 1090 _vsel_reg_sfx, _en_mask, _r_reg, 25000), \ 1091 } 1092 1093 #define s2mpg11_regulator_desc_bucka(_num, _num_lower, _r_reg, \ 1094 _pc_reg, _pc_mask) \ 1095 [S2MPG11_BUCK##_num] = { \ 1096 .desc = regulator_desc_s2mpg11_buckx(#_num_lower, \ 1097 S2MPG11_BUCK##_num, "vinb"#_num_lower, \ 1098 s2mpg11_buck_vranges##_num_lower, \ 1099 BUCK##_num##_OUT, \ 1100 BUCK##_num##_CTRL, GENMASK(7, 6), \ 1101 _r_reg), \ 1102 .enable_ramp_rate = 25000, \ 1103 .pctrlsel_reg = S2MPG11_PMIC_##_pc_reg, \ 1104 .pctrlsel_mask = _pc_mask, \ 1105 } 1106 1107 #define s2mpg11_regulator_desc_buckboost() \ 1108 [S2MPG11_BUCKBOOST] = { \ 1109 .desc = regulator_desc_s2mpg1x_buck_cmn("boost", \ 1110 S2MPG11_BUCKBOOST, "vinbb", \ 1111 s2mpg10_reg_ldo_ops, \ 1112 s2mpg11_buck_vrangesboost, \ 1113 S2MPG11_PMIC_BB_OUT1, GENMASK(6, 0), \ 1114 S2MPG11_PMIC_BB_CTRL, BIT(7), \ 1115 0, 0, NULL, 0, 35), \ 1116 .enable_ramp_rate = 17500, \ 1117 } 1118 1119 #define s2mpg11_regulator_desc_ldo_cmn(_num, _supply, _ops, \ 1120 _vrange, _vsel_reg_sfx, _vsel_mask, _en_reg, _en_mask, \ 1121 _ramp_delay, _r_reg, _r_mask, _r_table, _r_table_sz, \ 1122 _pc_reg, _pc_mask) \ 1123 [S2MPG11_LDO##_num] = { \ 1124 .desc = regulator_desc_s2mpg1x_ldo_cmn(#_num "s", \ 1125 S2MPG11_LDO##_num, _supply, _ops, \ 1126 _vrange, \ 1127 S2MPG11_PMIC_L##_num##S_##_vsel_reg_sfx, \ 1128 _vsel_mask, \ 1129 S2MPG11_PMIC_##_en_reg, _en_mask, \ 1130 _ramp_delay, _r_reg, _r_mask, _r_table, \ 1131 _r_table_sz), \ 1132 .pctrlsel_reg = _pc_reg, \ 1133 .pctrlsel_mask = _pc_mask, \ 1134 } 1135 1136 /* standard LDO via LxM_CTRL */ 1137 #define s2mpg11_regulator_desc_ldo(_num, _supply, _vrange) \ 1138 s2mpg11_regulator_desc_ldo_cmn(_num, _supply, \ 1139 s2mpg10_reg_ldo_ops, _vrange, CTRL, GENMASK(5, 0), \ 1140 L##_num##S_CTRL, BIT(7), \ 1141 0, 0, 0, NULL, 0, \ 1142 0, 0) 1143 1144 /* standard LDO but possibly GPIO controlled */ 1145 #define s2mpg11_regulator_desc_ldo_gpio(_num, _supply, _vrange, \ 1146 _pc_reg, _pc_mask) \ 1147 s2mpg11_regulator_desc_ldo_cmn(_num, _supply, \ 1148 s2mpg10_reg_ldo_ops, _vrange, CTRL, GENMASK(5, 0), \ 1149 L##_num##S_CTRL, GENMASK(7, 6), \ 1150 0, 0, 0, NULL, 0, \ 1151 S2MPG11_PMIC_##_pc_reg, _pc_mask) 1152 1153 /* LDO with ramp support and possibly GPIO controlled */ 1154 #define s2mpg11_regulator_desc_ldo_ramp(_num, _supply, _vrange, \ 1155 _en_mask, _r_reg, _pc_reg, _pc_mask) \ 1156 s2mpg11_regulator_desc_ldo_cmn(_num, _supply, \ 1157 s2mpg10_reg_ldo_ramp_ops, _vrange, CTRL1, GENMASK(6, 0), \ 1158 LDO_CTRL1, _en_mask, \ 1159 6250, S2MPG11_PMIC_##_r_reg, GENMASK(1, 0), \ 1160 s2mpg10_ldo_ramp_table, \ 1161 ARRAY_SIZE(s2mpg10_ldo_ramp_table), \ 1162 S2MPG11_PMIC_##_pc_reg, _pc_mask) 1163 1164 /* voltage range for s2mpg11 BUCK 1, 2, 3, 4, 8, 9, 10 */ 1165 S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 1, 200000, 450000, 1300000, STEP_6_25_MV); 1166 1167 /* voltage range for s2mpg11 BUCK 5 */ 1168 S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 5, 200000, 400000, 1300000, STEP_6_25_MV); 1169 1170 /* voltage range for s2mpg11 BUCK 6 */ 1171 S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 6, 200000, 1000000, 1500000, STEP_6_25_MV); 1172 1173 /* voltage range for s2mpg11 BUCK 7 */ 1174 S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 7, 600000, 1500000, 2200000, STEP_12_5_MV); 1175 1176 /* voltage range for s2mpg11 BUCK D */ 1177 S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, d, 600000, 2400000, 3300000, STEP_12_5_MV); 1178 1179 /* voltage range for s2mpg11 BUCK A */ 1180 S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, a, 600000, 1700000, 2100000, STEP_12_5_MV); 1181 1182 /* voltage range for s2mpg11 BUCK BOOST */ 1183 S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, boost, 1184 2600000, 3000000, 3600000, STEP_12_5_MV); 1185 1186 /* voltage range for s2mpg11 LDO 1, 2 */ 1187 S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 1, 300000, 450000, 950000, STEP_12_5_MV); 1188 1189 /* voltage range for s2mpg11 LDO 3, 7, 10, 11, 12, 14, 15 */ 1190 S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 3, 700000, 1600000, 1950000, STEP_25_MV); 1191 1192 /* voltage range for s2mpg11 LDO 4, 6 */ 1193 S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 4, 1800000, 2500000, 3300000, STEP_25_MV); 1194 1195 /* voltage range for s2mpg11 LDO 5 */ 1196 S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 5, 1600000, 1600000, 1950000, STEP_12_5_MV); 1197 1198 /* voltage range for s2mpg11 LDO 8 */ 1199 S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 8, 979600, 1130400, 1281200, 5800); 1200 1201 /* voltage range for s2mpg11 LDO 9 */ 1202 S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 9, 725000, 725000, 1300000, STEP_12_5_MV); 1203 1204 /* voltage range for s2mpg11 LDO 13 */ 1205 S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 13, 1800000, 1800000, 3350000, STEP_25_MV); 1206 1207 static const struct s2mpg10_regulator_desc s2mpg11_regulators[] = { 1208 s2mpg11_regulator_desc_buckboost(), 1209 s2mpg11_regulator_desc_buckn_cm_gpio(1, s2mpg11_buck_vranges1, 1210 OUT1, GENMASK(7, 6), DVS_RAMP1, 1211 PCTRLSEL1, GENMASK(3, 0)), 1212 s2mpg11_regulator_desc_buckn_cm_gpio(2, s2mpg11_buck_vranges1, 1213 OUT1, GENMASK(7, 6), DVS_RAMP1, 1214 PCTRLSEL1, GENMASK(7, 4)), 1215 s2mpg11_regulator_desc_buckn_cm_gpio(3, s2mpg11_buck_vranges1, 1216 OUT1, GENMASK(7, 6), DVS_RAMP2, 1217 PCTRLSEL2, GENMASK(3, 0)), 1218 s2mpg11_regulator_desc_buck_cm(4, s2mpg11_buck_vranges1, 1219 OUT, BIT(7), DVS_RAMP2), 1220 s2mpg11_regulator_desc_buckn_cm_gpio(5, s2mpg11_buck_vranges5, 1221 OUT, GENMASK(7, 6), DVS_RAMP3, 1222 PCTRLSEL2, GENMASK(7, 4)), 1223 s2mpg11_regulator_desc_buck_cm(6, s2mpg11_buck_vranges6, 1224 OUT1, BIT(7), DVS_RAMP3), 1225 s2mpg11_regulator_desc_buck_vm(7, s2mpg11_buck_vranges7, 1226 OUT1, BIT(7), DVS_RAMP4), 1227 s2mpg11_regulator_desc_buckn_cm_gpio(8, s2mpg11_buck_vranges1, 1228 OUT1, GENMASK(7, 6), DVS_RAMP4, 1229 PCTRLSEL3, GENMASK(3, 0)), 1230 s2mpg11_regulator_desc_buckn_cm_gpio(9, s2mpg11_buck_vranges1, 1231 OUT1, GENMASK(7, 6), DVS_RAMP5, 1232 PCTRLSEL3, GENMASK(7, 4)), 1233 s2mpg11_regulator_desc_buck_cm(10, s2mpg11_buck_vranges1, 1234 OUT, BIT(7), DVS_RAMP5), 1235 s2mpg11_regulator_desc_bucka(D, d, DVS_RAMP6, PCTRLSEL4, GENMASK(3, 0)), 1236 s2mpg11_regulator_desc_bucka(A, a, DVS_RAMP6, PCTRLSEL4, GENMASK(7, 4)), 1237 s2mpg11_regulator_desc_ldo_ramp(1, "vinl1s", s2mpg11_ldo_vranges1, 1238 GENMASK(5, 4), DVS_SYNC_CTRL1, 1239 PCTRLSEL5, GENMASK(3, 0)), 1240 s2mpg11_regulator_desc_ldo_ramp(2, "vinl1s", s2mpg11_ldo_vranges1, 1241 GENMASK(7, 6), DVS_SYNC_CTRL2, 1242 PCTRLSEL5, GENMASK(7, 4)), 1243 s2mpg11_regulator_desc_ldo(3, "vinl3s", s2mpg11_ldo_vranges3), 1244 s2mpg11_regulator_desc_ldo(4, "vinl5s", s2mpg11_ldo_vranges4), 1245 s2mpg11_regulator_desc_ldo(5, "vinl3s", s2mpg11_ldo_vranges5), 1246 s2mpg11_regulator_desc_ldo(6, "vinl5s", s2mpg11_ldo_vranges4), 1247 s2mpg11_regulator_desc_ldo(7, "vinl3s", s2mpg11_ldo_vranges3), 1248 s2mpg11_regulator_desc_ldo_gpio(8, "vinl2s", s2mpg11_ldo_vranges8, 1249 PCTRLSEL6, GENMASK(3, 0)), 1250 s2mpg11_regulator_desc_ldo(9, "vinl2s", s2mpg11_ldo_vranges9), 1251 s2mpg11_regulator_desc_ldo(10, "vinl4s", s2mpg11_ldo_vranges3), 1252 s2mpg11_regulator_desc_ldo(11, "vinl4s", s2mpg11_ldo_vranges3), 1253 s2mpg11_regulator_desc_ldo(12, "vinl4s", s2mpg11_ldo_vranges3), 1254 s2mpg11_regulator_desc_ldo_gpio(13, "vinl6s", s2mpg11_ldo_vranges13, 1255 PCTRLSEL6, GENMASK(7, 4)), 1256 s2mpg11_regulator_desc_ldo(14, "vinl4s", s2mpg11_ldo_vranges3), 1257 s2mpg11_regulator_desc_ldo(15, "vinl3s", s2mpg11_ldo_vranges3) 1258 }; 1259 1260 static const struct regulator_ops s2mps11_ldo_ops = { 1261 .list_voltage = regulator_list_voltage_linear, 1262 .map_voltage = regulator_map_voltage_linear, 1263 .is_enabled = regulator_is_enabled_regmap, 1264 .enable = s2mps11_regulator_enable, 1265 .disable = regulator_disable_regmap, 1266 .get_voltage_sel = regulator_get_voltage_sel_regmap, 1267 .set_voltage_sel = regulator_set_voltage_sel_regmap, 1268 .set_voltage_time_sel = regulator_set_voltage_time_sel, 1269 .set_suspend_disable = s2mps11_regulator_set_suspend_disable, 1270 }; 1271 1272 static const struct regulator_ops s2mps11_buck_ops = { 1273 .list_voltage = regulator_list_voltage_linear, 1274 .map_voltage = regulator_map_voltage_linear, 1275 .is_enabled = regulator_is_enabled_regmap, 1276 .enable = s2mps11_regulator_enable, 1277 .disable = regulator_disable_regmap, 1278 .get_voltage_sel = regulator_get_voltage_sel_regmap, 1279 .set_voltage_sel = regulator_set_voltage_sel_regmap, 1280 .set_voltage_time_sel = s2mps11_regulator_set_voltage_time_sel, 1281 .set_ramp_delay = s2mps11_set_ramp_delay, 1282 .set_suspend_disable = s2mps11_regulator_set_suspend_disable, 1283 }; 1284 1285 #define regulator_desc_s2mps11_ldo(num, step) { \ 1286 .name = "LDO"#num, \ 1287 .id = S2MPS11_LDO##num, \ 1288 .of_match = of_match_ptr("LDO"#num), \ 1289 .regulators_node = of_match_ptr("regulators"), \ 1290 .ops = &s2mps11_ldo_ops, \ 1291 .type = REGULATOR_VOLTAGE, \ 1292 .owner = THIS_MODULE, \ 1293 .ramp_delay = RAMP_DELAY_12_MVUS, \ 1294 .min_uV = MIN_800_MV, \ 1295 .uV_step = step, \ 1296 .n_voltages = S2MPS11_LDO_N_VOLTAGES, \ 1297 .vsel_reg = S2MPS11_REG_L1CTRL + num - 1, \ 1298 .vsel_mask = S2MPS11_LDO_VSEL_MASK, \ 1299 .enable_reg = S2MPS11_REG_L1CTRL + num - 1, \ 1300 .enable_mask = S2MPS11_ENABLE_MASK \ 1301 } 1302 1303 #define regulator_desc_s2mps11_buck1_4(num) { \ 1304 .name = "BUCK"#num, \ 1305 .id = S2MPS11_BUCK##num, \ 1306 .of_match = of_match_ptr("BUCK"#num), \ 1307 .regulators_node = of_match_ptr("regulators"), \ 1308 .ops = &s2mps11_buck_ops, \ 1309 .type = REGULATOR_VOLTAGE, \ 1310 .owner = THIS_MODULE, \ 1311 .min_uV = MIN_650_MV, \ 1312 .uV_step = STEP_6_25_MV, \ 1313 .linear_min_sel = 8, \ 1314 .n_voltages = S2MPS11_BUCK12346_N_VOLTAGES, \ 1315 .ramp_delay = S2MPS11_RAMP_DELAY, \ 1316 .vsel_reg = S2MPS11_REG_B1CTRL2 + (num - 1) * 2, \ 1317 .vsel_mask = S2MPS11_BUCK_VSEL_MASK, \ 1318 .enable_reg = S2MPS11_REG_B1CTRL1 + (num - 1) * 2, \ 1319 .enable_mask = S2MPS11_ENABLE_MASK \ 1320 } 1321 1322 #define regulator_desc_s2mps11_buck5 { \ 1323 .name = "BUCK5", \ 1324 .id = S2MPS11_BUCK5, \ 1325 .of_match = of_match_ptr("BUCK5"), \ 1326 .regulators_node = of_match_ptr("regulators"), \ 1327 .ops = &s2mps11_buck_ops, \ 1328 .type = REGULATOR_VOLTAGE, \ 1329 .owner = THIS_MODULE, \ 1330 .min_uV = MIN_650_MV, \ 1331 .uV_step = STEP_6_25_MV, \ 1332 .linear_min_sel = 8, \ 1333 .n_voltages = S2MPS11_BUCK5_N_VOLTAGES, \ 1334 .ramp_delay = S2MPS11_RAMP_DELAY, \ 1335 .vsel_reg = S2MPS11_REG_B5CTRL2, \ 1336 .vsel_mask = S2MPS11_BUCK_VSEL_MASK, \ 1337 .enable_reg = S2MPS11_REG_B5CTRL1, \ 1338 .enable_mask = S2MPS11_ENABLE_MASK \ 1339 } 1340 1341 #define regulator_desc_s2mps11_buck67810(num, min, step, min_sel, voltages) { \ 1342 .name = "BUCK"#num, \ 1343 .id = S2MPS11_BUCK##num, \ 1344 .of_match = of_match_ptr("BUCK"#num), \ 1345 .regulators_node = of_match_ptr("regulators"), \ 1346 .ops = &s2mps11_buck_ops, \ 1347 .type = REGULATOR_VOLTAGE, \ 1348 .owner = THIS_MODULE, \ 1349 .min_uV = min, \ 1350 .uV_step = step, \ 1351 .linear_min_sel = min_sel, \ 1352 .n_voltages = voltages, \ 1353 .ramp_delay = S2MPS11_RAMP_DELAY, \ 1354 .vsel_reg = S2MPS11_REG_B6CTRL2 + (num - 6) * 2, \ 1355 .vsel_mask = S2MPS11_BUCK_VSEL_MASK, \ 1356 .enable_reg = S2MPS11_REG_B6CTRL1 + (num - 6) * 2, \ 1357 .enable_mask = S2MPS11_ENABLE_MASK \ 1358 } 1359 1360 #define regulator_desc_s2mps11_buck9 { \ 1361 .name = "BUCK9", \ 1362 .id = S2MPS11_BUCK9, \ 1363 .of_match = of_match_ptr("BUCK9"), \ 1364 .regulators_node = of_match_ptr("regulators"), \ 1365 .ops = &s2mps11_buck_ops, \ 1366 .type = REGULATOR_VOLTAGE, \ 1367 .owner = THIS_MODULE, \ 1368 .min_uV = MIN_3000_MV, \ 1369 .uV_step = STEP_25_MV, \ 1370 .n_voltages = S2MPS11_BUCK9_N_VOLTAGES, \ 1371 .ramp_delay = S2MPS11_RAMP_DELAY, \ 1372 .vsel_reg = S2MPS11_REG_B9CTRL2, \ 1373 .vsel_mask = S2MPS11_BUCK9_VSEL_MASK, \ 1374 .enable_reg = S2MPS11_REG_B9CTRL1, \ 1375 .enable_mask = S2MPS11_ENABLE_MASK \ 1376 } 1377 1378 static const struct regulator_desc s2mps11_regulators[] = { 1379 regulator_desc_s2mps11_ldo(1, STEP_25_MV), 1380 regulator_desc_s2mps11_ldo(2, STEP_50_MV), 1381 regulator_desc_s2mps11_ldo(3, STEP_50_MV), 1382 regulator_desc_s2mps11_ldo(4, STEP_50_MV), 1383 regulator_desc_s2mps11_ldo(5, STEP_50_MV), 1384 regulator_desc_s2mps11_ldo(6, STEP_25_MV), 1385 regulator_desc_s2mps11_ldo(7, STEP_50_MV), 1386 regulator_desc_s2mps11_ldo(8, STEP_50_MV), 1387 regulator_desc_s2mps11_ldo(9, STEP_50_MV), 1388 regulator_desc_s2mps11_ldo(10, STEP_50_MV), 1389 regulator_desc_s2mps11_ldo(11, STEP_25_MV), 1390 regulator_desc_s2mps11_ldo(12, STEP_50_MV), 1391 regulator_desc_s2mps11_ldo(13, STEP_50_MV), 1392 regulator_desc_s2mps11_ldo(14, STEP_50_MV), 1393 regulator_desc_s2mps11_ldo(15, STEP_50_MV), 1394 regulator_desc_s2mps11_ldo(16, STEP_50_MV), 1395 regulator_desc_s2mps11_ldo(17, STEP_50_MV), 1396 regulator_desc_s2mps11_ldo(18, STEP_50_MV), 1397 regulator_desc_s2mps11_ldo(19, STEP_50_MV), 1398 regulator_desc_s2mps11_ldo(20, STEP_50_MV), 1399 regulator_desc_s2mps11_ldo(21, STEP_50_MV), 1400 regulator_desc_s2mps11_ldo(22, STEP_25_MV), 1401 regulator_desc_s2mps11_ldo(23, STEP_25_MV), 1402 regulator_desc_s2mps11_ldo(24, STEP_50_MV), 1403 regulator_desc_s2mps11_ldo(25, STEP_50_MV), 1404 regulator_desc_s2mps11_ldo(26, STEP_50_MV), 1405 regulator_desc_s2mps11_ldo(27, STEP_25_MV), 1406 regulator_desc_s2mps11_ldo(28, STEP_50_MV), 1407 regulator_desc_s2mps11_ldo(29, STEP_50_MV), 1408 regulator_desc_s2mps11_ldo(30, STEP_50_MV), 1409 regulator_desc_s2mps11_ldo(31, STEP_50_MV), 1410 regulator_desc_s2mps11_ldo(32, STEP_50_MV), 1411 regulator_desc_s2mps11_ldo(33, STEP_50_MV), 1412 regulator_desc_s2mps11_ldo(34, STEP_50_MV), 1413 regulator_desc_s2mps11_ldo(35, STEP_25_MV), 1414 regulator_desc_s2mps11_ldo(36, STEP_50_MV), 1415 regulator_desc_s2mps11_ldo(37, STEP_50_MV), 1416 regulator_desc_s2mps11_ldo(38, STEP_50_MV), 1417 regulator_desc_s2mps11_buck1_4(1), 1418 regulator_desc_s2mps11_buck1_4(2), 1419 regulator_desc_s2mps11_buck1_4(3), 1420 regulator_desc_s2mps11_buck1_4(4), 1421 regulator_desc_s2mps11_buck5, 1422 regulator_desc_s2mps11_buck67810(6, MIN_650_MV, STEP_6_25_MV, 8, 1423 S2MPS11_BUCK12346_N_VOLTAGES), 1424 regulator_desc_s2mps11_buck67810(7, MIN_750_MV, STEP_12_5_MV, 0, 1425 S2MPS11_BUCK7810_N_VOLTAGES), 1426 regulator_desc_s2mps11_buck67810(8, MIN_750_MV, STEP_12_5_MV, 0, 1427 S2MPS11_BUCK7810_N_VOLTAGES), 1428 regulator_desc_s2mps11_buck9, 1429 regulator_desc_s2mps11_buck67810(10, MIN_750_MV, STEP_12_5_MV, 0, 1430 S2MPS11_BUCK7810_N_VOLTAGES), 1431 }; 1432 1433 static const struct regulator_ops s2mps14_reg_ops; 1434 1435 #define regulator_desc_s2mps13_ldo(num, min, step, min_sel) { \ 1436 .name = "LDO"#num, \ 1437 .id = S2MPS13_LDO##num, \ 1438 .of_match = of_match_ptr("LDO"#num), \ 1439 .regulators_node = of_match_ptr("regulators"), \ 1440 .ops = &s2mps14_reg_ops, \ 1441 .type = REGULATOR_VOLTAGE, \ 1442 .owner = THIS_MODULE, \ 1443 .min_uV = min, \ 1444 .uV_step = step, \ 1445 .linear_min_sel = min_sel, \ 1446 .n_voltages = S2MPS14_LDO_N_VOLTAGES, \ 1447 .vsel_reg = S2MPS13_REG_L1CTRL + num - 1, \ 1448 .vsel_mask = S2MPS14_LDO_VSEL_MASK, \ 1449 .enable_reg = S2MPS13_REG_L1CTRL + num - 1, \ 1450 .enable_mask = S2MPS14_ENABLE_MASK \ 1451 } 1452 1453 #define regulator_desc_s2mps13_buck(num, min, step, min_sel) { \ 1454 .name = "BUCK"#num, \ 1455 .id = S2MPS13_BUCK##num, \ 1456 .of_match = of_match_ptr("BUCK"#num), \ 1457 .regulators_node = of_match_ptr("regulators"), \ 1458 .ops = &s2mps14_reg_ops, \ 1459 .type = REGULATOR_VOLTAGE, \ 1460 .owner = THIS_MODULE, \ 1461 .min_uV = min, \ 1462 .uV_step = step, \ 1463 .linear_min_sel = min_sel, \ 1464 .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \ 1465 .ramp_delay = S2MPS13_BUCK_RAMP_DELAY, \ 1466 .vsel_reg = S2MPS13_REG_B1OUT + (num - 1) * 2, \ 1467 .vsel_mask = S2MPS14_BUCK_VSEL_MASK, \ 1468 .enable_reg = S2MPS13_REG_B1CTRL + (num - 1) * 2, \ 1469 .enable_mask = S2MPS14_ENABLE_MASK \ 1470 } 1471 1472 #define regulator_desc_s2mps13_buck7(num, min, step, min_sel) { \ 1473 .name = "BUCK"#num, \ 1474 .id = S2MPS13_BUCK##num, \ 1475 .of_match = of_match_ptr("BUCK"#num), \ 1476 .regulators_node = of_match_ptr("regulators"), \ 1477 .ops = &s2mps14_reg_ops, \ 1478 .type = REGULATOR_VOLTAGE, \ 1479 .owner = THIS_MODULE, \ 1480 .min_uV = min, \ 1481 .uV_step = step, \ 1482 .linear_min_sel = min_sel, \ 1483 .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \ 1484 .ramp_delay = S2MPS13_BUCK_RAMP_DELAY, \ 1485 .vsel_reg = S2MPS13_REG_B1OUT + (num) * 2 - 1, \ 1486 .vsel_mask = S2MPS14_BUCK_VSEL_MASK, \ 1487 .enable_reg = S2MPS13_REG_B1CTRL + (num - 1) * 2, \ 1488 .enable_mask = S2MPS14_ENABLE_MASK \ 1489 } 1490 1491 #define regulator_desc_s2mps13_buck8_10(num, min, step, min_sel) { \ 1492 .name = "BUCK"#num, \ 1493 .id = S2MPS13_BUCK##num, \ 1494 .of_match = of_match_ptr("BUCK"#num), \ 1495 .regulators_node = of_match_ptr("regulators"), \ 1496 .ops = &s2mps14_reg_ops, \ 1497 .type = REGULATOR_VOLTAGE, \ 1498 .owner = THIS_MODULE, \ 1499 .min_uV = min, \ 1500 .uV_step = step, \ 1501 .linear_min_sel = min_sel, \ 1502 .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \ 1503 .ramp_delay = S2MPS13_BUCK_RAMP_DELAY, \ 1504 .vsel_reg = S2MPS13_REG_B1OUT + (num) * 2 - 1, \ 1505 .vsel_mask = S2MPS14_BUCK_VSEL_MASK, \ 1506 .enable_reg = S2MPS13_REG_B1CTRL + (num) * 2 - 1, \ 1507 .enable_mask = S2MPS14_ENABLE_MASK \ 1508 } 1509 1510 static const struct regulator_desc s2mps13_regulators[] = { 1511 regulator_desc_s2mps13_ldo(1, MIN_800_MV, STEP_12_5_MV, 0x00), 1512 regulator_desc_s2mps13_ldo(2, MIN_1400_MV, STEP_50_MV, 0x0C), 1513 regulator_desc_s2mps13_ldo(3, MIN_1000_MV, STEP_25_MV, 0x08), 1514 regulator_desc_s2mps13_ldo(4, MIN_800_MV, STEP_12_5_MV, 0x00), 1515 regulator_desc_s2mps13_ldo(5, MIN_800_MV, STEP_12_5_MV, 0x00), 1516 regulator_desc_s2mps13_ldo(6, MIN_800_MV, STEP_12_5_MV, 0x00), 1517 regulator_desc_s2mps13_ldo(7, MIN_1000_MV, STEP_25_MV, 0x08), 1518 regulator_desc_s2mps13_ldo(8, MIN_1000_MV, STEP_25_MV, 0x08), 1519 regulator_desc_s2mps13_ldo(9, MIN_1000_MV, STEP_25_MV, 0x08), 1520 regulator_desc_s2mps13_ldo(10, MIN_1400_MV, STEP_50_MV, 0x0C), 1521 regulator_desc_s2mps13_ldo(11, MIN_800_MV, STEP_25_MV, 0x10), 1522 regulator_desc_s2mps13_ldo(12, MIN_800_MV, STEP_25_MV, 0x10), 1523 regulator_desc_s2mps13_ldo(13, MIN_800_MV, STEP_25_MV, 0x10), 1524 regulator_desc_s2mps13_ldo(14, MIN_800_MV, STEP_12_5_MV, 0x00), 1525 regulator_desc_s2mps13_ldo(15, MIN_800_MV, STEP_12_5_MV, 0x00), 1526 regulator_desc_s2mps13_ldo(16, MIN_1400_MV, STEP_50_MV, 0x0C), 1527 regulator_desc_s2mps13_ldo(17, MIN_1400_MV, STEP_50_MV, 0x0C), 1528 regulator_desc_s2mps13_ldo(18, MIN_1000_MV, STEP_25_MV, 0x08), 1529 regulator_desc_s2mps13_ldo(19, MIN_1000_MV, STEP_25_MV, 0x08), 1530 regulator_desc_s2mps13_ldo(20, MIN_1400_MV, STEP_50_MV, 0x0C), 1531 regulator_desc_s2mps13_ldo(21, MIN_1000_MV, STEP_25_MV, 0x08), 1532 regulator_desc_s2mps13_ldo(22, MIN_1000_MV, STEP_25_MV, 0x08), 1533 regulator_desc_s2mps13_ldo(23, MIN_800_MV, STEP_12_5_MV, 0x00), 1534 regulator_desc_s2mps13_ldo(24, MIN_800_MV, STEP_12_5_MV, 0x00), 1535 regulator_desc_s2mps13_ldo(25, MIN_1400_MV, STEP_50_MV, 0x0C), 1536 regulator_desc_s2mps13_ldo(26, MIN_1400_MV, STEP_50_MV, 0x0C), 1537 regulator_desc_s2mps13_ldo(27, MIN_1400_MV, STEP_50_MV, 0x0C), 1538 regulator_desc_s2mps13_ldo(28, MIN_1000_MV, STEP_25_MV, 0x08), 1539 regulator_desc_s2mps13_ldo(29, MIN_1400_MV, STEP_50_MV, 0x0C), 1540 regulator_desc_s2mps13_ldo(30, MIN_1400_MV, STEP_50_MV, 0x0C), 1541 regulator_desc_s2mps13_ldo(31, MIN_1000_MV, STEP_25_MV, 0x08), 1542 regulator_desc_s2mps13_ldo(32, MIN_1000_MV, STEP_25_MV, 0x08), 1543 regulator_desc_s2mps13_ldo(33, MIN_1400_MV, STEP_50_MV, 0x0C), 1544 regulator_desc_s2mps13_ldo(34, MIN_1000_MV, STEP_25_MV, 0x08), 1545 regulator_desc_s2mps13_ldo(35, MIN_1400_MV, STEP_50_MV, 0x0C), 1546 regulator_desc_s2mps13_ldo(36, MIN_800_MV, STEP_12_5_MV, 0x00), 1547 regulator_desc_s2mps13_ldo(37, MIN_1000_MV, STEP_25_MV, 0x08), 1548 regulator_desc_s2mps13_ldo(38, MIN_1400_MV, STEP_50_MV, 0x0C), 1549 regulator_desc_s2mps13_ldo(39, MIN_1000_MV, STEP_25_MV, 0x08), 1550 regulator_desc_s2mps13_ldo(40, MIN_1400_MV, STEP_50_MV, 0x0C), 1551 regulator_desc_s2mps13_buck(1, MIN_500_MV, STEP_6_25_MV, 0x10), 1552 regulator_desc_s2mps13_buck(2, MIN_500_MV, STEP_6_25_MV, 0x10), 1553 regulator_desc_s2mps13_buck(3, MIN_500_MV, STEP_6_25_MV, 0x10), 1554 regulator_desc_s2mps13_buck(4, MIN_500_MV, STEP_6_25_MV, 0x10), 1555 regulator_desc_s2mps13_buck(5, MIN_500_MV, STEP_6_25_MV, 0x10), 1556 regulator_desc_s2mps13_buck(6, MIN_500_MV, STEP_6_25_MV, 0x10), 1557 regulator_desc_s2mps13_buck7(7, MIN_500_MV, STEP_6_25_MV, 0x10), 1558 regulator_desc_s2mps13_buck8_10(8, MIN_1000_MV, STEP_12_5_MV, 0x20), 1559 regulator_desc_s2mps13_buck8_10(9, MIN_1000_MV, STEP_12_5_MV, 0x20), 1560 regulator_desc_s2mps13_buck8_10(10, MIN_500_MV, STEP_6_25_MV, 0x10), 1561 }; 1562 1563 static const struct regulator_ops s2mps14_reg_ops = { 1564 .list_voltage = regulator_list_voltage_linear, 1565 .map_voltage = regulator_map_voltage_linear, 1566 .is_enabled = regulator_is_enabled_regmap, 1567 .enable = s2mps11_regulator_enable, 1568 .disable = regulator_disable_regmap, 1569 .get_voltage_sel = regulator_get_voltage_sel_regmap, 1570 .set_voltage_sel = regulator_set_voltage_sel_regmap, 1571 .set_voltage_time_sel = regulator_set_voltage_time_sel, 1572 .set_suspend_disable = s2mps11_regulator_set_suspend_disable, 1573 }; 1574 1575 #define regulator_desc_s2mps14_ldo(num, min, step) { \ 1576 .name = "LDO"#num, \ 1577 .id = S2MPS14_LDO##num, \ 1578 .of_match = of_match_ptr("LDO"#num), \ 1579 .regulators_node = of_match_ptr("regulators"), \ 1580 .of_parse_cb = s2mps11_of_parse_cb, \ 1581 .ops = &s2mps14_reg_ops, \ 1582 .type = REGULATOR_VOLTAGE, \ 1583 .owner = THIS_MODULE, \ 1584 .min_uV = min, \ 1585 .uV_step = step, \ 1586 .n_voltages = S2MPS14_LDO_N_VOLTAGES, \ 1587 .vsel_reg = S2MPS14_REG_L1CTRL + num - 1, \ 1588 .vsel_mask = S2MPS14_LDO_VSEL_MASK, \ 1589 .enable_reg = S2MPS14_REG_L1CTRL + num - 1, \ 1590 .enable_mask = S2MPS14_ENABLE_MASK \ 1591 } 1592 1593 #define regulator_desc_s2mps14_buck(num, min, step, min_sel) { \ 1594 .name = "BUCK"#num, \ 1595 .id = S2MPS14_BUCK##num, \ 1596 .of_match = of_match_ptr("BUCK"#num), \ 1597 .regulators_node = of_match_ptr("regulators"), \ 1598 .of_parse_cb = s2mps11_of_parse_cb, \ 1599 .ops = &s2mps14_reg_ops, \ 1600 .type = REGULATOR_VOLTAGE, \ 1601 .owner = THIS_MODULE, \ 1602 .min_uV = min, \ 1603 .uV_step = step, \ 1604 .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \ 1605 .linear_min_sel = min_sel, \ 1606 .ramp_delay = S2MPS14_BUCK_RAMP_DELAY, \ 1607 .vsel_reg = S2MPS14_REG_B1CTRL2 + (num - 1) * 2, \ 1608 .vsel_mask = S2MPS14_BUCK_VSEL_MASK, \ 1609 .enable_reg = S2MPS14_REG_B1CTRL1 + (num - 1) * 2, \ 1610 .enable_mask = S2MPS14_ENABLE_MASK \ 1611 } 1612 1613 static const struct regulator_desc s2mps14_regulators[] = { 1614 regulator_desc_s2mps14_ldo(1, MIN_800_MV, STEP_12_5_MV), 1615 regulator_desc_s2mps14_ldo(2, MIN_800_MV, STEP_12_5_MV), 1616 regulator_desc_s2mps14_ldo(3, MIN_800_MV, STEP_25_MV), 1617 regulator_desc_s2mps14_ldo(4, MIN_800_MV, STEP_25_MV), 1618 regulator_desc_s2mps14_ldo(5, MIN_800_MV, STEP_12_5_MV), 1619 regulator_desc_s2mps14_ldo(6, MIN_800_MV, STEP_12_5_MV), 1620 regulator_desc_s2mps14_ldo(7, MIN_800_MV, STEP_25_MV), 1621 regulator_desc_s2mps14_ldo(8, MIN_1800_MV, STEP_25_MV), 1622 regulator_desc_s2mps14_ldo(9, MIN_800_MV, STEP_12_5_MV), 1623 regulator_desc_s2mps14_ldo(10, MIN_800_MV, STEP_12_5_MV), 1624 regulator_desc_s2mps14_ldo(11, MIN_800_MV, STEP_25_MV), 1625 regulator_desc_s2mps14_ldo(12, MIN_1800_MV, STEP_25_MV), 1626 regulator_desc_s2mps14_ldo(13, MIN_1800_MV, STEP_25_MV), 1627 regulator_desc_s2mps14_ldo(14, MIN_1800_MV, STEP_25_MV), 1628 regulator_desc_s2mps14_ldo(15, MIN_1800_MV, STEP_25_MV), 1629 regulator_desc_s2mps14_ldo(16, MIN_1800_MV, STEP_25_MV), 1630 regulator_desc_s2mps14_ldo(17, MIN_1800_MV, STEP_25_MV), 1631 regulator_desc_s2mps14_ldo(18, MIN_1800_MV, STEP_25_MV), 1632 regulator_desc_s2mps14_ldo(19, MIN_800_MV, STEP_25_MV), 1633 regulator_desc_s2mps14_ldo(20, MIN_800_MV, STEP_25_MV), 1634 regulator_desc_s2mps14_ldo(21, MIN_800_MV, STEP_25_MV), 1635 regulator_desc_s2mps14_ldo(22, MIN_800_MV, STEP_12_5_MV), 1636 regulator_desc_s2mps14_ldo(23, MIN_800_MV, STEP_25_MV), 1637 regulator_desc_s2mps14_ldo(24, MIN_1800_MV, STEP_25_MV), 1638 regulator_desc_s2mps14_ldo(25, MIN_1800_MV, STEP_25_MV), 1639 regulator_desc_s2mps14_buck(1, MIN_600_MV, STEP_6_25_MV, 1640 S2MPS14_BUCK1235_START_SEL), 1641 regulator_desc_s2mps14_buck(2, MIN_600_MV, STEP_6_25_MV, 1642 S2MPS14_BUCK1235_START_SEL), 1643 regulator_desc_s2mps14_buck(3, MIN_600_MV, STEP_6_25_MV, 1644 S2MPS14_BUCK1235_START_SEL), 1645 regulator_desc_s2mps14_buck(4, MIN_1400_MV, STEP_12_5_MV, 1646 S2MPS14_BUCK4_START_SEL), 1647 regulator_desc_s2mps14_buck(5, MIN_600_MV, STEP_6_25_MV, 1648 S2MPS14_BUCK1235_START_SEL), 1649 }; 1650 1651 static const struct regulator_ops s2mps15_reg_ldo_ops = { 1652 .list_voltage = regulator_list_voltage_linear_range, 1653 .map_voltage = regulator_map_voltage_linear_range, 1654 .is_enabled = regulator_is_enabled_regmap, 1655 .enable = regulator_enable_regmap, 1656 .disable = regulator_disable_regmap, 1657 .get_voltage_sel = regulator_get_voltage_sel_regmap, 1658 .set_voltage_sel = regulator_set_voltage_sel_regmap, 1659 }; 1660 1661 static const struct regulator_ops s2mps15_reg_buck_ops = { 1662 .list_voltage = regulator_list_voltage_linear_range, 1663 .map_voltage = regulator_map_voltage_linear_range, 1664 .is_enabled = regulator_is_enabled_regmap, 1665 .enable = regulator_enable_regmap, 1666 .disable = regulator_disable_regmap, 1667 .get_voltage_sel = regulator_get_voltage_sel_regmap, 1668 .set_voltage_sel = regulator_set_voltage_sel_regmap, 1669 .set_voltage_time_sel = regulator_set_voltage_time_sel, 1670 }; 1671 1672 #define regulator_desc_s2mps15_ldo(num, range) { \ 1673 .name = "LDO"#num, \ 1674 .id = S2MPS15_LDO##num, \ 1675 .of_match = of_match_ptr("LDO"#num), \ 1676 .regulators_node = of_match_ptr("regulators"), \ 1677 .ops = &s2mps15_reg_ldo_ops, \ 1678 .type = REGULATOR_VOLTAGE, \ 1679 .owner = THIS_MODULE, \ 1680 .linear_ranges = range, \ 1681 .n_linear_ranges = ARRAY_SIZE(range), \ 1682 .n_voltages = S2MPS15_LDO_N_VOLTAGES, \ 1683 .vsel_reg = S2MPS15_REG_L1CTRL + num - 1, \ 1684 .vsel_mask = S2MPS15_LDO_VSEL_MASK, \ 1685 .enable_reg = S2MPS15_REG_L1CTRL + num - 1, \ 1686 .enable_mask = S2MPS15_ENABLE_MASK \ 1687 } 1688 1689 #define regulator_desc_s2mps15_buck(num, range) { \ 1690 .name = "BUCK"#num, \ 1691 .id = S2MPS15_BUCK##num, \ 1692 .of_match = of_match_ptr("BUCK"#num), \ 1693 .regulators_node = of_match_ptr("regulators"), \ 1694 .ops = &s2mps15_reg_buck_ops, \ 1695 .type = REGULATOR_VOLTAGE, \ 1696 .owner = THIS_MODULE, \ 1697 .linear_ranges = range, \ 1698 .n_linear_ranges = ARRAY_SIZE(range), \ 1699 .ramp_delay = 12500, \ 1700 .n_voltages = S2MPS15_BUCK_N_VOLTAGES, \ 1701 .vsel_reg = S2MPS15_REG_B1CTRL2 + ((num - 1) * 2), \ 1702 .vsel_mask = S2MPS15_BUCK_VSEL_MASK, \ 1703 .enable_reg = S2MPS15_REG_B1CTRL1 + ((num - 1) * 2), \ 1704 .enable_mask = S2MPS15_ENABLE_MASK \ 1705 } 1706 1707 /* voltage range for s2mps15 LDO 3, 5, 15, 16, 18, 20, 23 and 27 */ 1708 static const struct linear_range s2mps15_ldo_voltage_ranges1[] = { 1709 REGULATOR_LINEAR_RANGE(1000000, 0xc, 0x38, 25000), 1710 }; 1711 1712 /* voltage range for s2mps15 LDO 2, 6, 14, 17, 19, 21, 24 and 25 */ 1713 static const struct linear_range s2mps15_ldo_voltage_ranges2[] = { 1714 REGULATOR_LINEAR_RANGE(1800000, 0x0, 0x3f, 25000), 1715 }; 1716 1717 /* voltage range for s2mps15 LDO 4, 11, 12, 13, 22 and 26 */ 1718 static const struct linear_range s2mps15_ldo_voltage_ranges3[] = { 1719 REGULATOR_LINEAR_RANGE(700000, 0x0, 0x34, 12500), 1720 }; 1721 1722 /* voltage range for s2mps15 LDO 7, 8, 9 and 10 */ 1723 static const struct linear_range s2mps15_ldo_voltage_ranges4[] = { 1724 REGULATOR_LINEAR_RANGE(700000, 0x10, 0x20, 25000), 1725 }; 1726 1727 /* voltage range for s2mps15 LDO 1 */ 1728 static const struct linear_range s2mps15_ldo_voltage_ranges5[] = { 1729 REGULATOR_LINEAR_RANGE(500000, 0x0, 0x20, 12500), 1730 }; 1731 1732 /* voltage range for s2mps15 BUCK 1, 2, 3, 4, 5, 6 and 7 */ 1733 static const struct linear_range s2mps15_buck_voltage_ranges1[] = { 1734 REGULATOR_LINEAR_RANGE(500000, 0x20, 0xc0, 6250), 1735 }; 1736 1737 /* voltage range for s2mps15 BUCK 8, 9 and 10 */ 1738 static const struct linear_range s2mps15_buck_voltage_ranges2[] = { 1739 REGULATOR_LINEAR_RANGE(1000000, 0x20, 0x78, 12500), 1740 }; 1741 1742 static const struct regulator_desc s2mps15_regulators[] = { 1743 regulator_desc_s2mps15_ldo(1, s2mps15_ldo_voltage_ranges5), 1744 regulator_desc_s2mps15_ldo(2, s2mps15_ldo_voltage_ranges2), 1745 regulator_desc_s2mps15_ldo(3, s2mps15_ldo_voltage_ranges1), 1746 regulator_desc_s2mps15_ldo(4, s2mps15_ldo_voltage_ranges3), 1747 regulator_desc_s2mps15_ldo(5, s2mps15_ldo_voltage_ranges1), 1748 regulator_desc_s2mps15_ldo(6, s2mps15_ldo_voltage_ranges2), 1749 regulator_desc_s2mps15_ldo(7, s2mps15_ldo_voltage_ranges4), 1750 regulator_desc_s2mps15_ldo(8, s2mps15_ldo_voltage_ranges4), 1751 regulator_desc_s2mps15_ldo(9, s2mps15_ldo_voltage_ranges4), 1752 regulator_desc_s2mps15_ldo(10, s2mps15_ldo_voltage_ranges4), 1753 regulator_desc_s2mps15_ldo(11, s2mps15_ldo_voltage_ranges3), 1754 regulator_desc_s2mps15_ldo(12, s2mps15_ldo_voltage_ranges3), 1755 regulator_desc_s2mps15_ldo(13, s2mps15_ldo_voltage_ranges3), 1756 regulator_desc_s2mps15_ldo(14, s2mps15_ldo_voltage_ranges2), 1757 regulator_desc_s2mps15_ldo(15, s2mps15_ldo_voltage_ranges1), 1758 regulator_desc_s2mps15_ldo(16, s2mps15_ldo_voltage_ranges1), 1759 regulator_desc_s2mps15_ldo(17, s2mps15_ldo_voltage_ranges2), 1760 regulator_desc_s2mps15_ldo(18, s2mps15_ldo_voltage_ranges1), 1761 regulator_desc_s2mps15_ldo(19, s2mps15_ldo_voltage_ranges2), 1762 regulator_desc_s2mps15_ldo(20, s2mps15_ldo_voltage_ranges1), 1763 regulator_desc_s2mps15_ldo(21, s2mps15_ldo_voltage_ranges2), 1764 regulator_desc_s2mps15_ldo(22, s2mps15_ldo_voltage_ranges3), 1765 regulator_desc_s2mps15_ldo(23, s2mps15_ldo_voltage_ranges1), 1766 regulator_desc_s2mps15_ldo(24, s2mps15_ldo_voltage_ranges2), 1767 regulator_desc_s2mps15_ldo(25, s2mps15_ldo_voltage_ranges2), 1768 regulator_desc_s2mps15_ldo(26, s2mps15_ldo_voltage_ranges3), 1769 regulator_desc_s2mps15_ldo(27, s2mps15_ldo_voltage_ranges1), 1770 regulator_desc_s2mps15_buck(1, s2mps15_buck_voltage_ranges1), 1771 regulator_desc_s2mps15_buck(2, s2mps15_buck_voltage_ranges1), 1772 regulator_desc_s2mps15_buck(3, s2mps15_buck_voltage_ranges1), 1773 regulator_desc_s2mps15_buck(4, s2mps15_buck_voltage_ranges1), 1774 regulator_desc_s2mps15_buck(5, s2mps15_buck_voltage_ranges1), 1775 regulator_desc_s2mps15_buck(6, s2mps15_buck_voltage_ranges1), 1776 regulator_desc_s2mps15_buck(7, s2mps15_buck_voltage_ranges1), 1777 regulator_desc_s2mps15_buck(8, s2mps15_buck_voltage_ranges2), 1778 regulator_desc_s2mps15_buck(9, s2mps15_buck_voltage_ranges2), 1779 regulator_desc_s2mps15_buck(10, s2mps15_buck_voltage_ranges2), 1780 }; 1781 1782 static int s2mps14_pmic_enable_ext_control(struct s2mps11_info *s2mps11, 1783 struct regulator_dev *rdev) 1784 { 1785 int ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, 1786 rdev->desc->enable_mask, 1787 S2MPS14_ENABLE_EXT_CONTROL); 1788 if (ret < 0) 1789 return dev_err_probe(rdev_get_dev(rdev), ret, 1790 "failed to enable GPIO control over %d/%s\n", 1791 rdev->desc->id, rdev->desc->name); 1792 return 0; 1793 } 1794 1795 static int s2mpu02_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) 1796 { 1797 unsigned int ramp_val, ramp_shift, ramp_reg; 1798 int rdev_id = rdev_get_id(rdev); 1799 1800 switch (rdev_id) { 1801 case S2MPU02_BUCK1: 1802 ramp_shift = S2MPU02_BUCK1_RAMP_SHIFT; 1803 break; 1804 case S2MPU02_BUCK2: 1805 ramp_shift = S2MPU02_BUCK2_RAMP_SHIFT; 1806 break; 1807 case S2MPU02_BUCK3: 1808 ramp_shift = S2MPU02_BUCK3_RAMP_SHIFT; 1809 break; 1810 case S2MPU02_BUCK4: 1811 ramp_shift = S2MPU02_BUCK4_RAMP_SHIFT; 1812 break; 1813 default: 1814 return 0; 1815 } 1816 ramp_reg = S2MPU02_REG_RAMP1; 1817 ramp_val = get_ramp_delay(ramp_delay); 1818 1819 return regmap_update_bits(rdev->regmap, ramp_reg, 1820 S2MPU02_BUCK1234_RAMP_MASK << ramp_shift, 1821 ramp_val << ramp_shift); 1822 } 1823 1824 static const struct regulator_ops s2mpu02_ldo_ops = { 1825 .list_voltage = regulator_list_voltage_linear, 1826 .map_voltage = regulator_map_voltage_linear, 1827 .is_enabled = regulator_is_enabled_regmap, 1828 .enable = s2mps11_regulator_enable, 1829 .disable = regulator_disable_regmap, 1830 .get_voltage_sel = regulator_get_voltage_sel_regmap, 1831 .set_voltage_sel = regulator_set_voltage_sel_regmap, 1832 .set_voltage_time_sel = regulator_set_voltage_time_sel, 1833 .set_suspend_disable = s2mps11_regulator_set_suspend_disable, 1834 }; 1835 1836 static const struct regulator_ops s2mpu02_buck_ops = { 1837 .list_voltage = regulator_list_voltage_linear, 1838 .map_voltage = regulator_map_voltage_linear, 1839 .is_enabled = regulator_is_enabled_regmap, 1840 .enable = s2mps11_regulator_enable, 1841 .disable = regulator_disable_regmap, 1842 .get_voltage_sel = regulator_get_voltage_sel_regmap, 1843 .set_voltage_sel = regulator_set_voltage_sel_regmap, 1844 .set_voltage_time_sel = regulator_set_voltage_time_sel, 1845 .set_suspend_disable = s2mps11_regulator_set_suspend_disable, 1846 .set_ramp_delay = s2mpu02_set_ramp_delay, 1847 }; 1848 1849 #define regulator_desc_s2mpu02_ldo1(num) { \ 1850 .name = "LDO"#num, \ 1851 .id = S2MPU02_LDO##num, \ 1852 .of_match = of_match_ptr("LDO"#num), \ 1853 .regulators_node = of_match_ptr("regulators"), \ 1854 .ops = &s2mpu02_ldo_ops, \ 1855 .type = REGULATOR_VOLTAGE, \ 1856 .owner = THIS_MODULE, \ 1857 .min_uV = S2MPU02_LDO_MIN_900MV, \ 1858 .uV_step = S2MPU02_LDO_STEP_12_5MV, \ 1859 .linear_min_sel = S2MPU02_LDO_GROUP1_START_SEL, \ 1860 .n_voltages = S2MPU02_LDO_N_VOLTAGES, \ 1861 .vsel_reg = S2MPU02_REG_L1CTRL, \ 1862 .vsel_mask = S2MPU02_LDO_VSEL_MASK, \ 1863 .enable_reg = S2MPU02_REG_L1CTRL, \ 1864 .enable_mask = S2MPU02_ENABLE_MASK \ 1865 } 1866 #define regulator_desc_s2mpu02_ldo2(num) { \ 1867 .name = "LDO"#num, \ 1868 .id = S2MPU02_LDO##num, \ 1869 .of_match = of_match_ptr("LDO"#num), \ 1870 .regulators_node = of_match_ptr("regulators"), \ 1871 .ops = &s2mpu02_ldo_ops, \ 1872 .type = REGULATOR_VOLTAGE, \ 1873 .owner = THIS_MODULE, \ 1874 .min_uV = S2MPU02_LDO_MIN_1050MV, \ 1875 .uV_step = S2MPU02_LDO_STEP_25MV, \ 1876 .linear_min_sel = S2MPU02_LDO_GROUP2_START_SEL, \ 1877 .n_voltages = S2MPU02_LDO_N_VOLTAGES, \ 1878 .vsel_reg = S2MPU02_REG_L2CTRL1, \ 1879 .vsel_mask = S2MPU02_LDO_VSEL_MASK, \ 1880 .enable_reg = S2MPU02_REG_L2CTRL1, \ 1881 .enable_mask = S2MPU02_ENABLE_MASK \ 1882 } 1883 #define regulator_desc_s2mpu02_ldo3(num) { \ 1884 .name = "LDO"#num, \ 1885 .id = S2MPU02_LDO##num, \ 1886 .of_match = of_match_ptr("LDO"#num), \ 1887 .regulators_node = of_match_ptr("regulators"), \ 1888 .ops = &s2mpu02_ldo_ops, \ 1889 .type = REGULATOR_VOLTAGE, \ 1890 .owner = THIS_MODULE, \ 1891 .min_uV = S2MPU02_LDO_MIN_900MV, \ 1892 .uV_step = S2MPU02_LDO_STEP_12_5MV, \ 1893 .linear_min_sel = S2MPU02_LDO_GROUP1_START_SEL, \ 1894 .n_voltages = S2MPU02_LDO_N_VOLTAGES, \ 1895 .vsel_reg = S2MPU02_REG_L3CTRL + num - 3, \ 1896 .vsel_mask = S2MPU02_LDO_VSEL_MASK, \ 1897 .enable_reg = S2MPU02_REG_L3CTRL + num - 3, \ 1898 .enable_mask = S2MPU02_ENABLE_MASK \ 1899 } 1900 #define regulator_desc_s2mpu02_ldo4(num) { \ 1901 .name = "LDO"#num, \ 1902 .id = S2MPU02_LDO##num, \ 1903 .of_match = of_match_ptr("LDO"#num), \ 1904 .regulators_node = of_match_ptr("regulators"), \ 1905 .ops = &s2mpu02_ldo_ops, \ 1906 .type = REGULATOR_VOLTAGE, \ 1907 .owner = THIS_MODULE, \ 1908 .min_uV = S2MPU02_LDO_MIN_1050MV, \ 1909 .uV_step = S2MPU02_LDO_STEP_25MV, \ 1910 .linear_min_sel = S2MPU02_LDO_GROUP2_START_SEL, \ 1911 .n_voltages = S2MPU02_LDO_N_VOLTAGES, \ 1912 .vsel_reg = S2MPU02_REG_L3CTRL + num - 3, \ 1913 .vsel_mask = S2MPU02_LDO_VSEL_MASK, \ 1914 .enable_reg = S2MPU02_REG_L3CTRL + num - 3, \ 1915 .enable_mask = S2MPU02_ENABLE_MASK \ 1916 } 1917 #define regulator_desc_s2mpu02_ldo5(num) { \ 1918 .name = "LDO"#num, \ 1919 .id = S2MPU02_LDO##num, \ 1920 .of_match = of_match_ptr("LDO"#num), \ 1921 .regulators_node = of_match_ptr("regulators"), \ 1922 .ops = &s2mpu02_ldo_ops, \ 1923 .type = REGULATOR_VOLTAGE, \ 1924 .owner = THIS_MODULE, \ 1925 .min_uV = S2MPU02_LDO_MIN_1600MV, \ 1926 .uV_step = S2MPU02_LDO_STEP_50MV, \ 1927 .linear_min_sel = S2MPU02_LDO_GROUP3_START_SEL, \ 1928 .n_voltages = S2MPU02_LDO_N_VOLTAGES, \ 1929 .vsel_reg = S2MPU02_REG_L3CTRL + num - 3, \ 1930 .vsel_mask = S2MPU02_LDO_VSEL_MASK, \ 1931 .enable_reg = S2MPU02_REG_L3CTRL + num - 3, \ 1932 .enable_mask = S2MPU02_ENABLE_MASK \ 1933 } 1934 1935 #define regulator_desc_s2mpu02_buck1234(num) { \ 1936 .name = "BUCK"#num, \ 1937 .id = S2MPU02_BUCK##num, \ 1938 .of_match = of_match_ptr("BUCK"#num), \ 1939 .regulators_node = of_match_ptr("regulators"), \ 1940 .ops = &s2mpu02_buck_ops, \ 1941 .type = REGULATOR_VOLTAGE, \ 1942 .owner = THIS_MODULE, \ 1943 .min_uV = S2MPU02_BUCK1234_MIN_600MV, \ 1944 .uV_step = S2MPU02_BUCK1234_STEP_6_25MV, \ 1945 .n_voltages = S2MPU02_BUCK_N_VOLTAGES, \ 1946 .linear_min_sel = S2MPU02_BUCK1234_START_SEL, \ 1947 .ramp_delay = S2MPU02_BUCK_RAMP_DELAY, \ 1948 .vsel_reg = S2MPU02_REG_B1CTRL2 + (num - 1) * 2, \ 1949 .vsel_mask = S2MPU02_BUCK_VSEL_MASK, \ 1950 .enable_reg = S2MPU02_REG_B1CTRL1 + (num - 1) * 2, \ 1951 .enable_mask = S2MPU02_ENABLE_MASK \ 1952 } 1953 #define regulator_desc_s2mpu02_buck5(num) { \ 1954 .name = "BUCK"#num, \ 1955 .id = S2MPU02_BUCK##num, \ 1956 .of_match = of_match_ptr("BUCK"#num), \ 1957 .regulators_node = of_match_ptr("regulators"), \ 1958 .ops = &s2mpu02_ldo_ops, \ 1959 .type = REGULATOR_VOLTAGE, \ 1960 .owner = THIS_MODULE, \ 1961 .min_uV = S2MPU02_BUCK5_MIN_1081_25MV, \ 1962 .uV_step = S2MPU02_BUCK5_STEP_6_25MV, \ 1963 .n_voltages = S2MPU02_BUCK_N_VOLTAGES, \ 1964 .linear_min_sel = S2MPU02_BUCK5_START_SEL, \ 1965 .ramp_delay = S2MPU02_BUCK_RAMP_DELAY, \ 1966 .vsel_reg = S2MPU02_REG_B5CTRL2, \ 1967 .vsel_mask = S2MPU02_BUCK_VSEL_MASK, \ 1968 .enable_reg = S2MPU02_REG_B5CTRL1, \ 1969 .enable_mask = S2MPU02_ENABLE_MASK \ 1970 } 1971 #define regulator_desc_s2mpu02_buck6(num) { \ 1972 .name = "BUCK"#num, \ 1973 .id = S2MPU02_BUCK##num, \ 1974 .of_match = of_match_ptr("BUCK"#num), \ 1975 .regulators_node = of_match_ptr("regulators"), \ 1976 .ops = &s2mpu02_ldo_ops, \ 1977 .type = REGULATOR_VOLTAGE, \ 1978 .owner = THIS_MODULE, \ 1979 .min_uV = S2MPU02_BUCK6_MIN_1700MV, \ 1980 .uV_step = S2MPU02_BUCK6_STEP_2_50MV, \ 1981 .n_voltages = S2MPU02_BUCK_N_VOLTAGES, \ 1982 .linear_min_sel = S2MPU02_BUCK6_START_SEL, \ 1983 .ramp_delay = S2MPU02_BUCK_RAMP_DELAY, \ 1984 .vsel_reg = S2MPU02_REG_B6CTRL2, \ 1985 .vsel_mask = S2MPU02_BUCK_VSEL_MASK, \ 1986 .enable_reg = S2MPU02_REG_B6CTRL1, \ 1987 .enable_mask = S2MPU02_ENABLE_MASK \ 1988 } 1989 #define regulator_desc_s2mpu02_buck7(num) { \ 1990 .name = "BUCK"#num, \ 1991 .id = S2MPU02_BUCK##num, \ 1992 .of_match = of_match_ptr("BUCK"#num), \ 1993 .regulators_node = of_match_ptr("regulators"), \ 1994 .ops = &s2mpu02_ldo_ops, \ 1995 .type = REGULATOR_VOLTAGE, \ 1996 .owner = THIS_MODULE, \ 1997 .min_uV = S2MPU02_BUCK7_MIN_900MV, \ 1998 .uV_step = S2MPU02_BUCK7_STEP_6_25MV, \ 1999 .n_voltages = S2MPU02_BUCK_N_VOLTAGES, \ 2000 .linear_min_sel = S2MPU02_BUCK7_START_SEL, \ 2001 .ramp_delay = S2MPU02_BUCK_RAMP_DELAY, \ 2002 .vsel_reg = S2MPU02_REG_B7CTRL2, \ 2003 .vsel_mask = S2MPU02_BUCK_VSEL_MASK, \ 2004 .enable_reg = S2MPU02_REG_B7CTRL1, \ 2005 .enable_mask = S2MPU02_ENABLE_MASK \ 2006 } 2007 2008 static const struct regulator_desc s2mpu02_regulators[] = { 2009 regulator_desc_s2mpu02_ldo1(1), 2010 regulator_desc_s2mpu02_ldo2(2), 2011 regulator_desc_s2mpu02_ldo4(3), 2012 regulator_desc_s2mpu02_ldo5(4), 2013 regulator_desc_s2mpu02_ldo4(5), 2014 regulator_desc_s2mpu02_ldo3(6), 2015 regulator_desc_s2mpu02_ldo3(7), 2016 regulator_desc_s2mpu02_ldo4(8), 2017 regulator_desc_s2mpu02_ldo5(9), 2018 regulator_desc_s2mpu02_ldo3(10), 2019 regulator_desc_s2mpu02_ldo4(11), 2020 regulator_desc_s2mpu02_ldo5(12), 2021 regulator_desc_s2mpu02_ldo5(13), 2022 regulator_desc_s2mpu02_ldo5(14), 2023 regulator_desc_s2mpu02_ldo5(15), 2024 regulator_desc_s2mpu02_ldo5(16), 2025 regulator_desc_s2mpu02_ldo4(17), 2026 regulator_desc_s2mpu02_ldo5(18), 2027 regulator_desc_s2mpu02_ldo3(19), 2028 regulator_desc_s2mpu02_ldo4(20), 2029 regulator_desc_s2mpu02_ldo5(21), 2030 regulator_desc_s2mpu02_ldo5(22), 2031 regulator_desc_s2mpu02_ldo5(23), 2032 regulator_desc_s2mpu02_ldo4(24), 2033 regulator_desc_s2mpu02_ldo5(25), 2034 regulator_desc_s2mpu02_ldo4(26), 2035 regulator_desc_s2mpu02_ldo5(27), 2036 regulator_desc_s2mpu02_ldo5(28), 2037 regulator_desc_s2mpu02_buck1234(1), 2038 regulator_desc_s2mpu02_buck1234(2), 2039 regulator_desc_s2mpu02_buck1234(3), 2040 regulator_desc_s2mpu02_buck1234(4), 2041 regulator_desc_s2mpu02_buck5(5), 2042 regulator_desc_s2mpu02_buck6(6), 2043 regulator_desc_s2mpu02_buck7(7), 2044 }; 2045 2046 #define regulator_desc_s2mpu05_ldo_reg(num, min, step, reg) { \ 2047 .name = "ldo"#num, \ 2048 .id = S2MPU05_LDO##num, \ 2049 .of_match = of_match_ptr("ldo"#num), \ 2050 .regulators_node = of_match_ptr("regulators"), \ 2051 .ops = &s2mpu02_ldo_ops, \ 2052 .type = REGULATOR_VOLTAGE, \ 2053 .owner = THIS_MODULE, \ 2054 .min_uV = min, \ 2055 .uV_step = step, \ 2056 .n_voltages = S2MPU05_LDO_N_VOLTAGES, \ 2057 .vsel_reg = reg, \ 2058 .vsel_mask = S2MPU05_LDO_VSEL_MASK, \ 2059 .enable_reg = reg, \ 2060 .enable_mask = S2MPU05_ENABLE_MASK, \ 2061 .enable_time = S2MPU05_ENABLE_TIME_LDO \ 2062 } 2063 2064 #define regulator_desc_s2mpu05_ldo(num, reg, min, step) \ 2065 regulator_desc_s2mpu05_ldo_reg(num, min, step, S2MPU05_REG_L##num##reg) 2066 2067 #define regulator_desc_s2mpu05_ldo1(num, reg) \ 2068 regulator_desc_s2mpu05_ldo(num, reg, S2MPU05_LDO_MIN1, S2MPU05_LDO_STEP1) 2069 2070 #define regulator_desc_s2mpu05_ldo2(num, reg) \ 2071 regulator_desc_s2mpu05_ldo(num, reg, S2MPU05_LDO_MIN1, S2MPU05_LDO_STEP2) 2072 2073 #define regulator_desc_s2mpu05_ldo3(num, reg) \ 2074 regulator_desc_s2mpu05_ldo(num, reg, S2MPU05_LDO_MIN2, S2MPU05_LDO_STEP2) 2075 2076 #define regulator_desc_s2mpu05_ldo4(num, reg) \ 2077 regulator_desc_s2mpu05_ldo(num, reg, S2MPU05_LDO_MIN3, S2MPU05_LDO_STEP2) 2078 2079 #define regulator_desc_s2mpu05_buck(num, which) { \ 2080 .name = "buck"#num, \ 2081 .id = S2MPU05_BUCK##num, \ 2082 .of_match = of_match_ptr("buck"#num), \ 2083 .regulators_node = of_match_ptr("regulators"), \ 2084 .ops = &s2mpu02_buck_ops, \ 2085 .type = REGULATOR_VOLTAGE, \ 2086 .owner = THIS_MODULE, \ 2087 .min_uV = S2MPU05_BUCK_MIN##which, \ 2088 .uV_step = S2MPU05_BUCK_STEP##which, \ 2089 .n_voltages = S2MPU05_BUCK_N_VOLTAGES, \ 2090 .vsel_reg = S2MPU05_REG_B##num##CTRL2, \ 2091 .vsel_mask = S2MPU05_BUCK_VSEL_MASK, \ 2092 .enable_reg = S2MPU05_REG_B##num##CTRL1, \ 2093 .enable_mask = S2MPU05_ENABLE_MASK, \ 2094 .enable_time = S2MPU05_ENABLE_TIME_BUCK##num \ 2095 } 2096 2097 #define regulator_desc_s2mpu05_buck123(num) regulator_desc_s2mpu05_buck(num, 1) 2098 #define regulator_desc_s2mpu05_buck45(num) regulator_desc_s2mpu05_buck(num, 2) 2099 2100 static const struct regulator_desc s2mpu05_regulators[] = { 2101 regulator_desc_s2mpu05_ldo4(1, CTRL), 2102 regulator_desc_s2mpu05_ldo3(2, CTRL), 2103 regulator_desc_s2mpu05_ldo2(3, CTRL), 2104 regulator_desc_s2mpu05_ldo1(4, CTRL), 2105 regulator_desc_s2mpu05_ldo1(5, CTRL), 2106 regulator_desc_s2mpu05_ldo1(6, CTRL), 2107 regulator_desc_s2mpu05_ldo2(7, CTRL), 2108 regulator_desc_s2mpu05_ldo3(8, CTRL), 2109 regulator_desc_s2mpu05_ldo4(9, CTRL1), 2110 regulator_desc_s2mpu05_ldo4(10, CTRL), 2111 /* LDOs 11-24 are used for CP. They aren't documented. */ 2112 regulator_desc_s2mpu05_ldo2(25, CTRL), 2113 regulator_desc_s2mpu05_ldo3(26, CTRL), 2114 regulator_desc_s2mpu05_ldo2(27, CTRL), 2115 regulator_desc_s2mpu05_ldo3(28, CTRL), 2116 regulator_desc_s2mpu05_ldo3(29, CTRL), 2117 regulator_desc_s2mpu05_ldo2(30, CTRL), 2118 regulator_desc_s2mpu05_ldo3(31, CTRL), 2119 regulator_desc_s2mpu05_ldo3(32, CTRL), 2120 regulator_desc_s2mpu05_ldo3(33, CTRL), 2121 regulator_desc_s2mpu05_ldo3(34, CTRL), 2122 regulator_desc_s2mpu05_ldo3(35, CTRL), 2123 regulator_desc_s2mpu05_buck123(1), 2124 regulator_desc_s2mpu05_buck123(2), 2125 regulator_desc_s2mpu05_buck123(3), 2126 regulator_desc_s2mpu05_buck45(4), 2127 regulator_desc_s2mpu05_buck45(5), 2128 }; 2129 2130 static int s2mps11_handle_ext_control(struct s2mps11_info *s2mps11, 2131 struct regulator_dev *rdev) 2132 { 2133 int ret; 2134 2135 switch (s2mps11->dev_type) { 2136 case S2MPS14X: 2137 if (!rdev->ena_pin) 2138 return 0; 2139 2140 ret = s2mps14_pmic_enable_ext_control(s2mps11, rdev); 2141 break; 2142 2143 case S2MPG10: 2144 case S2MPG11: 2145 /* 2146 * If desc.enable_val is != 0, then external control was 2147 * requested. We can not test s2mpg10_desc::ext_control, 2148 * because 0 is a valid value. 2149 */ 2150 if (!rdev->desc->enable_val) 2151 return 0; 2152 2153 ret = s2mpg10_enable_ext_control(s2mps11, rdev); 2154 break; 2155 2156 default: 2157 return 0; 2158 } 2159 2160 return ret; 2161 } 2162 2163 static int s2mps11_pmic_probe(struct platform_device *pdev) 2164 { 2165 struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent); 2166 struct regulator_config config = { }; 2167 struct s2mps11_info *s2mps11; 2168 unsigned int rdev_num; 2169 int i, ret; 2170 const struct regulator_desc *regulators; 2171 const struct s2mpg10_regulator_desc *s2mpg1x_regulators = NULL; 2172 2173 s2mps11 = devm_kzalloc(&pdev->dev, sizeof(struct s2mps11_info), 2174 GFP_KERNEL); 2175 if (!s2mps11) 2176 return -ENOMEM; 2177 2178 s2mps11->dev_type = platform_get_device_id(pdev)->driver_data; 2179 switch (s2mps11->dev_type) { 2180 case S2MPG10: 2181 rdev_num = ARRAY_SIZE(s2mpg10_regulators); 2182 s2mpg1x_regulators = s2mpg10_regulators; 2183 BUILD_BUG_ON(ARRAY_SIZE(s2mpg10_regulators) > S2MPS_REGULATOR_MAX); 2184 break; 2185 case S2MPG11: 2186 rdev_num = ARRAY_SIZE(s2mpg11_regulators); 2187 s2mpg1x_regulators = s2mpg11_regulators; 2188 BUILD_BUG_ON(ARRAY_SIZE(s2mpg11_regulators) > S2MPS_REGULATOR_MAX); 2189 break; 2190 case S2MPS11X: 2191 rdev_num = ARRAY_SIZE(s2mps11_regulators); 2192 regulators = s2mps11_regulators; 2193 BUILD_BUG_ON(ARRAY_SIZE(s2mps11_regulators) > S2MPS_REGULATOR_MAX); 2194 break; 2195 case S2MPS13X: 2196 rdev_num = ARRAY_SIZE(s2mps13_regulators); 2197 regulators = s2mps13_regulators; 2198 BUILD_BUG_ON(ARRAY_SIZE(s2mps13_regulators) > S2MPS_REGULATOR_MAX); 2199 break; 2200 case S2MPS14X: 2201 rdev_num = ARRAY_SIZE(s2mps14_regulators); 2202 regulators = s2mps14_regulators; 2203 BUILD_BUG_ON(ARRAY_SIZE(s2mps14_regulators) > S2MPS_REGULATOR_MAX); 2204 break; 2205 case S2MPS15X: 2206 rdev_num = ARRAY_SIZE(s2mps15_regulators); 2207 regulators = s2mps15_regulators; 2208 BUILD_BUG_ON(ARRAY_SIZE(s2mps15_regulators) > S2MPS_REGULATOR_MAX); 2209 break; 2210 case S2MPU02: 2211 rdev_num = ARRAY_SIZE(s2mpu02_regulators); 2212 regulators = s2mpu02_regulators; 2213 BUILD_BUG_ON(ARRAY_SIZE(s2mpu02_regulators) > S2MPS_REGULATOR_MAX); 2214 break; 2215 case S2MPU05: 2216 rdev_num = ARRAY_SIZE(s2mpu05_regulators); 2217 regulators = s2mpu05_regulators; 2218 BUILD_BUG_ON(ARRAY_SIZE(s2mpu05_regulators) > S2MPS_REGULATOR_MAX); 2219 break; 2220 default: 2221 return dev_err_probe(&pdev->dev, -ENODEV, 2222 "Unsupported device type %d\n", 2223 s2mps11->dev_type); 2224 } 2225 2226 if (s2mpg1x_regulators) { 2227 size_t regulators_sz = rdev_num * sizeof(*s2mpg1x_regulators); 2228 2229 s2mpg1x_regulators = devm_kmemdup(&pdev->dev, 2230 s2mpg1x_regulators, 2231 regulators_sz, 2232 GFP_KERNEL); 2233 if (!s2mpg1x_regulators) 2234 return -ENOMEM; 2235 } 2236 2237 device_set_of_node_from_dev(&pdev->dev, pdev->dev.parent); 2238 2239 platform_set_drvdata(pdev, s2mps11); 2240 2241 config.dev = &pdev->dev; 2242 config.regmap = iodev->regmap_pmic; 2243 config.driver_data = s2mps11; 2244 for (i = 0; i < rdev_num; i++) { 2245 const struct regulator_desc *rdesc; 2246 struct regulator_dev *regulator; 2247 2248 if (s2mpg1x_regulators) 2249 rdesc = &s2mpg1x_regulators[i].desc; 2250 else 2251 rdesc = ®ulators[i]; 2252 2253 regulator = devm_regulator_register(&pdev->dev, 2254 rdesc, &config); 2255 if (IS_ERR(regulator)) 2256 return dev_err_probe(&pdev->dev, PTR_ERR(regulator), 2257 "regulator init failed for %d/%s\n", 2258 rdesc->id, rdesc->name); 2259 2260 ret = s2mps11_handle_ext_control(s2mps11, regulator); 2261 if (ret < 0) 2262 return ret; 2263 } 2264 2265 return 0; 2266 } 2267 2268 static const struct platform_device_id s2mps11_pmic_id[] = { 2269 { "s2mpg10-regulator", S2MPG10}, 2270 { "s2mpg11-regulator", S2MPG11}, 2271 { "s2mps11-regulator", S2MPS11X}, 2272 { "s2mps13-regulator", S2MPS13X}, 2273 { "s2mps14-regulator", S2MPS14X}, 2274 { "s2mps15-regulator", S2MPS15X}, 2275 { "s2mpu02-regulator", S2MPU02}, 2276 { "s2mpu05-regulator", S2MPU05}, 2277 { }, 2278 }; 2279 MODULE_DEVICE_TABLE(platform, s2mps11_pmic_id); 2280 2281 static struct platform_driver s2mps11_pmic_driver = { 2282 .driver = { 2283 .name = "s2mps11-pmic", 2284 .probe_type = PROBE_PREFER_ASYNCHRONOUS, 2285 }, 2286 .probe = s2mps11_pmic_probe, 2287 .id_table = s2mps11_pmic_id, 2288 }; 2289 2290 module_platform_driver(s2mps11_pmic_driver); 2291 2292 /* Module information */ 2293 MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>"); 2294 MODULE_DESCRIPTION("Samsung S2MPS11/14/15/S2MPU02/05 Regulator Driver"); 2295 MODULE_LICENSE("GPL"); 2296