xref: /linux/drivers/regulator/rt8092.c (revision 333f7de560e1196034b67db16916b10a0c529e1d)
1 // SPDX-License-Identifier: GPL-2.0+
2 //
3 // Copyright (c) 2025 Richtek Technology Corp.
4 //
5 // Author: ChiYuan Huang <cy_huang@richtek.com>
6 
7 #include <linux/bitfield.h>
8 #include <linux/bits.h>
9 #include <linux/gpio/consumer.h>
10 #include <linux/i2c.h>
11 #include <linux/module.h>
12 #include <linux/property.h>
13 #include <linux/regmap.h>
14 #include <linux/regulator/consumer.h>
15 #include <linux/regulator/driver.h>
16 #include <linux/regulator/of_regulator.h>
17 
18 #define RT8092_REG_MNTRPT	0x00
19 #define RT8092_REG_VOUTH	0x10
20 #define RT8092_REG_VOUTL	0x11
21 #define RT8092_REG_PWMMODE	0x14
22 #define RT8092_REG_EVENT	0x18
23 #define RT8092_REG_VBANKH	0x1C
24 #define RT8092_REG_VBANKL	0x1D
25 #define RT8092_REG_VBOUND	0x1E
26 
27 #define RT8092_TSDEVT_MASK	BIT(7)
28 #define RT8092_PGEVT_MASK	BIT(0)
29 #define RT8092_VSEL_MASK	GENMASK(6, 0)
30 #define RT8092_VOUTEN_MASK	BIT(7)
31 #define RT8092_FPWML_MASK	BIT(7)
32 #define RT8092_FPWMH_MASK	BIT(6)
33 #define RT8092_OCPEVT_MASK	BIT(7)
34 #define RT8092_SCPEVT_MASK	BIT(4)
35 #define RT8092_VINUVEVT_MASK	BIT(1)
36 #define RT8092_VBANK_MASK	GENMASK(1, 0)
37 
38 #define RT8092_MODE_AUTO	0
39 #define RT8092_MODE_FPWM	1
40 #define RT8092_VOUT_BASEUV	303125
41 #define RT8092_VOUT_STEPUV	3125
42 #define RT8092_VOUT_MINSEL	15
43 #define RT8092_NUM_VOLTS	128
44 #define RT8092_INITSS_US	400
45 
46 static int rt8092_get_vbank_index(struct regmap *regmap, bool vsel_high, unsigned int *vbank_idx)
47 {
48 	unsigned int vbank_reg = vsel_high ? RT8092_REG_VBANKH : RT8092_REG_VBANKL;
49 	unsigned int index;
50 	int ret;
51 
52 	ret = regmap_read(regmap, vbank_reg, &index);
53 	if (ret)
54 		return ret;
55 
56 	*vbank_idx = FIELD_GET(RT8092_VBANK_MASK, index);
57 	return 0;
58 }
59 
60 static int rt8092_set_operating_mode(struct regulator_dev *rdev, unsigned int mode)
61 {
62 	const struct regulator_desc *desc = rdev->desc;
63 	struct regmap *regmap = rdev_get_regmap(rdev);
64 	unsigned int mode_mask, mode_val;
65 
66 	mode_mask = desc->vsel_reg == RT8092_REG_VOUTH ? RT8092_FPWMH_MASK : RT8092_FPWML_MASK;
67 
68 	switch (mode) {
69 	case REGULATOR_MODE_FAST:
70 		mode_val = mode_mask;
71 		break;
72 	case REGULATOR_MODE_NORMAL:
73 		mode_val = 0;
74 		break;
75 	default:
76 		return -EINVAL;
77 	}
78 
79 	return regmap_update_bits(regmap, RT8092_REG_PWMMODE, mode_mask, mode_val);
80 }
81 
82 static unsigned int rt8092_get_operating_mode(struct regulator_dev *rdev)
83 {
84 	const struct regulator_desc *desc = rdev->desc;
85 	struct regmap *regmap = rdev_get_regmap(rdev);
86 	unsigned int mode_mask, mode_val;
87 	int ret;
88 
89 	mode_mask = desc->vsel_reg == RT8092_REG_VOUTH ? RT8092_FPWMH_MASK : RT8092_FPWML_MASK;
90 
91 	ret = regmap_read(regmap, RT8092_REG_PWMMODE, &mode_val);
92 	if (ret)
93 		return REGULATOR_MODE_INVALID;
94 
95 	return mode_val & mode_mask ? REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL;
96 }
97 
98 static int rt8092_get_error_flags(struct regulator_dev *rdev, unsigned int *flags)
99 {
100 	struct regmap *regmap = rdev_get_regmap(rdev);
101 	unsigned int mntrpt, evtrpt, events = 0;
102 	int ret;
103 
104 	ret = regmap_read(regmap, RT8092_REG_MNTRPT, &mntrpt);
105 	if (ret)
106 		return ret;
107 
108 	ret = regmap_read(regmap, RT8092_REG_EVENT, &evtrpt);
109 	if (ret)
110 		return ret;
111 
112 	if (!(mntrpt & RT8092_PGEVT_MASK) || evtrpt & RT8092_VINUVEVT_MASK)
113 		events |= REGULATOR_ERROR_UNDER_VOLTAGE;
114 
115 	if (mntrpt & RT8092_TSDEVT_MASK)
116 		events |= REGULATOR_ERROR_OVER_TEMP;
117 
118 	if (evtrpt & RT8092_OCPEVT_MASK)
119 		events |= REGULATOR_ERROR_OVER_CURRENT;
120 
121 	if (evtrpt & RT8092_SCPEVT_MASK)
122 		events |= REGULATOR_ERROR_FAIL;
123 
124 	*flags = events;
125 	return 0;
126 }
127 
128 
129 static int rt8092_set_suspend_voltage(struct regulator_dev *rdev, int uV)
130 {
131 	const struct regulator_desc *desc = rdev->desc;
132 	struct regmap *regmap = rdev_get_regmap(rdev);
133 	unsigned int vsel_reg, vsel_val, vbank_idx;
134 	bool vsel_high;
135 	int ret;
136 
137 	vsel_reg = desc->vsel_reg == RT8092_REG_VOUTH ? RT8092_REG_VOUTL : RT8092_REG_VOUTH;
138 	vsel_high = desc->vsel_reg == RT8092_REG_VOUTH;
139 
140 	ret = rt8092_get_vbank_index(regmap, vsel_high, &vbank_idx);
141 	if (ret)
142 		return ret;
143 
144 	/* VOUT  = (BASEUV + STEPUV * VSEL) * 2^vbank_idx */
145 	uV >>= vbank_idx;
146 	if (uV < RT8092_VOUT_BASEUV)
147 		return -EINVAL;
148 
149 	vsel_val = (uV - RT8092_VOUT_BASEUV) / RT8092_VOUT_STEPUV;
150 	if (vsel_val < RT8092_VOUT_MINSEL || vsel_val >= RT8092_NUM_VOLTS)
151 		return -EINVAL;
152 
153 	return regmap_update_bits(regmap, vsel_reg, RT8092_VSEL_MASK, vsel_val);
154 }
155 
156 static int rt8092_set_suspend_enable(struct regulator_dev *rdev)
157 {
158 	const struct regulator_desc *desc = rdev->desc;
159 	struct regmap *regmap = rdev_get_regmap(rdev);
160 	unsigned int enable_reg;
161 
162 	enable_reg = desc->vsel_reg == RT8092_REG_VOUTH ? RT8092_REG_VOUTL : RT8092_REG_VOUTH;
163 	return regmap_set_bits(regmap, enable_reg, RT8092_VOUTEN_MASK);
164 }
165 
166 static int rt8092_set_suspend_disable(struct regulator_dev *rdev)
167 {
168 	const struct regulator_desc *desc = rdev->desc;
169 	struct regmap *regmap = rdev_get_regmap(rdev);
170 	unsigned int enable_reg;
171 
172 	enable_reg = desc->vsel_reg == RT8092_REG_VOUTH ? RT8092_REG_VOUTL : RT8092_REG_VOUTH;
173 	return regmap_clear_bits(regmap, enable_reg, RT8092_VOUTEN_MASK);
174 }
175 
176 static int rt8092_set_suspend_mode(struct regulator_dev *rdev, unsigned int mode)
177 {
178 	const struct regulator_desc *desc = rdev->desc;
179 	struct regmap *regmap = rdev_get_regmap(rdev);
180 	unsigned int mode_mask, mode_val;
181 
182 	mode_mask = desc->vsel_reg == RT8092_REG_VOUTH ? RT8092_FPWML_MASK : RT8092_FPWMH_MASK;
183 
184 	switch (mode) {
185 	case REGULATOR_MODE_FAST:
186 		mode_val = mode_mask;
187 		break;
188 	case REGULATOR_MODE_NORMAL:
189 		mode_val = 0;
190 		break;
191 	default:
192 		return -EINVAL;
193 	}
194 
195 	return regmap_update_bits(regmap, RT8092_REG_PWMMODE, mode_mask, mode_val);
196 }
197 
198 static const struct regulator_ops rt8092_regulator_ops = {
199 	.list_voltage = regulator_list_voltage_linear,
200 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
201 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
202 	.enable = regulator_enable_regmap,
203 	.disable = regulator_disable_regmap,
204 	.is_enabled = regulator_is_enabled_regmap,
205 	.set_mode = rt8092_set_operating_mode,
206 	.get_mode = rt8092_get_operating_mode,
207 	.get_error_flags = rt8092_get_error_flags,
208 	.set_suspend_voltage = rt8092_set_suspend_voltage,
209 	.set_suspend_enable = rt8092_set_suspend_enable,
210 	.set_suspend_disable = rt8092_set_suspend_disable,
211 	.set_suspend_mode = rt8092_set_suspend_mode,
212 };
213 
214 static unsigned int rt8092_of_map_mode(unsigned int mode)
215 {
216 	switch (mode) {
217 	case RT8092_MODE_AUTO:
218 		return REGULATOR_MODE_NORMAL;
219 	case RT8092_MODE_FPWM:
220 		return REGULATOR_MODE_FAST;
221 	default:
222 		return REGULATOR_MODE_INVALID;
223 	}
224 }
225 
226 static const struct regmap_config rt8092_regmap_cfg = {
227 	.name =	"rt8092",
228 	.reg_bits = 8,
229 	.val_bits = 8,
230 	.max_register = RT8092_REG_VBOUND,
231 };
232 
233 static int rt8092_probe(struct i2c_client *i2c)
234 {
235 	unsigned int vbank_idx, min_uV, step_uV;
236 	struct regulator_config cfg = {};
237 	struct device *dev = &i2c->dev;
238 	struct regulator_desc *desc;
239 	struct regulator_dev *rdev;
240 	struct gpio_desc *enable;
241 	struct regmap *regmap;
242 	bool vsel_high;
243 	int ret;
244 
245 	desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
246 	if (!desc)
247 		return -ENOMEM;
248 
249 	enable = devm_gpiod_get_optional(dev, "enable", GPIOD_OUT_HIGH);
250 	if (IS_ERR(enable))
251 		return dev_err_probe(dev, PTR_ERR(enable), "Failed get 'enable' gpio\n");
252 
253 	regmap = devm_regmap_init_i2c(i2c, &rt8092_regmap_cfg);
254 	if (IS_ERR(regmap))
255 		return dev_err_probe(dev, PTR_ERR(regmap), "Failed to init regmap\n");
256 
257 	vsel_high = device_property_read_bool(dev, "richtek,vsel-active-high");
258 
259 	ret = rt8092_get_vbank_index(regmap, vsel_high, &vbank_idx);
260 	if (ret)
261 		return dev_err_probe(dev, ret, "Failed to get VOUT bank index\n");
262 
263 	/*
264 	 * step VOUT = STEP_UV * 2^vbank_idx
265 	 * min VOUT  = (BASEUV + STEPUV * VMIN_SEL) * 2^vbank_idx
266 	 */
267 	step_uV = RT8092_VOUT_STEPUV << vbank_idx;
268 	min_uV = (RT8092_VOUT_BASEUV + RT8092_VOUT_STEPUV * RT8092_VOUT_MINSEL) << vbank_idx;
269 
270 	desc->name = "rt8092";
271 	desc->owner = THIS_MODULE;
272 	desc->type = REGULATOR_VOLTAGE;
273 	desc->ops = &rt8092_regulator_ops;
274 	desc->n_voltages = RT8092_NUM_VOLTS;
275 	desc->min_uV = min_uV;
276 	desc->uV_step = step_uV;
277 	desc->linear_min_sel = RT8092_VOUT_MINSEL;
278 	desc->enable_reg = desc->vsel_reg = vsel_high ? RT8092_REG_VOUTH : RT8092_REG_VOUTL;
279 	desc->vsel_mask = RT8092_VSEL_MASK;
280 	desc->enable_mask = RT8092_VOUTEN_MASK;
281 	desc->enable_time = RT8092_INITSS_US;
282 	desc->of_map_mode = rt8092_of_map_mode;
283 
284 	cfg.dev = dev;
285 	cfg.of_node = dev_of_node(dev);
286 	cfg.init_data = of_get_regulator_init_data(dev, dev_of_node(dev), desc);
287 
288 	rdev = devm_regulator_register(dev, desc, &cfg);
289 	if (IS_ERR(rdev))
290 		return dev_err_probe(dev, PTR_ERR(rdev), "Failed to register regulator\n");
291 
292 	return 0;
293 }
294 
295 static const struct of_device_id rt8092_device_tables[] = {
296 	{ .compatible = "richtek,rt8092" },
297 	{}
298 };
299 MODULE_DEVICE_TABLE(of, rt8092_device_tables);
300 
301 static struct i2c_driver rt8092_driver = {
302 	.driver = {
303 		.name = "rt8092",
304 		.of_match_table = rt8092_device_tables,
305 	},
306 	.probe = rt8092_probe,
307 };
308 module_i2c_driver(rt8092_driver);
309 
310 MODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>");
311 MODULE_DESCRIPTION("Richtek RT8092 Regulator Driver");
312 MODULE_LICENSE("GPL");
313