1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2015, Sony Mobile Communications AB. 4 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. 5 */ 6 7 #include <linux/module.h> 8 #include <linux/of.h> 9 #include <linux/of_device.h> 10 #include <linux/platform_device.h> 11 #include <linux/regulator/driver.h> 12 #include <linux/soc/qcom/smd-rpm.h> 13 14 struct qcom_rpm_reg { 15 struct device *dev; 16 17 struct qcom_smd_rpm *rpm; 18 19 u32 type; 20 u32 id; 21 22 struct regulator_desc desc; 23 24 int is_enabled; 25 int uV; 26 u32 load; 27 28 unsigned int enabled_updated:1; 29 unsigned int uv_updated:1; 30 unsigned int load_updated:1; 31 }; 32 33 struct rpm_regulator_req { 34 __le32 key; 35 __le32 nbytes; 36 __le32 value; 37 }; 38 39 #define RPM_KEY_SWEN 0x6e657773 /* "swen" */ 40 #define RPM_KEY_UV 0x00007675 /* "uv" */ 41 #define RPM_KEY_MA 0x0000616d /* "ma" */ 42 43 static int rpm_reg_write_active(struct qcom_rpm_reg *vreg) 44 { 45 struct rpm_regulator_req req[3]; 46 int reqlen = 0; 47 int ret; 48 49 if (vreg->enabled_updated) { 50 req[reqlen].key = cpu_to_le32(RPM_KEY_SWEN); 51 req[reqlen].nbytes = cpu_to_le32(sizeof(u32)); 52 req[reqlen].value = cpu_to_le32(vreg->is_enabled); 53 reqlen++; 54 } 55 56 if (vreg->uv_updated && vreg->is_enabled) { 57 req[reqlen].key = cpu_to_le32(RPM_KEY_UV); 58 req[reqlen].nbytes = cpu_to_le32(sizeof(u32)); 59 req[reqlen].value = cpu_to_le32(vreg->uV); 60 reqlen++; 61 } 62 63 if (vreg->load_updated && vreg->is_enabled) { 64 req[reqlen].key = cpu_to_le32(RPM_KEY_MA); 65 req[reqlen].nbytes = cpu_to_le32(sizeof(u32)); 66 req[reqlen].value = cpu_to_le32(vreg->load / 1000); 67 reqlen++; 68 } 69 70 if (!reqlen) 71 return 0; 72 73 ret = qcom_rpm_smd_write(vreg->rpm, QCOM_SMD_RPM_ACTIVE_STATE, 74 vreg->type, vreg->id, 75 req, sizeof(req[0]) * reqlen); 76 if (!ret) { 77 vreg->enabled_updated = 0; 78 vreg->uv_updated = 0; 79 vreg->load_updated = 0; 80 } 81 82 return ret; 83 } 84 85 static int rpm_reg_enable(struct regulator_dev *rdev) 86 { 87 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); 88 int ret; 89 90 vreg->is_enabled = 1; 91 vreg->enabled_updated = 1; 92 93 ret = rpm_reg_write_active(vreg); 94 if (ret) 95 vreg->is_enabled = 0; 96 97 return ret; 98 } 99 100 static int rpm_reg_is_enabled(struct regulator_dev *rdev) 101 { 102 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); 103 104 return vreg->is_enabled; 105 } 106 107 static int rpm_reg_disable(struct regulator_dev *rdev) 108 { 109 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); 110 int ret; 111 112 vreg->is_enabled = 0; 113 vreg->enabled_updated = 1; 114 115 ret = rpm_reg_write_active(vreg); 116 if (ret) 117 vreg->is_enabled = 1; 118 119 return ret; 120 } 121 122 static int rpm_reg_get_voltage(struct regulator_dev *rdev) 123 { 124 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); 125 126 return vreg->uV; 127 } 128 129 static int rpm_reg_set_voltage(struct regulator_dev *rdev, 130 int min_uV, 131 int max_uV, 132 unsigned *selector) 133 { 134 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); 135 int ret; 136 int old_uV = vreg->uV; 137 138 vreg->uV = min_uV; 139 vreg->uv_updated = 1; 140 141 ret = rpm_reg_write_active(vreg); 142 if (ret) 143 vreg->uV = old_uV; 144 145 return ret; 146 } 147 148 static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA) 149 { 150 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); 151 u32 old_load = vreg->load; 152 int ret; 153 154 vreg->load = load_uA; 155 vreg->load_updated = 1; 156 ret = rpm_reg_write_active(vreg); 157 if (ret) 158 vreg->load = old_load; 159 160 return ret; 161 } 162 163 static const struct regulator_ops rpm_smps_ldo_ops = { 164 .enable = rpm_reg_enable, 165 .disable = rpm_reg_disable, 166 .is_enabled = rpm_reg_is_enabled, 167 .list_voltage = regulator_list_voltage_linear_range, 168 169 .get_voltage = rpm_reg_get_voltage, 170 .set_voltage = rpm_reg_set_voltage, 171 172 .set_load = rpm_reg_set_load, 173 }; 174 175 static const struct regulator_ops rpm_smps_ldo_ops_fixed = { 176 .enable = rpm_reg_enable, 177 .disable = rpm_reg_disable, 178 .is_enabled = rpm_reg_is_enabled, 179 180 .get_voltage = rpm_reg_get_voltage, 181 .set_voltage = rpm_reg_set_voltage, 182 183 .set_load = rpm_reg_set_load, 184 }; 185 186 static const struct regulator_ops rpm_switch_ops = { 187 .enable = rpm_reg_enable, 188 .disable = rpm_reg_disable, 189 .is_enabled = rpm_reg_is_enabled, 190 }; 191 192 static const struct regulator_ops rpm_bob_ops = { 193 .enable = rpm_reg_enable, 194 .disable = rpm_reg_disable, 195 .is_enabled = rpm_reg_is_enabled, 196 197 .get_voltage = rpm_reg_get_voltage, 198 .set_voltage = rpm_reg_set_voltage, 199 }; 200 201 static const struct regulator_desc pma8084_hfsmps = { 202 .linear_ranges = (struct linear_range[]) { 203 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500), 204 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000), 205 }, 206 .n_linear_ranges = 2, 207 .n_voltages = 159, 208 .ops = &rpm_smps_ldo_ops, 209 }; 210 211 static const struct regulator_desc pma8084_ftsmps = { 212 .linear_ranges = (struct linear_range[]) { 213 REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000), 214 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000), 215 }, 216 .n_linear_ranges = 2, 217 .n_voltages = 262, 218 .ops = &rpm_smps_ldo_ops, 219 }; 220 221 static const struct regulator_desc pma8084_pldo = { 222 .linear_ranges = (struct linear_range[]) { 223 REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500), 224 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000), 225 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000), 226 }, 227 .n_linear_ranges = 3, 228 .n_voltages = 164, 229 .ops = &rpm_smps_ldo_ops, 230 }; 231 232 static const struct regulator_desc pma8084_nldo = { 233 .linear_ranges = (struct linear_range[]) { 234 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500), 235 }, 236 .n_linear_ranges = 1, 237 .n_voltages = 64, 238 .ops = &rpm_smps_ldo_ops, 239 }; 240 241 static const struct regulator_desc pma8084_switch = { 242 .ops = &rpm_switch_ops, 243 }; 244 245 static const struct regulator_desc pm8x41_hfsmps = { 246 .linear_ranges = (struct linear_range[]) { 247 REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500), 248 REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000), 249 }, 250 .n_linear_ranges = 2, 251 .n_voltages = 159, 252 .ops = &rpm_smps_ldo_ops, 253 }; 254 255 static const struct regulator_desc pm8841_ftsmps = { 256 .linear_ranges = (struct linear_range[]) { 257 REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000), 258 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000), 259 }, 260 .n_linear_ranges = 2, 261 .n_voltages = 262, 262 .ops = &rpm_smps_ldo_ops, 263 }; 264 265 static const struct regulator_desc pm8941_boost = { 266 .linear_ranges = (struct linear_range[]) { 267 REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000), 268 }, 269 .n_linear_ranges = 1, 270 .n_voltages = 31, 271 .ops = &rpm_smps_ldo_ops, 272 }; 273 274 static const struct regulator_desc pm8941_pldo = { 275 .linear_ranges = (struct linear_range[]) { 276 REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500), 277 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000), 278 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000), 279 }, 280 .n_linear_ranges = 3, 281 .n_voltages = 164, 282 .ops = &rpm_smps_ldo_ops, 283 }; 284 285 static const struct regulator_desc pm8941_nldo = { 286 .linear_ranges = (struct linear_range[]) { 287 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500), 288 }, 289 .n_linear_ranges = 1, 290 .n_voltages = 64, 291 .ops = &rpm_smps_ldo_ops, 292 }; 293 294 static const struct regulator_desc pm8941_lnldo = { 295 .fixed_uV = 1740000, 296 .n_voltages = 1, 297 .ops = &rpm_smps_ldo_ops_fixed, 298 }; 299 300 static const struct regulator_desc pm8941_switch = { 301 .ops = &rpm_switch_ops, 302 }; 303 304 static const struct regulator_desc pm8916_pldo = { 305 .linear_ranges = (struct linear_range[]) { 306 REGULATOR_LINEAR_RANGE(750000, 0, 208, 12500), 307 }, 308 .n_linear_ranges = 1, 309 .n_voltages = 209, 310 .ops = &rpm_smps_ldo_ops, 311 }; 312 313 static const struct regulator_desc pm8916_nldo = { 314 .linear_ranges = (struct linear_range[]) { 315 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500), 316 }, 317 .n_linear_ranges = 1, 318 .n_voltages = 94, 319 .ops = &rpm_smps_ldo_ops, 320 }; 321 322 static const struct regulator_desc pm8916_buck_lvo_smps = { 323 .linear_ranges = (struct linear_range[]) { 324 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500), 325 REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000), 326 }, 327 .n_linear_ranges = 2, 328 .n_voltages = 128, 329 .ops = &rpm_smps_ldo_ops, 330 }; 331 332 static const struct regulator_desc pm8916_buck_hvo_smps = { 333 .linear_ranges = (struct linear_range[]) { 334 REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000), 335 }, 336 .n_linear_ranges = 1, 337 .n_voltages = 32, 338 .ops = &rpm_smps_ldo_ops, 339 }; 340 341 static const struct regulator_desc pm8950_hfsmps = { 342 .linear_ranges = (struct linear_range[]) { 343 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500), 344 REGULATOR_LINEAR_RANGE(1550000, 96, 127, 25000), 345 }, 346 .n_linear_ranges = 2, 347 .n_voltages = 128, 348 .ops = &rpm_smps_ldo_ops, 349 }; 350 351 static const struct regulator_desc pm8950_ftsmps2p5 = { 352 .linear_ranges = (struct linear_range[]) { 353 REGULATOR_LINEAR_RANGE(80000, 0, 255, 5000), 354 REGULATOR_LINEAR_RANGE(160000, 256, 460, 10000), 355 }, 356 .n_linear_ranges = 2, 357 .n_voltages = 461, 358 .ops = &rpm_smps_ldo_ops, 359 }; 360 361 static const struct regulator_desc pm8950_ult_nldo = { 362 .linear_ranges = (struct linear_range[]) { 363 REGULATOR_LINEAR_RANGE(375000, 0, 202, 12500), 364 }, 365 .n_linear_ranges = 1, 366 .n_voltages = 203, 367 .ops = &rpm_smps_ldo_ops, 368 }; 369 370 static const struct regulator_desc pm8950_ult_pldo = { 371 .linear_ranges = (struct linear_range[]) { 372 REGULATOR_LINEAR_RANGE(1750000, 0, 127, 12500), 373 }, 374 .n_linear_ranges = 1, 375 .n_voltages = 128, 376 .ops = &rpm_smps_ldo_ops, 377 }; 378 379 static const struct regulator_desc pm8950_pldo_lv = { 380 .linear_ranges = (struct linear_range[]) { 381 REGULATOR_LINEAR_RANGE(1500000, 0, 16, 25000), 382 }, 383 .n_linear_ranges = 1, 384 .n_voltages = 17, 385 .ops = &rpm_smps_ldo_ops, 386 }; 387 388 static const struct regulator_desc pm8950_pldo = { 389 .linear_ranges = (struct linear_range[]) { 390 REGULATOR_LINEAR_RANGE(975000, 0, 164, 12500), 391 }, 392 .n_linear_ranges = 1, 393 .n_voltages = 165, 394 .ops = &rpm_smps_ldo_ops, 395 }; 396 397 398 static const struct regulator_desc pm8994_hfsmps = { 399 .linear_ranges = (struct linear_range[]) { 400 REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500), 401 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000), 402 }, 403 .n_linear_ranges = 2, 404 .n_voltages = 159, 405 .ops = &rpm_smps_ldo_ops, 406 }; 407 408 static const struct regulator_desc pm8994_ftsmps = { 409 .linear_ranges = (struct linear_range[]) { 410 REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000), 411 REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000), 412 }, 413 .n_linear_ranges = 2, 414 .n_voltages = 350, 415 .ops = &rpm_smps_ldo_ops, 416 }; 417 418 static const struct regulator_desc pm8994_nldo = { 419 .linear_ranges = (struct linear_range[]) { 420 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500), 421 }, 422 .n_linear_ranges = 1, 423 .n_voltages = 64, 424 .ops = &rpm_smps_ldo_ops, 425 }; 426 427 static const struct regulator_desc pm8994_pldo = { 428 .linear_ranges = (struct linear_range[]) { 429 REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500), 430 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000), 431 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000), 432 }, 433 .n_linear_ranges = 3, 434 .n_voltages = 164, 435 .ops = &rpm_smps_ldo_ops, 436 }; 437 438 static const struct regulator_desc pm8994_switch = { 439 .ops = &rpm_switch_ops, 440 }; 441 442 static const struct regulator_desc pm8994_lnldo = { 443 .fixed_uV = 1740000, 444 .n_voltages = 1, 445 .ops = &rpm_smps_ldo_ops_fixed, 446 }; 447 448 static const struct regulator_desc pmi8994_ftsmps = { 449 .linear_ranges = (struct linear_range[]) { 450 REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000), 451 REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000), 452 }, 453 .n_linear_ranges = 2, 454 .n_voltages = 350, 455 .ops = &rpm_smps_ldo_ops, 456 }; 457 458 static const struct regulator_desc pmi8994_hfsmps = { 459 .linear_ranges = (struct linear_range[]) { 460 REGULATOR_LINEAR_RANGE(350000, 0, 80, 12500), 461 REGULATOR_LINEAR_RANGE(700000, 81, 141, 25000), 462 }, 463 .n_linear_ranges = 2, 464 .n_voltages = 142, 465 .ops = &rpm_smps_ldo_ops, 466 }; 467 468 static const struct regulator_desc pmi8994_bby = { 469 .linear_ranges = (struct linear_range[]) { 470 REGULATOR_LINEAR_RANGE(3000000, 0, 44, 50000), 471 }, 472 .n_linear_ranges = 1, 473 .n_voltages = 45, 474 .ops = &rpm_bob_ops, 475 }; 476 477 static const struct regulator_desc pmi8994_boost = { 478 .linear_ranges = (struct linear_range[]) { 479 REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000), 480 }, 481 .n_linear_ranges = 1, 482 .n_voltages = 31, 483 .ops = &rpm_smps_ldo_ops, 484 }; 485 486 static const struct regulator_desc pm8998_ftsmps = { 487 .linear_ranges = (struct linear_range[]) { 488 REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000), 489 }, 490 .n_linear_ranges = 1, 491 .n_voltages = 259, 492 .ops = &rpm_smps_ldo_ops, 493 }; 494 495 static const struct regulator_desc pm8998_hfsmps = { 496 .linear_ranges = (struct linear_range[]) { 497 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), 498 }, 499 .n_linear_ranges = 1, 500 .n_voltages = 216, 501 .ops = &rpm_smps_ldo_ops, 502 }; 503 504 static const struct regulator_desc pm8998_nldo = { 505 .linear_ranges = (struct linear_range[]) { 506 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000), 507 }, 508 .n_linear_ranges = 1, 509 .n_voltages = 128, 510 .ops = &rpm_smps_ldo_ops, 511 }; 512 513 static const struct regulator_desc pm8998_pldo = { 514 .linear_ranges = (struct linear_range[]) { 515 REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000), 516 }, 517 .n_linear_ranges = 1, 518 .n_voltages = 256, 519 .ops = &rpm_smps_ldo_ops, 520 }; 521 522 static const struct regulator_desc pm8998_pldo_lv = { 523 .linear_ranges = (struct linear_range[]) { 524 REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000), 525 }, 526 .n_linear_ranges = 1, 527 .n_voltages = 128, 528 .ops = &rpm_smps_ldo_ops, 529 }; 530 531 static const struct regulator_desc pm8998_switch = { 532 .ops = &rpm_switch_ops, 533 }; 534 535 static const struct regulator_desc pmi8998_bob = { 536 .linear_ranges = (struct linear_range[]) { 537 REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000), 538 }, 539 .n_linear_ranges = 1, 540 .n_voltages = 84, 541 .ops = &rpm_bob_ops, 542 }; 543 544 static const struct regulator_desc pms405_hfsmps3 = { 545 .linear_ranges = (struct linear_range[]) { 546 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), 547 }, 548 .n_linear_ranges = 1, 549 .n_voltages = 216, 550 .ops = &rpm_smps_ldo_ops, 551 }; 552 553 static const struct regulator_desc pms405_nldo300 = { 554 .linear_ranges = (struct linear_range[]) { 555 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000), 556 }, 557 .n_linear_ranges = 1, 558 .n_voltages = 128, 559 .ops = &rpm_smps_ldo_ops, 560 }; 561 562 static const struct regulator_desc pms405_nldo1200 = { 563 .linear_ranges = (struct linear_range[]) { 564 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000), 565 }, 566 .n_linear_ranges = 1, 567 .n_voltages = 128, 568 .ops = &rpm_smps_ldo_ops, 569 }; 570 571 static const struct regulator_desc pms405_pldo50 = { 572 .linear_ranges = (struct linear_range[]) { 573 REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000), 574 }, 575 .n_linear_ranges = 1, 576 .n_voltages = 129, 577 .ops = &rpm_smps_ldo_ops, 578 }; 579 580 static const struct regulator_desc pms405_pldo150 = { 581 .linear_ranges = (struct linear_range[]) { 582 REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000), 583 }, 584 .n_linear_ranges = 1, 585 .n_voltages = 129, 586 .ops = &rpm_smps_ldo_ops, 587 }; 588 589 static const struct regulator_desc pms405_pldo600 = { 590 .linear_ranges = (struct linear_range[]) { 591 REGULATOR_LINEAR_RANGE(1256000, 0, 98, 8000), 592 }, 593 .n_linear_ranges = 1, 594 .n_voltages = 99, 595 .ops = &rpm_smps_ldo_ops, 596 }; 597 598 struct rpm_regulator_data { 599 const char *name; 600 u32 type; 601 u32 id; 602 const struct regulator_desc *desc; 603 const char *supply; 604 }; 605 606 static const struct rpm_regulator_data rpm_pm8841_regulators[] = { 607 { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" }, 608 { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" }, 609 { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" }, 610 { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" }, 611 { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" }, 612 { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" }, 613 { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" }, 614 { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" }, 615 {} 616 }; 617 618 static const struct rpm_regulator_data rpm_pm8916_regulators[] = { 619 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" }, 620 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" }, 621 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" }, 622 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" }, 623 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" }, 624 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" }, 625 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" }, 626 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" }, 627 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" }, 628 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" }, 629 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" }, 630 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" }, 631 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" }, 632 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 633 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 634 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 635 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 636 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 637 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 638 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 639 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 640 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 641 {} 642 }; 643 644 static const struct rpm_regulator_data rpm_pm8941_regulators[] = { 645 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" }, 646 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" }, 647 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" }, 648 { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost }, 649 650 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" }, 651 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" }, 652 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" }, 653 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" }, 654 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" }, 655 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" }, 656 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" }, 657 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" }, 658 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" }, 659 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" }, 660 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" }, 661 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" }, 662 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" }, 663 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" }, 664 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" }, 665 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" }, 666 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" }, 667 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" }, 668 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" }, 669 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" }, 670 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" }, 671 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" }, 672 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" }, 673 { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" }, 674 675 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" }, 676 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" }, 677 { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" }, 678 679 { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" }, 680 { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" }, 681 682 {} 683 }; 684 685 static const struct rpm_regulator_data rpm_pma8084_regulators[] = { 686 { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" }, 687 { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" }, 688 { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" }, 689 { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" }, 690 { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" }, 691 { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" }, 692 { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" }, 693 { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" }, 694 { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" }, 695 { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" }, 696 { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" }, 697 { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" }, 698 699 { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" }, 700 { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, 701 { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, 702 { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, 703 { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" }, 704 { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 705 { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" }, 706 { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" }, 707 { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 708 { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 709 { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" }, 710 { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 711 { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 712 { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 713 { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 714 { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" }, 715 { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" }, 716 { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" }, 717 { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" }, 718 { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 719 { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" }, 720 { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" }, 721 { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 722 { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 723 { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" }, 724 { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 725 { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, 726 727 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch }, 728 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch }, 729 { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch }, 730 { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch }, 731 { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch }, 732 733 {} 734 }; 735 736 static const struct rpm_regulator_data rpm_pm8950_regulators[] = { 737 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8950_hfsmps, "vdd_s1" }, 738 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8950_hfsmps, "vdd_s2" }, 739 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8950_hfsmps, "vdd_s3" }, 740 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8950_hfsmps, "vdd_s4" }, 741 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8950_ftsmps2p5, "vdd_s5" }, 742 { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8950_hfsmps, "vdd_s6" }, 743 744 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8950_ult_nldo, "vdd_l1_l19" }, 745 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8950_ult_nldo, "vdd_l2_l23" }, 746 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8950_ult_nldo, "vdd_l3" }, 747 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16" }, 748 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_pldo_lv, "vdd_l4_l5_l6_l7_l16" }, 749 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_pldo_lv, "vdd_l4_l5_l6_l7_l16" }, 750 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_pldo_lv, "vdd_l4_l5_l6_l7_l16" }, 751 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" }, 752 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" }, 753 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_nldo, "vdd_l9_l10_l13_l14_l15_l18"}, 754 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22"}, 755 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22"}, 756 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"}, 757 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"}, 758 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"}, 759 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16"}, 760 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22"}, 761 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"}, 762 { "l19", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l1_l19"}, 763 { "l20", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l20"}, 764 { "l21", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l21"}, 765 { "l22", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l8_l11_l12_l17_l22"}, 766 { "l23", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l2_l23"}, 767 {} 768 }; 769 770 static const struct rpm_regulator_data rpm_pm8994_regulators[] = { 771 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8994_ftsmps, "vdd_s1" }, 772 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8994_ftsmps, "vdd_s2" }, 773 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8994_hfsmps, "vdd_s3" }, 774 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8994_hfsmps, "vdd_s4" }, 775 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8994_hfsmps, "vdd_s5" }, 776 { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8994_ftsmps, "vdd_s6" }, 777 { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8994_hfsmps, "vdd_s7" }, 778 { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8994_ftsmps, "vdd_s8" }, 779 { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8994_ftsmps, "vdd_s9" }, 780 { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8994_ftsmps, "vdd_s10" }, 781 { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8994_ftsmps, "vdd_s11" }, 782 { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8994_ftsmps, "vdd_s12" }, 783 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8994_nldo, "vdd_l1" }, 784 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8994_nldo, "vdd_l2_l26_l28" }, 785 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8994_nldo, "vdd_l3_l11" }, 786 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8994_nldo, "vdd_l4_l27_l31" }, 787 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8994_lnldo, "vdd_l5_l7" }, 788 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8994_pldo, "vdd_l6_l12_l32" }, 789 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8994_lnldo, "vdd_l5_l7" }, 790 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8994_pldo, "vdd_l8_l16_l30" }, 791 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8994_pldo, "vdd_l9_l10_l18_l22" }, 792 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8994_pldo, "vdd_l9_l10_l18_l22" }, 793 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8994_nldo, "vdd_l3_l11" }, 794 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8994_pldo, "vdd_l6_l12_l32" }, 795 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8994_pldo, "vdd_l13_l19_l23_l24" }, 796 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8994_pldo, "vdd_l14_l15" }, 797 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8994_pldo, "vdd_l14_l15" }, 798 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8994_pldo, "vdd_l8_l16_l30" }, 799 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8994_pldo, "vdd_l17_l29" }, 800 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8994_pldo, "vdd_l9_l10_l18_l22" }, 801 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8994_pldo, "vdd_l13_l19_l23_l24" }, 802 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8994_pldo, "vdd_l20_l21" }, 803 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8994_pldo, "vdd_l20_l21" }, 804 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8994_pldo, "vdd_l9_l10_l18_l22" }, 805 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8994_pldo, "vdd_l13_l19_l23_l24" }, 806 { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8994_pldo, "vdd_l13_l19_l23_l24" }, 807 { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8994_pldo, "vdd_l25" }, 808 { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8994_nldo, "vdd_l2_l26_l28" }, 809 { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8994_nldo, "vdd_l4_l27_l31" }, 810 { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8994_nldo, "vdd_l2_l26_l28" }, 811 { "l29", QCOM_SMD_RPM_LDOA, 29, &pm8994_pldo, "vdd_l17_l29" }, 812 { "l30", QCOM_SMD_RPM_LDOA, 30, &pm8994_pldo, "vdd_l8_l16_l30" }, 813 { "l31", QCOM_SMD_RPM_LDOA, 31, &pm8994_nldo, "vdd_l4_l27_l31" }, 814 { "l32", QCOM_SMD_RPM_LDOA, 32, &pm8994_pldo, "vdd_l6_l12_l32" }, 815 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8994_switch, "vdd_lvs1_2" }, 816 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8994_switch, "vdd_lvs1_2" }, 817 818 {} 819 }; 820 821 static const struct rpm_regulator_data rpm_pmi8994_regulators[] = { 822 { "s1", QCOM_SMD_RPM_SMPB, 1, &pmi8994_ftsmps, "vdd_s1" }, 823 { "s2", QCOM_SMD_RPM_SMPB, 2, &pmi8994_hfsmps, "vdd_s2" }, 824 { "s2", QCOM_SMD_RPM_SMPB, 3, &pmi8994_hfsmps, "vdd_s3" }, 825 { "boost-bypass", QCOM_SMD_RPM_BBYB, 1, &pmi8994_bby, "vdd_bst_byp" }, 826 {} 827 }; 828 829 static const struct rpm_regulator_data rpm_pm8998_regulators[] = { 830 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_ftsmps, "vdd_s1" }, 831 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_ftsmps, "vdd_s2" }, 832 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" }, 833 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" }, 834 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" }, 835 { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_ftsmps, "vdd_s6" }, 836 { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_ftsmps, "vdd_s7" }, 837 { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8998_ftsmps, "vdd_s8" }, 838 { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8998_ftsmps, "vdd_s9" }, 839 { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8998_ftsmps, "vdd_s10" }, 840 { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8998_ftsmps, "vdd_s11" }, 841 { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8998_ftsmps, "vdd_s12" }, 842 { "s13", QCOM_SMD_RPM_SMPA, 13, &pm8998_ftsmps, "vdd_s13" }, 843 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8998_nldo, "vdd_l1_l27" }, 844 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8998_nldo, "vdd_l2_l8_l17" }, 845 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8998_nldo, "vdd_l3_l11" }, 846 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8998_nldo, "vdd_l4_l5" }, 847 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8998_nldo, "vdd_l4_l5" }, 848 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8998_pldo, "vdd_l6" }, 849 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" }, 850 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8998_nldo, "vdd_l2_l8_l17" }, 851 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8998_pldo, "vdd_l9" }, 852 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8998_pldo, "vdd_l10_l23_l25" }, 853 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8998_nldo, "vdd_l3_l11" }, 854 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" }, 855 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8998_pldo, "vdd_l13_l19_l21" }, 856 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" }, 857 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" }, 858 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8998_pldo, "vdd_l16_l28" }, 859 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8998_nldo, "vdd_l2_l8_l17" }, 860 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8998_pldo, "vdd_l18_l22" }, 861 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8998_pldo, "vdd_l13_l19_l21" }, 862 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8998_pldo, "vdd_l20_l24" }, 863 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8998_pldo, "vdd_l13_l19_l21" }, 864 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8998_pldo, "vdd_l18_l22" }, 865 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8998_pldo, "vdd_l10_l23_l25" }, 866 { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8998_pldo, "vdd_l20_l24" }, 867 { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8998_pldo, "vdd_l10_l23_l25" }, 868 { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8998_nldo, "vdd_l26" }, 869 { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8998_nldo, "vdd_l1_l27" }, 870 { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8998_pldo, "vdd_l16_l28" }, 871 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8998_switch, "vdd_lvs1_lvs2" }, 872 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8998_switch, "vdd_lvs1_lvs2" }, 873 {} 874 }; 875 876 static const struct rpm_regulator_data rpm_pmi8998_regulators[] = { 877 { "bob", QCOM_SMD_RPM_BOBB, 1, &pmi8998_bob, "vdd_bob" }, 878 {} 879 }; 880 881 static const struct rpm_regulator_data rpm_pms405_regulators[] = { 882 { "s1", QCOM_SMD_RPM_SMPA, 1, &pms405_hfsmps3, "vdd_s1" }, 883 { "s2", QCOM_SMD_RPM_SMPA, 2, &pms405_hfsmps3, "vdd_s2" }, 884 { "s3", QCOM_SMD_RPM_SMPA, 3, &pms405_hfsmps3, "vdd_s3" }, 885 { "s4", QCOM_SMD_RPM_SMPA, 4, &pms405_hfsmps3, "vdd_s4" }, 886 { "s5", QCOM_SMD_RPM_SMPA, 5, &pms405_hfsmps3, "vdd_s5" }, 887 { "l1", QCOM_SMD_RPM_LDOA, 1, &pms405_nldo1200, "vdd_l1_l2" }, 888 { "l2", QCOM_SMD_RPM_LDOA, 2, &pms405_nldo1200, "vdd_l1_l2" }, 889 { "l3", QCOM_SMD_RPM_LDOA, 3, &pms405_nldo1200, "vdd_l3_l8" }, 890 { "l4", QCOM_SMD_RPM_LDOA, 4, &pms405_nldo300, "vdd_l4" }, 891 { "l5", QCOM_SMD_RPM_LDOA, 5, &pms405_pldo600, "vdd_l5_l6" }, 892 { "l6", QCOM_SMD_RPM_LDOA, 6, &pms405_pldo600, "vdd_l5_l6" }, 893 { "l7", QCOM_SMD_RPM_LDOA, 7, &pms405_pldo150, "vdd_l7" }, 894 { "l8", QCOM_SMD_RPM_LDOA, 8, &pms405_nldo1200, "vdd_l3_l8" }, 895 { "l9", QCOM_SMD_RPM_LDOA, 9, &pms405_nldo1200, "vdd_l9" }, 896 { "l10", QCOM_SMD_RPM_LDOA, 10, &pms405_pldo50, "vdd_l10_l11_l12_l13" }, 897 { "l11", QCOM_SMD_RPM_LDOA, 11, &pms405_pldo150, "vdd_l10_l11_l12_l13" }, 898 { "l12", QCOM_SMD_RPM_LDOA, 12, &pms405_pldo150, "vdd_l10_l11_l12_l13" }, 899 { "l13", QCOM_SMD_RPM_LDOA, 13, &pms405_pldo150, "vdd_l10_l11_l12_l13" }, 900 {} 901 }; 902 903 static const struct of_device_id rpm_of_match[] = { 904 { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators }, 905 { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators }, 906 { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators }, 907 { .compatible = "qcom,rpm-pm8950-regulators", .data = &rpm_pm8950_regulators }, 908 { .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators }, 909 { .compatible = "qcom,rpm-pm8998-regulators", .data = &rpm_pm8998_regulators }, 910 { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators }, 911 { .compatible = "qcom,rpm-pmi8994-regulators", .data = &rpm_pmi8994_regulators }, 912 { .compatible = "qcom,rpm-pmi8998-regulators", .data = &rpm_pmi8998_regulators }, 913 { .compatible = "qcom,rpm-pms405-regulators", .data = &rpm_pms405_regulators }, 914 {} 915 }; 916 MODULE_DEVICE_TABLE(of, rpm_of_match); 917 918 static int rpm_reg_probe(struct platform_device *pdev) 919 { 920 const struct rpm_regulator_data *reg; 921 const struct of_device_id *match; 922 struct regulator_config config = { }; 923 struct regulator_dev *rdev; 924 struct qcom_rpm_reg *vreg; 925 struct qcom_smd_rpm *rpm; 926 927 rpm = dev_get_drvdata(pdev->dev.parent); 928 if (!rpm) { 929 dev_err(&pdev->dev, "unable to retrieve handle to rpm\n"); 930 return -ENODEV; 931 } 932 933 match = of_match_device(rpm_of_match, &pdev->dev); 934 if (!match) { 935 dev_err(&pdev->dev, "failed to match device\n"); 936 return -ENODEV; 937 } 938 939 for (reg = match->data; reg->name; reg++) { 940 vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL); 941 if (!vreg) 942 return -ENOMEM; 943 944 vreg->dev = &pdev->dev; 945 vreg->type = reg->type; 946 vreg->id = reg->id; 947 vreg->rpm = rpm; 948 949 memcpy(&vreg->desc, reg->desc, sizeof(vreg->desc)); 950 951 vreg->desc.id = -1; 952 vreg->desc.owner = THIS_MODULE; 953 vreg->desc.type = REGULATOR_VOLTAGE; 954 vreg->desc.name = reg->name; 955 vreg->desc.supply_name = reg->supply; 956 vreg->desc.of_match = reg->name; 957 958 config.dev = &pdev->dev; 959 config.driver_data = vreg; 960 rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config); 961 if (IS_ERR(rdev)) { 962 dev_err(&pdev->dev, "failed to register %s\n", reg->name); 963 return PTR_ERR(rdev); 964 } 965 } 966 967 return 0; 968 } 969 970 static struct platform_driver rpm_reg_driver = { 971 .probe = rpm_reg_probe, 972 .driver = { 973 .name = "qcom_rpm_smd_regulator", 974 .of_match_table = rpm_of_match, 975 }, 976 }; 977 978 static int __init rpm_reg_init(void) 979 { 980 return platform_driver_register(&rpm_reg_driver); 981 } 982 subsys_initcall(rpm_reg_init); 983 984 static void __exit rpm_reg_exit(void) 985 { 986 platform_driver_unregister(&rpm_reg_driver); 987 } 988 module_exit(rpm_reg_exit) 989 990 MODULE_DESCRIPTION("Qualcomm RPM regulator driver"); 991 MODULE_LICENSE("GPL v2"); 992