xref: /linux/drivers/regulator/pv88080-regulator.h (revision c39f2d9db0fd81ea20bb5cce9b3f082ca63753e2)
1*0ae3b061SAxel Lin /* SPDX-License-Identifier: GPL-2.0+ */
299cf3af5SJames Ban /*
399cf3af5SJames Ban  * pv88080-regulator.h - Regulator definitions for PV88080
499cf3af5SJames Ban  * Copyright (C) 2016 Powerventure Semiconductor Ltd.
599cf3af5SJames Ban  */
699cf3af5SJames Ban 
799cf3af5SJames Ban #ifndef __PV88080_REGISTERS_H__
899cf3af5SJames Ban #define __PV88080_REGISTERS_H__
999cf3af5SJames Ban 
1099cf3af5SJames Ban /* System Control and Event Registers */
1199cf3af5SJames Ban #define	PV88080_REG_EVENT_A				0x04
1299cf3af5SJames Ban #define	PV88080_REG_MASK_A				0x09
135ff00f6aSEric Jeong #define	PV88080_REG_MASK_B				0x0A
145ff00f6aSEric Jeong #define	PV88080_REG_MASK_C				0x0B
1599cf3af5SJames Ban 
165ff00f6aSEric Jeong /* Regulator Registers - rev. AA */
175ff00f6aSEric Jeong #define PV88080AA_REG_HVBUCK_CONF1		0x2D
185ff00f6aSEric Jeong #define PV88080AA_REG_HVBUCK_CONF2		0x2E
195ff00f6aSEric Jeong #define	PV88080AA_REG_BUCK1_CONF0		0x27
205ff00f6aSEric Jeong #define	PV88080AA_REG_BUCK1_CONF1		0x28
215ff00f6aSEric Jeong #define	PV88080AA_REG_BUCK1_CONF2		0x59
225ff00f6aSEric Jeong #define	PV88080AA_REG_BUCK1_CONF5		0x5C
235ff00f6aSEric Jeong #define	PV88080AA_REG_BUCK2_CONF0		0x29
245ff00f6aSEric Jeong #define	PV88080AA_REG_BUCK2_CONF1		0x2A
255ff00f6aSEric Jeong #define	PV88080AA_REG_BUCK2_CONF2		0x61
265ff00f6aSEric Jeong #define	PV88080AA_REG_BUCK2_CONF5		0x64
275ff00f6aSEric Jeong #define	PV88080AA_REG_BUCK3_CONF0		0x2B
285ff00f6aSEric Jeong #define	PV88080AA_REG_BUCK3_CONF1		0x2C
295ff00f6aSEric Jeong #define	PV88080AA_REG_BUCK3_CONF2		0x69
305ff00f6aSEric Jeong #define	PV88080AA_REG_BUCK3_CONF5		0x6C
315ff00f6aSEric Jeong 
325ff00f6aSEric Jeong /* Regulator Registers - rev. BA */
335ff00f6aSEric Jeong #define	PV88080BA_REG_HVBUCK_CONF1		0x33
345ff00f6aSEric Jeong #define	PV88080BA_REG_HVBUCK_CONF2		0x34
355ff00f6aSEric Jeong #define	PV88080BA_REG_BUCK1_CONF0		0x2A
365ff00f6aSEric Jeong #define	PV88080BA_REG_BUCK1_CONF1		0x2C
375ff00f6aSEric Jeong #define	PV88080BA_REG_BUCK1_CONF2		0x5A
385ff00f6aSEric Jeong #define	PV88080BA_REG_BUCK1_CONF5		0x5D
395ff00f6aSEric Jeong #define	PV88080BA_REG_BUCK2_CONF0		0x2D
405ff00f6aSEric Jeong #define	PV88080BA_REG_BUCK2_CONF1		0x2F
415ff00f6aSEric Jeong #define	PV88080BA_REG_BUCK2_CONF2		0x63
425ff00f6aSEric Jeong #define	PV88080BA_REG_BUCK2_CONF5		0x66
435ff00f6aSEric Jeong #define	PV88080BA_REG_BUCK3_CONF0		0x30
445ff00f6aSEric Jeong #define	PV88080BA_REG_BUCK3_CONF1		0x32
455ff00f6aSEric Jeong #define	PV88080BA_REG_BUCK3_CONF2		0x6C
465ff00f6aSEric Jeong #define	PV88080BA_REG_BUCK3_CONF5		0x6F
4799cf3af5SJames Ban 
4899cf3af5SJames Ban /* PV88080_REG_EVENT_A (addr=0x04) */
4999cf3af5SJames Ban #define	PV88080_E_VDD_FLT				0x01
5099cf3af5SJames Ban #define	PV88080_E_OVER_TEMP				0x02
5199cf3af5SJames Ban 
5299cf3af5SJames Ban /* PV88080_REG_MASK_A (addr=0x09) */
5399cf3af5SJames Ban #define	PV88080_M_VDD_FLT				0x01
5499cf3af5SJames Ban #define	PV88080_M_OVER_TEMP				0x02
5599cf3af5SJames Ban 
565ff00f6aSEric Jeong /* PV88080_REG_BUCK1_CONF0 (addr=0x27|0x2A) */
5799cf3af5SJames Ban #define	PV88080_BUCK1_EN				0x80
5899cf3af5SJames Ban #define PV88080_VBUCK1_MASK				0x7F
595ff00f6aSEric Jeong 
605ff00f6aSEric Jeong /* PV88080_REG_BUCK2_CONF0 (addr=0x29|0x2D) */
6199cf3af5SJames Ban #define	PV88080_BUCK2_EN				0x80
6299cf3af5SJames Ban #define PV88080_VBUCK2_MASK				0x7F
635ff00f6aSEric Jeong 
645ff00f6aSEric Jeong /* PV88080_REG_BUCK3_CONF0 (addr=0x2B|0x30) */
6599cf3af5SJames Ban #define	PV88080_BUCK3_EN				0x80
6699cf3af5SJames Ban #define PV88080_VBUCK3_MASK				0x7F
6799cf3af5SJames Ban 
685ff00f6aSEric Jeong /* PV88080_REG_BUCK1_CONF1 (addr=0x28|0x2C) */
6999cf3af5SJames Ban #define PV88080_BUCK1_ILIM_SHIFT		2
7099cf3af5SJames Ban #define PV88080_BUCK1_ILIM_MASK			0x0C
7199cf3af5SJames Ban #define PV88080_BUCK1_MODE_MASK			0x03
7299cf3af5SJames Ban 
735ff00f6aSEric Jeong /* PV88080_REG_BUCK2_CONF1 (addr=0x2A|0x2F) */
7499cf3af5SJames Ban #define PV88080_BUCK2_ILIM_SHIFT		2
7599cf3af5SJames Ban #define PV88080_BUCK2_ILIM_MASK			0x0C
7699cf3af5SJames Ban #define PV88080_BUCK2_MODE_MASK			0x03
7799cf3af5SJames Ban 
785ff00f6aSEric Jeong /* PV88080_REG_BUCK3_CONF1 (addr=0x2C|0x32) */
7999cf3af5SJames Ban #define PV88080_BUCK3_ILIM_SHIFT		2
8099cf3af5SJames Ban #define PV88080_BUCK3_ILIM_MASK			0x0C
8199cf3af5SJames Ban #define PV88080_BUCK3_MODE_MASK			0x03
8299cf3af5SJames Ban 
8399cf3af5SJames Ban #define	PV88080_BUCK_MODE_SLEEP			0x00
8499cf3af5SJames Ban #define	PV88080_BUCK_MODE_AUTO			0x01
8599cf3af5SJames Ban #define	PV88080_BUCK_MODE_SYNC			0x02
8699cf3af5SJames Ban 
875ff00f6aSEric Jeong /* PV88080_REG_HVBUCK_CONF1 (addr=0x2D|0x33) */
885ff00f6aSEric Jeong #define PV88080_VHVBUCK_MASK			0xFF
895ff00f6aSEric Jeong 
905ff00f6aSEric Jeong /* PV88080_REG_HVBUCK_CONF1 (addr=0x2E|0x34) */
915ff00f6aSEric Jeong #define PV88080_HVBUCK_EN				0x01
925ff00f6aSEric Jeong 
935ff00f6aSEric Jeong /* PV88080_REG_BUCK2_CONF2 (addr=0x61|0x63) */
945ff00f6aSEric Jeong /* PV88080_REG_BUCK3_CONF2 (addr=0x69|0x6C) */
9599cf3af5SJames Ban #define PV88080_BUCK_VDAC_RANGE_SHIFT	7
9699cf3af5SJames Ban #define PV88080_BUCK_VDAC_RANGE_MASK	0x01
9799cf3af5SJames Ban 
9899cf3af5SJames Ban #define PV88080_BUCK_VDAC_RANGE_1		0x00
9999cf3af5SJames Ban #define PV88080_BUCK_VDAC_RANGE_2		0x01
10099cf3af5SJames Ban 
1015ff00f6aSEric Jeong /* PV88080_REG_BUCK2_CONF5 (addr=0x64|0x66) */
1025ff00f6aSEric Jeong /* PV88080_REG_BUCK3_CONF5 (addr=0x6C|0x6F) */
10399cf3af5SJames Ban #define PV88080_BUCK_VRANGE_GAIN_SHIFT	0
10499cf3af5SJames Ban #define PV88080_BUCK_VRANGE_GAIN_MASK	0x01
10599cf3af5SJames Ban 
10699cf3af5SJames Ban #define PV88080_BUCK_VRANGE_GAIN_1		0x00
10799cf3af5SJames Ban #define PV88080_BUCK_VRANGE_GAIN_2		0x01
10899cf3af5SJames Ban 
10999cf3af5SJames Ban #endif	/* __PV88080_REGISTERS_H__ */
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