1 /* 2 * Copyright (c) 2016 MediaTek Inc. 3 * Author: Chen Zhong <chen.zhong@mediatek.com> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 */ 9 10 #include <linux/module.h> 11 #include <linux/of.h> 12 #include <linux/platform_device.h> 13 #include <linux/regmap.h> 14 #include <linux/mfd/mt6397/core.h> 15 #include <linux/mfd/mt6323/registers.h> 16 #include <linux/regulator/driver.h> 17 #include <linux/regulator/machine.h> 18 #include <linux/regulator/mt6323-regulator.h> 19 #include <linux/regulator/of_regulator.h> 20 21 #define MT6323_LDO_MODE_NORMAL 0 22 #define MT6323_LDO_MODE_LP 1 23 24 /* 25 * MT6323 regulators' information 26 * 27 * @desc: standard fields of regulator description. 28 * @qi: Mask for query enable signal status of regulators 29 * @vselon_reg: Register sections for hardware control mode of bucks 30 * @vselctrl_reg: Register for controlling the buck control mode. 31 * @vselctrl_mask: Mask for query buck's voltage control mode. 32 */ 33 struct mt6323_regulator_info { 34 struct regulator_desc desc; 35 u32 qi; 36 u32 vselon_reg; 37 u32 vselctrl_reg; 38 u32 vselctrl_mask; 39 u32 modeset_reg; 40 u32 modeset_mask; 41 }; 42 43 #define MT6323_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \ 44 vosel, vosel_mask, voselon, vosel_ctrl) \ 45 [MT6323_ID_##vreg] = { \ 46 .desc = { \ 47 .name = #vreg, \ 48 .of_match = of_match_ptr(match), \ 49 .ops = &mt6323_volt_range_ops, \ 50 .type = REGULATOR_VOLTAGE, \ 51 .id = MT6323_ID_##vreg, \ 52 .owner = THIS_MODULE, \ 53 .n_voltages = (max - min)/step + 1, \ 54 .linear_ranges = volt_ranges, \ 55 .n_linear_ranges = ARRAY_SIZE(volt_ranges), \ 56 .vsel_reg = vosel, \ 57 .vsel_mask = vosel_mask, \ 58 .enable_reg = enreg, \ 59 .enable_mask = BIT(0), \ 60 }, \ 61 .qi = BIT(13), \ 62 .vselon_reg = voselon, \ 63 .vselctrl_reg = vosel_ctrl, \ 64 .vselctrl_mask = BIT(1), \ 65 } 66 67 #define MT6323_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel, \ 68 vosel_mask, _modeset_reg, _modeset_mask) \ 69 [MT6323_ID_##vreg] = { \ 70 .desc = { \ 71 .name = #vreg, \ 72 .of_match = of_match_ptr(match), \ 73 .ops = &mt6323_volt_table_ops, \ 74 .type = REGULATOR_VOLTAGE, \ 75 .id = MT6323_ID_##vreg, \ 76 .owner = THIS_MODULE, \ 77 .n_voltages = ARRAY_SIZE(ldo_volt_table), \ 78 .volt_table = ldo_volt_table, \ 79 .vsel_reg = vosel, \ 80 .vsel_mask = vosel_mask, \ 81 .enable_reg = enreg, \ 82 .enable_mask = BIT(enbit), \ 83 }, \ 84 .qi = BIT(15), \ 85 .modeset_reg = _modeset_reg, \ 86 .modeset_mask = _modeset_mask, \ 87 } 88 89 #define MT6323_REG_FIXED(match, vreg, enreg, enbit, volt, \ 90 _modeset_reg, _modeset_mask) \ 91 [MT6323_ID_##vreg] = { \ 92 .desc = { \ 93 .name = #vreg, \ 94 .of_match = of_match_ptr(match), \ 95 .ops = &mt6323_volt_fixed_ops, \ 96 .type = REGULATOR_VOLTAGE, \ 97 .id = MT6323_ID_##vreg, \ 98 .owner = THIS_MODULE, \ 99 .n_voltages = 1, \ 100 .enable_reg = enreg, \ 101 .enable_mask = BIT(enbit), \ 102 .min_uV = volt, \ 103 }, \ 104 .qi = BIT(15), \ 105 .modeset_reg = _modeset_reg, \ 106 .modeset_mask = _modeset_mask, \ 107 } 108 109 static const struct regulator_linear_range buck_volt_range1[] = { 110 REGULATOR_LINEAR_RANGE(700000, 0, 0x7f, 6250), 111 }; 112 113 static const struct regulator_linear_range buck_volt_range2[] = { 114 REGULATOR_LINEAR_RANGE(1400000, 0, 0x7f, 12500), 115 }; 116 117 static const struct regulator_linear_range buck_volt_range3[] = { 118 REGULATOR_LINEAR_RANGE(500000, 0, 0x3f, 50000), 119 }; 120 121 static const u32 ldo_volt_table1[] = { 122 3300000, 3400000, 3500000, 3600000, 123 }; 124 125 static const u32 ldo_volt_table2[] = { 126 1500000, 1800000, 2500000, 2800000, 127 }; 128 129 static const u32 ldo_volt_table3[] = { 130 1800000, 3300000, 131 }; 132 133 static const u32 ldo_volt_table4[] = { 134 3000000, 3300000, 135 }; 136 137 static const u32 ldo_volt_table5[] = { 138 1200000, 1300000, 1500000, 1800000, 2000000, 2800000, 3000000, 3300000, 139 }; 140 141 static const u32 ldo_volt_table6[] = { 142 1200000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 2000000, 143 }; 144 145 static const u32 ldo_volt_table7[] = { 146 1200000, 1300000, 1500000, 1800000, 147 }; 148 149 static const u32 ldo_volt_table8[] = { 150 1800000, 3000000, 151 }; 152 153 static const u32 ldo_volt_table9[] = { 154 1200000, 1350000, 1500000, 1800000, 155 }; 156 157 static const u32 ldo_volt_table10[] = { 158 1200000, 1300000, 1500000, 1800000, 159 }; 160 161 static int mt6323_get_status(struct regulator_dev *rdev) 162 { 163 int ret; 164 u32 regval; 165 struct mt6323_regulator_info *info = rdev_get_drvdata(rdev); 166 167 ret = regmap_read(rdev->regmap, info->desc.enable_reg, ®val); 168 if (ret != 0) { 169 dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret); 170 return ret; 171 } 172 173 return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF; 174 } 175 176 static int mt6323_ldo_set_mode(struct regulator_dev *rdev, unsigned int mode) 177 { 178 int ret, val = 0; 179 struct mt6323_regulator_info *info = rdev_get_drvdata(rdev); 180 181 if (!info->modeset_mask) { 182 dev_err(&rdev->dev, "regulator %s doesn't support set_mode\n", 183 info->desc.name); 184 return -EINVAL; 185 } 186 187 switch (mode) { 188 case REGULATOR_MODE_STANDBY: 189 val = MT6323_LDO_MODE_LP; 190 break; 191 case REGULATOR_MODE_NORMAL: 192 val = MT6323_LDO_MODE_NORMAL; 193 break; 194 default: 195 return -EINVAL; 196 } 197 198 val <<= ffs(info->modeset_mask) - 1; 199 200 ret = regmap_update_bits(rdev->regmap, info->modeset_reg, 201 info->modeset_mask, val); 202 203 return ret; 204 } 205 206 static unsigned int mt6323_ldo_get_mode(struct regulator_dev *rdev) 207 { 208 unsigned int val; 209 unsigned int mode; 210 int ret; 211 struct mt6323_regulator_info *info = rdev_get_drvdata(rdev); 212 213 if (!info->modeset_mask) { 214 dev_err(&rdev->dev, "regulator %s doesn't support get_mode\n", 215 info->desc.name); 216 return -EINVAL; 217 } 218 219 ret = regmap_read(rdev->regmap, info->modeset_reg, &val); 220 if (ret < 0) 221 return ret; 222 223 val &= info->modeset_mask; 224 val >>= ffs(info->modeset_mask) - 1; 225 226 if (val & 0x1) 227 mode = REGULATOR_MODE_STANDBY; 228 else 229 mode = REGULATOR_MODE_NORMAL; 230 231 return mode; 232 } 233 234 static const struct regulator_ops mt6323_volt_range_ops = { 235 .list_voltage = regulator_list_voltage_linear_range, 236 .map_voltage = regulator_map_voltage_linear_range, 237 .set_voltage_sel = regulator_set_voltage_sel_regmap, 238 .get_voltage_sel = regulator_get_voltage_sel_regmap, 239 .set_voltage_time_sel = regulator_set_voltage_time_sel, 240 .enable = regulator_enable_regmap, 241 .disable = regulator_disable_regmap, 242 .is_enabled = regulator_is_enabled_regmap, 243 .get_status = mt6323_get_status, 244 }; 245 246 static const struct regulator_ops mt6323_volt_table_ops = { 247 .list_voltage = regulator_list_voltage_table, 248 .map_voltage = regulator_map_voltage_iterate, 249 .set_voltage_sel = regulator_set_voltage_sel_regmap, 250 .get_voltage_sel = regulator_get_voltage_sel_regmap, 251 .set_voltage_time_sel = regulator_set_voltage_time_sel, 252 .enable = regulator_enable_regmap, 253 .disable = regulator_disable_regmap, 254 .is_enabled = regulator_is_enabled_regmap, 255 .get_status = mt6323_get_status, 256 .set_mode = mt6323_ldo_set_mode, 257 .get_mode = mt6323_ldo_get_mode, 258 }; 259 260 static const struct regulator_ops mt6323_volt_fixed_ops = { 261 .list_voltage = regulator_list_voltage_linear, 262 .enable = regulator_enable_regmap, 263 .disable = regulator_disable_regmap, 264 .is_enabled = regulator_is_enabled_regmap, 265 .get_status = mt6323_get_status, 266 .set_mode = mt6323_ldo_set_mode, 267 .get_mode = mt6323_ldo_get_mode, 268 }; 269 270 /* The array is indexed by id(MT6323_ID_XXX) */ 271 static struct mt6323_regulator_info mt6323_regulators[] = { 272 MT6323_BUCK("buck_vproc", VPROC, 700000, 1493750, 6250, 273 buck_volt_range1, MT6323_VPROC_CON7, MT6323_VPROC_CON9, 0x7f, 274 MT6323_VPROC_CON10, MT6323_VPROC_CON5), 275 MT6323_BUCK("buck_vsys", VSYS, 1400000, 2987500, 12500, 276 buck_volt_range2, MT6323_VSYS_CON7, MT6323_VSYS_CON9, 0x7f, 277 MT6323_VSYS_CON10, MT6323_VSYS_CON5), 278 MT6323_BUCK("buck_vpa", VPA, 500000, 3650000, 50000, 279 buck_volt_range3, MT6323_VPA_CON7, MT6323_VPA_CON9, 280 0x3f, MT6323_VPA_CON10, MT6323_VPA_CON5), 281 MT6323_REG_FIXED("ldo_vtcxo", VTCXO, MT6323_ANALDO_CON1, 10, 2800000, 282 MT6323_ANALDO_CON1, 0x2), 283 MT6323_REG_FIXED("ldo_vcn28", VCN28, MT6323_ANALDO_CON19, 12, 2800000, 284 MT6323_ANALDO_CON20, 0x2), 285 MT6323_LDO("ldo_vcn33_bt", VCN33_BT, ldo_volt_table1, 286 MT6323_ANALDO_CON16, 7, MT6323_ANALDO_CON16, 0xC, 287 MT6323_ANALDO_CON21, 0x2), 288 MT6323_LDO("ldo_vcn33_wifi", VCN33_WIFI, ldo_volt_table1, 289 MT6323_ANALDO_CON17, 12, MT6323_ANALDO_CON16, 0xC, 290 MT6323_ANALDO_CON21, 0x2), 291 MT6323_REG_FIXED("ldo_va", VA, MT6323_ANALDO_CON2, 14, 2800000, 292 MT6323_ANALDO_CON2, 0x2), 293 MT6323_LDO("ldo_vcama", VCAMA, ldo_volt_table2, 294 MT6323_ANALDO_CON4, 15, MT6323_ANALDO_CON10, 0x60, -1, 0), 295 MT6323_REG_FIXED("ldo_vio28", VIO28, MT6323_DIGLDO_CON0, 14, 2800000, 296 MT6323_DIGLDO_CON0, 0x2), 297 MT6323_REG_FIXED("ldo_vusb", VUSB, MT6323_DIGLDO_CON2, 14, 3300000, 298 MT6323_DIGLDO_CON2, 0x2), 299 MT6323_LDO("ldo_vmc", VMC, ldo_volt_table3, 300 MT6323_DIGLDO_CON3, 12, MT6323_DIGLDO_CON24, 0x10, 301 MT6323_DIGLDO_CON3, 0x2), 302 MT6323_LDO("ldo_vmch", VMCH, ldo_volt_table4, 303 MT6323_DIGLDO_CON5, 14, MT6323_DIGLDO_CON26, 0x80, 304 MT6323_DIGLDO_CON5, 0x2), 305 MT6323_LDO("ldo_vemc3v3", VEMC3V3, ldo_volt_table4, 306 MT6323_DIGLDO_CON6, 14, MT6323_DIGLDO_CON27, 0x80, 307 MT6323_DIGLDO_CON6, 0x2), 308 MT6323_LDO("ldo_vgp1", VGP1, ldo_volt_table5, 309 MT6323_DIGLDO_CON7, 15, MT6323_DIGLDO_CON28, 0xE0, 310 MT6323_DIGLDO_CON7, 0x2), 311 MT6323_LDO("ldo_vgp2", VGP2, ldo_volt_table6, 312 MT6323_DIGLDO_CON8, 15, MT6323_DIGLDO_CON29, 0xE0, 313 MT6323_DIGLDO_CON8, 0x2), 314 MT6323_LDO("ldo_vgp3", VGP3, ldo_volt_table7, 315 MT6323_DIGLDO_CON9, 15, MT6323_DIGLDO_CON30, 0x60, 316 MT6323_DIGLDO_CON9, 0x2), 317 MT6323_REG_FIXED("ldo_vcn18", VCN18, MT6323_DIGLDO_CON11, 14, 1800000, 318 MT6323_DIGLDO_CON11, 0x2), 319 MT6323_LDO("ldo_vsim1", VSIM1, ldo_volt_table8, 320 MT6323_DIGLDO_CON13, 15, MT6323_DIGLDO_CON34, 0x20, 321 MT6323_DIGLDO_CON13, 0x2), 322 MT6323_LDO("ldo_vsim2", VSIM2, ldo_volt_table8, 323 MT6323_DIGLDO_CON14, 15, MT6323_DIGLDO_CON35, 0x20, 324 MT6323_DIGLDO_CON14, 0x2), 325 MT6323_REG_FIXED("ldo_vrtc", VRTC, MT6323_DIGLDO_CON15, 8, 2800000, 326 -1, 0), 327 MT6323_LDO("ldo_vcamaf", VCAMAF, ldo_volt_table5, 328 MT6323_DIGLDO_CON31, 15, MT6323_DIGLDO_CON32, 0xE0, 329 MT6323_DIGLDO_CON31, 0x2), 330 MT6323_LDO("ldo_vibr", VIBR, ldo_volt_table5, 331 MT6323_DIGLDO_CON39, 15, MT6323_DIGLDO_CON40, 0xE0, 332 MT6323_DIGLDO_CON39, 0x2), 333 MT6323_REG_FIXED("ldo_vrf18", VRF18, MT6323_DIGLDO_CON45, 15, 1825000, 334 MT6323_DIGLDO_CON45, 0x2), 335 MT6323_LDO("ldo_vm", VM, ldo_volt_table9, 336 MT6323_DIGLDO_CON47, 14, MT6323_DIGLDO_CON48, 0x30, 337 MT6323_DIGLDO_CON47, 0x2), 338 MT6323_REG_FIXED("ldo_vio18", VIO18, MT6323_DIGLDO_CON49, 14, 1800000, 339 MT6323_DIGLDO_CON49, 0x2), 340 MT6323_LDO("ldo_vcamd", VCAMD, ldo_volt_table10, 341 MT6323_DIGLDO_CON51, 14, MT6323_DIGLDO_CON52, 0x60, 342 MT6323_DIGLDO_CON51, 0x2), 343 MT6323_REG_FIXED("ldo_vcamio", VCAMIO, MT6323_DIGLDO_CON53, 14, 1800000, 344 MT6323_DIGLDO_CON53, 0x2), 345 }; 346 347 static int mt6323_set_buck_vosel_reg(struct platform_device *pdev) 348 { 349 struct mt6397_chip *mt6323 = dev_get_drvdata(pdev->dev.parent); 350 int i; 351 u32 regval; 352 353 for (i = 0; i < MT6323_MAX_REGULATOR; i++) { 354 if (mt6323_regulators[i].vselctrl_reg) { 355 if (regmap_read(mt6323->regmap, 356 mt6323_regulators[i].vselctrl_reg, 357 ®val) < 0) { 358 dev_err(&pdev->dev, 359 "Failed to read buck ctrl\n"); 360 return -EIO; 361 } 362 363 if (regval & mt6323_regulators[i].vselctrl_mask) { 364 mt6323_regulators[i].desc.vsel_reg = 365 mt6323_regulators[i].vselon_reg; 366 } 367 } 368 } 369 370 return 0; 371 } 372 373 static int mt6323_regulator_probe(struct platform_device *pdev) 374 { 375 struct mt6397_chip *mt6323 = dev_get_drvdata(pdev->dev.parent); 376 struct regulator_config config = {}; 377 struct regulator_dev *rdev; 378 int i; 379 u32 reg_value; 380 381 /* Query buck controller to select activated voltage register part */ 382 if (mt6323_set_buck_vosel_reg(pdev)) 383 return -EIO; 384 385 /* Read PMIC chip revision to update constraints and voltage table */ 386 if (regmap_read(mt6323->regmap, MT6323_CID, ®_value) < 0) { 387 dev_err(&pdev->dev, "Failed to read Chip ID\n"); 388 return -EIO; 389 } 390 dev_info(&pdev->dev, "Chip ID = 0x%x\n", reg_value); 391 392 for (i = 0; i < MT6323_MAX_REGULATOR; i++) { 393 config.dev = &pdev->dev; 394 config.driver_data = &mt6323_regulators[i]; 395 config.regmap = mt6323->regmap; 396 rdev = devm_regulator_register(&pdev->dev, 397 &mt6323_regulators[i].desc, &config); 398 if (IS_ERR(rdev)) { 399 dev_err(&pdev->dev, "failed to register %s\n", 400 mt6323_regulators[i].desc.name); 401 return PTR_ERR(rdev); 402 } 403 } 404 return 0; 405 } 406 407 static const struct platform_device_id mt6323_platform_ids[] = { 408 {"mt6323-regulator", 0}, 409 { /* sentinel */ }, 410 }; 411 MODULE_DEVICE_TABLE(platform, mt6323_platform_ids); 412 413 static struct platform_driver mt6323_regulator_driver = { 414 .driver = { 415 .name = "mt6323-regulator", 416 }, 417 .probe = mt6323_regulator_probe, 418 .id_table = mt6323_platform_ids, 419 }; 420 421 module_platform_driver(mt6323_regulator_driver); 422 423 MODULE_AUTHOR("Chen Zhong <chen.zhong@mediatek.com>"); 424 MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6323 PMIC"); 425 MODULE_LICENSE("GPL v2"); 426