xref: /linux/drivers/regulator/mt6315-regulator.c (revision a1c613ae4c322ddd58d5a8539dbfba2a0380a8c0)
17aa382cfSHsin-Hsiung Wang // SPDX-License-Identifier: GPL-2.0
27aa382cfSHsin-Hsiung Wang //
37aa382cfSHsin-Hsiung Wang // Copyright (c) 2021 MediaTek Inc.
47aa382cfSHsin-Hsiung Wang 
57aa382cfSHsin-Hsiung Wang #include <linux/module.h>
6*045a44d4SRob Herring #include <linux/of.h>
77aa382cfSHsin-Hsiung Wang #include <linux/regmap.h>
87aa382cfSHsin-Hsiung Wang #include <linux/regulator/driver.h>
97aa382cfSHsin-Hsiung Wang #include <linux/regulator/machine.h>
107aa382cfSHsin-Hsiung Wang #include <linux/regulator/mt6315-regulator.h>
117aa382cfSHsin-Hsiung Wang #include <linux/regulator/of_regulator.h>
127aa382cfSHsin-Hsiung Wang #include <linux/spmi.h>
137aa382cfSHsin-Hsiung Wang 
147aa382cfSHsin-Hsiung Wang #define MT6315_BUCK_MODE_AUTO		0
157aa382cfSHsin-Hsiung Wang #define MT6315_BUCK_MODE_FORCE_PWM	1
167aa382cfSHsin-Hsiung Wang #define MT6315_BUCK_MODE_LP		2
177aa382cfSHsin-Hsiung Wang 
187aa382cfSHsin-Hsiung Wang struct mt6315_regulator_info {
197aa382cfSHsin-Hsiung Wang 	struct regulator_desc desc;
207aa382cfSHsin-Hsiung Wang 	u32 status_reg;
217aa382cfSHsin-Hsiung Wang 	u32 lp_mode_mask;
227aa382cfSHsin-Hsiung Wang 	u32 lp_mode_shift;
237aa382cfSHsin-Hsiung Wang };
247aa382cfSHsin-Hsiung Wang 
257aa382cfSHsin-Hsiung Wang struct mt_regulator_init_data {
267aa382cfSHsin-Hsiung Wang 	u32 modeset_mask[MT6315_VBUCK_MAX];
277aa382cfSHsin-Hsiung Wang };
287aa382cfSHsin-Hsiung Wang 
297aa382cfSHsin-Hsiung Wang struct mt6315_chip {
307aa382cfSHsin-Hsiung Wang 	struct device *dev;
317aa382cfSHsin-Hsiung Wang 	struct regmap *regmap;
327aa382cfSHsin-Hsiung Wang };
337aa382cfSHsin-Hsiung Wang 
347aa382cfSHsin-Hsiung Wang #define MT_BUCK(_name, _bid, _vsel)				\
357aa382cfSHsin-Hsiung Wang [_bid] = {							\
367aa382cfSHsin-Hsiung Wang 	.desc = {						\
377aa382cfSHsin-Hsiung Wang 		.name = _name,					\
387aa382cfSHsin-Hsiung Wang 		.of_match = of_match_ptr(_name),		\
397aa382cfSHsin-Hsiung Wang 		.regulators_node = "regulators",		\
407aa382cfSHsin-Hsiung Wang 		.ops = &mt6315_volt_range_ops,			\
417aa382cfSHsin-Hsiung Wang 		.type = REGULATOR_VOLTAGE,			\
427aa382cfSHsin-Hsiung Wang 		.id = _bid,					\
437aa382cfSHsin-Hsiung Wang 		.owner = THIS_MODULE,				\
44d450293cSAxel Lin 		.n_voltages = 0xc0,				\
457aa382cfSHsin-Hsiung Wang 		.linear_ranges = mt_volt_range1,		\
467aa382cfSHsin-Hsiung Wang 		.n_linear_ranges = ARRAY_SIZE(mt_volt_range1),	\
477aa382cfSHsin-Hsiung Wang 		.vsel_reg = _vsel,				\
487aa382cfSHsin-Hsiung Wang 		.vsel_mask = 0xff,				\
497aa382cfSHsin-Hsiung Wang 		.enable_reg = MT6315_BUCK_TOP_CON0,		\
507aa382cfSHsin-Hsiung Wang 		.enable_mask = BIT(_bid),			\
517aa382cfSHsin-Hsiung Wang 		.of_map_mode = mt6315_map_mode,			\
527aa382cfSHsin-Hsiung Wang 	},							\
537aa382cfSHsin-Hsiung Wang 	.status_reg = _bid##_DBG4,				\
547aa382cfSHsin-Hsiung Wang 	.lp_mode_mask = BIT(_bid),				\
557aa382cfSHsin-Hsiung Wang 	.lp_mode_shift = _bid,					\
567aa382cfSHsin-Hsiung Wang }
577aa382cfSHsin-Hsiung Wang 
587aa382cfSHsin-Hsiung Wang static const struct linear_range mt_volt_range1[] = {
597aa382cfSHsin-Hsiung Wang 	REGULATOR_LINEAR_RANGE(0, 0, 0xbf, 6250),
607aa382cfSHsin-Hsiung Wang };
617aa382cfSHsin-Hsiung Wang 
mt6315_map_mode(unsigned int mode)6289082179SAxel Lin static unsigned int mt6315_map_mode(unsigned int mode)
637aa382cfSHsin-Hsiung Wang {
647aa382cfSHsin-Hsiung Wang 	switch (mode) {
657aa382cfSHsin-Hsiung Wang 	case MT6315_BUCK_MODE_AUTO:
667aa382cfSHsin-Hsiung Wang 		return REGULATOR_MODE_NORMAL;
677aa382cfSHsin-Hsiung Wang 	case MT6315_BUCK_MODE_FORCE_PWM:
687aa382cfSHsin-Hsiung Wang 		return REGULATOR_MODE_FAST;
697aa382cfSHsin-Hsiung Wang 	case MT6315_BUCK_MODE_LP:
707aa382cfSHsin-Hsiung Wang 		return REGULATOR_MODE_IDLE;
717aa382cfSHsin-Hsiung Wang 	default:
72fbc102fbSAxel Lin 		return REGULATOR_MODE_INVALID;
737aa382cfSHsin-Hsiung Wang 	}
747aa382cfSHsin-Hsiung Wang }
757aa382cfSHsin-Hsiung Wang 
mt6315_regulator_get_mode(struct regulator_dev * rdev)767aa382cfSHsin-Hsiung Wang static unsigned int mt6315_regulator_get_mode(struct regulator_dev *rdev)
777aa382cfSHsin-Hsiung Wang {
787aa382cfSHsin-Hsiung Wang 	struct mt_regulator_init_data *init = rdev_get_drvdata(rdev);
797aa382cfSHsin-Hsiung Wang 	const struct mt6315_regulator_info *info;
807aa382cfSHsin-Hsiung Wang 	int ret, regval;
817aa382cfSHsin-Hsiung Wang 	u32 modeset_mask;
827aa382cfSHsin-Hsiung Wang 
837aa382cfSHsin-Hsiung Wang 	info = container_of(rdev->desc, struct mt6315_regulator_info, desc);
847aa382cfSHsin-Hsiung Wang 	modeset_mask = init->modeset_mask[rdev_get_id(rdev)];
857aa382cfSHsin-Hsiung Wang 	ret = regmap_read(rdev->regmap, MT6315_BUCK_TOP_4PHASE_ANA_CON42, &regval);
867aa382cfSHsin-Hsiung Wang 	if (ret != 0) {
877f8c8394SAxel Lin 		dev_err(&rdev->dev, "Failed to get mode: %d\n", ret);
887aa382cfSHsin-Hsiung Wang 		return ret;
897aa382cfSHsin-Hsiung Wang 	}
907aa382cfSHsin-Hsiung Wang 
917aa382cfSHsin-Hsiung Wang 	if ((regval & modeset_mask) == modeset_mask)
927aa382cfSHsin-Hsiung Wang 		return REGULATOR_MODE_FAST;
937aa382cfSHsin-Hsiung Wang 
947aa382cfSHsin-Hsiung Wang 	ret = regmap_read(rdev->regmap, MT6315_BUCK_TOP_CON1, &regval);
957aa382cfSHsin-Hsiung Wang 	if (ret != 0) {
967f8c8394SAxel Lin 		dev_err(&rdev->dev, "Failed to get lp mode: %d\n", ret);
977aa382cfSHsin-Hsiung Wang 		return ret;
987aa382cfSHsin-Hsiung Wang 	}
997aa382cfSHsin-Hsiung Wang 
1007aa382cfSHsin-Hsiung Wang 	if (regval & info->lp_mode_mask)
1017aa382cfSHsin-Hsiung Wang 		return REGULATOR_MODE_IDLE;
1027aa382cfSHsin-Hsiung Wang 	else
1037aa382cfSHsin-Hsiung Wang 		return REGULATOR_MODE_NORMAL;
1047aa382cfSHsin-Hsiung Wang }
1057aa382cfSHsin-Hsiung Wang 
mt6315_regulator_set_mode(struct regulator_dev * rdev,u32 mode)1067aa382cfSHsin-Hsiung Wang static int mt6315_regulator_set_mode(struct regulator_dev *rdev,
1077aa382cfSHsin-Hsiung Wang 				     u32 mode)
1087aa382cfSHsin-Hsiung Wang {
1097aa382cfSHsin-Hsiung Wang 	struct mt_regulator_init_data *init = rdev_get_drvdata(rdev);
1107aa382cfSHsin-Hsiung Wang 	const struct mt6315_regulator_info *info;
1117aa382cfSHsin-Hsiung Wang 	int ret, val, curr_mode;
1127aa382cfSHsin-Hsiung Wang 	u32 modeset_mask;
1137aa382cfSHsin-Hsiung Wang 
1147aa382cfSHsin-Hsiung Wang 	info = container_of(rdev->desc, struct mt6315_regulator_info, desc);
1157aa382cfSHsin-Hsiung Wang 	modeset_mask = init->modeset_mask[rdev_get_id(rdev)];
1167aa382cfSHsin-Hsiung Wang 	curr_mode = mt6315_regulator_get_mode(rdev);
1177aa382cfSHsin-Hsiung Wang 	switch (mode) {
1187aa382cfSHsin-Hsiung Wang 	case REGULATOR_MODE_FAST:
1197aa382cfSHsin-Hsiung Wang 		ret = regmap_update_bits(rdev->regmap,
1207aa382cfSHsin-Hsiung Wang 					 MT6315_BUCK_TOP_4PHASE_ANA_CON42,
1217aa382cfSHsin-Hsiung Wang 					 modeset_mask,
1227aa382cfSHsin-Hsiung Wang 					 modeset_mask);
1237aa382cfSHsin-Hsiung Wang 		break;
1247aa382cfSHsin-Hsiung Wang 	case REGULATOR_MODE_NORMAL:
1257aa382cfSHsin-Hsiung Wang 		if (curr_mode == REGULATOR_MODE_FAST) {
1267aa382cfSHsin-Hsiung Wang 			ret = regmap_update_bits(rdev->regmap,
1277aa382cfSHsin-Hsiung Wang 						 MT6315_BUCK_TOP_4PHASE_ANA_CON42,
1287aa382cfSHsin-Hsiung Wang 						 modeset_mask,
1297aa382cfSHsin-Hsiung Wang 						 0);
1307aa382cfSHsin-Hsiung Wang 		} else if (curr_mode == REGULATOR_MODE_IDLE) {
1317aa382cfSHsin-Hsiung Wang 			ret = regmap_update_bits(rdev->regmap,
1327aa382cfSHsin-Hsiung Wang 						 MT6315_BUCK_TOP_CON1,
1337aa382cfSHsin-Hsiung Wang 						 info->lp_mode_mask,
1347aa382cfSHsin-Hsiung Wang 						 0);
1357aa382cfSHsin-Hsiung Wang 			usleep_range(100, 110);
1367aa382cfSHsin-Hsiung Wang 		} else {
1377aa382cfSHsin-Hsiung Wang 			ret = -EINVAL;
1387aa382cfSHsin-Hsiung Wang 		}
1397aa382cfSHsin-Hsiung Wang 		break;
1407aa382cfSHsin-Hsiung Wang 	case REGULATOR_MODE_IDLE:
1417aa382cfSHsin-Hsiung Wang 		val = MT6315_BUCK_MODE_LP >> 1;
1427aa382cfSHsin-Hsiung Wang 		val <<= info->lp_mode_shift;
1437aa382cfSHsin-Hsiung Wang 		ret = regmap_update_bits(rdev->regmap,
1447aa382cfSHsin-Hsiung Wang 					 MT6315_BUCK_TOP_CON1,
1457aa382cfSHsin-Hsiung Wang 					 info->lp_mode_mask,
1467aa382cfSHsin-Hsiung Wang 					 val);
1477aa382cfSHsin-Hsiung Wang 		break;
1487aa382cfSHsin-Hsiung Wang 	default:
1497aa382cfSHsin-Hsiung Wang 		ret = -EINVAL;
1507f8c8394SAxel Lin 		dev_err(&rdev->dev, "Unsupported mode: %d\n", mode);
1517aa382cfSHsin-Hsiung Wang 		break;
1527aa382cfSHsin-Hsiung Wang 	}
1537aa382cfSHsin-Hsiung Wang 
1547aa382cfSHsin-Hsiung Wang 	if (ret != 0) {
1557f8c8394SAxel Lin 		dev_err(&rdev->dev, "Failed to set mode: %d\n", ret);
1567aa382cfSHsin-Hsiung Wang 		return ret;
1577aa382cfSHsin-Hsiung Wang 	}
1587aa382cfSHsin-Hsiung Wang 
1597aa382cfSHsin-Hsiung Wang 	return 0;
1607aa382cfSHsin-Hsiung Wang }
1617aa382cfSHsin-Hsiung Wang 
mt6315_get_status(struct regulator_dev * rdev)1627aa382cfSHsin-Hsiung Wang static int mt6315_get_status(struct regulator_dev *rdev)
1637aa382cfSHsin-Hsiung Wang {
1647aa382cfSHsin-Hsiung Wang 	const struct mt6315_regulator_info *info;
1657aa382cfSHsin-Hsiung Wang 	int ret;
1667aa382cfSHsin-Hsiung Wang 	u32 regval;
1677aa382cfSHsin-Hsiung Wang 
1687aa382cfSHsin-Hsiung Wang 	info = container_of(rdev->desc, struct mt6315_regulator_info, desc);
1697aa382cfSHsin-Hsiung Wang 	ret = regmap_read(rdev->regmap, info->status_reg, &regval);
1707aa382cfSHsin-Hsiung Wang 	if (ret < 0) {
1717f8c8394SAxel Lin 		dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret);
1727aa382cfSHsin-Hsiung Wang 		return ret;
1737aa382cfSHsin-Hsiung Wang 	}
1747aa382cfSHsin-Hsiung Wang 
1757aa382cfSHsin-Hsiung Wang 	return (regval & BIT(0)) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF;
1767aa382cfSHsin-Hsiung Wang }
1777aa382cfSHsin-Hsiung Wang 
1787aa382cfSHsin-Hsiung Wang static const struct regulator_ops mt6315_volt_range_ops = {
1797aa382cfSHsin-Hsiung Wang 	.list_voltage = regulator_list_voltage_linear_range,
1807aa382cfSHsin-Hsiung Wang 	.map_voltage = regulator_map_voltage_linear_range,
1817aa382cfSHsin-Hsiung Wang 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
1827aa382cfSHsin-Hsiung Wang 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
1837aa382cfSHsin-Hsiung Wang 	.set_voltage_time_sel = regulator_set_voltage_time_sel,
1847aa382cfSHsin-Hsiung Wang 	.enable = regulator_enable_regmap,
1857aa382cfSHsin-Hsiung Wang 	.disable = regulator_disable_regmap,
1867aa382cfSHsin-Hsiung Wang 	.is_enabled = regulator_is_enabled_regmap,
1877aa382cfSHsin-Hsiung Wang 	.get_status = mt6315_get_status,
1887aa382cfSHsin-Hsiung Wang 	.set_mode = mt6315_regulator_set_mode,
1897aa382cfSHsin-Hsiung Wang 	.get_mode = mt6315_regulator_get_mode,
1907aa382cfSHsin-Hsiung Wang };
1917aa382cfSHsin-Hsiung Wang 
1927aa382cfSHsin-Hsiung Wang static const struct mt6315_regulator_info mt6315_regulators[MT6315_VBUCK_MAX] = {
1937aa382cfSHsin-Hsiung Wang 	MT_BUCK("vbuck1", MT6315_VBUCK1, MT6315_BUCK_TOP_ELR0),
1947aa382cfSHsin-Hsiung Wang 	MT_BUCK("vbuck2", MT6315_VBUCK2, MT6315_BUCK_TOP_ELR2),
1957aa382cfSHsin-Hsiung Wang 	MT_BUCK("vbuck3", MT6315_VBUCK3, MT6315_BUCK_TOP_ELR4),
1967aa382cfSHsin-Hsiung Wang 	MT_BUCK("vbuck4", MT6315_VBUCK4, MT6315_BUCK_TOP_ELR6),
1977aa382cfSHsin-Hsiung Wang };
1987aa382cfSHsin-Hsiung Wang 
1997aa382cfSHsin-Hsiung Wang static const struct regmap_config mt6315_regmap_config = {
2007aa382cfSHsin-Hsiung Wang 	.reg_bits	= 16,
2017aa382cfSHsin-Hsiung Wang 	.val_bits	= 8,
2027aa382cfSHsin-Hsiung Wang 	.max_register	= 0x16d0,
2037aa382cfSHsin-Hsiung Wang 	.fast_io	= true,
2047aa382cfSHsin-Hsiung Wang };
2057aa382cfSHsin-Hsiung Wang 
2067aa382cfSHsin-Hsiung Wang static const struct of_device_id mt6315_of_match[] = {
2077aa382cfSHsin-Hsiung Wang 	{
2087aa382cfSHsin-Hsiung Wang 		.compatible = "mediatek,mt6315-regulator",
2097aa382cfSHsin-Hsiung Wang 	}, {
2107aa382cfSHsin-Hsiung Wang 		/* sentinel */
2117aa382cfSHsin-Hsiung Wang 	},
2127aa382cfSHsin-Hsiung Wang };
2137aa382cfSHsin-Hsiung Wang MODULE_DEVICE_TABLE(of, mt6315_of_match);
2147aa382cfSHsin-Hsiung Wang 
mt6315_regulator_probe(struct spmi_device * pdev)2157aa382cfSHsin-Hsiung Wang static int mt6315_regulator_probe(struct spmi_device *pdev)
2167aa382cfSHsin-Hsiung Wang {
2177aa382cfSHsin-Hsiung Wang 	struct device *dev = &pdev->dev;
2187aa382cfSHsin-Hsiung Wang 	struct regmap *regmap;
2197aa382cfSHsin-Hsiung Wang 	struct mt6315_chip *chip;
2207aa382cfSHsin-Hsiung Wang 	struct mt_regulator_init_data *init_data;
2217aa382cfSHsin-Hsiung Wang 	struct regulator_config config = {};
2227aa382cfSHsin-Hsiung Wang 	struct regulator_dev *rdev;
2237aa382cfSHsin-Hsiung Wang 	int i;
2247aa382cfSHsin-Hsiung Wang 
2257aa382cfSHsin-Hsiung Wang 	regmap = devm_regmap_init_spmi_ext(pdev, &mt6315_regmap_config);
22670d654eaSAxel Lin 	if (IS_ERR(regmap))
22770d654eaSAxel Lin 		return PTR_ERR(regmap);
2287aa382cfSHsin-Hsiung Wang 
2297aa382cfSHsin-Hsiung Wang 	chip = devm_kzalloc(dev, sizeof(struct mt6315_chip), GFP_KERNEL);
2307aa382cfSHsin-Hsiung Wang 	if (!chip)
2317aa382cfSHsin-Hsiung Wang 		return -ENOMEM;
2327aa382cfSHsin-Hsiung Wang 
2337aa382cfSHsin-Hsiung Wang 	init_data = devm_kzalloc(dev, sizeof(struct mt_regulator_init_data), GFP_KERNEL);
2347aa382cfSHsin-Hsiung Wang 	if (!init_data)
2357aa382cfSHsin-Hsiung Wang 		return -ENOMEM;
2367aa382cfSHsin-Hsiung Wang 
2377aa382cfSHsin-Hsiung Wang 	switch (pdev->usid) {
2387aa382cfSHsin-Hsiung Wang 	case MT6315_PP:
2397aa382cfSHsin-Hsiung Wang 		init_data->modeset_mask[MT6315_VBUCK1] = BIT(MT6315_VBUCK1) | BIT(MT6315_VBUCK2) |
2407aa382cfSHsin-Hsiung Wang 							 BIT(MT6315_VBUCK4);
2417aa382cfSHsin-Hsiung Wang 		break;
2427aa382cfSHsin-Hsiung Wang 	case MT6315_SP:
2437aa382cfSHsin-Hsiung Wang 	case MT6315_RP:
2447aa382cfSHsin-Hsiung Wang 		init_data->modeset_mask[MT6315_VBUCK1] = BIT(MT6315_VBUCK1) | BIT(MT6315_VBUCK2);
2457aa382cfSHsin-Hsiung Wang 		break;
2467aa382cfSHsin-Hsiung Wang 	default:
2477aa382cfSHsin-Hsiung Wang 		init_data->modeset_mask[MT6315_VBUCK1] = BIT(MT6315_VBUCK1);
2487aa382cfSHsin-Hsiung Wang 		break;
2497aa382cfSHsin-Hsiung Wang 	}
2507aa382cfSHsin-Hsiung Wang 	for (i = MT6315_VBUCK2; i < MT6315_VBUCK_MAX; i++)
2517aa382cfSHsin-Hsiung Wang 		init_data->modeset_mask[i] = BIT(i);
2527aa382cfSHsin-Hsiung Wang 
2537aa382cfSHsin-Hsiung Wang 	chip->dev = dev;
2547aa382cfSHsin-Hsiung Wang 	chip->regmap = regmap;
2557aa382cfSHsin-Hsiung Wang 	dev_set_drvdata(dev, chip);
2567aa382cfSHsin-Hsiung Wang 
2577aa382cfSHsin-Hsiung Wang 	config.dev = dev;
2587aa382cfSHsin-Hsiung Wang 	config.regmap = regmap;
2597aa382cfSHsin-Hsiung Wang 	for (i = MT6315_VBUCK1; i < MT6315_VBUCK_MAX; i++) {
2607aa382cfSHsin-Hsiung Wang 		config.driver_data = init_data;
2617aa382cfSHsin-Hsiung Wang 		rdev = devm_regulator_register(dev, &mt6315_regulators[i].desc, &config);
2627aa382cfSHsin-Hsiung Wang 		if (IS_ERR(rdev)) {
2637f8c8394SAxel Lin 			dev_err(dev, "Failed to register %s\n",
2647f8c8394SAxel Lin 				mt6315_regulators[i].desc.name);
2657f8c8394SAxel Lin 			return PTR_ERR(rdev);
2667aa382cfSHsin-Hsiung Wang 		}
2677aa382cfSHsin-Hsiung Wang 	}
2687aa382cfSHsin-Hsiung Wang 
2697aa382cfSHsin-Hsiung Wang 	return 0;
2707aa382cfSHsin-Hsiung Wang }
2717aa382cfSHsin-Hsiung Wang 
mt6315_regulator_shutdown(struct spmi_device * pdev)2727aa382cfSHsin-Hsiung Wang static void mt6315_regulator_shutdown(struct spmi_device *pdev)
2737aa382cfSHsin-Hsiung Wang {
2747aa382cfSHsin-Hsiung Wang 	struct mt6315_chip *chip = dev_get_drvdata(&pdev->dev);
2757aa382cfSHsin-Hsiung Wang 	int ret = 0;
2767aa382cfSHsin-Hsiung Wang 
2777aa382cfSHsin-Hsiung Wang 	ret |= regmap_write(chip->regmap, MT6315_TOP_TMA_KEY_H, PROTECTION_KEY_H);
2787aa382cfSHsin-Hsiung Wang 	ret |= regmap_write(chip->regmap, MT6315_TOP_TMA_KEY, PROTECTION_KEY);
2797aa382cfSHsin-Hsiung Wang 	ret |= regmap_update_bits(chip->regmap, MT6315_TOP2_ELR7, 1, 1);
2807aa382cfSHsin-Hsiung Wang 	ret |= regmap_write(chip->regmap, MT6315_TOP_TMA_KEY, 0);
2817aa382cfSHsin-Hsiung Wang 	ret |= regmap_write(chip->regmap, MT6315_TOP_TMA_KEY_H, 0);
2827aa382cfSHsin-Hsiung Wang 	if (ret < 0)
2837f8c8394SAxel Lin 		dev_err(&pdev->dev, "[%#x] Failed to enable power off sequence. %d\n",
2847aa382cfSHsin-Hsiung Wang 			   pdev->usid, ret);
2857aa382cfSHsin-Hsiung Wang }
2867aa382cfSHsin-Hsiung Wang 
2877aa382cfSHsin-Hsiung Wang static struct spmi_driver mt6315_regulator_driver = {
2887aa382cfSHsin-Hsiung Wang 	.driver		= {
2897aa382cfSHsin-Hsiung Wang 		.name	= "mt6315-regulator",
29046600ab1SDouglas Anderson 		.probe_type = PROBE_PREFER_ASYNCHRONOUS,
2917aa382cfSHsin-Hsiung Wang 		.of_match_table = mt6315_of_match,
2927aa382cfSHsin-Hsiung Wang 	},
2937aa382cfSHsin-Hsiung Wang 	.probe = mt6315_regulator_probe,
2947aa382cfSHsin-Hsiung Wang 	.shutdown = mt6315_regulator_shutdown,
2957aa382cfSHsin-Hsiung Wang };
2967aa382cfSHsin-Hsiung Wang 
2977aa382cfSHsin-Hsiung Wang module_spmi_driver(mt6315_regulator_driver);
2987aa382cfSHsin-Hsiung Wang 
2997aa382cfSHsin-Hsiung Wang MODULE_AUTHOR("Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>");
3007aa382cfSHsin-Hsiung Wang MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6315 PMIC");
3017aa382cfSHsin-Hsiung Wang MODULE_LICENSE("GPL");
302