1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // Linear Technology LTC3589,LTC3589-1 regulator support 4 // 5 // Copyright (c) 2014 Philipp Zabel <p.zabel@pengutronix.de>, Pengutronix 6 7 #include <linux/i2c.h> 8 #include <linux/init.h> 9 #include <linux/interrupt.h> 10 #include <linux/module.h> 11 #include <linux/kernel.h> 12 #include <linux/of.h> 13 #include <linux/regmap.h> 14 #include <linux/regulator/driver.h> 15 #include <linux/regulator/of_regulator.h> 16 17 #define DRIVER_NAME "ltc3589" 18 19 #define LTC3589_IRQSTAT 0x02 20 #define LTC3589_SCR1 0x07 21 #define LTC3589_OVEN 0x10 22 #define LTC3589_SCR2 0x12 23 #define LTC3589_PGSTAT 0x13 24 #define LTC3589_VCCR 0x20 25 #define LTC3589_CLIRQ 0x21 26 #define LTC3589_B1DTV1 0x23 27 #define LTC3589_B1DTV2 0x24 28 #define LTC3589_VRRCR 0x25 29 #define LTC3589_B2DTV1 0x26 30 #define LTC3589_B2DTV2 0x27 31 #define LTC3589_B3DTV1 0x29 32 #define LTC3589_B3DTV2 0x2a 33 #define LTC3589_L2DTV1 0x32 34 #define LTC3589_L2DTV2 0x33 35 36 #define LTC3589_IRQSTAT_PGOOD_TIMEOUT BIT(3) 37 #define LTC3589_IRQSTAT_UNDERVOLT_WARN BIT(4) 38 #define LTC3589_IRQSTAT_UNDERVOLT_FAULT BIT(5) 39 #define LTC3589_IRQSTAT_THERMAL_WARN BIT(6) 40 #define LTC3589_IRQSTAT_THERMAL_FAULT BIT(7) 41 42 #define LTC3589_OVEN_SW1 BIT(0) 43 #define LTC3589_OVEN_SW2 BIT(1) 44 #define LTC3589_OVEN_SW3 BIT(2) 45 #define LTC3589_OVEN_BB_OUT BIT(3) 46 #define LTC3589_OVEN_LDO2 BIT(4) 47 #define LTC3589_OVEN_LDO3 BIT(5) 48 #define LTC3589_OVEN_LDO4 BIT(6) 49 #define LTC3589_OVEN_SW_CTRL BIT(7) 50 51 #define LTC3589_VCCR_SW1_GO BIT(0) 52 #define LTC3589_VCCR_SW2_GO BIT(2) 53 #define LTC3589_VCCR_SW3_GO BIT(4) 54 #define LTC3589_VCCR_LDO2_GO BIT(6) 55 56 #define LTC3589_VRRCR_SW1_RAMP_MASK GENMASK(1, 0) 57 #define LTC3589_VRRCR_SW2_RAMP_MASK GENMASK(3, 2) 58 #define LTC3589_VRRCR_SW3_RAMP_MASK GENMASK(5, 4) 59 #define LTC3589_VRRCR_LDO2_RAMP_MASK GENMASK(7, 6) 60 61 enum ltc3589_reg { 62 LTC3589_SW1, 63 LTC3589_SW2, 64 LTC3589_SW3, 65 LTC3589_BB_OUT, 66 LTC3589_LDO1, 67 LTC3589_LDO2, 68 LTC3589_LDO3, 69 LTC3589_LDO4, 70 LTC3589_NUM_REGULATORS, 71 }; 72 73 struct ltc3589_info { 74 const unsigned int *volt_table; 75 int fixed_uV; 76 }; 77 78 struct ltc3589 { 79 struct regmap *regmap; 80 struct device *dev; 81 struct regulator_desc regulator_descs[LTC3589_NUM_REGULATORS]; 82 struct regulator_dev *regulators[LTC3589_NUM_REGULATORS]; 83 }; 84 85 static const int ltc3589_ldo4[] = { 86 2800000, 2500000, 1800000, 3300000, 87 }; 88 89 static const int ltc3589_12_ldo4[] = { 90 1200000, 1800000, 2500000, 3200000, 91 }; 92 93 static const unsigned int ltc3589_ramp_table[] = { 94 880, 1750, 3500, 7000 95 }; 96 97 static int ltc3589_set_suspend_voltage(struct regulator_dev *rdev, int uV) 98 { 99 struct ltc3589 *ltc3589 = rdev_get_drvdata(rdev); 100 int sel; 101 102 sel = regulator_map_voltage_linear(rdev, uV, uV); 103 if (sel < 0) 104 return sel; 105 106 /* DTV2 register follows right after the corresponding DTV1 register */ 107 return regmap_update_bits(ltc3589->regmap, rdev->desc->vsel_reg + 1, 108 rdev->desc->vsel_mask, sel); 109 } 110 111 static int ltc3589_set_suspend_mode(struct regulator_dev *rdev, 112 unsigned int mode) 113 { 114 struct ltc3589 *ltc3589 = rdev_get_drvdata(rdev); 115 int mask, bit = 0; 116 117 /* VCCR reference selects are right next to the VCCR go bits */ 118 mask = rdev->desc->apply_bit << 1; 119 120 if (mode == REGULATOR_MODE_STANDBY) 121 bit = mask; /* Select DTV2 */ 122 123 mask |= rdev->desc->apply_bit; 124 bit |= rdev->desc->apply_bit; 125 return regmap_update_bits(ltc3589->regmap, LTC3589_VCCR, mask, bit); 126 } 127 128 /* SW1, SW2, SW3, LDO2 */ 129 static const struct regulator_ops ltc3589_linear_regulator_ops = { 130 .enable = regulator_enable_regmap, 131 .disable = regulator_disable_regmap, 132 .is_enabled = regulator_is_enabled_regmap, 133 .list_voltage = regulator_list_voltage_linear, 134 .set_voltage_sel = regulator_set_voltage_sel_regmap, 135 .get_voltage_sel = regulator_get_voltage_sel_regmap, 136 .set_ramp_delay = regulator_set_ramp_delay_regmap, 137 .set_voltage_time_sel = regulator_set_voltage_time_sel, 138 .set_suspend_voltage = ltc3589_set_suspend_voltage, 139 .set_suspend_mode = ltc3589_set_suspend_mode, 140 }; 141 142 /* BB_OUT, LDO3 */ 143 static const struct regulator_ops ltc3589_fixed_regulator_ops = { 144 .enable = regulator_enable_regmap, 145 .disable = regulator_disable_regmap, 146 .is_enabled = regulator_is_enabled_regmap, 147 }; 148 149 /* LDO1 */ 150 static const struct regulator_ops ltc3589_fixed_standby_regulator_ops = { 151 }; 152 153 /* LDO4 */ 154 static const struct regulator_ops ltc3589_table_regulator_ops = { 155 .enable = regulator_enable_regmap, 156 .disable = regulator_disable_regmap, 157 .is_enabled = regulator_is_enabled_regmap, 158 .list_voltage = regulator_list_voltage_table, 159 .set_voltage_sel = regulator_set_voltage_sel_regmap, 160 .get_voltage_sel = regulator_get_voltage_sel_regmap, 161 }; 162 163 static inline unsigned int ltc3589_scale(unsigned int uV, u32 r1, u32 r2) 164 { 165 uint64_t tmp; 166 167 if (uV == 0) 168 return 0; 169 170 tmp = (uint64_t)uV * r1; 171 do_div(tmp, r2); 172 return uV + (unsigned int)tmp; 173 } 174 175 static int ltc3589_of_parse_cb(struct device_node *np, 176 const struct regulator_desc *desc, 177 struct regulator_config *config) 178 { 179 struct ltc3589 *ltc3589 = config->driver_data; 180 struct regulator_desc *rdesc = <c3589->regulator_descs[desc->id]; 181 u32 r[2]; 182 int ret; 183 184 /* Parse feedback voltage dividers. LDO3 and LDO4 don't have them */ 185 if (desc->id >= LTC3589_LDO3) 186 return 0; 187 188 ret = of_property_read_u32_array(np, "lltc,fb-voltage-divider", r, 2); 189 if (ret) { 190 dev_err(ltc3589->dev, "Failed to parse voltage divider: %d\n", 191 ret); 192 return ret; 193 } 194 195 if (!r[0] || !r[1]) 196 return 0; 197 198 rdesc->min_uV = ltc3589_scale(desc->min_uV, r[0], r[1]); 199 rdesc->uV_step = ltc3589_scale(desc->uV_step, r[0], r[1]); 200 rdesc->fixed_uV = ltc3589_scale(desc->fixed_uV, r[0], r[1]); 201 202 return 0; 203 } 204 205 #define LTC3589_REG(_name, _of_name, _ops, en_bit, dtv1_reg, dtv_mask) \ 206 [LTC3589_ ## _name] = { \ 207 .name = #_name, \ 208 .of_match = of_match_ptr(#_of_name), \ 209 .regulators_node = of_match_ptr("regulators"), \ 210 .of_parse_cb = ltc3589_of_parse_cb, \ 211 .n_voltages = (dtv_mask) + 1, \ 212 .fixed_uV = (dtv_mask) ? 0 : 800000, \ 213 .ops = <c3589_ ## _ops ## _regulator_ops, \ 214 .type = REGULATOR_VOLTAGE, \ 215 .id = LTC3589_ ## _name, \ 216 .owner = THIS_MODULE, \ 217 .vsel_reg = (dtv1_reg), \ 218 .vsel_mask = (dtv_mask), \ 219 .enable_reg = (en_bit) ? LTC3589_OVEN : 0, \ 220 .enable_mask = (en_bit), \ 221 } 222 223 #define LTC3589_LINEAR_REG(_name, _of_name, _dtv1) \ 224 [LTC3589_ ## _name] = { \ 225 .name = #_name, \ 226 .of_match = of_match_ptr(#_of_name), \ 227 .regulators_node = of_match_ptr("regulators"), \ 228 .of_parse_cb = ltc3589_of_parse_cb, \ 229 .n_voltages = 32, \ 230 .min_uV = 362500, \ 231 .uV_step = 12500, \ 232 .ramp_delay = 1750, \ 233 .ops = <c3589_linear_regulator_ops, \ 234 .type = REGULATOR_VOLTAGE, \ 235 .id = LTC3589_ ## _name, \ 236 .owner = THIS_MODULE, \ 237 .vsel_reg = LTC3589_ ## _dtv1, \ 238 .vsel_mask = 0x1f, \ 239 .apply_reg = LTC3589_VCCR, \ 240 .apply_bit = LTC3589_VCCR_ ## _name ## _GO, \ 241 .enable_reg = LTC3589_OVEN, \ 242 .enable_mask = (LTC3589_OVEN_ ## _name), \ 243 .ramp_reg = LTC3589_VRRCR, \ 244 .ramp_mask = LTC3589_VRRCR_ ## _name ## _RAMP_MASK, \ 245 .ramp_delay_table = ltc3589_ramp_table, \ 246 .n_ramp_values = ARRAY_SIZE(ltc3589_ramp_table), \ 247 } 248 249 250 #define LTC3589_FIXED_REG(_name, _of_name) \ 251 LTC3589_REG(_name, _of_name, fixed, LTC3589_OVEN_ ## _name, 0, 0) 252 253 static const struct regulator_desc ltc3589_regulators[] = { 254 LTC3589_LINEAR_REG(SW1, sw1, B1DTV1), 255 LTC3589_LINEAR_REG(SW2, sw2, B2DTV1), 256 LTC3589_LINEAR_REG(SW3, sw3, B3DTV1), 257 LTC3589_FIXED_REG(BB_OUT, bb-out), 258 LTC3589_REG(LDO1, ldo1, fixed_standby, 0, 0, 0), 259 LTC3589_LINEAR_REG(LDO2, ldo2, L2DTV1), 260 LTC3589_FIXED_REG(LDO3, ldo3), 261 LTC3589_REG(LDO4, ldo4, table, LTC3589_OVEN_LDO4, LTC3589_L2DTV2, 0x60), 262 }; 263 264 static bool ltc3589_writeable_reg(struct device *dev, unsigned int reg) 265 { 266 switch (reg) { 267 case LTC3589_IRQSTAT: 268 case LTC3589_SCR1: 269 case LTC3589_OVEN: 270 case LTC3589_SCR2: 271 case LTC3589_VCCR: 272 case LTC3589_CLIRQ: 273 case LTC3589_B1DTV1: 274 case LTC3589_B1DTV2: 275 case LTC3589_VRRCR: 276 case LTC3589_B2DTV1: 277 case LTC3589_B2DTV2: 278 case LTC3589_B3DTV1: 279 case LTC3589_B3DTV2: 280 case LTC3589_L2DTV1: 281 case LTC3589_L2DTV2: 282 return true; 283 } 284 return false; 285 } 286 287 static bool ltc3589_readable_reg(struct device *dev, unsigned int reg) 288 { 289 switch (reg) { 290 case LTC3589_IRQSTAT: 291 case LTC3589_SCR1: 292 case LTC3589_OVEN: 293 case LTC3589_SCR2: 294 case LTC3589_PGSTAT: 295 case LTC3589_VCCR: 296 case LTC3589_B1DTV1: 297 case LTC3589_B1DTV2: 298 case LTC3589_VRRCR: 299 case LTC3589_B2DTV1: 300 case LTC3589_B2DTV2: 301 case LTC3589_B3DTV1: 302 case LTC3589_B3DTV2: 303 case LTC3589_L2DTV1: 304 case LTC3589_L2DTV2: 305 return true; 306 } 307 return false; 308 } 309 310 static bool ltc3589_volatile_reg(struct device *dev, unsigned int reg) 311 { 312 switch (reg) { 313 case LTC3589_IRQSTAT: 314 case LTC3589_PGSTAT: 315 case LTC3589_VCCR: 316 return true; 317 } 318 return false; 319 } 320 321 static const struct reg_default ltc3589_reg_defaults[] = { 322 { LTC3589_SCR1, 0x00 }, 323 { LTC3589_OVEN, 0x00 }, 324 { LTC3589_SCR2, 0x00 }, 325 { LTC3589_VCCR, 0x00 }, 326 { LTC3589_B1DTV1, 0x19 }, 327 { LTC3589_B1DTV2, 0x19 }, 328 { LTC3589_VRRCR, 0xff }, 329 { LTC3589_B2DTV1, 0x19 }, 330 { LTC3589_B2DTV2, 0x19 }, 331 { LTC3589_B3DTV1, 0x19 }, 332 { LTC3589_B3DTV2, 0x19 }, 333 { LTC3589_L2DTV1, 0x19 }, 334 { LTC3589_L2DTV2, 0x19 }, 335 }; 336 337 static const struct regmap_config ltc3589_regmap_config = { 338 .reg_bits = 8, 339 .val_bits = 8, 340 .writeable_reg = ltc3589_writeable_reg, 341 .readable_reg = ltc3589_readable_reg, 342 .volatile_reg = ltc3589_volatile_reg, 343 .max_register = LTC3589_L2DTV2, 344 .reg_defaults = ltc3589_reg_defaults, 345 .num_reg_defaults = ARRAY_SIZE(ltc3589_reg_defaults), 346 .use_single_read = true, 347 .use_single_write = true, 348 .cache_type = REGCACHE_MAPLE, 349 }; 350 351 static irqreturn_t ltc3589_isr(int irq, void *dev_id) 352 { 353 struct ltc3589 *ltc3589 = dev_id; 354 unsigned int i, irqstat, event; 355 356 regmap_read(ltc3589->regmap, LTC3589_IRQSTAT, &irqstat); 357 358 if (irqstat & LTC3589_IRQSTAT_THERMAL_WARN) { 359 event = REGULATOR_EVENT_OVER_TEMP; 360 for (i = 0; i < LTC3589_NUM_REGULATORS; i++) 361 regulator_notifier_call_chain(ltc3589->regulators[i], 362 event, NULL); 363 } 364 365 if (irqstat & LTC3589_IRQSTAT_UNDERVOLT_WARN) { 366 event = REGULATOR_EVENT_UNDER_VOLTAGE; 367 for (i = 0; i < LTC3589_NUM_REGULATORS; i++) 368 regulator_notifier_call_chain(ltc3589->regulators[i], 369 event, NULL); 370 } 371 372 /* Clear warning condition */ 373 regmap_write(ltc3589->regmap, LTC3589_CLIRQ, 0); 374 375 return IRQ_HANDLED; 376 } 377 378 static int ltc3589_probe(struct i2c_client *client) 379 { 380 struct device *dev = &client->dev; 381 const struct ltc3589_info *info; 382 struct regulator_desc *descs; 383 struct ltc3589 *ltc3589; 384 int i, ret; 385 386 ltc3589 = devm_kzalloc(dev, sizeof(*ltc3589), GFP_KERNEL); 387 if (!ltc3589) 388 return -ENOMEM; 389 390 i2c_set_clientdata(client, ltc3589); 391 info = i2c_get_match_data(client); 392 ltc3589->dev = dev; 393 394 descs = ltc3589->regulator_descs; 395 memcpy(descs, ltc3589_regulators, sizeof(ltc3589_regulators)); 396 descs[LTC3589_LDO3].fixed_uV = info->fixed_uV; 397 descs[LTC3589_LDO4].volt_table = info->volt_table; 398 399 ltc3589->regmap = devm_regmap_init_i2c(client, <c3589_regmap_config); 400 if (IS_ERR(ltc3589->regmap)) { 401 ret = PTR_ERR(ltc3589->regmap); 402 dev_err(dev, "failed to initialize regmap: %d\n", ret); 403 return ret; 404 } 405 406 for (i = 0; i < LTC3589_NUM_REGULATORS; i++) { 407 struct regulator_desc *desc = <c3589->regulator_descs[i]; 408 struct regulator_config config = { }; 409 410 config.dev = dev; 411 config.driver_data = ltc3589; 412 413 ltc3589->regulators[i] = devm_regulator_register(dev, desc, 414 &config); 415 if (IS_ERR(ltc3589->regulators[i])) { 416 ret = PTR_ERR(ltc3589->regulators[i]); 417 dev_err(dev, "failed to register regulator %s: %d\n", 418 desc->name, ret); 419 return ret; 420 } 421 } 422 423 if (client->irq) { 424 ret = devm_request_threaded_irq(dev, client->irq, NULL, 425 ltc3589_isr, 426 IRQF_TRIGGER_LOW | IRQF_ONESHOT, 427 client->name, ltc3589); 428 if (ret) { 429 dev_err(dev, "Failed to request IRQ: %d\n", ret); 430 return ret; 431 } 432 } 433 434 return 0; 435 } 436 437 static const struct ltc3589_info ltc3589_info = { 438 .fixed_uV = 1800000, 439 .volt_table = ltc3589_ldo4, 440 }; 441 442 static const struct ltc3589_info ltc3589_12_info = { 443 .fixed_uV = 2800000, 444 .volt_table = ltc3589_12_ldo4, 445 }; 446 447 static const struct i2c_device_id ltc3589_i2c_id[] = { 448 { "ltc3589", (kernel_ulong_t)<c3589_info }, 449 { "ltc3589-1", (kernel_ulong_t)<c3589_12_info }, 450 { "ltc3589-2", (kernel_ulong_t)<c3589_12_info }, 451 { } 452 }; 453 MODULE_DEVICE_TABLE(i2c, ltc3589_i2c_id); 454 455 static const struct of_device_id __maybe_unused ltc3589_of_match[] = { 456 { .compatible = "lltc,ltc3589", .data = <c3589_info }, 457 { .compatible = "lltc,ltc3589-1", .data = <c3589_12_info }, 458 { .compatible = "lltc,ltc3589-2", .data = <c3589_12_info }, 459 { } 460 }; 461 MODULE_DEVICE_TABLE(of, ltc3589_of_match); 462 463 static struct i2c_driver ltc3589_driver = { 464 .driver = { 465 .name = DRIVER_NAME, 466 .probe_type = PROBE_PREFER_ASYNCHRONOUS, 467 .of_match_table = of_match_ptr(ltc3589_of_match), 468 }, 469 .probe = ltc3589_probe, 470 .id_table = ltc3589_i2c_id, 471 }; 472 module_i2c_driver(ltc3589_driver); 473 474 MODULE_AUTHOR("Philipp Zabel <p.zabel@pengutronix.de>"); 475 MODULE_DESCRIPTION("Regulator driver for Linear Technology LTC3589(-1,2)"); 476 MODULE_LICENSE("GPL v2"); 477