108bf1c0aSAshish Jangam /* 208bf1c0aSAshish Jangam * da9052-regulator.c: Regulator driver for DA9052 308bf1c0aSAshish Jangam * 408bf1c0aSAshish Jangam * Copyright(c) 2011 Dialog Semiconductor Ltd. 508bf1c0aSAshish Jangam * 608bf1c0aSAshish Jangam * Author: David Dajun Chen <dchen@diasemi.com> 708bf1c0aSAshish Jangam * 808bf1c0aSAshish Jangam * This program is free software; you can redistribute it and/or modify 908bf1c0aSAshish Jangam * it under the terms of the GNU General Public License as published by 1008bf1c0aSAshish Jangam * the Free Software Foundation; either version 2 of the License, or 1108bf1c0aSAshish Jangam * (at your option) any later version. 1208bf1c0aSAshish Jangam * 1308bf1c0aSAshish Jangam */ 1408bf1c0aSAshish Jangam 1508bf1c0aSAshish Jangam #include <linux/module.h> 1608bf1c0aSAshish Jangam #include <linux/moduleparam.h> 1708bf1c0aSAshish Jangam #include <linux/init.h> 1808bf1c0aSAshish Jangam #include <linux/err.h> 1908bf1c0aSAshish Jangam #include <linux/platform_device.h> 2008bf1c0aSAshish Jangam #include <linux/regulator/driver.h> 2108bf1c0aSAshish Jangam #include <linux/regulator/machine.h> 2208bf1c0aSAshish Jangam 2308bf1c0aSAshish Jangam #include <linux/mfd/da9052/da9052.h> 2408bf1c0aSAshish Jangam #include <linux/mfd/da9052/reg.h> 2508bf1c0aSAshish Jangam #include <linux/mfd/da9052/pdata.h> 2608bf1c0aSAshish Jangam 2708bf1c0aSAshish Jangam /* Buck step size */ 2808bf1c0aSAshish Jangam #define DA9052_BUCK_PERI_3uV_STEP 100000 2908bf1c0aSAshish Jangam #define DA9052_BUCK_PERI_REG_MAP_UPTO_3uV 24 3008bf1c0aSAshish Jangam #define DA9052_CONST_3uV 3000000 3108bf1c0aSAshish Jangam 3208bf1c0aSAshish Jangam #define DA9052_MIN_UA 0 3308bf1c0aSAshish Jangam #define DA9052_MAX_UA 3 3408bf1c0aSAshish Jangam #define DA9052_CURRENT_RANGE 4 3508bf1c0aSAshish Jangam 3608bf1c0aSAshish Jangam /* Bit masks */ 3708bf1c0aSAshish Jangam #define DA9052_BUCK_ILIM_MASK_EVEN 0x0c 3808bf1c0aSAshish Jangam #define DA9052_BUCK_ILIM_MASK_ODD 0xc0 3908bf1c0aSAshish Jangam 409210f05bSAxel Lin /* DA9052 REGULATOR IDs */ 419210f05bSAxel Lin #define DA9052_ID_BUCK1 0 429210f05bSAxel Lin #define DA9052_ID_BUCK2 1 439210f05bSAxel Lin #define DA9052_ID_BUCK3 2 449210f05bSAxel Lin #define DA9052_ID_BUCK4 3 459210f05bSAxel Lin #define DA9052_ID_LDO1 4 469210f05bSAxel Lin #define DA9052_ID_LDO2 5 479210f05bSAxel Lin #define DA9052_ID_LDO3 6 489210f05bSAxel Lin #define DA9052_ID_LDO4 7 499210f05bSAxel Lin #define DA9052_ID_LDO5 8 509210f05bSAxel Lin #define DA9052_ID_LDO6 9 519210f05bSAxel Lin #define DA9052_ID_LDO7 10 529210f05bSAxel Lin #define DA9052_ID_LDO8 11 539210f05bSAxel Lin #define DA9052_ID_LDO9 12 549210f05bSAxel Lin #define DA9052_ID_LDO10 13 559210f05bSAxel Lin 5608bf1c0aSAshish Jangam static const u32 da9052_current_limits[3][4] = { 5708bf1c0aSAshish Jangam {700000, 800000, 1000000, 1200000}, /* DA9052-BC BUCKs */ 5808bf1c0aSAshish Jangam {1600000, 2000000, 2400000, 3000000}, /* DA9053-AA/Bx BUCK-CORE */ 5908bf1c0aSAshish Jangam {800000, 1000000, 1200000, 1500000}, /* DA9053-AA/Bx BUCK-PRO, 6008bf1c0aSAshish Jangam * BUCK-MEM and BUCK-PERI 6108bf1c0aSAshish Jangam */ 6208bf1c0aSAshish Jangam }; 6308bf1c0aSAshish Jangam 6408bf1c0aSAshish Jangam struct da9052_regulator_info { 6508bf1c0aSAshish Jangam struct regulator_desc reg_desc; 6608bf1c0aSAshish Jangam int step_uV; 6708bf1c0aSAshish Jangam int min_uV; 6808bf1c0aSAshish Jangam int max_uV; 6908bf1c0aSAshish Jangam unsigned char volt_shift; 7008bf1c0aSAshish Jangam unsigned char en_bit; 7108bf1c0aSAshish Jangam unsigned char activate_bit; 7208bf1c0aSAshish Jangam }; 7308bf1c0aSAshish Jangam 7408bf1c0aSAshish Jangam struct da9052_regulator { 7508bf1c0aSAshish Jangam struct da9052 *da9052; 7608bf1c0aSAshish Jangam struct da9052_regulator_info *info; 7708bf1c0aSAshish Jangam struct regulator_dev *rdev; 7808bf1c0aSAshish Jangam }; 7908bf1c0aSAshish Jangam 8008bf1c0aSAshish Jangam static int verify_range(struct da9052_regulator_info *info, 8108bf1c0aSAshish Jangam int min_uV, int max_uV) 8208bf1c0aSAshish Jangam { 8308bf1c0aSAshish Jangam if (min_uV > info->max_uV || max_uV < info->min_uV) 8408bf1c0aSAshish Jangam return -EINVAL; 8508bf1c0aSAshish Jangam 8608bf1c0aSAshish Jangam return 0; 8708bf1c0aSAshish Jangam } 8808bf1c0aSAshish Jangam 8908bf1c0aSAshish Jangam static int da9052_regulator_enable(struct regulator_dev *rdev) 9008bf1c0aSAshish Jangam { 9108bf1c0aSAshish Jangam struct da9052_regulator *regulator = rdev_get_drvdata(rdev); 9208bf1c0aSAshish Jangam struct da9052_regulator_info *info = regulator->info; 9308bf1c0aSAshish Jangam int offset = rdev_get_id(rdev); 9408bf1c0aSAshish Jangam 9508bf1c0aSAshish Jangam return da9052_reg_update(regulator->da9052, 9608bf1c0aSAshish Jangam DA9052_BUCKCORE_REG + offset, 9708bf1c0aSAshish Jangam 1 << info->en_bit, 1 << info->en_bit); 9808bf1c0aSAshish Jangam } 9908bf1c0aSAshish Jangam 10008bf1c0aSAshish Jangam static int da9052_regulator_disable(struct regulator_dev *rdev) 10108bf1c0aSAshish Jangam { 10208bf1c0aSAshish Jangam struct da9052_regulator *regulator = rdev_get_drvdata(rdev); 10308bf1c0aSAshish Jangam struct da9052_regulator_info *info = regulator->info; 10408bf1c0aSAshish Jangam int offset = rdev_get_id(rdev); 10508bf1c0aSAshish Jangam 10608bf1c0aSAshish Jangam return da9052_reg_update(regulator->da9052, 10708bf1c0aSAshish Jangam DA9052_BUCKCORE_REG + offset, 10808bf1c0aSAshish Jangam 1 << info->en_bit, 0); 10908bf1c0aSAshish Jangam } 11008bf1c0aSAshish Jangam 11108bf1c0aSAshish Jangam static int da9052_regulator_is_enabled(struct regulator_dev *rdev) 11208bf1c0aSAshish Jangam { 11308bf1c0aSAshish Jangam struct da9052_regulator *regulator = rdev_get_drvdata(rdev); 11408bf1c0aSAshish Jangam struct da9052_regulator_info *info = regulator->info; 11508bf1c0aSAshish Jangam int offset = rdev_get_id(rdev); 11608bf1c0aSAshish Jangam int ret; 11708bf1c0aSAshish Jangam 11808bf1c0aSAshish Jangam ret = da9052_reg_read(regulator->da9052, DA9052_BUCKCORE_REG + offset); 11908bf1c0aSAshish Jangam if (ret < 0) 12008bf1c0aSAshish Jangam return ret; 12108bf1c0aSAshish Jangam 12208bf1c0aSAshish Jangam return ret & (1 << info->en_bit); 12308bf1c0aSAshish Jangam } 12408bf1c0aSAshish Jangam 12508bf1c0aSAshish Jangam static int da9052_dcdc_get_current_limit(struct regulator_dev *rdev) 12608bf1c0aSAshish Jangam { 12708bf1c0aSAshish Jangam struct da9052_regulator *regulator = rdev_get_drvdata(rdev); 12808bf1c0aSAshish Jangam int offset = rdev_get_id(rdev); 12908bf1c0aSAshish Jangam int ret, row = 2; 13008bf1c0aSAshish Jangam 13108bf1c0aSAshish Jangam ret = da9052_reg_read(regulator->da9052, DA9052_BUCKA_REG + offset/2); 13208bf1c0aSAshish Jangam if (ret < 0) 13308bf1c0aSAshish Jangam return ret; 13408bf1c0aSAshish Jangam 13508bf1c0aSAshish Jangam /* Determine the even or odd position of the buck current limit 13608bf1c0aSAshish Jangam * register field 13708bf1c0aSAshish Jangam */ 13808bf1c0aSAshish Jangam if (offset % 2 == 0) 13908bf1c0aSAshish Jangam ret = (ret & DA9052_BUCK_ILIM_MASK_EVEN) >> 2; 14008bf1c0aSAshish Jangam else 14108bf1c0aSAshish Jangam ret = (ret & DA9052_BUCK_ILIM_MASK_ODD) >> 6; 14208bf1c0aSAshish Jangam 14308bf1c0aSAshish Jangam /* Select the appropriate current limit range */ 14408bf1c0aSAshish Jangam if (regulator->da9052->chip_id == DA9052) 14508bf1c0aSAshish Jangam row = 0; 14608bf1c0aSAshish Jangam else if (offset == 0) 14708bf1c0aSAshish Jangam row = 1; 14808bf1c0aSAshish Jangam 14908bf1c0aSAshish Jangam return da9052_current_limits[row][ret]; 15008bf1c0aSAshish Jangam } 15108bf1c0aSAshish Jangam 15208bf1c0aSAshish Jangam static int da9052_dcdc_set_current_limit(struct regulator_dev *rdev, int min_uA, 15308bf1c0aSAshish Jangam int max_uA) 15408bf1c0aSAshish Jangam { 15508bf1c0aSAshish Jangam struct da9052_regulator *regulator = rdev_get_drvdata(rdev); 15608bf1c0aSAshish Jangam int offset = rdev_get_id(rdev); 15708bf1c0aSAshish Jangam int reg_val = 0; 15808bf1c0aSAshish Jangam int i, row = 2; 15908bf1c0aSAshish Jangam 16008bf1c0aSAshish Jangam /* Select the appropriate current limit range */ 16108bf1c0aSAshish Jangam if (regulator->da9052->chip_id == DA9052) 16208bf1c0aSAshish Jangam row = 0; 16308bf1c0aSAshish Jangam else if (offset == 0) 16408bf1c0aSAshish Jangam row = 1; 16508bf1c0aSAshish Jangam 16608bf1c0aSAshish Jangam if (min_uA > da9052_current_limits[row][DA9052_MAX_UA] || 16708bf1c0aSAshish Jangam max_uA < da9052_current_limits[row][DA9052_MIN_UA]) 16808bf1c0aSAshish Jangam return -EINVAL; 16908bf1c0aSAshish Jangam 17008bf1c0aSAshish Jangam for (i = 0; i < DA9052_CURRENT_RANGE; i++) { 17108bf1c0aSAshish Jangam if (min_uA <= da9052_current_limits[row][i]) { 17208bf1c0aSAshish Jangam reg_val = i; 17308bf1c0aSAshish Jangam break; 17408bf1c0aSAshish Jangam } 17508bf1c0aSAshish Jangam } 17608bf1c0aSAshish Jangam 17708bf1c0aSAshish Jangam /* Determine the even or odd position of the buck current limit 17808bf1c0aSAshish Jangam * register field 17908bf1c0aSAshish Jangam */ 18008bf1c0aSAshish Jangam if (offset % 2 == 0) 18108bf1c0aSAshish Jangam return da9052_reg_update(regulator->da9052, 18208bf1c0aSAshish Jangam DA9052_BUCKA_REG + offset/2, 18308bf1c0aSAshish Jangam DA9052_BUCK_ILIM_MASK_EVEN, 18408bf1c0aSAshish Jangam reg_val << 2); 18508bf1c0aSAshish Jangam else 18608bf1c0aSAshish Jangam return da9052_reg_update(regulator->da9052, 18708bf1c0aSAshish Jangam DA9052_BUCKA_REG + offset/2, 18808bf1c0aSAshish Jangam DA9052_BUCK_ILIM_MASK_ODD, 18908bf1c0aSAshish Jangam reg_val << 6); 19008bf1c0aSAshish Jangam } 19108bf1c0aSAshish Jangam 19208bf1c0aSAshish Jangam static int da9052_list_voltage(struct regulator_dev *rdev, 19308bf1c0aSAshish Jangam unsigned int selector) 19408bf1c0aSAshish Jangam { 19508bf1c0aSAshish Jangam struct da9052_regulator *regulator = rdev_get_drvdata(rdev); 19608bf1c0aSAshish Jangam struct da9052_regulator_info *info = regulator->info; 1970ec446eaSAxel Lin int id = rdev_get_id(rdev); 19808bf1c0aSAshish Jangam int volt_uV; 19908bf1c0aSAshish Jangam 2000ec446eaSAxel Lin if ((id == DA9052_ID_BUCK4) && (regulator->da9052->chip_id == DA9052) 2010ec446eaSAxel Lin && (selector >= DA9052_BUCK_PERI_REG_MAP_UPTO_3uV)) { 2020ec446eaSAxel Lin volt_uV = ((DA9052_BUCK_PERI_REG_MAP_UPTO_3uV * info->step_uV) 2030ec446eaSAxel Lin + info->min_uV); 2040ec446eaSAxel Lin volt_uV += (selector - DA9052_BUCK_PERI_REG_MAP_UPTO_3uV) 2050ec446eaSAxel Lin * (DA9052_BUCK_PERI_3uV_STEP); 2060ec446eaSAxel Lin } else { 2070ec446eaSAxel Lin volt_uV = (selector * info->step_uV) + info->min_uV; 2080ec446eaSAxel Lin } 20908bf1c0aSAshish Jangam 21008bf1c0aSAshish Jangam if (volt_uV > info->max_uV) 21108bf1c0aSAshish Jangam return -EINVAL; 21208bf1c0aSAshish Jangam 21308bf1c0aSAshish Jangam return volt_uV; 21408bf1c0aSAshish Jangam } 21508bf1c0aSAshish Jangam 2160ec446eaSAxel Lin static int da9052_regulator_set_voltage(struct regulator_dev *rdev, 21708bf1c0aSAshish Jangam int min_uV, int max_uV, 21808bf1c0aSAshish Jangam unsigned int *selector) 21908bf1c0aSAshish Jangam { 22008bf1c0aSAshish Jangam struct da9052_regulator *regulator = rdev_get_drvdata(rdev); 22108bf1c0aSAshish Jangam struct da9052_regulator_info *info = regulator->info; 2220ec446eaSAxel Lin int id = rdev_get_id(rdev); 22308bf1c0aSAshish Jangam int ret; 22408bf1c0aSAshish Jangam 22508bf1c0aSAshish Jangam ret = verify_range(info, min_uV, max_uV); 22608bf1c0aSAshish Jangam if (ret < 0) 22708bf1c0aSAshish Jangam return ret; 22808bf1c0aSAshish Jangam 22908bf1c0aSAshish Jangam if (min_uV < info->min_uV) 23008bf1c0aSAshish Jangam min_uV = info->min_uV; 23108bf1c0aSAshish Jangam 2320ec446eaSAxel Lin if ((id == DA9052_ID_BUCK4) && (regulator->da9052->chip_id == DA9052) 2330ec446eaSAxel Lin && (min_uV >= DA9052_CONST_3uV)) { 2340ec446eaSAxel Lin *selector = DA9052_BUCK_PERI_REG_MAP_UPTO_3uV + 2350ec446eaSAxel Lin DIV_ROUND_UP(min_uV - DA9052_CONST_3uV, 2360ec446eaSAxel Lin DA9052_BUCK_PERI_3uV_STEP); 2370ec446eaSAxel Lin } else { 23893651218SAxel Lin *selector = DIV_ROUND_UP(min_uV - info->min_uV, info->step_uV); 2390ec446eaSAxel Lin } 24008bf1c0aSAshish Jangam 24108bf1c0aSAshish Jangam ret = da9052_list_voltage(rdev, *selector); 24208bf1c0aSAshish Jangam if (ret < 0) 24308bf1c0aSAshish Jangam return ret; 24408bf1c0aSAshish Jangam 2450ec446eaSAxel Lin ret = da9052_reg_update(regulator->da9052, 2460ec446eaSAxel Lin DA9052_BUCKCORE_REG + id, 24708bf1c0aSAshish Jangam (1 << info->volt_shift) - 1, *selector); 24808bf1c0aSAshish Jangam if (ret < 0) 24908bf1c0aSAshish Jangam return ret; 25008bf1c0aSAshish Jangam 2510ec446eaSAxel Lin /* Some LDOs and DCDCs are DVC controlled which requires enabling of 2520ec446eaSAxel Lin * the activate bit to implment the changes on the output. 25308bf1c0aSAshish Jangam */ 2540ec446eaSAxel Lin switch (id) { 2550ec446eaSAxel Lin case DA9052_ID_BUCK1: 2560ec446eaSAxel Lin case DA9052_ID_BUCK2: 2570ec446eaSAxel Lin case DA9052_ID_BUCK3: 2580ec446eaSAxel Lin case DA9052_ID_LDO2: 2590ec446eaSAxel Lin case DA9052_ID_LDO3: 2600ec446eaSAxel Lin ret = da9052_reg_update(regulator->da9052, DA9052_SUPPLY_REG, 2614adf9bedSAxel Lin info->activate_bit, info->activate_bit); 2620ec446eaSAxel Lin break; 26308bf1c0aSAshish Jangam } 26408bf1c0aSAshish Jangam 26508bf1c0aSAshish Jangam return ret; 26608bf1c0aSAshish Jangam } 26708bf1c0aSAshish Jangam 26808bf1c0aSAshish Jangam static int da9052_get_regulator_voltage_sel(struct regulator_dev *rdev) 26908bf1c0aSAshish Jangam { 27008bf1c0aSAshish Jangam struct da9052_regulator *regulator = rdev_get_drvdata(rdev); 27108bf1c0aSAshish Jangam struct da9052_regulator_info *info = regulator->info; 27208bf1c0aSAshish Jangam int offset = rdev_get_id(rdev); 27308bf1c0aSAshish Jangam int ret; 27408bf1c0aSAshish Jangam 27508bf1c0aSAshish Jangam ret = da9052_reg_read(regulator->da9052, DA9052_BUCKCORE_REG + offset); 27608bf1c0aSAshish Jangam if (ret < 0) 27708bf1c0aSAshish Jangam return ret; 27808bf1c0aSAshish Jangam 27908bf1c0aSAshish Jangam ret &= ((1 << info->volt_shift) - 1); 28008bf1c0aSAshish Jangam 28108bf1c0aSAshish Jangam return ret; 28208bf1c0aSAshish Jangam } 28308bf1c0aSAshish Jangam 28408bf1c0aSAshish Jangam static struct regulator_ops da9052_dcdc_ops = { 2850ec446eaSAxel Lin .set_voltage = da9052_regulator_set_voltage, 28608bf1c0aSAshish Jangam .get_current_limit = da9052_dcdc_get_current_limit, 28708bf1c0aSAshish Jangam .set_current_limit = da9052_dcdc_set_current_limit, 28808bf1c0aSAshish Jangam 28908bf1c0aSAshish Jangam .list_voltage = da9052_list_voltage, 29008bf1c0aSAshish Jangam .get_voltage_sel = da9052_get_regulator_voltage_sel, 29108bf1c0aSAshish Jangam .is_enabled = da9052_regulator_is_enabled, 29208bf1c0aSAshish Jangam .enable = da9052_regulator_enable, 29308bf1c0aSAshish Jangam .disable = da9052_regulator_disable, 29408bf1c0aSAshish Jangam }; 29508bf1c0aSAshish Jangam 29608bf1c0aSAshish Jangam static struct regulator_ops da9052_ldo_ops = { 2970ec446eaSAxel Lin .set_voltage = da9052_regulator_set_voltage, 29808bf1c0aSAshish Jangam 29908bf1c0aSAshish Jangam .list_voltage = da9052_list_voltage, 30008bf1c0aSAshish Jangam .get_voltage_sel = da9052_get_regulator_voltage_sel, 30108bf1c0aSAshish Jangam .is_enabled = da9052_regulator_is_enabled, 30208bf1c0aSAshish Jangam .enable = da9052_regulator_enable, 30308bf1c0aSAshish Jangam .disable = da9052_regulator_disable, 30408bf1c0aSAshish Jangam }; 30508bf1c0aSAshish Jangam 30608bf1c0aSAshish Jangam #define DA9052_LDO(_id, step, min, max, sbits, ebits, abits) \ 30708bf1c0aSAshish Jangam {\ 30808bf1c0aSAshish Jangam .reg_desc = {\ 3099210f05bSAxel Lin .name = #_id,\ 31008bf1c0aSAshish Jangam .ops = &da9052_ldo_ops,\ 31108bf1c0aSAshish Jangam .type = REGULATOR_VOLTAGE,\ 3129210f05bSAxel Lin .id = DA9052_ID_##_id,\ 3137b957654SAxel Lin .n_voltages = (max - min) / step + 1, \ 31408bf1c0aSAshish Jangam .owner = THIS_MODULE,\ 31508bf1c0aSAshish Jangam },\ 31608bf1c0aSAshish Jangam .min_uV = (min) * 1000,\ 31708bf1c0aSAshish Jangam .max_uV = (max) * 1000,\ 31808bf1c0aSAshish Jangam .step_uV = (step) * 1000,\ 31908bf1c0aSAshish Jangam .volt_shift = (sbits),\ 32008bf1c0aSAshish Jangam .en_bit = (ebits),\ 32108bf1c0aSAshish Jangam .activate_bit = (abits),\ 32208bf1c0aSAshish Jangam } 32308bf1c0aSAshish Jangam 32408bf1c0aSAshish Jangam #define DA9052_DCDC(_id, step, min, max, sbits, ebits, abits) \ 32508bf1c0aSAshish Jangam {\ 32608bf1c0aSAshish Jangam .reg_desc = {\ 3279210f05bSAxel Lin .name = #_id,\ 32808bf1c0aSAshish Jangam .ops = &da9052_dcdc_ops,\ 32908bf1c0aSAshish Jangam .type = REGULATOR_VOLTAGE,\ 3309210f05bSAxel Lin .id = DA9052_ID_##_id,\ 3317b957654SAxel Lin .n_voltages = (max - min) / step + 1, \ 33208bf1c0aSAshish Jangam .owner = THIS_MODULE,\ 33308bf1c0aSAshish Jangam },\ 33408bf1c0aSAshish Jangam .min_uV = (min) * 1000,\ 33508bf1c0aSAshish Jangam .max_uV = (max) * 1000,\ 33608bf1c0aSAshish Jangam .step_uV = (step) * 1000,\ 33708bf1c0aSAshish Jangam .volt_shift = (sbits),\ 33808bf1c0aSAshish Jangam .en_bit = (ebits),\ 33908bf1c0aSAshish Jangam .activate_bit = (abits),\ 34008bf1c0aSAshish Jangam } 34108bf1c0aSAshish Jangam 3426242eae9SAxel Lin static struct da9052_regulator_info da9052_regulator_info[] = { 3439210f05bSAxel Lin DA9052_DCDC(BUCK1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO), 3449210f05bSAxel Lin DA9052_DCDC(BUCK2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO), 3459210f05bSAxel Lin DA9052_DCDC(BUCK3, 25, 925, 2500, 6, 6, DA9052_SUPPLY_VBMEMGO), 3460ec446eaSAxel Lin DA9052_DCDC(BUCK4, 50, 1800, 3600, 5, 6, 0), 3479210f05bSAxel Lin DA9052_LDO(LDO1, 50, 600, 1800, 5, 6, 0), 3480ec446eaSAxel Lin DA9052_LDO(LDO2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO), 3490ec446eaSAxel Lin DA9052_LDO(LDO3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO), 3509210f05bSAxel Lin DA9052_LDO(LDO4, 25, 1725, 3300, 6, 6, 0), 3519210f05bSAxel Lin DA9052_LDO(LDO5, 50, 1200, 3600, 6, 6, 0), 3529210f05bSAxel Lin DA9052_LDO(LDO6, 50, 1200, 3600, 6, 6, 0), 3539210f05bSAxel Lin DA9052_LDO(LDO7, 50, 1200, 3600, 6, 6, 0), 3549210f05bSAxel Lin DA9052_LDO(LDO8, 50, 1200, 3600, 6, 6, 0), 3559210f05bSAxel Lin DA9052_LDO(LDO9, 50, 1250, 3650, 6, 6, 0), 3569210f05bSAxel Lin DA9052_LDO(LDO10, 50, 1200, 3600, 6, 6, 0), 35708bf1c0aSAshish Jangam }; 35808bf1c0aSAshish Jangam 3596242eae9SAxel Lin static struct da9052_regulator_info da9053_regulator_info[] = { 3609210f05bSAxel Lin DA9052_DCDC(BUCK1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO), 3619210f05bSAxel Lin DA9052_DCDC(BUCK2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO), 3629210f05bSAxel Lin DA9052_DCDC(BUCK3, 25, 925, 2500, 6, 6, DA9052_SUPPLY_VBMEMGO), 3630ec446eaSAxel Lin DA9052_DCDC(BUCK4, 25, 925, 2500, 6, 6, 0), 3649210f05bSAxel Lin DA9052_LDO(LDO1, 50, 600, 1800, 5, 6, 0), 3650ec446eaSAxel Lin DA9052_LDO(LDO2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO), 3660ec446eaSAxel Lin DA9052_LDO(LDO3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO), 3679210f05bSAxel Lin DA9052_LDO(LDO4, 25, 1725, 3300, 6, 6, 0), 3689210f05bSAxel Lin DA9052_LDO(LDO5, 50, 1200, 3600, 6, 6, 0), 3699210f05bSAxel Lin DA9052_LDO(LDO6, 50, 1200, 3600, 6, 6, 0), 3709210f05bSAxel Lin DA9052_LDO(LDO7, 50, 1200, 3600, 6, 6, 0), 3719210f05bSAxel Lin DA9052_LDO(LDO8, 50, 1200, 3600, 6, 6, 0), 3729210f05bSAxel Lin DA9052_LDO(LDO9, 50, 1250, 3650, 6, 6, 0), 3739210f05bSAxel Lin DA9052_LDO(LDO10, 50, 1200, 3600, 6, 6, 0), 37408bf1c0aSAshish Jangam }; 37508bf1c0aSAshish Jangam 37608bf1c0aSAshish Jangam static inline struct da9052_regulator_info *find_regulator_info(u8 chip_id, 37708bf1c0aSAshish Jangam int id) 37808bf1c0aSAshish Jangam { 37908bf1c0aSAshish Jangam struct da9052_regulator_info *info; 38008bf1c0aSAshish Jangam int i; 38108bf1c0aSAshish Jangam 382984b5a6bSAshish Jangam switch (chip_id) { 383984b5a6bSAshish Jangam case DA9052: 38408bf1c0aSAshish Jangam for (i = 0; i < ARRAY_SIZE(da9052_regulator_info); i++) { 38508bf1c0aSAshish Jangam info = &da9052_regulator_info[i]; 38608bf1c0aSAshish Jangam if (info->reg_desc.id == id) 38708bf1c0aSAshish Jangam return info; 38808bf1c0aSAshish Jangam } 389984b5a6bSAshish Jangam break; 390984b5a6bSAshish Jangam case DA9053_AA: 391984b5a6bSAshish Jangam case DA9053_BA: 392984b5a6bSAshish Jangam case DA9053_BB: 39308bf1c0aSAshish Jangam for (i = 0; i < ARRAY_SIZE(da9053_regulator_info); i++) { 39408bf1c0aSAshish Jangam info = &da9053_regulator_info[i]; 39508bf1c0aSAshish Jangam if (info->reg_desc.id == id) 39608bf1c0aSAshish Jangam return info; 39708bf1c0aSAshish Jangam } 398984b5a6bSAshish Jangam break; 39908bf1c0aSAshish Jangam } 40008bf1c0aSAshish Jangam 40108bf1c0aSAshish Jangam return NULL; 40208bf1c0aSAshish Jangam } 40308bf1c0aSAshish Jangam 40408bf1c0aSAshish Jangam static int __devinit da9052_regulator_probe(struct platform_device *pdev) 40508bf1c0aSAshish Jangam { 406*c172708dSMark Brown struct regulator_config config = { }; 40708bf1c0aSAshish Jangam struct da9052_regulator *regulator; 40808bf1c0aSAshish Jangam struct da9052 *da9052; 40908bf1c0aSAshish Jangam struct da9052_pdata *pdata; 41008bf1c0aSAshish Jangam 411984b5a6bSAshish Jangam regulator = devm_kzalloc(&pdev->dev, sizeof(struct da9052_regulator), 412984b5a6bSAshish Jangam GFP_KERNEL); 41308bf1c0aSAshish Jangam if (!regulator) 41408bf1c0aSAshish Jangam return -ENOMEM; 41508bf1c0aSAshish Jangam 41608bf1c0aSAshish Jangam da9052 = dev_get_drvdata(pdev->dev.parent); 41708bf1c0aSAshish Jangam pdata = da9052->dev->platform_data; 41808bf1c0aSAshish Jangam regulator->da9052 = da9052; 41908bf1c0aSAshish Jangam 42008bf1c0aSAshish Jangam regulator->info = find_regulator_info(regulator->da9052->chip_id, 42108bf1c0aSAshish Jangam pdev->id); 42208bf1c0aSAshish Jangam if (regulator->info == NULL) { 42308bf1c0aSAshish Jangam dev_err(&pdev->dev, "invalid regulator ID specified\n"); 4247eb6444fSAxel Lin return -EINVAL; 42508bf1c0aSAshish Jangam } 426*c172708dSMark Brown 427*c172708dSMark Brown config.dev = &pdev->dev; 428*c172708dSMark Brown config.init_data = pdata->regulators[pdev->id]; 429*c172708dSMark Brown config.driver_data = regulator; 430*c172708dSMark Brown 43108bf1c0aSAshish Jangam regulator->rdev = regulator_register(®ulator->info->reg_desc, 432*c172708dSMark Brown &config); 43308bf1c0aSAshish Jangam if (IS_ERR(regulator->rdev)) { 43408bf1c0aSAshish Jangam dev_err(&pdev->dev, "failed to register regulator %s\n", 43508bf1c0aSAshish Jangam regulator->info->reg_desc.name); 4367eb6444fSAxel Lin return PTR_ERR(regulator->rdev); 43708bf1c0aSAshish Jangam } 43808bf1c0aSAshish Jangam 43908bf1c0aSAshish Jangam platform_set_drvdata(pdev, regulator); 44008bf1c0aSAshish Jangam 44108bf1c0aSAshish Jangam return 0; 44208bf1c0aSAshish Jangam } 44308bf1c0aSAshish Jangam 44408bf1c0aSAshish Jangam static int __devexit da9052_regulator_remove(struct platform_device *pdev) 44508bf1c0aSAshish Jangam { 44608bf1c0aSAshish Jangam struct da9052_regulator *regulator = platform_get_drvdata(pdev); 44708bf1c0aSAshish Jangam 44808bf1c0aSAshish Jangam regulator_unregister(regulator->rdev); 44908bf1c0aSAshish Jangam return 0; 45008bf1c0aSAshish Jangam } 45108bf1c0aSAshish Jangam 45208bf1c0aSAshish Jangam static struct platform_driver da9052_regulator_driver = { 45308bf1c0aSAshish Jangam .probe = da9052_regulator_probe, 45408bf1c0aSAshish Jangam .remove = __devexit_p(da9052_regulator_remove), 45508bf1c0aSAshish Jangam .driver = { 45608bf1c0aSAshish Jangam .name = "da9052-regulator", 45708bf1c0aSAshish Jangam .owner = THIS_MODULE, 45808bf1c0aSAshish Jangam }, 45908bf1c0aSAshish Jangam }; 46008bf1c0aSAshish Jangam 46108bf1c0aSAshish Jangam static int __init da9052_regulator_init(void) 46208bf1c0aSAshish Jangam { 46308bf1c0aSAshish Jangam return platform_driver_register(&da9052_regulator_driver); 46408bf1c0aSAshish Jangam } 46508bf1c0aSAshish Jangam subsys_initcall(da9052_regulator_init); 46608bf1c0aSAshish Jangam 46708bf1c0aSAshish Jangam static void __exit da9052_regulator_exit(void) 46808bf1c0aSAshish Jangam { 46908bf1c0aSAshish Jangam platform_driver_unregister(&da9052_regulator_driver); 47008bf1c0aSAshish Jangam } 47108bf1c0aSAshish Jangam module_exit(da9052_regulator_exit); 47208bf1c0aSAshish Jangam 47308bf1c0aSAshish Jangam MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>"); 47408bf1c0aSAshish Jangam MODULE_DESCRIPTION("Power Regulator driver for Dialog DA9052 PMIC"); 47508bf1c0aSAshish Jangam MODULE_LICENSE("GPL"); 47608bf1c0aSAshish Jangam MODULE_ALIAS("platform:da9052-regulator"); 477