1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Driver for PCA9685 16-channel 12-bit PWM LED controller 4 * 5 * Copyright (C) 2013 Steffen Trumtrar <s.trumtrar@pengutronix.de> 6 * Copyright (C) 2015 Clemens Gruber <clemens.gruber@pqgruber.com> 7 * 8 * based on the pwm-twl-led.c driver 9 */ 10 11 #include <linux/acpi.h> 12 #include <linux/gpio/driver.h> 13 #include <linux/i2c.h> 14 #include <linux/module.h> 15 #include <linux/mutex.h> 16 #include <linux/platform_device.h> 17 #include <linux/property.h> 18 #include <linux/pwm.h> 19 #include <linux/regmap.h> 20 #include <linux/slab.h> 21 #include <linux/delay.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/bitmap.h> 24 25 /* 26 * Because the PCA9685 has only one prescaler per chip, only the first channel 27 * that is enabled is allowed to change the prescale register. 28 * PWM channels requested afterwards must use a period that results in the same 29 * prescale setting as the one set by the first requested channel. 30 * GPIOs do not count as enabled PWMs as they are not using the prescaler. 31 */ 32 33 #define PCA9685_MODE1 0x00 34 #define PCA9685_MODE2 0x01 35 #define PCA9685_SUBADDR1 0x02 36 #define PCA9685_SUBADDR2 0x03 37 #define PCA9685_SUBADDR3 0x04 38 #define PCA9685_ALLCALLADDR 0x05 39 #define PCA9685_LEDX_ON_L 0x06 40 #define PCA9685_LEDX_ON_H 0x07 41 #define PCA9685_LEDX_OFF_L 0x08 42 #define PCA9685_LEDX_OFF_H 0x09 43 44 #define PCA9685_ALL_LED_ON_L 0xFA 45 #define PCA9685_ALL_LED_ON_H 0xFB 46 #define PCA9685_ALL_LED_OFF_L 0xFC 47 #define PCA9685_ALL_LED_OFF_H 0xFD 48 #define PCA9685_PRESCALE 0xFE 49 50 #define PCA9685_PRESCALE_MIN 0x03 /* => max. frequency of 1526 Hz */ 51 #define PCA9685_PRESCALE_MAX 0xFF /* => min. frequency of 24 Hz */ 52 53 #define PCA9685_COUNTER_RANGE 4096 54 #define PCA9685_OSC_CLOCK_MHZ 25 /* Internal oscillator with 25 MHz */ 55 56 #define PCA9685_NUMREGS 0xFF 57 #define PCA9685_MAXCHAN 0x10 58 59 #define LED_FULL BIT(4) 60 #define MODE1_ALLCALL BIT(0) 61 #define MODE1_SUB3 BIT(1) 62 #define MODE1_SUB2 BIT(2) 63 #define MODE1_SUB1 BIT(3) 64 #define MODE1_SLEEP BIT(4) 65 #define MODE2_INVRT BIT(4) 66 #define MODE2_OUTDRV BIT(2) 67 68 #define LED_N_ON_H(N) (PCA9685_LEDX_ON_H + (4 * (N))) 69 #define LED_N_ON_L(N) (PCA9685_LEDX_ON_L + (4 * (N))) 70 #define LED_N_OFF_H(N) (PCA9685_LEDX_OFF_H + (4 * (N))) 71 #define LED_N_OFF_L(N) (PCA9685_LEDX_OFF_L + (4 * (N))) 72 73 #define REG_ON_H(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_ON_H : LED_N_ON_H((C))) 74 #define REG_ON_L(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_ON_L : LED_N_ON_L((C))) 75 #define REG_OFF_H(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_OFF_H : LED_N_OFF_H((C))) 76 #define REG_OFF_L(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_OFF_L : LED_N_OFF_L((C))) 77 78 struct pca9685 { 79 struct pwm_chip chip; 80 struct regmap *regmap; 81 struct mutex lock; 82 DECLARE_BITMAP(pwms_enabled, PCA9685_MAXCHAN + 1); 83 #if IS_ENABLED(CONFIG_GPIOLIB) 84 struct gpio_chip gpio; 85 DECLARE_BITMAP(pwms_inuse, PCA9685_MAXCHAN + 1); 86 #endif 87 }; 88 89 static inline struct pca9685 *to_pca(struct pwm_chip *chip) 90 { 91 return container_of(chip, struct pca9685, chip); 92 } 93 94 /* This function is supposed to be called with the lock mutex held */ 95 static bool pca9685_prescaler_can_change(struct pca9685 *pca, int channel) 96 { 97 /* No PWM enabled: Change allowed */ 98 if (bitmap_empty(pca->pwms_enabled, PCA9685_MAXCHAN + 1)) 99 return true; 100 /* More than one PWM enabled: Change not allowed */ 101 if (bitmap_weight(pca->pwms_enabled, PCA9685_MAXCHAN + 1) > 1) 102 return false; 103 /* 104 * Only one PWM enabled: Change allowed if the PWM about to 105 * be changed is the one that is already enabled 106 */ 107 return test_bit(channel, pca->pwms_enabled); 108 } 109 110 static int pca9685_read_reg(struct pca9685 *pca, unsigned int reg, unsigned int *val) 111 { 112 struct device *dev = pca->chip.dev; 113 int err; 114 115 err = regmap_read(pca->regmap, reg, val); 116 if (err) 117 dev_err(dev, "regmap_read of register 0x%x failed: %pe\n", reg, ERR_PTR(err)); 118 119 return err; 120 } 121 122 static int pca9685_write_reg(struct pca9685 *pca, unsigned int reg, unsigned int val) 123 { 124 struct device *dev = pca->chip.dev; 125 int err; 126 127 err = regmap_write(pca->regmap, reg, val); 128 if (err) 129 dev_err(dev, "regmap_write to register 0x%x failed: %pe\n", reg, ERR_PTR(err)); 130 131 return err; 132 } 133 134 /* Helper function to set the duty cycle ratio to duty/4096 (e.g. duty=2048 -> 50%) */ 135 static void pca9685_pwm_set_duty(struct pca9685 *pca, int channel, unsigned int duty) 136 { 137 struct pwm_device *pwm = &pca->chip.pwms[channel]; 138 unsigned int on, off; 139 140 if (duty == 0) { 141 /* Set the full OFF bit, which has the highest precedence */ 142 pca9685_write_reg(pca, REG_OFF_H(channel), LED_FULL); 143 return; 144 } else if (duty >= PCA9685_COUNTER_RANGE) { 145 /* Set the full ON bit and clear the full OFF bit */ 146 pca9685_write_reg(pca, REG_ON_H(channel), LED_FULL); 147 pca9685_write_reg(pca, REG_OFF_H(channel), 0); 148 return; 149 } 150 151 152 if (pwm->state.usage_power && channel < PCA9685_MAXCHAN) { 153 /* 154 * If usage_power is set, the pca9685 driver will phase shift 155 * the individual channels relative to their channel number. 156 * This improves EMI because the enabled channels no longer 157 * turn on at the same time, while still maintaining the 158 * configured duty cycle / power output. 159 */ 160 on = channel * PCA9685_COUNTER_RANGE / PCA9685_MAXCHAN; 161 } else 162 on = 0; 163 164 off = (on + duty) % PCA9685_COUNTER_RANGE; 165 166 /* Set ON time (clears full ON bit) */ 167 pca9685_write_reg(pca, REG_ON_L(channel), on & 0xff); 168 pca9685_write_reg(pca, REG_ON_H(channel), (on >> 8) & 0xf); 169 /* Set OFF time (clears full OFF bit) */ 170 pca9685_write_reg(pca, REG_OFF_L(channel), off & 0xff); 171 pca9685_write_reg(pca, REG_OFF_H(channel), (off >> 8) & 0xf); 172 } 173 174 static unsigned int pca9685_pwm_get_duty(struct pca9685 *pca, int channel) 175 { 176 struct pwm_device *pwm = &pca->chip.pwms[channel]; 177 unsigned int off = 0, on = 0, val = 0; 178 179 if (WARN_ON(channel >= PCA9685_MAXCHAN)) { 180 /* HW does not support reading state of "all LEDs" channel */ 181 return 0; 182 } 183 184 pca9685_read_reg(pca, LED_N_OFF_H(channel), &off); 185 if (off & LED_FULL) { 186 /* Full OFF bit is set */ 187 return 0; 188 } 189 190 pca9685_read_reg(pca, LED_N_ON_H(channel), &on); 191 if (on & LED_FULL) { 192 /* Full ON bit is set */ 193 return PCA9685_COUNTER_RANGE; 194 } 195 196 pca9685_read_reg(pca, LED_N_OFF_L(channel), &val); 197 off = ((off & 0xf) << 8) | (val & 0xff); 198 if (!pwm->state.usage_power) 199 return off; 200 201 /* Read ON register to calculate duty cycle of staggered output */ 202 if (pca9685_read_reg(pca, LED_N_ON_L(channel), &val)) { 203 /* Reset val to 0 in case reading LED_N_ON_L failed */ 204 val = 0; 205 } 206 on = ((on & 0xf) << 8) | (val & 0xff); 207 return (off - on) & (PCA9685_COUNTER_RANGE - 1); 208 } 209 210 #if IS_ENABLED(CONFIG_GPIOLIB) 211 static bool pca9685_pwm_test_and_set_inuse(struct pca9685 *pca, int pwm_idx) 212 { 213 bool is_inuse; 214 215 mutex_lock(&pca->lock); 216 if (pwm_idx >= PCA9685_MAXCHAN) { 217 /* 218 * "All LEDs" channel: 219 * pretend already in use if any of the PWMs are requested 220 */ 221 if (!bitmap_empty(pca->pwms_inuse, PCA9685_MAXCHAN)) { 222 is_inuse = true; 223 goto out; 224 } 225 } else { 226 /* 227 * Regular channel: 228 * pretend already in use if the "all LEDs" channel is requested 229 */ 230 if (test_bit(PCA9685_MAXCHAN, pca->pwms_inuse)) { 231 is_inuse = true; 232 goto out; 233 } 234 } 235 is_inuse = test_and_set_bit(pwm_idx, pca->pwms_inuse); 236 out: 237 mutex_unlock(&pca->lock); 238 return is_inuse; 239 } 240 241 static void pca9685_pwm_clear_inuse(struct pca9685 *pca, int pwm_idx) 242 { 243 mutex_lock(&pca->lock); 244 clear_bit(pwm_idx, pca->pwms_inuse); 245 mutex_unlock(&pca->lock); 246 } 247 248 static int pca9685_pwm_gpio_request(struct gpio_chip *gpio, unsigned int offset) 249 { 250 struct pca9685 *pca = gpiochip_get_data(gpio); 251 252 if (pca9685_pwm_test_and_set_inuse(pca, offset)) 253 return -EBUSY; 254 pm_runtime_get_sync(pca->chip.dev); 255 return 0; 256 } 257 258 static int pca9685_pwm_gpio_get(struct gpio_chip *gpio, unsigned int offset) 259 { 260 struct pca9685 *pca = gpiochip_get_data(gpio); 261 262 return pca9685_pwm_get_duty(pca, offset) != 0; 263 } 264 265 static void pca9685_pwm_gpio_set(struct gpio_chip *gpio, unsigned int offset, 266 int value) 267 { 268 struct pca9685 *pca = gpiochip_get_data(gpio); 269 270 pca9685_pwm_set_duty(pca, offset, value ? PCA9685_COUNTER_RANGE : 0); 271 } 272 273 static void pca9685_pwm_gpio_free(struct gpio_chip *gpio, unsigned int offset) 274 { 275 struct pca9685 *pca = gpiochip_get_data(gpio); 276 277 pca9685_pwm_set_duty(pca, offset, 0); 278 pm_runtime_put(pca->chip.dev); 279 pca9685_pwm_clear_inuse(pca, offset); 280 } 281 282 static int pca9685_pwm_gpio_get_direction(struct gpio_chip *chip, 283 unsigned int offset) 284 { 285 /* Always out */ 286 return GPIO_LINE_DIRECTION_OUT; 287 } 288 289 static int pca9685_pwm_gpio_direction_input(struct gpio_chip *gpio, 290 unsigned int offset) 291 { 292 return -EINVAL; 293 } 294 295 static int pca9685_pwm_gpio_direction_output(struct gpio_chip *gpio, 296 unsigned int offset, int value) 297 { 298 pca9685_pwm_gpio_set(gpio, offset, value); 299 300 return 0; 301 } 302 303 /* 304 * The PCA9685 has a bit for turning the PWM output full off or on. Some 305 * boards like Intel Galileo actually uses these as normal GPIOs so we 306 * expose a GPIO chip here which can exclusively take over the underlying 307 * PWM channel. 308 */ 309 static int pca9685_pwm_gpio_probe(struct pca9685 *pca) 310 { 311 struct device *dev = pca->chip.dev; 312 313 pca->gpio.label = dev_name(dev); 314 pca->gpio.parent = dev; 315 pca->gpio.request = pca9685_pwm_gpio_request; 316 pca->gpio.free = pca9685_pwm_gpio_free; 317 pca->gpio.get_direction = pca9685_pwm_gpio_get_direction; 318 pca->gpio.direction_input = pca9685_pwm_gpio_direction_input; 319 pca->gpio.direction_output = pca9685_pwm_gpio_direction_output; 320 pca->gpio.get = pca9685_pwm_gpio_get; 321 pca->gpio.set = pca9685_pwm_gpio_set; 322 pca->gpio.base = -1; 323 pca->gpio.ngpio = PCA9685_MAXCHAN; 324 pca->gpio.can_sleep = true; 325 326 return devm_gpiochip_add_data(dev, &pca->gpio, pca); 327 } 328 #else 329 static inline bool pca9685_pwm_test_and_set_inuse(struct pca9685 *pca, 330 int pwm_idx) 331 { 332 return false; 333 } 334 335 static inline void 336 pca9685_pwm_clear_inuse(struct pca9685 *pca, int pwm_idx) 337 { 338 } 339 340 static inline int pca9685_pwm_gpio_probe(struct pca9685 *pca) 341 { 342 return 0; 343 } 344 #endif 345 346 static void pca9685_set_sleep_mode(struct pca9685 *pca, bool enable) 347 { 348 struct device *dev = pca->chip.dev; 349 int err = regmap_update_bits(pca->regmap, PCA9685_MODE1, 350 MODE1_SLEEP, enable ? MODE1_SLEEP : 0); 351 if (err) { 352 dev_err(dev, "regmap_update_bits of register 0x%x failed: %pe\n", 353 PCA9685_MODE1, ERR_PTR(err)); 354 return; 355 } 356 357 if (!enable) { 358 /* Wait 500us for the oscillator to be back up */ 359 udelay(500); 360 } 361 } 362 363 static int __pca9685_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, 364 const struct pwm_state *state) 365 { 366 struct pca9685 *pca = to_pca(chip); 367 unsigned long long duty, prescale; 368 unsigned int val = 0; 369 370 if (state->polarity != PWM_POLARITY_NORMAL) 371 return -EINVAL; 372 373 prescale = DIV_ROUND_CLOSEST_ULL(PCA9685_OSC_CLOCK_MHZ * state->period, 374 PCA9685_COUNTER_RANGE * 1000) - 1; 375 if (prescale < PCA9685_PRESCALE_MIN || prescale > PCA9685_PRESCALE_MAX) { 376 dev_err(chip->dev, "pwm not changed: period out of bounds!\n"); 377 return -EINVAL; 378 } 379 380 if (!state->enabled) { 381 pca9685_pwm_set_duty(pca, pwm->hwpwm, 0); 382 return 0; 383 } 384 385 pca9685_read_reg(pca, PCA9685_PRESCALE, &val); 386 if (prescale != val) { 387 if (!pca9685_prescaler_can_change(pca, pwm->hwpwm)) { 388 dev_err(chip->dev, 389 "pwm not changed: periods of enabled pwms must match!\n"); 390 return -EBUSY; 391 } 392 393 /* 394 * Putting the chip briefly into SLEEP mode 395 * at this point won't interfere with the 396 * pm_runtime framework, because the pm_runtime 397 * state is guaranteed active here. 398 */ 399 /* Put chip into sleep mode */ 400 pca9685_set_sleep_mode(pca, true); 401 402 /* Change the chip-wide output frequency */ 403 pca9685_write_reg(pca, PCA9685_PRESCALE, prescale); 404 405 /* Wake the chip up */ 406 pca9685_set_sleep_mode(pca, false); 407 } 408 409 duty = PCA9685_COUNTER_RANGE * state->duty_cycle; 410 duty = DIV_ROUND_UP_ULL(duty, state->period); 411 pca9685_pwm_set_duty(pca, pwm->hwpwm, duty); 412 return 0; 413 } 414 415 static int pca9685_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, 416 const struct pwm_state *state) 417 { 418 struct pca9685 *pca = to_pca(chip); 419 int ret; 420 421 mutex_lock(&pca->lock); 422 ret = __pca9685_pwm_apply(chip, pwm, state); 423 if (ret == 0) { 424 if (state->enabled) 425 set_bit(pwm->hwpwm, pca->pwms_enabled); 426 else 427 clear_bit(pwm->hwpwm, pca->pwms_enabled); 428 } 429 mutex_unlock(&pca->lock); 430 431 return ret; 432 } 433 434 static void pca9685_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, 435 struct pwm_state *state) 436 { 437 struct pca9685 *pca = to_pca(chip); 438 unsigned long long duty; 439 unsigned int val = 0; 440 441 /* Calculate (chip-wide) period from prescale value */ 442 pca9685_read_reg(pca, PCA9685_PRESCALE, &val); 443 /* 444 * PCA9685_OSC_CLOCK_MHZ is 25, i.e. an integer divider of 1000. 445 * The following calculation is therefore only a multiplication 446 * and we are not losing precision. 447 */ 448 state->period = (PCA9685_COUNTER_RANGE * 1000 / PCA9685_OSC_CLOCK_MHZ) * 449 (val + 1); 450 451 /* The (per-channel) polarity is fixed */ 452 state->polarity = PWM_POLARITY_NORMAL; 453 454 if (pwm->hwpwm >= PCA9685_MAXCHAN) { 455 /* 456 * The "all LEDs" channel does not support HW readout 457 * Return 0 and disabled for backwards compatibility 458 */ 459 state->duty_cycle = 0; 460 state->enabled = false; 461 return; 462 } 463 464 state->enabled = true; 465 duty = pca9685_pwm_get_duty(pca, pwm->hwpwm); 466 state->duty_cycle = DIV_ROUND_DOWN_ULL(duty * state->period, PCA9685_COUNTER_RANGE); 467 } 468 469 static int pca9685_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) 470 { 471 struct pca9685 *pca = to_pca(chip); 472 473 if (pca9685_pwm_test_and_set_inuse(pca, pwm->hwpwm)) 474 return -EBUSY; 475 476 if (pwm->hwpwm < PCA9685_MAXCHAN) { 477 /* PWMs - except the "all LEDs" channel - default to enabled */ 478 mutex_lock(&pca->lock); 479 set_bit(pwm->hwpwm, pca->pwms_enabled); 480 mutex_unlock(&pca->lock); 481 } 482 483 pm_runtime_get_sync(chip->dev); 484 485 return 0; 486 } 487 488 static void pca9685_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) 489 { 490 struct pca9685 *pca = to_pca(chip); 491 492 mutex_lock(&pca->lock); 493 pca9685_pwm_set_duty(pca, pwm->hwpwm, 0); 494 clear_bit(pwm->hwpwm, pca->pwms_enabled); 495 mutex_unlock(&pca->lock); 496 497 pm_runtime_put(chip->dev); 498 pca9685_pwm_clear_inuse(pca, pwm->hwpwm); 499 } 500 501 static const struct pwm_ops pca9685_pwm_ops = { 502 .apply = pca9685_pwm_apply, 503 .get_state = pca9685_pwm_get_state, 504 .request = pca9685_pwm_request, 505 .free = pca9685_pwm_free, 506 .owner = THIS_MODULE, 507 }; 508 509 static const struct regmap_config pca9685_regmap_i2c_config = { 510 .reg_bits = 8, 511 .val_bits = 8, 512 .max_register = PCA9685_NUMREGS, 513 .cache_type = REGCACHE_NONE, 514 }; 515 516 static int pca9685_pwm_probe(struct i2c_client *client, 517 const struct i2c_device_id *id) 518 { 519 struct pca9685 *pca; 520 unsigned int reg; 521 int ret; 522 523 pca = devm_kzalloc(&client->dev, sizeof(*pca), GFP_KERNEL); 524 if (!pca) 525 return -ENOMEM; 526 527 pca->regmap = devm_regmap_init_i2c(client, &pca9685_regmap_i2c_config); 528 if (IS_ERR(pca->regmap)) { 529 ret = PTR_ERR(pca->regmap); 530 dev_err(&client->dev, "Failed to initialize register map: %d\n", 531 ret); 532 return ret; 533 } 534 535 i2c_set_clientdata(client, pca); 536 537 mutex_init(&pca->lock); 538 539 ret = pca9685_read_reg(pca, PCA9685_MODE2, ®); 540 if (ret) 541 return ret; 542 543 if (device_property_read_bool(&client->dev, "invert")) 544 reg |= MODE2_INVRT; 545 else 546 reg &= ~MODE2_INVRT; 547 548 if (device_property_read_bool(&client->dev, "open-drain")) 549 reg &= ~MODE2_OUTDRV; 550 else 551 reg |= MODE2_OUTDRV; 552 553 ret = pca9685_write_reg(pca, PCA9685_MODE2, reg); 554 if (ret) 555 return ret; 556 557 /* Disable all LED ALLCALL and SUBx addresses to avoid bus collisions */ 558 pca9685_read_reg(pca, PCA9685_MODE1, ®); 559 reg &= ~(MODE1_ALLCALL | MODE1_SUB1 | MODE1_SUB2 | MODE1_SUB3); 560 pca9685_write_reg(pca, PCA9685_MODE1, reg); 561 562 /* Reset OFF/ON registers to POR default */ 563 pca9685_write_reg(pca, PCA9685_ALL_LED_OFF_L, 0); 564 pca9685_write_reg(pca, PCA9685_ALL_LED_OFF_H, LED_FULL); 565 pca9685_write_reg(pca, PCA9685_ALL_LED_ON_L, 0); 566 pca9685_write_reg(pca, PCA9685_ALL_LED_ON_H, LED_FULL); 567 568 pca->chip.ops = &pca9685_pwm_ops; 569 /* Add an extra channel for ALL_LED */ 570 pca->chip.npwm = PCA9685_MAXCHAN + 1; 571 572 pca->chip.dev = &client->dev; 573 574 ret = pwmchip_add(&pca->chip); 575 if (ret < 0) 576 return ret; 577 578 ret = pca9685_pwm_gpio_probe(pca); 579 if (ret < 0) { 580 pwmchip_remove(&pca->chip); 581 return ret; 582 } 583 584 pm_runtime_enable(&client->dev); 585 586 if (pm_runtime_enabled(&client->dev)) { 587 /* 588 * Although the chip comes out of power-up in the sleep state, 589 * we force it to sleep in case it was woken up before 590 */ 591 pca9685_set_sleep_mode(pca, true); 592 pm_runtime_set_suspended(&client->dev); 593 } else { 594 /* Wake the chip up if runtime PM is disabled */ 595 pca9685_set_sleep_mode(pca, false); 596 } 597 598 return 0; 599 } 600 601 static int pca9685_pwm_remove(struct i2c_client *client) 602 { 603 struct pca9685 *pca = i2c_get_clientdata(client); 604 605 pwmchip_remove(&pca->chip); 606 607 if (!pm_runtime_enabled(&client->dev)) { 608 /* Put chip in sleep state if runtime PM is disabled */ 609 pca9685_set_sleep_mode(pca, true); 610 } 611 612 pm_runtime_disable(&client->dev); 613 614 return 0; 615 } 616 617 static int __maybe_unused pca9685_pwm_runtime_suspend(struct device *dev) 618 { 619 struct i2c_client *client = to_i2c_client(dev); 620 struct pca9685 *pca = i2c_get_clientdata(client); 621 622 pca9685_set_sleep_mode(pca, true); 623 return 0; 624 } 625 626 static int __maybe_unused pca9685_pwm_runtime_resume(struct device *dev) 627 { 628 struct i2c_client *client = to_i2c_client(dev); 629 struct pca9685 *pca = i2c_get_clientdata(client); 630 631 pca9685_set_sleep_mode(pca, false); 632 return 0; 633 } 634 635 static const struct i2c_device_id pca9685_id[] = { 636 { "pca9685", 0 }, 637 { /* sentinel */ }, 638 }; 639 MODULE_DEVICE_TABLE(i2c, pca9685_id); 640 641 #ifdef CONFIG_ACPI 642 static const struct acpi_device_id pca9685_acpi_ids[] = { 643 { "INT3492", 0 }, 644 { /* sentinel */ }, 645 }; 646 MODULE_DEVICE_TABLE(acpi, pca9685_acpi_ids); 647 #endif 648 649 #ifdef CONFIG_OF 650 static const struct of_device_id pca9685_dt_ids[] = { 651 { .compatible = "nxp,pca9685-pwm", }, 652 { /* sentinel */ } 653 }; 654 MODULE_DEVICE_TABLE(of, pca9685_dt_ids); 655 #endif 656 657 static const struct dev_pm_ops pca9685_pwm_pm = { 658 SET_RUNTIME_PM_OPS(pca9685_pwm_runtime_suspend, 659 pca9685_pwm_runtime_resume, NULL) 660 }; 661 662 static struct i2c_driver pca9685_i2c_driver = { 663 .driver = { 664 .name = "pca9685-pwm", 665 .acpi_match_table = ACPI_PTR(pca9685_acpi_ids), 666 .of_match_table = of_match_ptr(pca9685_dt_ids), 667 .pm = &pca9685_pwm_pm, 668 }, 669 .probe = pca9685_pwm_probe, 670 .remove = pca9685_pwm_remove, 671 .id_table = pca9685_id, 672 }; 673 674 module_i2c_driver(pca9685_i2c_driver); 675 676 MODULE_AUTHOR("Steffen Trumtrar <s.trumtrar@pengutronix.de>"); 677 MODULE_DESCRIPTION("PWM driver for PCA9685"); 678 MODULE_LICENSE("GPL"); 679