1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Driver for PCA9685 16-channel 12-bit PWM LED controller 4 * 5 * Copyright (C) 2013 Steffen Trumtrar <s.trumtrar@pengutronix.de> 6 * Copyright (C) 2015 Clemens Gruber <clemens.gruber@pqgruber.com> 7 * 8 * based on the pwm-twl-led.c driver 9 */ 10 11 #include <linux/acpi.h> 12 #include <linux/gpio/driver.h> 13 #include <linux/i2c.h> 14 #include <linux/module.h> 15 #include <linux/mutex.h> 16 #include <linux/platform_device.h> 17 #include <linux/property.h> 18 #include <linux/pwm.h> 19 #include <linux/regmap.h> 20 #include <linux/slab.h> 21 #include <linux/delay.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/bitmap.h> 24 25 /* 26 * Because the PCA9685 has only one prescaler per chip, only the first channel 27 * that is enabled is allowed to change the prescale register. 28 * PWM channels requested afterwards must use a period that results in the same 29 * prescale setting as the one set by the first requested channel. 30 * GPIOs do not count as enabled PWMs as they are not using the prescaler. 31 */ 32 33 #define PCA9685_MODE1 0x00 34 #define PCA9685_MODE2 0x01 35 #define PCA9685_SUBADDR1 0x02 36 #define PCA9685_SUBADDR2 0x03 37 #define PCA9685_SUBADDR3 0x04 38 #define PCA9685_ALLCALLADDR 0x05 39 #define PCA9685_LEDX_ON_L 0x06 40 #define PCA9685_LEDX_ON_H 0x07 41 #define PCA9685_LEDX_OFF_L 0x08 42 #define PCA9685_LEDX_OFF_H 0x09 43 44 #define PCA9685_ALL_LED_ON_L 0xFA 45 #define PCA9685_ALL_LED_ON_H 0xFB 46 #define PCA9685_ALL_LED_OFF_L 0xFC 47 #define PCA9685_ALL_LED_OFF_H 0xFD 48 #define PCA9685_PRESCALE 0xFE 49 50 #define PCA9685_PRESCALE_MIN 0x03 /* => max. frequency of 1526 Hz */ 51 #define PCA9685_PRESCALE_MAX 0xFF /* => min. frequency of 24 Hz */ 52 53 #define PCA9685_COUNTER_RANGE 4096 54 #define PCA9685_OSC_CLOCK_MHZ 25 /* Internal oscillator with 25 MHz */ 55 56 #define PCA9685_NUMREGS 0xFF 57 #define PCA9685_MAXCHAN 0x10 58 59 #define LED_FULL BIT(4) 60 #define MODE1_ALLCALL BIT(0) 61 #define MODE1_SUB3 BIT(1) 62 #define MODE1_SUB2 BIT(2) 63 #define MODE1_SUB1 BIT(3) 64 #define MODE1_SLEEP BIT(4) 65 #define MODE2_INVRT BIT(4) 66 #define MODE2_OUTDRV BIT(2) 67 68 #define LED_N_ON_H(N) (PCA9685_LEDX_ON_H + (4 * (N))) 69 #define LED_N_ON_L(N) (PCA9685_LEDX_ON_L + (4 * (N))) 70 #define LED_N_OFF_H(N) (PCA9685_LEDX_OFF_H + (4 * (N))) 71 #define LED_N_OFF_L(N) (PCA9685_LEDX_OFF_L + (4 * (N))) 72 73 #define REG_ON_H(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_ON_H : LED_N_ON_H((C))) 74 #define REG_ON_L(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_ON_L : LED_N_ON_L((C))) 75 #define REG_OFF_H(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_OFF_H : LED_N_OFF_H((C))) 76 #define REG_OFF_L(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_OFF_L : LED_N_OFF_L((C))) 77 78 struct pca9685 { 79 struct regmap *regmap; 80 struct mutex lock; 81 DECLARE_BITMAP(pwms_enabled, PCA9685_MAXCHAN + 1); 82 #if IS_ENABLED(CONFIG_GPIOLIB) 83 struct gpio_chip gpio; 84 DECLARE_BITMAP(pwms_inuse, PCA9685_MAXCHAN + 1); 85 #endif 86 }; 87 88 static inline struct pca9685 *to_pca(struct pwm_chip *chip) 89 { 90 return pwmchip_get_drvdata(chip); 91 } 92 93 /* This function is supposed to be called with the lock mutex held */ 94 static bool pca9685_prescaler_can_change(struct pca9685 *pca, int channel) 95 { 96 /* No PWM enabled: Change allowed */ 97 if (bitmap_empty(pca->pwms_enabled, PCA9685_MAXCHAN + 1)) 98 return true; 99 /* More than one PWM enabled: Change not allowed */ 100 if (bitmap_weight(pca->pwms_enabled, PCA9685_MAXCHAN + 1) > 1) 101 return false; 102 /* 103 * Only one PWM enabled: Change allowed if the PWM about to 104 * be changed is the one that is already enabled 105 */ 106 return test_bit(channel, pca->pwms_enabled); 107 } 108 109 static int pca9685_read_reg(struct pwm_chip *chip, unsigned int reg, unsigned int *val) 110 { 111 struct pca9685 *pca = to_pca(chip); 112 struct device *dev = pwmchip_parent(chip); 113 int err; 114 115 err = regmap_read(pca->regmap, reg, val); 116 if (err) 117 dev_err(dev, "regmap_read of register 0x%x failed: %pe\n", reg, ERR_PTR(err)); 118 119 return err; 120 } 121 122 static int pca9685_write_reg(struct pwm_chip *chip, unsigned int reg, unsigned int val) 123 { 124 struct pca9685 *pca = to_pca(chip); 125 struct device *dev = pwmchip_parent(chip); 126 int err; 127 128 err = regmap_write(pca->regmap, reg, val); 129 if (err) 130 dev_err(dev, "regmap_write to register 0x%x failed: %pe\n", reg, ERR_PTR(err)); 131 132 return err; 133 } 134 135 /* Helper function to set the duty cycle ratio to duty/4096 (e.g. duty=2048 -> 50%) */ 136 static void pca9685_pwm_set_duty(struct pwm_chip *chip, int channel, unsigned int duty) 137 { 138 struct pwm_device *pwm = &chip->pwms[channel]; 139 unsigned int on, off; 140 141 if (duty == 0) { 142 /* Set the full OFF bit, which has the highest precedence */ 143 pca9685_write_reg(chip, REG_OFF_H(channel), LED_FULL); 144 return; 145 } else if (duty >= PCA9685_COUNTER_RANGE) { 146 /* Set the full ON bit and clear the full OFF bit */ 147 pca9685_write_reg(chip, REG_ON_H(channel), LED_FULL); 148 pca9685_write_reg(chip, REG_OFF_H(channel), 0); 149 return; 150 } 151 152 153 if (pwm->state.usage_power && channel < PCA9685_MAXCHAN) { 154 /* 155 * If usage_power is set, the pca9685 driver will phase shift 156 * the individual channels relative to their channel number. 157 * This improves EMI because the enabled channels no longer 158 * turn on at the same time, while still maintaining the 159 * configured duty cycle / power output. 160 */ 161 on = channel * PCA9685_COUNTER_RANGE / PCA9685_MAXCHAN; 162 } else 163 on = 0; 164 165 off = (on + duty) % PCA9685_COUNTER_RANGE; 166 167 /* Set ON time (clears full ON bit) */ 168 pca9685_write_reg(chip, REG_ON_L(channel), on & 0xff); 169 pca9685_write_reg(chip, REG_ON_H(channel), (on >> 8) & 0xf); 170 /* Set OFF time (clears full OFF bit) */ 171 pca9685_write_reg(chip, REG_OFF_L(channel), off & 0xff); 172 pca9685_write_reg(chip, REG_OFF_H(channel), (off >> 8) & 0xf); 173 } 174 175 static unsigned int pca9685_pwm_get_duty(struct pwm_chip *chip, int channel) 176 { 177 struct pwm_device *pwm = &chip->pwms[channel]; 178 unsigned int off = 0, on = 0, val = 0; 179 180 if (WARN_ON(channel >= PCA9685_MAXCHAN)) { 181 /* HW does not support reading state of "all LEDs" channel */ 182 return 0; 183 } 184 185 pca9685_read_reg(chip, LED_N_OFF_H(channel), &off); 186 if (off & LED_FULL) { 187 /* Full OFF bit is set */ 188 return 0; 189 } 190 191 pca9685_read_reg(chip, LED_N_ON_H(channel), &on); 192 if (on & LED_FULL) { 193 /* Full ON bit is set */ 194 return PCA9685_COUNTER_RANGE; 195 } 196 197 pca9685_read_reg(chip, LED_N_OFF_L(channel), &val); 198 off = ((off & 0xf) << 8) | (val & 0xff); 199 if (!pwm->state.usage_power) 200 return off; 201 202 /* Read ON register to calculate duty cycle of staggered output */ 203 if (pca9685_read_reg(chip, LED_N_ON_L(channel), &val)) { 204 /* Reset val to 0 in case reading LED_N_ON_L failed */ 205 val = 0; 206 } 207 on = ((on & 0xf) << 8) | (val & 0xff); 208 return (off - on) & (PCA9685_COUNTER_RANGE - 1); 209 } 210 211 #if IS_ENABLED(CONFIG_GPIOLIB) 212 static bool pca9685_pwm_test_and_set_inuse(struct pca9685 *pca, int pwm_idx) 213 { 214 bool is_inuse; 215 216 mutex_lock(&pca->lock); 217 if (pwm_idx >= PCA9685_MAXCHAN) { 218 /* 219 * "All LEDs" channel: 220 * pretend already in use if any of the PWMs are requested 221 */ 222 if (!bitmap_empty(pca->pwms_inuse, PCA9685_MAXCHAN)) { 223 is_inuse = true; 224 goto out; 225 } 226 } else { 227 /* 228 * Regular channel: 229 * pretend already in use if the "all LEDs" channel is requested 230 */ 231 if (test_bit(PCA9685_MAXCHAN, pca->pwms_inuse)) { 232 is_inuse = true; 233 goto out; 234 } 235 } 236 is_inuse = test_and_set_bit(pwm_idx, pca->pwms_inuse); 237 out: 238 mutex_unlock(&pca->lock); 239 return is_inuse; 240 } 241 242 static void pca9685_pwm_clear_inuse(struct pca9685 *pca, int pwm_idx) 243 { 244 mutex_lock(&pca->lock); 245 clear_bit(pwm_idx, pca->pwms_inuse); 246 mutex_unlock(&pca->lock); 247 } 248 249 static int pca9685_pwm_gpio_request(struct gpio_chip *gpio, unsigned int offset) 250 { 251 struct pwm_chip *chip = gpiochip_get_data(gpio); 252 struct pca9685 *pca = to_pca(chip); 253 254 if (pca9685_pwm_test_and_set_inuse(pca, offset)) 255 return -EBUSY; 256 pm_runtime_get_sync(pwmchip_parent(chip)); 257 return 0; 258 } 259 260 static int pca9685_pwm_gpio_get(struct gpio_chip *gpio, unsigned int offset) 261 { 262 struct pwm_chip *chip = gpiochip_get_data(gpio); 263 264 return pca9685_pwm_get_duty(chip, offset) != 0; 265 } 266 267 static void pca9685_pwm_gpio_set(struct gpio_chip *gpio, unsigned int offset, 268 int value) 269 { 270 struct pwm_chip *chip = gpiochip_get_data(gpio); 271 272 pca9685_pwm_set_duty(chip, offset, value ? PCA9685_COUNTER_RANGE : 0); 273 } 274 275 static void pca9685_pwm_gpio_free(struct gpio_chip *gpio, unsigned int offset) 276 { 277 struct pwm_chip *chip = gpiochip_get_data(gpio); 278 struct pca9685 *pca = to_pca(chip); 279 280 pca9685_pwm_set_duty(chip, offset, 0); 281 pm_runtime_put(pwmchip_parent(chip)); 282 pca9685_pwm_clear_inuse(pca, offset); 283 } 284 285 static int pca9685_pwm_gpio_get_direction(struct gpio_chip *chip, 286 unsigned int offset) 287 { 288 /* Always out */ 289 return GPIO_LINE_DIRECTION_OUT; 290 } 291 292 static int pca9685_pwm_gpio_direction_input(struct gpio_chip *gpio, 293 unsigned int offset) 294 { 295 return -EINVAL; 296 } 297 298 static int pca9685_pwm_gpio_direction_output(struct gpio_chip *gpio, 299 unsigned int offset, int value) 300 { 301 pca9685_pwm_gpio_set(gpio, offset, value); 302 303 return 0; 304 } 305 306 /* 307 * The PCA9685 has a bit for turning the PWM output full off or on. Some 308 * boards like Intel Galileo actually uses these as normal GPIOs so we 309 * expose a GPIO chip here which can exclusively take over the underlying 310 * PWM channel. 311 */ 312 static int pca9685_pwm_gpio_probe(struct pwm_chip *chip) 313 { 314 struct pca9685 *pca = to_pca(chip); 315 struct device *dev = pwmchip_parent(chip); 316 317 pca->gpio.label = dev_name(dev); 318 pca->gpio.parent = dev; 319 pca->gpio.request = pca9685_pwm_gpio_request; 320 pca->gpio.free = pca9685_pwm_gpio_free; 321 pca->gpio.get_direction = pca9685_pwm_gpio_get_direction; 322 pca->gpio.direction_input = pca9685_pwm_gpio_direction_input; 323 pca->gpio.direction_output = pca9685_pwm_gpio_direction_output; 324 pca->gpio.get = pca9685_pwm_gpio_get; 325 pca->gpio.set = pca9685_pwm_gpio_set; 326 pca->gpio.base = -1; 327 pca->gpio.ngpio = PCA9685_MAXCHAN; 328 pca->gpio.can_sleep = true; 329 330 return devm_gpiochip_add_data(dev, &pca->gpio, chip); 331 } 332 #else 333 static inline bool pca9685_pwm_test_and_set_inuse(struct pca9685 *pca, 334 int pwm_idx) 335 { 336 return false; 337 } 338 339 static inline void 340 pca9685_pwm_clear_inuse(struct pca9685 *pca, int pwm_idx) 341 { 342 } 343 344 static inline int pca9685_pwm_gpio_probe(struct pwm_chip *chip) 345 { 346 return 0; 347 } 348 #endif 349 350 static void pca9685_set_sleep_mode(struct pwm_chip *chip, bool enable) 351 { 352 struct device *dev = pwmchip_parent(chip); 353 struct pca9685 *pca = to_pca(chip); 354 int err = regmap_update_bits(pca->regmap, PCA9685_MODE1, 355 MODE1_SLEEP, enable ? MODE1_SLEEP : 0); 356 if (err) { 357 dev_err(dev, "regmap_update_bits of register 0x%x failed: %pe\n", 358 PCA9685_MODE1, ERR_PTR(err)); 359 return; 360 } 361 362 if (!enable) { 363 /* Wait 500us for the oscillator to be back up */ 364 udelay(500); 365 } 366 } 367 368 static int __pca9685_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, 369 const struct pwm_state *state) 370 { 371 struct pca9685 *pca = to_pca(chip); 372 unsigned long long duty, prescale; 373 unsigned int val = 0; 374 375 if (state->polarity != PWM_POLARITY_NORMAL) 376 return -EINVAL; 377 378 prescale = DIV_ROUND_CLOSEST_ULL(PCA9685_OSC_CLOCK_MHZ * state->period, 379 PCA9685_COUNTER_RANGE * 1000) - 1; 380 if (prescale < PCA9685_PRESCALE_MIN || prescale > PCA9685_PRESCALE_MAX) { 381 dev_err(pwmchip_parent(chip), "pwm not changed: period out of bounds!\n"); 382 return -EINVAL; 383 } 384 385 if (!state->enabled) { 386 pca9685_pwm_set_duty(chip, pwm->hwpwm, 0); 387 return 0; 388 } 389 390 pca9685_read_reg(chip, PCA9685_PRESCALE, &val); 391 if (prescale != val) { 392 if (!pca9685_prescaler_can_change(pca, pwm->hwpwm)) { 393 dev_err(pwmchip_parent(chip), 394 "pwm not changed: periods of enabled pwms must match!\n"); 395 return -EBUSY; 396 } 397 398 /* 399 * Putting the chip briefly into SLEEP mode 400 * at this point won't interfere with the 401 * pm_runtime framework, because the pm_runtime 402 * state is guaranteed active here. 403 */ 404 /* Put chip into sleep mode */ 405 pca9685_set_sleep_mode(chip, true); 406 407 /* Change the chip-wide output frequency */ 408 pca9685_write_reg(chip, PCA9685_PRESCALE, prescale); 409 410 /* Wake the chip up */ 411 pca9685_set_sleep_mode(chip, false); 412 } 413 414 duty = PCA9685_COUNTER_RANGE * state->duty_cycle; 415 duty = DIV_ROUND_UP_ULL(duty, state->period); 416 pca9685_pwm_set_duty(chip, pwm->hwpwm, duty); 417 return 0; 418 } 419 420 static int pca9685_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, 421 const struct pwm_state *state) 422 { 423 struct pca9685 *pca = to_pca(chip); 424 int ret; 425 426 mutex_lock(&pca->lock); 427 ret = __pca9685_pwm_apply(chip, pwm, state); 428 if (ret == 0) { 429 if (state->enabled) 430 set_bit(pwm->hwpwm, pca->pwms_enabled); 431 else 432 clear_bit(pwm->hwpwm, pca->pwms_enabled); 433 } 434 mutex_unlock(&pca->lock); 435 436 return ret; 437 } 438 439 static int pca9685_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, 440 struct pwm_state *state) 441 { 442 unsigned long long duty; 443 unsigned int val = 0; 444 445 /* Calculate (chip-wide) period from prescale value */ 446 pca9685_read_reg(chip, PCA9685_PRESCALE, &val); 447 /* 448 * PCA9685_OSC_CLOCK_MHZ is 25, i.e. an integer divider of 1000. 449 * The following calculation is therefore only a multiplication 450 * and we are not losing precision. 451 */ 452 state->period = (PCA9685_COUNTER_RANGE * 1000 / PCA9685_OSC_CLOCK_MHZ) * 453 (val + 1); 454 455 /* The (per-channel) polarity is fixed */ 456 state->polarity = PWM_POLARITY_NORMAL; 457 458 if (pwm->hwpwm >= PCA9685_MAXCHAN) { 459 /* 460 * The "all LEDs" channel does not support HW readout 461 * Return 0 and disabled for backwards compatibility 462 */ 463 state->duty_cycle = 0; 464 state->enabled = false; 465 return 0; 466 } 467 468 state->enabled = true; 469 duty = pca9685_pwm_get_duty(chip, pwm->hwpwm); 470 state->duty_cycle = DIV_ROUND_DOWN_ULL(duty * state->period, PCA9685_COUNTER_RANGE); 471 472 return 0; 473 } 474 475 static int pca9685_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) 476 { 477 struct pca9685 *pca = to_pca(chip); 478 479 if (pca9685_pwm_test_and_set_inuse(pca, pwm->hwpwm)) 480 return -EBUSY; 481 482 if (pwm->hwpwm < PCA9685_MAXCHAN) { 483 /* PWMs - except the "all LEDs" channel - default to enabled */ 484 mutex_lock(&pca->lock); 485 set_bit(pwm->hwpwm, pca->pwms_enabled); 486 mutex_unlock(&pca->lock); 487 } 488 489 pm_runtime_get_sync(pwmchip_parent(chip)); 490 491 return 0; 492 } 493 494 static void pca9685_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) 495 { 496 struct pca9685 *pca = to_pca(chip); 497 498 mutex_lock(&pca->lock); 499 pca9685_pwm_set_duty(chip, pwm->hwpwm, 0); 500 clear_bit(pwm->hwpwm, pca->pwms_enabled); 501 mutex_unlock(&pca->lock); 502 503 pm_runtime_put(pwmchip_parent(chip)); 504 pca9685_pwm_clear_inuse(pca, pwm->hwpwm); 505 } 506 507 static const struct pwm_ops pca9685_pwm_ops = { 508 .apply = pca9685_pwm_apply, 509 .get_state = pca9685_pwm_get_state, 510 .request = pca9685_pwm_request, 511 .free = pca9685_pwm_free, 512 }; 513 514 static const struct regmap_config pca9685_regmap_i2c_config = { 515 .reg_bits = 8, 516 .val_bits = 8, 517 .max_register = PCA9685_NUMREGS, 518 .cache_type = REGCACHE_NONE, 519 }; 520 521 static int pca9685_pwm_probe(struct i2c_client *client) 522 { 523 struct pwm_chip *chip; 524 struct pca9685 *pca; 525 unsigned int reg; 526 int ret; 527 528 /* Add an extra channel for ALL_LED */ 529 chip = devm_pwmchip_alloc(&client->dev, PCA9685_MAXCHAN + 1, sizeof(*pca)); 530 if (IS_ERR(chip)) 531 return PTR_ERR(chip); 532 pca = to_pca(chip); 533 534 pca->regmap = devm_regmap_init_i2c(client, &pca9685_regmap_i2c_config); 535 if (IS_ERR(pca->regmap)) { 536 ret = PTR_ERR(pca->regmap); 537 dev_err(&client->dev, "Failed to initialize register map: %d\n", 538 ret); 539 return ret; 540 } 541 542 i2c_set_clientdata(client, chip); 543 544 mutex_init(&pca->lock); 545 546 ret = pca9685_read_reg(chip, PCA9685_MODE2, ®); 547 if (ret) 548 return ret; 549 550 if (device_property_read_bool(&client->dev, "invert")) 551 reg |= MODE2_INVRT; 552 else 553 reg &= ~MODE2_INVRT; 554 555 if (device_property_read_bool(&client->dev, "open-drain")) 556 reg &= ~MODE2_OUTDRV; 557 else 558 reg |= MODE2_OUTDRV; 559 560 ret = pca9685_write_reg(chip, PCA9685_MODE2, reg); 561 if (ret) 562 return ret; 563 564 /* Disable all LED ALLCALL and SUBx addresses to avoid bus collisions */ 565 pca9685_read_reg(chip, PCA9685_MODE1, ®); 566 reg &= ~(MODE1_ALLCALL | MODE1_SUB1 | MODE1_SUB2 | MODE1_SUB3); 567 pca9685_write_reg(chip, PCA9685_MODE1, reg); 568 569 /* Reset OFF/ON registers to POR default */ 570 pca9685_write_reg(chip, PCA9685_ALL_LED_OFF_L, 0); 571 pca9685_write_reg(chip, PCA9685_ALL_LED_OFF_H, LED_FULL); 572 pca9685_write_reg(chip, PCA9685_ALL_LED_ON_L, 0); 573 pca9685_write_reg(chip, PCA9685_ALL_LED_ON_H, LED_FULL); 574 575 chip->ops = &pca9685_pwm_ops; 576 577 ret = pwmchip_add(chip); 578 if (ret < 0) 579 return ret; 580 581 ret = pca9685_pwm_gpio_probe(chip); 582 if (ret < 0) { 583 pwmchip_remove(chip); 584 return ret; 585 } 586 587 pm_runtime_enable(&client->dev); 588 589 if (pm_runtime_enabled(&client->dev)) { 590 /* 591 * Although the chip comes out of power-up in the sleep state, 592 * we force it to sleep in case it was woken up before 593 */ 594 pca9685_set_sleep_mode(chip, true); 595 pm_runtime_set_suspended(&client->dev); 596 } else { 597 /* Wake the chip up if runtime PM is disabled */ 598 pca9685_set_sleep_mode(chip, false); 599 } 600 601 return 0; 602 } 603 604 static void pca9685_pwm_remove(struct i2c_client *client) 605 { 606 struct pwm_chip *chip = i2c_get_clientdata(client); 607 608 pwmchip_remove(chip); 609 610 if (!pm_runtime_enabled(&client->dev)) { 611 /* Put chip in sleep state if runtime PM is disabled */ 612 pca9685_set_sleep_mode(chip, true); 613 } 614 615 pm_runtime_disable(&client->dev); 616 } 617 618 static int __maybe_unused pca9685_pwm_runtime_suspend(struct device *dev) 619 { 620 struct i2c_client *client = to_i2c_client(dev); 621 struct pwm_chip *chip = i2c_get_clientdata(client); 622 623 pca9685_set_sleep_mode(chip, true); 624 return 0; 625 } 626 627 static int __maybe_unused pca9685_pwm_runtime_resume(struct device *dev) 628 { 629 struct i2c_client *client = to_i2c_client(dev); 630 struct pwm_chip *chip = i2c_get_clientdata(client); 631 632 pca9685_set_sleep_mode(chip, false); 633 return 0; 634 } 635 636 static const struct i2c_device_id pca9685_id[] = { 637 { "pca9685", 0 }, 638 { /* sentinel */ }, 639 }; 640 MODULE_DEVICE_TABLE(i2c, pca9685_id); 641 642 #ifdef CONFIG_ACPI 643 static const struct acpi_device_id pca9685_acpi_ids[] = { 644 { "INT3492", 0 }, 645 { /* sentinel */ }, 646 }; 647 MODULE_DEVICE_TABLE(acpi, pca9685_acpi_ids); 648 #endif 649 650 #ifdef CONFIG_OF 651 static const struct of_device_id pca9685_dt_ids[] = { 652 { .compatible = "nxp,pca9685-pwm", }, 653 { /* sentinel */ } 654 }; 655 MODULE_DEVICE_TABLE(of, pca9685_dt_ids); 656 #endif 657 658 static const struct dev_pm_ops pca9685_pwm_pm = { 659 SET_RUNTIME_PM_OPS(pca9685_pwm_runtime_suspend, 660 pca9685_pwm_runtime_resume, NULL) 661 }; 662 663 static struct i2c_driver pca9685_i2c_driver = { 664 .driver = { 665 .name = "pca9685-pwm", 666 .acpi_match_table = ACPI_PTR(pca9685_acpi_ids), 667 .of_match_table = of_match_ptr(pca9685_dt_ids), 668 .pm = &pca9685_pwm_pm, 669 }, 670 .probe = pca9685_pwm_probe, 671 .remove = pca9685_pwm_remove, 672 .id_table = pca9685_id, 673 }; 674 675 module_i2c_driver(pca9685_i2c_driver); 676 677 MODULE_AUTHOR("Steffen Trumtrar <s.trumtrar@pengutronix.de>"); 678 MODULE_DESCRIPTION("PWM driver for PCA9685"); 679 MODULE_LICENSE("GPL"); 680