1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Intel Low Power Subsystem PWM controller driver 4 * 5 * Copyright (C) 2014, Intel Corporation 6 * 7 * Derived from the original pwm-lpss.c 8 */ 9 10 #ifndef __PWM_LPSS_H 11 #define __PWM_LPSS_H 12 13 #include <linux/device.h> 14 #include <linux/pwm.h> 15 16 #define MAX_PWMS 4 17 18 struct pwm_lpss_chip { 19 struct pwm_chip chip; 20 void __iomem *regs; 21 const struct pwm_lpss_boardinfo *info; 22 }; 23 24 struct pwm_lpss_boardinfo { 25 unsigned long clk_rate; 26 unsigned int npwm; 27 unsigned long base_unit_bits; 28 /* 29 * Some versions of the IP may stuck in the state machine if enable 30 * bit is not set, and hence update bit will show busy status till 31 * the reset. For the rest it may be otherwise. 32 */ 33 bool bypass; 34 /* 35 * On some devices the _PS0/_PS3 AML code of the GPU (GFX0) device 36 * messes with the PWM0 controllers state, 37 */ 38 bool other_devices_aml_touches_pwm_regs; 39 }; 40 41 extern const struct pwm_lpss_boardinfo pwm_lpss_byt_info; 42 extern const struct pwm_lpss_boardinfo pwm_lpss_bsw_info; 43 extern const struct pwm_lpss_boardinfo pwm_lpss_bxt_info; 44 extern const struct pwm_lpss_boardinfo pwm_lpss_tng_info; 45 46 struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, void __iomem *base, 47 const struct pwm_lpss_boardinfo *info); 48 49 #endif /* __PWM_LPSS_H */ 50