1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2022 Richtek Technology Corp. 4 * 5 * Authors: Alina Yu <alina_yu@richtek.com> 6 * ChiYuan Huang <cy_huang@richtek.com> 7 */ 8 9 #include <linux/bits.h> 10 #include <linux/gpio/consumer.h> 11 #include <linux/i2c.h> 12 #include <linux/interrupt.h> 13 #include <linux/kstrtox.h> 14 #include <linux/linear_range.h> 15 #include <linux/mod_devicetable.h> 16 #include <linux/module.h> 17 #include <linux/mutex.h> 18 #include <linux/of.h> 19 #include <linux/power_supply.h> 20 #include <linux/regmap.h> 21 #include <linux/regulator/driver.h> 22 #include <linux/sysfs.h> 23 24 #define RT9471_REG_OTGCFG 0x00 25 #define RT9471_REG_TOP 0x01 26 #define RT9471_REG_FUNC 0x02 27 #define RT9471_REG_IBUS 0x03 28 #define RT9471_REG_VBUS 0x04 29 #define RT9471_REG_PRECHG 0x05 30 #define RT9471_REG_VCHG 0x07 31 #define RT9471_REG_ICHG 0x08 32 #define RT9471_REG_CHGTMR 0x09 33 #define RT9471_REG_EOC 0x0A 34 #define RT9471_REG_INFO 0x0B 35 #define RT9471_REG_JEITA 0x0C 36 #define RT9471_REG_PUMP_EXP 0x0D 37 #define RT9471_REG_DPDMDET 0x0E 38 #define RT9471_REG_ICSTAT 0x0F 39 #define RT9471_REG_STAT0 0x10 40 #define RT9471_REG_STAT1 0x11 41 #define RT9471_REG_STAT2 0x12 42 #define RT9471_REG_IRQ0 0x20 43 #define RT9471_REG_MASK0 0x30 44 45 #define RT9471_OTGCV_MASK GENMASK(7, 6) 46 #define RT9471_OTGCC_MASK BIT(0) 47 #define RT9471_OTGEN_MASK BIT(1) 48 #define RT9471_CHGFAULT_MASK GENMASK(4, 1) 49 50 #define RT9471_NUM_IRQ_REGS 4 51 #define RT9471_OTGCV_MINUV 4850000 52 #define RT9471_OTGCV_STEPUV 150000 53 #define RT9471_NUM_VOTG 4 54 #define RT9471_VCHG_MAXUV 4700000 55 #define RT9471_ICHG_MAXUA 3150000 56 57 /* Device ID */ 58 #define RT9470_DEVID 0x09 59 #define RT9470D_DEVID 0x0A 60 #define RT9471_DEVID 0x0D 61 #define RT9471D_DEVID 0x0E 62 63 /* IRQ number */ 64 #define RT9471_IRQ_BC12_DONE 0 65 #define RT9471_IRQ_DETACH 1 66 #define RT9471_IRQ_RECHG 2 67 #define RT9471_IRQ_CHG_DONE 3 68 #define RT9471_IRQ_BG_CHG 4 69 #define RT9471_IRQ_IE0C 5 70 #define RT9471_IRQ_CHG_RDY 6 71 #define RT9471_IRQ_VBUS_GD 7 72 #define RT9471_IRQ_CHG_BATOV 9 73 #define RT9471_IRQ_CHG_SYSOV 10 74 #define RT9471_IRQ_CHG_TOUT 11 75 #define RT9471_IRQ_CHG_BUSUV 12 76 #define RT9471_IRQ_CHG_THREG 13 77 #define RT9471_IRQ_CHG_AICR 14 78 #define RT9471_IRQ_CHG_MIVR 15 79 #define RT9471_IRQ_SYS_SHORT 16 80 #define RT9471_IRQ_SYS_MIN 17 81 #define RT9471_IRQ_AICC_DONE 18 82 #define RT9471_IRQ_PE_DONE 19 83 #define RT9471_IRQ_JEITA_COLD 20 84 #define RT9471_IRQ_JEITA_COOL 21 85 #define RT9471_IRQ_JEITA_WARM 22 86 #define RT9471_IRQ_JEITA_HOT 23 87 #define RT9471_IRQ_OTG_FAULT 24 88 #define RT9471_IRQ_OTG_LBP 25 89 #define RT9471_IRQ_OTG_CC 26 90 #define RT9471_IRQ_WDT 29 91 #define RT9471_IRQ_VAC_OV 30 92 #define RT9471_IRQ_OTP 31 93 94 enum rt9471_fields { 95 F_WDT = 0, 96 F_WDT_RST, 97 F_CHG_EN, 98 F_HZ, 99 F_BATFET_DIS, 100 F_AICR, 101 F_AICC_EN, 102 F_MIVR, 103 F_IPRE_CHG, 104 F_VPRE_CHG, 105 F_VBAT_REG, 106 F_ICHG_REG, 107 F_EOC_RST, 108 F_TE, 109 F_IEOC_CHG, 110 F_DEVICE_ID, 111 F_REG_RST, 112 F_BC12_EN, 113 F_IC_STAT, 114 F_PORT_STAT, 115 F_ST_CHG_DONE, 116 F_ST_CHG_RDY, 117 F_ST_VBUS_GD, 118 F_MAX_FIELDS 119 }; 120 121 enum rt9471_ranges { 122 RT9471_RANGE_AICR = 0, 123 RT9471_RANGE_MIVR, 124 RT9471_RANGE_IPRE, 125 RT9471_RANGE_VCHG, 126 RT9471_RANGE_ICHG, 127 RT9471_RANGE_IEOC, 128 RT9471_MAX_RANGES 129 }; 130 131 enum { 132 RT9471_PORTSTAT_APPLE_10W = 8, 133 RT9471_PORTSTAT_SAMSUNG_10W, 134 RT9471_PORTSTAT_APPLE_5W, 135 RT9471_PORTSTAT_APPLE_12W, 136 RT9471_PORTSTAT_NSTD, 137 RT9471_PORTSTAT_SDP, 138 RT9471_PORTSTAT_CDP, 139 RT9471_PORTSTAT_DCP, 140 }; 141 142 enum { 143 RT9471_ICSTAT_SLEEP = 0, 144 RT9471_ICSTAT_VBUSRDY, 145 RT9471_ICSTAT_TRICKLECHG, 146 RT9471_ICSTAT_PRECHG, 147 RT9471_ICSTAT_FASTCHG, 148 RT9471_ICSTAT_IEOC, 149 RT9471_ICSTAT_BGCHG, 150 RT9471_ICSTAT_CHGDONE, 151 RT9471_ICSTAT_CHGFAULT, 152 RT9471_ICSTAT_OTG = 15, 153 }; 154 155 struct rt9471_chip { 156 struct device *dev; 157 struct regmap *regmap; 158 struct regmap_field *rm_fields[F_MAX_FIELDS]; 159 struct regmap_irq_chip_data *irq_chip_data; 160 struct regulator_dev *otg_rdev; 161 struct power_supply *psy; 162 struct power_supply_desc psy_desc; 163 struct mutex var_lock; 164 enum power_supply_usb_type psy_usb_type; 165 int psy_usb_curr; 166 }; 167 168 static const struct reg_field rt9471_reg_fields[F_MAX_FIELDS] = { 169 [F_WDT] = REG_FIELD(RT9471_REG_TOP, 0, 1), 170 [F_WDT_RST] = REG_FIELD(RT9471_REG_TOP, 2, 2), 171 [F_CHG_EN] = REG_FIELD(RT9471_REG_FUNC, 0, 0), 172 [F_HZ] = REG_FIELD(RT9471_REG_FUNC, 5, 5), 173 [F_BATFET_DIS] = REG_FIELD(RT9471_REG_FUNC, 7, 7), 174 [F_AICR] = REG_FIELD(RT9471_REG_IBUS, 0, 5), 175 [F_AICC_EN] = REG_FIELD(RT9471_REG_IBUS, 7, 7), 176 [F_MIVR] = REG_FIELD(RT9471_REG_VBUS, 0, 3), 177 [F_IPRE_CHG] = REG_FIELD(RT9471_REG_PRECHG, 0, 3), 178 [F_VPRE_CHG] = REG_FIELD(RT9471_REG_PRECHG, 4, 6), 179 [F_VBAT_REG] = REG_FIELD(RT9471_REG_VCHG, 0, 6), 180 [F_ICHG_REG] = REG_FIELD(RT9471_REG_ICHG, 0, 5), 181 [F_EOC_RST] = REG_FIELD(RT9471_REG_EOC, 0, 0), 182 [F_TE] = REG_FIELD(RT9471_REG_EOC, 1, 1), 183 [F_IEOC_CHG] = REG_FIELD(RT9471_REG_EOC, 4, 7), 184 [F_DEVICE_ID] = REG_FIELD(RT9471_REG_INFO, 3, 6), 185 [F_REG_RST] = REG_FIELD(RT9471_REG_INFO, 7, 7), 186 [F_BC12_EN] = REG_FIELD(RT9471_REG_DPDMDET, 7, 7), 187 [F_IC_STAT] = REG_FIELD(RT9471_REG_ICSTAT, 0, 3), 188 [F_PORT_STAT] = REG_FIELD(RT9471_REG_ICSTAT, 4, 7), 189 [F_ST_CHG_DONE] = REG_FIELD(RT9471_REG_STAT0, 3, 3), 190 [F_ST_CHG_RDY] = REG_FIELD(RT9471_REG_STAT0, 6, 6), 191 [F_ST_VBUS_GD] = REG_FIELD(RT9471_REG_STAT0, 7, 7), 192 }; 193 194 static const struct linear_range rt9471_chg_ranges[RT9471_MAX_RANGES] = { 195 [RT9471_RANGE_AICR] = { .min = 50000, .min_sel = 1, .max_sel = 63, .step = 50000 }, 196 [RT9471_RANGE_MIVR] = { .min = 3900000, .min_sel = 0, .max_sel = 15, .step = 100000 }, 197 [RT9471_RANGE_IPRE] = { .min = 50000, .min_sel = 0, .max_sel = 15, .step = 50000 }, 198 [RT9471_RANGE_VCHG] = { .min = 3900000, .min_sel = 0, .max_sel = 80, .step = 10000 }, 199 [RT9471_RANGE_ICHG] = { .min = 0, .min_sel = 0, .max_sel = 63, .step = 50000 }, 200 [RT9471_RANGE_IEOC] = { .min = 50000, .min_sel = 0, .max_sel = 15, .step = 50000 }, 201 }; 202 203 static int rt9471_set_value_by_field_range(struct rt9471_chip *chip, 204 enum rt9471_fields field, 205 enum rt9471_ranges range, int val) 206 { 207 unsigned int sel; 208 209 if (val < 0) 210 return -EINVAL; 211 212 linear_range_get_selector_within(rt9471_chg_ranges + range, val, &sel); 213 214 return regmap_field_write(chip->rm_fields[field], sel); 215 } 216 217 218 static int rt9471_get_value_by_field_range(struct rt9471_chip *chip, 219 enum rt9471_fields field, 220 enum rt9471_ranges range, int *val) 221 { 222 unsigned int sel, rvalue; 223 int ret; 224 225 ret = regmap_field_read(chip->rm_fields[field], &sel); 226 if (ret) 227 return ret; 228 229 ret = linear_range_get_value(rt9471_chg_ranges + range, sel, &rvalue); 230 if (ret) 231 return ret; 232 233 *val = rvalue; 234 return 0; 235 } 236 237 static int rt9471_set_ieoc(struct rt9471_chip *chip, int microamp) 238 { 239 int ret; 240 241 if (microamp == 0) 242 return regmap_field_write(chip->rm_fields[F_TE], 0); 243 244 ret = rt9471_set_value_by_field_range(chip, F_IEOC_CHG, RT9471_RANGE_IEOC, microamp); 245 if (ret) 246 return ret; 247 248 /* After applying the new IEOC value, enable charge termination */ 249 return regmap_field_write(chip->rm_fields[F_TE], 1); 250 } 251 252 static int rt9471_get_ieoc(struct rt9471_chip *chip, int *microamp) 253 { 254 unsigned int chg_term_enable; 255 int ret; 256 257 ret = regmap_field_read(chip->rm_fields[F_TE], &chg_term_enable); 258 if (ret) 259 return ret; 260 261 if (!chg_term_enable) { 262 *microamp = 0; 263 return 0; 264 } 265 266 return rt9471_get_value_by_field_range(chip, F_IEOC_CHG, RT9471_RANGE_IEOC, microamp); 267 } 268 269 static int rt9471_get_status(struct rt9471_chip *chip, int *status) 270 { 271 unsigned int ic_stat; 272 int ret; 273 274 ret = regmap_field_read(chip->rm_fields[F_IC_STAT], &ic_stat); 275 if (ret) 276 return ret; 277 278 switch (ic_stat) { 279 case RT9471_ICSTAT_VBUSRDY: 280 case RT9471_ICSTAT_CHGFAULT: 281 *status = POWER_SUPPLY_STATUS_NOT_CHARGING; 282 break; 283 case RT9471_ICSTAT_TRICKLECHG ... RT9471_ICSTAT_BGCHG: 284 *status = POWER_SUPPLY_STATUS_CHARGING; 285 break; 286 case RT9471_ICSTAT_CHGDONE: 287 *status = POWER_SUPPLY_STATUS_FULL; 288 break; 289 case RT9471_ICSTAT_SLEEP: 290 case RT9471_ICSTAT_OTG: 291 *status = POWER_SUPPLY_STATUS_DISCHARGING; 292 break; 293 default: 294 *status = POWER_SUPPLY_STATUS_UNKNOWN; 295 break; 296 } 297 298 return 0; 299 } 300 301 static int rt9471_get_vbus_good(struct rt9471_chip *chip, int *stat) 302 { 303 unsigned int vbus_gd; 304 int ret; 305 306 ret = regmap_field_read(chip->rm_fields[F_ST_VBUS_GD], &vbus_gd); 307 if (ret) 308 return ret; 309 310 *stat = vbus_gd; 311 return 0; 312 } 313 314 static int rt9471_get_usb_type(struct rt9471_chip *chip, int *usb_type) 315 { 316 mutex_lock(&chip->var_lock); 317 *usb_type = chip->psy_usb_type; 318 mutex_unlock(&chip->var_lock); 319 320 return 0; 321 } 322 323 static int rt9471_get_usb_type_current(struct rt9471_chip *chip, 324 int *microamp) 325 { 326 mutex_lock(&chip->var_lock); 327 *microamp = chip->psy_usb_curr; 328 mutex_unlock(&chip->var_lock); 329 330 return 0; 331 } 332 333 static enum power_supply_property rt9471_charger_properties[] = { 334 POWER_SUPPLY_PROP_STATUS, 335 POWER_SUPPLY_PROP_ONLINE, 336 POWER_SUPPLY_PROP_CURRENT_MAX, 337 POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT, 338 POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX, 339 POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE, 340 POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX, 341 POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT, 342 POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT, 343 POWER_SUPPLY_PROP_USB_TYPE, 344 POWER_SUPPLY_PROP_PRECHARGE_CURRENT, 345 POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT, 346 POWER_SUPPLY_PROP_MODEL_NAME, 347 POWER_SUPPLY_PROP_MANUFACTURER, 348 }; 349 350 static int rt9471_charger_property_is_writeable(struct power_supply *psy, 351 enum power_supply_property psp) 352 { 353 switch (psp) { 354 case POWER_SUPPLY_PROP_STATUS: 355 case POWER_SUPPLY_PROP_ONLINE: 356 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: 357 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE: 358 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: 359 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT: 360 case POWER_SUPPLY_PROP_PRECHARGE_CURRENT: 361 case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT: 362 return 1; 363 default: 364 return 0; 365 } 366 } 367 368 static int rt9471_charger_set_property(struct power_supply *psy, 369 enum power_supply_property psp, 370 const union power_supply_propval *val) 371 { 372 struct rt9471_chip *chip = power_supply_get_drvdata(psy); 373 int value = val->intval; 374 375 switch (psp) { 376 case POWER_SUPPLY_PROP_STATUS: 377 return regmap_field_write(chip->rm_fields[F_CHG_EN], !!value); 378 case POWER_SUPPLY_PROP_ONLINE: 379 return regmap_field_write(chip->rm_fields[F_HZ], !value); 380 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: 381 return rt9471_set_value_by_field_range(chip, F_ICHG_REG, RT9471_RANGE_ICHG, value); 382 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE: 383 return rt9471_set_value_by_field_range(chip, F_VBAT_REG, RT9471_RANGE_VCHG, value); 384 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: 385 return rt9471_set_value_by_field_range(chip, F_AICR, RT9471_RANGE_AICR, value); 386 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT: 387 return rt9471_set_value_by_field_range(chip, F_MIVR, RT9471_RANGE_MIVR, value); 388 case POWER_SUPPLY_PROP_PRECHARGE_CURRENT: 389 return rt9471_set_value_by_field_range(chip, F_IPRE_CHG, RT9471_RANGE_IPRE, value); 390 case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT: 391 return rt9471_set_ieoc(chip, val->intval); 392 default: 393 return -EINVAL; 394 } 395 } 396 397 static const char * const rt9471_manufacturer = "Richtek Technology Corp."; 398 static const char * const rt9471_model = "RT9471"; 399 400 static int rt9471_charger_get_property(struct power_supply *psy, 401 enum power_supply_property psp, 402 union power_supply_propval *val) 403 { 404 struct rt9471_chip *chip = power_supply_get_drvdata(psy); 405 int *pvalue = &val->intval; 406 407 switch (psp) { 408 case POWER_SUPPLY_PROP_STATUS: 409 return rt9471_get_status(chip, pvalue); 410 case POWER_SUPPLY_PROP_ONLINE: 411 return rt9471_get_vbus_good(chip, pvalue); 412 case POWER_SUPPLY_PROP_CURRENT_MAX: 413 return rt9471_get_usb_type_current(chip, pvalue); 414 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: 415 return rt9471_get_value_by_field_range(chip, F_ICHG_REG, RT9471_RANGE_ICHG, pvalue); 416 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX: 417 *pvalue = RT9471_ICHG_MAXUA; 418 return 0; 419 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE: 420 return rt9471_get_value_by_field_range(chip, F_VBAT_REG, RT9471_RANGE_VCHG, pvalue); 421 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX: 422 val->intval = RT9471_VCHG_MAXUV; 423 return 0; 424 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: 425 return rt9471_get_value_by_field_range(chip, F_AICR, RT9471_RANGE_AICR, pvalue); 426 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT: 427 return rt9471_get_value_by_field_range(chip, F_MIVR, RT9471_RANGE_MIVR, pvalue); 428 case POWER_SUPPLY_PROP_USB_TYPE: 429 return rt9471_get_usb_type(chip, pvalue); 430 case POWER_SUPPLY_PROP_PRECHARGE_CURRENT: 431 return rt9471_get_value_by_field_range(chip, F_IPRE_CHG, RT9471_RANGE_IPRE, pvalue); 432 case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT: 433 return rt9471_get_ieoc(chip, pvalue); 434 case POWER_SUPPLY_PROP_MODEL_NAME: 435 val->strval = rt9471_model; 436 return 0; 437 case POWER_SUPPLY_PROP_MANUFACTURER: 438 val->strval = rt9471_manufacturer; 439 return 0; 440 default: 441 return -ENODATA; 442 } 443 } 444 445 static irqreturn_t rt9471_vbus_gd_handler(int irqno, void *devid) 446 { 447 struct rt9471_chip *chip = devid; 448 449 power_supply_changed(chip->psy); 450 451 return IRQ_HANDLED; 452 } 453 454 static irqreturn_t rt9471_detach_handler(int irqno, void *devid) 455 { 456 struct rt9471_chip *chip = devid; 457 unsigned int vbus_gd; 458 int ret; 459 460 ret = regmap_field_read(chip->rm_fields[F_ST_VBUS_GD], &vbus_gd); 461 if (ret) 462 return IRQ_NONE; 463 464 /* Only focus on really detached */ 465 if (vbus_gd) 466 return IRQ_HANDLED; 467 468 mutex_lock(&chip->var_lock); 469 chip->psy_usb_type = POWER_SUPPLY_USB_TYPE_UNKNOWN; 470 chip->psy_usb_curr = 0; 471 mutex_unlock(&chip->var_lock); 472 473 power_supply_changed(chip->psy); 474 475 return IRQ_HANDLED; 476 } 477 478 static irqreturn_t rt9471_bc12_done_handler(int irqno, void *devid) 479 { 480 struct rt9471_chip *chip = devid; 481 enum power_supply_usb_type usb_type; 482 unsigned int port_stat; 483 int usb_curr, ret; 484 485 ret = regmap_field_read(chip->rm_fields[F_PORT_STAT], &port_stat); 486 if (ret) 487 return IRQ_NONE; 488 489 switch (port_stat) { 490 case RT9471_PORTSTAT_APPLE_10W: 491 usb_type = POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID; 492 usb_curr = 2000000; 493 break; 494 case RT9471_PORTSTAT_APPLE_5W: 495 usb_type = POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID; 496 usb_curr = 1000000; 497 break; 498 case RT9471_PORTSTAT_APPLE_12W: 499 usb_type = POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID; 500 usb_curr = 2400000; 501 break; 502 case RT9471_PORTSTAT_SAMSUNG_10W: 503 usb_type = POWER_SUPPLY_USB_TYPE_DCP; 504 usb_curr = 2000000; 505 break; 506 case RT9471_PORTSTAT_DCP: 507 usb_type = POWER_SUPPLY_USB_TYPE_DCP; 508 usb_curr = 1500000; 509 break; 510 case RT9471_PORTSTAT_NSTD: 511 case RT9471_PORTSTAT_SDP: 512 usb_type = POWER_SUPPLY_USB_TYPE_SDP; 513 usb_curr = 500000; 514 break; 515 case RT9471_PORTSTAT_CDP: 516 usb_type = POWER_SUPPLY_USB_TYPE_CDP; 517 usb_curr = 1500000; 518 break; 519 default: 520 usb_type = POWER_SUPPLY_USB_TYPE_UNKNOWN; 521 usb_curr = 0; 522 break; 523 } 524 525 mutex_lock(&chip->var_lock); 526 chip->psy_usb_type = usb_type; 527 chip->psy_usb_curr = usb_curr; 528 mutex_unlock(&chip->var_lock); 529 530 power_supply_changed(chip->psy); 531 532 return IRQ_HANDLED; 533 } 534 535 static irqreturn_t rt9471_wdt_handler(int irqno, void *devid) 536 { 537 struct rt9471_chip *chip = devid; 538 int ret; 539 540 ret = regmap_field_write(chip->rm_fields[F_WDT_RST], 1); 541 542 return ret ? IRQ_NONE : IRQ_HANDLED; 543 } 544 545 static irqreturn_t rt9471_otg_fault_handler(int irqno, void *devid) 546 { 547 struct rt9471_chip *chip = devid; 548 549 regulator_notifier_call_chain(chip->otg_rdev, REGULATOR_EVENT_FAIL, NULL); 550 551 return IRQ_HANDLED; 552 } 553 554 #define RT9471_IRQ_DESC(_name, _hwirq) \ 555 { \ 556 .name = #_name, \ 557 .hwirq = _hwirq, \ 558 .handler = rt9471_##_name##_handler, \ 559 } 560 561 static int rt9471_register_interrupts(struct rt9471_chip *chip) 562 { 563 struct device *dev = chip->dev; 564 static const struct { 565 char *name; 566 int hwirq; 567 irq_handler_t handler; 568 } chg_irqs[] = { 569 RT9471_IRQ_DESC(vbus_gd, RT9471_IRQ_VBUS_GD), 570 RT9471_IRQ_DESC(detach, RT9471_IRQ_DETACH), 571 RT9471_IRQ_DESC(bc12_done, RT9471_IRQ_BC12_DONE), 572 RT9471_IRQ_DESC(wdt, RT9471_IRQ_WDT), 573 RT9471_IRQ_DESC(otg_fault, RT9471_IRQ_OTG_FAULT), 574 }, *curr; 575 int i, virq, ret; 576 577 for (i = 0; i < ARRAY_SIZE(chg_irqs); i++) { 578 curr = chg_irqs + i; 579 580 virq = regmap_irq_get_virq(chip->irq_chip_data, curr->hwirq); 581 if (virq <= 0) 582 return virq; 583 584 ret = devm_request_threaded_irq(dev, virq, NULL, curr->handler, 585 IRQF_ONESHOT, curr->name, chip); 586 if (ret) 587 return dev_err_probe(dev, ret, "Failed to register IRQ (%s)\n", 588 curr->name); 589 } 590 591 return 0; 592 } 593 594 static const struct regulator_ops rt9471_otg_ops = { 595 .enable = regulator_enable_regmap, 596 .disable = regulator_disable_regmap, 597 .is_enabled = regulator_is_enabled_regmap, 598 .list_voltage = regulator_list_voltage_linear, 599 .get_voltage_sel = regulator_get_voltage_sel_regmap, 600 .set_voltage_sel = regulator_set_voltage_sel_regmap, 601 .set_current_limit = regulator_set_current_limit_regmap, 602 .get_current_limit = regulator_get_current_limit_regmap, 603 }; 604 605 static const unsigned int rt9471_otg_microamp[] = { 500000, 1200000, }; 606 607 static const struct regulator_desc rt9471_otg_rdesc = { 608 .of_match = of_match_ptr("usb-otg-vbus-regulator"), 609 .name = "rt9471-otg-vbus", 610 .owner = THIS_MODULE, 611 .type = REGULATOR_VOLTAGE, 612 .ops = &rt9471_otg_ops, 613 .min_uV = RT9471_OTGCV_MINUV, 614 .uV_step = RT9471_OTGCV_STEPUV, 615 .n_voltages = RT9471_NUM_VOTG, 616 .curr_table = rt9471_otg_microamp, 617 .n_current_limits = ARRAY_SIZE(rt9471_otg_microamp), 618 .enable_mask = RT9471_OTGEN_MASK, 619 .enable_reg = RT9471_REG_FUNC, 620 .vsel_reg = RT9471_REG_OTGCFG, 621 .vsel_mask = RT9471_OTGCV_MASK, 622 .csel_reg = RT9471_REG_OTGCFG, 623 .csel_mask = RT9471_OTGCC_MASK, 624 }; 625 626 static int rt9471_register_otg_regulator(struct rt9471_chip *chip) 627 { 628 struct device *dev = chip->dev; 629 struct regulator_config cfg = { .dev = dev, .driver_data = chip }; 630 631 chip->otg_rdev = devm_regulator_register(dev, &rt9471_otg_rdesc, &cfg); 632 633 return PTR_ERR_OR_ZERO(chip->otg_rdev); 634 } 635 636 static inline struct rt9471_chip *psy_device_to_chip(struct device *dev) 637 { 638 return power_supply_get_drvdata(to_power_supply(dev)); 639 } 640 641 static ssize_t sysoff_enable_show(struct device *dev, 642 struct device_attribute *attr, char *buf) 643 { 644 struct rt9471_chip *chip = psy_device_to_chip(dev); 645 unsigned int sysoff_enable; 646 int ret; 647 648 ret = regmap_field_read(chip->rm_fields[F_BATFET_DIS], &sysoff_enable); 649 if (ret) 650 return ret; 651 652 return sysfs_emit(buf, "%d\n", sysoff_enable); 653 } 654 655 static ssize_t sysoff_enable_store(struct device *dev, 656 struct device_attribute *attr, 657 const char *buf, size_t count) 658 { 659 struct rt9471_chip *chip = psy_device_to_chip(dev); 660 unsigned int tmp; 661 int ret; 662 663 ret = kstrtouint(buf, 10, &tmp); 664 if (ret) 665 return ret; 666 667 ret = regmap_field_write(chip->rm_fields[F_BATFET_DIS], !!tmp); 668 if (ret) 669 return ret; 670 671 return count; 672 } 673 674 static ssize_t port_detect_enable_show(struct device *dev, 675 struct device_attribute *attr, char *buf) 676 { 677 struct rt9471_chip *chip = psy_device_to_chip(dev); 678 unsigned int bc12_enable; 679 int ret; 680 681 ret = regmap_field_read(chip->rm_fields[F_BC12_EN], &bc12_enable); 682 if (ret) 683 return ret; 684 685 return sysfs_emit(buf, "%d\n", bc12_enable); 686 } 687 688 static ssize_t port_detect_enable_store(struct device *dev, 689 struct device_attribute *attr, 690 const char *buf, size_t count) 691 { 692 struct rt9471_chip *chip = psy_device_to_chip(dev); 693 unsigned int tmp; 694 int ret; 695 696 ret = kstrtouint(buf, 10, &tmp); 697 if (ret) 698 return ret; 699 700 ret = regmap_field_write(chip->rm_fields[F_BC12_EN], !!tmp); 701 if (ret) 702 return ret; 703 704 return count; 705 } 706 707 static DEVICE_ATTR_RW(sysoff_enable); 708 static DEVICE_ATTR_RW(port_detect_enable); 709 710 static struct attribute *rt9471_sysfs_attrs[] = { 711 &dev_attr_sysoff_enable.attr, 712 &dev_attr_port_detect_enable.attr, 713 NULL 714 }; 715 716 ATTRIBUTE_GROUPS(rt9471_sysfs); 717 718 static int rt9471_register_psy(struct rt9471_chip *chip) 719 { 720 struct device *dev = chip->dev; 721 struct power_supply_desc *desc = &chip->psy_desc; 722 struct power_supply_config cfg = {}; 723 char *psy_name; 724 725 cfg.drv_data = chip; 726 cfg.of_node = dev->of_node; 727 cfg.attr_grp = rt9471_sysfs_groups; 728 729 psy_name = devm_kasprintf(dev, GFP_KERNEL, "rt9471-%s", dev_name(dev)); 730 if (!psy_name) 731 return -ENOMEM; 732 733 desc->name = psy_name; 734 desc->type = POWER_SUPPLY_TYPE_USB; 735 desc->usb_types = BIT(POWER_SUPPLY_USB_TYPE_SDP) | 736 BIT(POWER_SUPPLY_USB_TYPE_CDP) | 737 BIT(POWER_SUPPLY_USB_TYPE_DCP) | 738 BIT(POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID) | 739 BIT(POWER_SUPPLY_USB_TYPE_UNKNOWN); 740 desc->properties = rt9471_charger_properties; 741 desc->num_properties = ARRAY_SIZE(rt9471_charger_properties); 742 desc->get_property = rt9471_charger_get_property; 743 desc->set_property = rt9471_charger_set_property; 744 desc->property_is_writeable = rt9471_charger_property_is_writeable; 745 746 chip->psy = devm_power_supply_register(dev, desc, &cfg); 747 748 return PTR_ERR_OR_ZERO(chip->psy); 749 } 750 751 static const struct regmap_irq rt9471_regmap_irqs[] = { 752 REGMAP_IRQ_REG_LINE(RT9471_IRQ_BC12_DONE, 8), 753 REGMAP_IRQ_REG_LINE(RT9471_IRQ_DETACH, 8), 754 REGMAP_IRQ_REG_LINE(RT9471_IRQ_RECHG, 8), 755 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_DONE, 8), 756 REGMAP_IRQ_REG_LINE(RT9471_IRQ_BG_CHG, 8), 757 REGMAP_IRQ_REG_LINE(RT9471_IRQ_IE0C, 8), 758 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_RDY, 8), 759 REGMAP_IRQ_REG_LINE(RT9471_IRQ_VBUS_GD, 8), 760 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_BATOV, 8), 761 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_SYSOV, 8), 762 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_TOUT, 8), 763 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_BUSUV, 8), 764 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_THREG, 8), 765 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_AICR, 8), 766 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_MIVR, 8), 767 REGMAP_IRQ_REG_LINE(RT9471_IRQ_SYS_SHORT, 8), 768 REGMAP_IRQ_REG_LINE(RT9471_IRQ_SYS_MIN, 8), 769 REGMAP_IRQ_REG_LINE(RT9471_IRQ_AICC_DONE, 8), 770 REGMAP_IRQ_REG_LINE(RT9471_IRQ_PE_DONE, 8), 771 REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_COLD, 8), 772 REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_COOL, 8), 773 REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_WARM, 8), 774 REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_HOT, 8), 775 REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTG_FAULT, 8), 776 REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTG_LBP, 8), 777 REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTG_CC, 8), 778 REGMAP_IRQ_REG_LINE(RT9471_IRQ_WDT, 8), 779 REGMAP_IRQ_REG_LINE(RT9471_IRQ_VAC_OV, 8), 780 REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTP, 8), 781 }; 782 783 static const struct regmap_irq_chip rt9471_irq_chip = { 784 .name = "rt9471-irqs", 785 .status_base = RT9471_REG_IRQ0, 786 .mask_base = RT9471_REG_MASK0, 787 .num_regs = RT9471_NUM_IRQ_REGS, 788 .irqs = rt9471_regmap_irqs, 789 .num_irqs = ARRAY_SIZE(rt9471_regmap_irqs), 790 }; 791 792 static const struct reg_sequence rt9471_init_regs[] = { 793 REG_SEQ0(RT9471_REG_INFO, 0x80), /* REG_RST */ 794 REG_SEQ0(RT9471_REG_TOP, 0xC0), /* WDT = 0 */ 795 REG_SEQ0(RT9471_REG_FUNC, 0x01), /* BATFET_DIS_DLY = 0 */ 796 REG_SEQ0(RT9471_REG_IBUS, 0x0A), /* AUTO_AICR = 0 */ 797 REG_SEQ0(RT9471_REG_VBUS, 0xC6), /* VAC_OVP = 14V */ 798 REG_SEQ0(RT9471_REG_JEITA, 0x38), /* JEITA = 0 */ 799 REG_SEQ0(RT9471_REG_DPDMDET, 0x31), /* BC12_EN = 0, DCP_DP_OPT = 1 */ 800 }; 801 802 static int rt9471_check_devinfo(struct rt9471_chip *chip) 803 { 804 struct device *dev = chip->dev; 805 unsigned int dev_id; 806 int ret; 807 808 ret = regmap_field_read(chip->rm_fields[F_DEVICE_ID], &dev_id); 809 if (ret) 810 return dev_err_probe(dev, ret, "Failed to read device_id\n"); 811 812 switch (dev_id) { 813 case RT9470_DEVID: 814 case RT9470D_DEVID: 815 case RT9471_DEVID: 816 case RT9471D_DEVID: 817 return 0; 818 default: 819 return dev_err_probe(dev, -ENODEV, "Incorrect device id\n"); 820 } 821 } 822 823 static bool rt9471_accessible_reg(struct device *dev, unsigned int reg) 824 { 825 switch (reg) { 826 case 0x00 ... 0x0F: 827 case 0x10 ... 0x13: 828 case 0x20 ... 0x33: 829 case 0x40 ... 0xA1: 830 return true; 831 default: 832 return false; 833 } 834 } 835 836 static const struct regmap_config rt9471_regmap_config = { 837 .reg_bits = 8, 838 .val_bits = 8, 839 .max_register = 0xA1, 840 .writeable_reg = rt9471_accessible_reg, 841 .readable_reg = rt9471_accessible_reg, 842 }; 843 844 static int rt9471_probe(struct i2c_client *i2c) 845 { 846 struct device *dev = &i2c->dev; 847 struct rt9471_chip *chip; 848 struct gpio_desc *ce_gpio; 849 struct regmap *regmap; 850 int ret; 851 852 chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); 853 if (!chip) 854 return -ENOMEM; 855 856 chip->dev = dev; 857 mutex_init(&chip->var_lock); 858 i2c_set_clientdata(i2c, chip); 859 860 /* Default pull charge enable gpio to make 'CHG_EN' by SW control only */ 861 ce_gpio = devm_gpiod_get_optional(dev, "charge-enable", GPIOD_OUT_HIGH); 862 if (IS_ERR(ce_gpio)) 863 return dev_err_probe(dev, PTR_ERR(ce_gpio), 864 "Failed to config charge enable gpio\n"); 865 866 regmap = devm_regmap_init_i2c(i2c, &rt9471_regmap_config); 867 if (IS_ERR(regmap)) 868 return dev_err_probe(dev, PTR_ERR(regmap), "Failed to init regmap\n"); 869 870 chip->regmap = regmap; 871 872 ret = devm_regmap_field_bulk_alloc(dev, regmap, chip->rm_fields, 873 rt9471_reg_fields, 874 ARRAY_SIZE(rt9471_reg_fields)); 875 if (ret) 876 return dev_err_probe(dev, ret, "Failed to alloc regmap field\n"); 877 878 ret = rt9471_check_devinfo(chip); 879 if (ret) 880 return ret; 881 882 ret = regmap_register_patch(regmap, rt9471_init_regs, 883 ARRAY_SIZE(rt9471_init_regs)); 884 if (ret) 885 return dev_err_probe(dev, ret, "Failed to init registers\n"); 886 887 ret = devm_regmap_add_irq_chip(dev, regmap, i2c->irq, 888 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 0, 889 &rt9471_irq_chip, &chip->irq_chip_data); 890 if (ret) 891 return dev_err_probe(dev, ret, "Failed to add IRQ chip\n"); 892 893 ret = rt9471_register_psy(chip); 894 if (ret) 895 return dev_err_probe(dev, ret, "Failed to register psy\n"); 896 897 ret = rt9471_register_otg_regulator(chip); 898 if (ret) 899 return dev_err_probe(dev, ret, "Failed to register otg\n"); 900 901 ret = rt9471_register_interrupts(chip); 902 if (ret) 903 return ret; 904 905 /* After IRQs are all initialized, enable port detection by default */ 906 return regmap_field_write(chip->rm_fields[F_BC12_EN], 1); 907 } 908 909 static void rt9471_shutdown(struct i2c_client *i2c) 910 { 911 struct rt9471_chip *chip = i2c_get_clientdata(i2c); 912 913 /* 914 * There's no external reset pin. Do register reset to guarantee charger 915 * function is normal after shutdown 916 */ 917 regmap_field_write(chip->rm_fields[F_REG_RST], 1); 918 } 919 920 static const struct of_device_id rt9471_of_device_id[] = { 921 { .compatible = "richtek,rt9471" }, 922 {} 923 }; 924 MODULE_DEVICE_TABLE(of, rt9471_of_device_id); 925 926 static struct i2c_driver rt9471_driver = { 927 .driver = { 928 .name = "rt9471", 929 .of_match_table = rt9471_of_device_id, 930 }, 931 .probe = rt9471_probe, 932 .shutdown = rt9471_shutdown, 933 }; 934 module_i2c_driver(rt9471_driver); 935 936 MODULE_DESCRIPTION("Richtek RT9471 charger driver"); 937 MODULE_AUTHOR("Alina Yu <alina_yu@richtek.com>"); 938 MODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>"); 939 MODULE_LICENSE("GPL"); 940