1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * This file contains quirk handling code for PnP devices 4 * Some devices do not report all their resources, and need to have extra 5 * resources added. This is most easily accomplished at initialisation time 6 * when building up the resource structure for the first time. 7 * 8 * Copyright (c) 2000 Peter Denison <peterd@pnd-pc.demon.co.uk> 9 * Copyright (C) 2008 Hewlett-Packard Development Company, L.P. 10 * Bjorn Helgaas <bjorn.helgaas@hp.com> 11 * 12 * Heavily based on PCI quirks handling which is 13 * 14 * Copyright (c) 1999 Martin Mares <mj@ucw.cz> 15 */ 16 17 #include <linux/types.h> 18 #include <linux/kernel.h> 19 #include <linux/pci.h> 20 #include <linux/string.h> 21 #include <linux/slab.h> 22 #include <linux/pnp.h> 23 #include <linux/io.h> 24 #include "base.h" 25 26 static void quirk_awe32_add_ports(struct pnp_dev *dev, 27 struct pnp_option *option, 28 unsigned int offset) 29 { 30 struct pnp_option *new_option; 31 32 new_option = kmalloc_obj(struct pnp_option); 33 if (!new_option) { 34 dev_err(&dev->dev, "couldn't add ioport region to option set " 35 "%d\n", pnp_option_set(option)); 36 return; 37 } 38 39 *new_option = *option; 40 new_option->u.port.min += offset; 41 new_option->u.port.max += offset; 42 list_add(&new_option->list, &option->list); 43 44 dev_info(&dev->dev, "added ioport region %#llx-%#llx to set %d\n", 45 (unsigned long long) new_option->u.port.min, 46 (unsigned long long) new_option->u.port.max, 47 pnp_option_set(option)); 48 } 49 50 static void quirk_awe32_resources(struct pnp_dev *dev) 51 { 52 struct pnp_option *option; 53 unsigned int set = ~0; 54 55 /* 56 * Add two extra ioport regions (at offset 0x400 and 0x800 from the 57 * one given) to every dependent option set. 58 */ 59 list_for_each_entry(option, &dev->options, list) { 60 if (pnp_option_is_dependent(option) && 61 pnp_option_set(option) != set) { 62 set = pnp_option_set(option); 63 quirk_awe32_add_ports(dev, option, 0x800); 64 quirk_awe32_add_ports(dev, option, 0x400); 65 } 66 } 67 } 68 69 static void quirk_cmi8330_resources(struct pnp_dev *dev) 70 { 71 struct pnp_option *option; 72 struct pnp_irq *irq; 73 struct pnp_dma *dma; 74 75 list_for_each_entry(option, &dev->options, list) { 76 if (!pnp_option_is_dependent(option)) 77 continue; 78 79 if (option->type == IORESOURCE_IRQ) { 80 irq = &option->u.irq; 81 bitmap_zero(irq->map.bits, PNP_IRQ_NR); 82 __set_bit(5, irq->map.bits); 83 __set_bit(7, irq->map.bits); 84 __set_bit(10, irq->map.bits); 85 dev_info(&dev->dev, "set possible IRQs in " 86 "option set %d to 5, 7, 10\n", 87 pnp_option_set(option)); 88 } else if (option->type == IORESOURCE_DMA) { 89 dma = &option->u.dma; 90 if ((dma->flags & IORESOURCE_DMA_TYPE_MASK) == 91 IORESOURCE_DMA_8BIT && 92 dma->map != 0x0A) { 93 dev_info(&dev->dev, "changing possible " 94 "DMA channel mask in option set %d " 95 "from %#02x to 0x0A (1, 3)\n", 96 pnp_option_set(option), dma->map); 97 dma->map = 0x0A; 98 } 99 } 100 } 101 } 102 103 static void quirk_sb16audio_resources(struct pnp_dev *dev) 104 { 105 struct pnp_option *option; 106 unsigned int prev_option_flags = ~0, n = 0; 107 struct pnp_port *port; 108 109 /* 110 * The default range on the OPL port for these devices is 0x388-0x388. 111 * Here we increase that range so that two such cards can be 112 * auto-configured. 113 */ 114 list_for_each_entry(option, &dev->options, list) { 115 if (prev_option_flags != option->flags) { 116 prev_option_flags = option->flags; 117 n = 0; 118 } 119 120 if (pnp_option_is_dependent(option) && 121 option->type == IORESOURCE_IO) { 122 n++; 123 port = &option->u.port; 124 if (n == 3 && port->min == port->max) { 125 port->max += 0x70; 126 dev_info(&dev->dev, "increased option port " 127 "range from %#llx-%#llx to " 128 "%#llx-%#llx\n", 129 (unsigned long long) port->min, 130 (unsigned long long) port->min, 131 (unsigned long long) port->min, 132 (unsigned long long) port->max); 133 } 134 } 135 } 136 } 137 138 static struct pnp_option *pnp_clone_dependent_set(struct pnp_dev *dev, 139 unsigned int set) 140 { 141 struct pnp_option *tail = NULL, *first_new_option = NULL; 142 struct pnp_option *option, *new_option; 143 unsigned int flags; 144 145 list_for_each_entry(option, &dev->options, list) { 146 if (pnp_option_is_dependent(option)) 147 tail = option; 148 } 149 if (!tail) { 150 dev_err(&dev->dev, "no dependent option sets\n"); 151 return NULL; 152 } 153 154 flags = pnp_new_dependent_set(dev, PNP_RES_PRIORITY_FUNCTIONAL); 155 list_for_each_entry(option, &dev->options, list) { 156 if (pnp_option_is_dependent(option) && 157 pnp_option_set(option) == set) { 158 new_option = kmalloc_obj(struct pnp_option); 159 if (!new_option) { 160 dev_err(&dev->dev, "couldn't clone dependent " 161 "set %d\n", set); 162 return NULL; 163 } 164 165 *new_option = *option; 166 new_option->flags = flags; 167 if (!first_new_option) 168 first_new_option = new_option; 169 170 list_add(&new_option->list, &tail->list); 171 tail = new_option; 172 } 173 } 174 175 return first_new_option; 176 } 177 178 179 static void quirk_add_irq_optional_dependent_sets(struct pnp_dev *dev) 180 { 181 struct pnp_option *new_option; 182 unsigned int num_sets, i, set; 183 struct pnp_irq *irq; 184 185 num_sets = dev->num_dependent_sets; 186 for (i = 0; i < num_sets; i++) { 187 new_option = pnp_clone_dependent_set(dev, i); 188 if (!new_option) 189 return; 190 191 set = pnp_option_set(new_option); 192 while (new_option && pnp_option_set(new_option) == set) { 193 if (new_option->type == IORESOURCE_IRQ) { 194 irq = &new_option->u.irq; 195 irq->flags |= IORESOURCE_IRQ_OPTIONAL; 196 } 197 dbg_pnp_show_option(dev, new_option); 198 new_option = list_entry(new_option->list.next, 199 struct pnp_option, list); 200 } 201 202 dev_info(&dev->dev, "added dependent option set %d (same as " 203 "set %d except IRQ optional)\n", set, i); 204 } 205 } 206 207 static void quirk_ad1815_mpu_resources(struct pnp_dev *dev) 208 { 209 struct pnp_option *option; 210 struct pnp_irq *irq = NULL; 211 unsigned int independent_irqs = 0; 212 213 list_for_each_entry(option, &dev->options, list) { 214 if (option->type == IORESOURCE_IRQ && 215 !pnp_option_is_dependent(option)) { 216 independent_irqs++; 217 irq = &option->u.irq; 218 } 219 } 220 221 if (independent_irqs != 1) 222 return; 223 224 irq->flags |= IORESOURCE_IRQ_OPTIONAL; 225 dev_info(&dev->dev, "made independent IRQ optional\n"); 226 } 227 228 static void quirk_system_pci_resources(struct pnp_dev *dev) 229 { 230 struct pci_dev *pdev = NULL; 231 struct resource *res, *r; 232 int i, j; 233 234 /* 235 * Some BIOSes have PNP motherboard devices with resources that 236 * partially overlap PCI BARs. The PNP system driver claims these 237 * motherboard resources, which prevents the normal PCI driver from 238 * requesting them later. 239 * 240 * This patch disables the PNP resources that conflict with PCI BARs 241 * so they won't be claimed by the PNP system driver. 242 */ 243 for_each_pci_dev(pdev) { 244 pci_dev_for_each_resource(pdev, r, i) { 245 unsigned long type = resource_type(r); 246 247 if (!(type == IORESOURCE_IO || type == IORESOURCE_MEM) || 248 resource_size(r) == 0) 249 continue; 250 251 if (r->flags & IORESOURCE_UNSET) 252 continue; 253 254 for (j = 0; 255 (res = pnp_get_resource(dev, type, j)); j++) { 256 if (res->start == 0 && res->end == 0) 257 continue; 258 259 /* 260 * If the PNP region doesn't overlap the PCI 261 * region at all, there's no problem. 262 */ 263 if (!resource_overlaps(res, r)) 264 continue; 265 266 /* 267 * If the PNP region completely encloses (or is 268 * at least as large as) the PCI region, that's 269 * also OK. For example, this happens when the 270 * PNP device describes a bridge with PCI 271 * behind it. 272 */ 273 if (res->start <= r->start && res->end >= r->end) 274 continue; 275 276 /* 277 * Otherwise, the PNP region overlaps *part* of 278 * the PCI region, and that might prevent a PCI 279 * driver from requesting its resources. 280 */ 281 dev_warn(&dev->dev, 282 "disabling %pR because it overlaps %s BAR %d %pR\n", 283 res, pci_name(pdev), i, r); 284 res->flags |= IORESOURCE_DISABLED; 285 } 286 } 287 } 288 } 289 290 #ifdef CONFIG_AMD_NB 291 292 #include <asm/amd/nb.h> 293 294 static void quirk_amd_mmconfig_area(struct pnp_dev *dev) 295 { 296 resource_size_t start, end; 297 struct pnp_resource *pnp_res; 298 struct resource *res; 299 struct resource mmconfig_res, *mmconfig; 300 301 mmconfig = amd_get_mmconfig_range(&mmconfig_res); 302 if (!mmconfig) 303 return; 304 305 list_for_each_entry(pnp_res, &dev->resources, list) { 306 res = &pnp_res->res; 307 if (res->end < mmconfig->start || res->start > mmconfig->end || 308 (res->start == mmconfig->start && res->end == mmconfig->end)) 309 continue; 310 311 dev_info(&dev->dev, FW_BUG 312 "%pR covers only part of AMD MMCONFIG area %pR; adding more reservations\n", 313 res, mmconfig); 314 if (mmconfig->start < res->start) { 315 start = mmconfig->start; 316 end = res->start - 1; 317 pnp_add_mem_resource(dev, start, end, 0); 318 } 319 if (mmconfig->end > res->end) { 320 start = res->end + 1; 321 end = mmconfig->end; 322 pnp_add_mem_resource(dev, start, end, 0); 323 } 324 break; 325 } 326 } 327 #endif 328 329 #ifdef CONFIG_PCI 330 /* Device IDs of parts that have 32KB MCH space */ 331 static const unsigned int mch_quirk_devices[] = { 332 0x0154, /* Ivy Bridge */ 333 0x0a04, /* Haswell-ULT */ 334 0x0c00, /* Haswell */ 335 0x1604, /* Broadwell */ 336 }; 337 338 static struct pci_dev *get_intel_host(void) 339 { 340 int i; 341 struct pci_dev *host; 342 343 for (i = 0; i < ARRAY_SIZE(mch_quirk_devices); i++) { 344 host = pci_get_device(PCI_VENDOR_ID_INTEL, mch_quirk_devices[i], 345 NULL); 346 if (host) 347 return host; 348 } 349 return NULL; 350 } 351 352 static void quirk_intel_mch(struct pnp_dev *dev) 353 { 354 struct pci_dev *host; 355 u32 addr_lo, addr_hi; 356 struct pci_bus_region region; 357 struct resource mch; 358 struct pnp_resource *pnp_res; 359 struct resource *res; 360 361 host = get_intel_host(); 362 if (!host) 363 return; 364 365 /* 366 * MCHBAR is not an architected PCI BAR, so MCH space is usually 367 * reported as a PNP0C02 resource. The MCH space was originally 368 * 16KB, but is 32KB in newer parts. Some BIOSes still report a 369 * PNP0C02 resource that is only 16KB, which means the rest of the 370 * MCH space is consumed but unreported. 371 */ 372 373 /* 374 * Read MCHBAR for Host Member Mapped Register Range Base 375 * https://www-ssl.intel.com/content/www/us/en/processors/core/4th-gen-core-family-desktop-vol-2-datasheet 376 * Sec 3.1.12. 377 */ 378 pci_read_config_dword(host, 0x48, &addr_lo); 379 region.start = addr_lo & ~0x7fff; 380 pci_read_config_dword(host, 0x4c, &addr_hi); 381 region.start |= (u64) addr_hi << 32; 382 region.end = region.start + 32*1024 - 1; 383 384 memset(&mch, 0, sizeof(mch)); 385 mch.flags = IORESOURCE_MEM; 386 pcibios_bus_to_resource(host->bus, &mch, ®ion); 387 388 list_for_each_entry(pnp_res, &dev->resources, list) { 389 res = &pnp_res->res; 390 if (res->end < mch.start || res->start > mch.end) 391 continue; /* no overlap */ 392 if (res->start == mch.start && res->end == mch.end) 393 continue; /* exact match */ 394 395 dev_info(&dev->dev, FW_BUG "PNP resource %pR covers only part of %s Intel MCH; extending to %pR\n", 396 res, pci_name(host), &mch); 397 res->start = mch.start; 398 res->end = mch.end; 399 break; 400 } 401 402 pci_dev_put(host); 403 } 404 #endif 405 406 /* 407 * PnP Quirks 408 * Cards or devices that need some tweaking due to incomplete resource info 409 */ 410 411 static struct pnp_fixup pnp_fixups[] = { 412 /* Soundblaster awe io port quirk */ 413 {"CTL0021", quirk_awe32_resources}, 414 {"CTL0022", quirk_awe32_resources}, 415 {"CTL0023", quirk_awe32_resources}, 416 /* CMI 8330 interrupt and dma fix */ 417 {"@X@0001", quirk_cmi8330_resources}, 418 /* Soundblaster audio device io port range quirk */ 419 {"CTL0001", quirk_sb16audio_resources}, 420 {"CTL0031", quirk_sb16audio_resources}, 421 {"CTL0041", quirk_sb16audio_resources}, 422 {"CTL0042", quirk_sb16audio_resources}, 423 {"CTL0043", quirk_sb16audio_resources}, 424 {"CTL0044", quirk_sb16audio_resources}, 425 {"CTL0045", quirk_sb16audio_resources}, 426 /* Add IRQ-optional MPU options */ 427 {"ADS7151", quirk_ad1815_mpu_resources}, 428 {"ADS7181", quirk_add_irq_optional_dependent_sets}, 429 {"AZT0002", quirk_add_irq_optional_dependent_sets}, 430 /* PnP resources that might overlap PCI BARs */ 431 {"PNP0c01", quirk_system_pci_resources}, 432 {"PNP0c02", quirk_system_pci_resources}, 433 #ifdef CONFIG_AMD_NB 434 {"PNP0c01", quirk_amd_mmconfig_area}, 435 #endif 436 #ifdef CONFIG_PCI 437 {"PNP0c02", quirk_intel_mch}, 438 #endif 439 {""} 440 }; 441 442 void pnp_fixup_device(struct pnp_dev *dev) 443 { 444 struct pnp_fixup *f; 445 446 for (f = pnp_fixups; *f->id; f++) { 447 if (!compare_pnp_id(dev->id, f->id)) 448 continue; 449 pnp_dbg(&dev->dev, "%s: calling %pS\n", f->id, 450 f->quirk_function); 451 f->quirk_function(dev); 452 } 453 } 454