1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Renesas R-Car M3-W+ System Controller 4 * 5 * Copyright (C) 2016 Glider bvba 6 * Copyright (C) 2018-2019 Renesas Electronics Corporation 7 */ 8 9 #include <linux/bits.h> 10 #include <linux/kernel.h> 11 12 #include <dt-bindings/power/r8a7796-sysc.h> 13 14 #include "rcar-sysc.h" 15 16 static const struct rcar_sysc_area r8a77961_areas[] __initconst = { 17 { "always-on", 0, 0, R8A7796_PD_ALWAYS_ON, -1, PD_ALWAYS_ON }, 18 { "ca57-scu", 0x1c0, 0, R8A7796_PD_CA57_SCU, R8A7796_PD_ALWAYS_ON, 19 PD_SCU }, 20 { "ca57-cpu0", 0x80, 0, R8A7796_PD_CA57_CPU0, R8A7796_PD_CA57_SCU, 21 PD_CPU_NOCR }, 22 { "ca57-cpu1", 0x80, 1, R8A7796_PD_CA57_CPU1, R8A7796_PD_CA57_SCU, 23 PD_CPU_NOCR }, 24 { "ca53-scu", 0x140, 0, R8A7796_PD_CA53_SCU, R8A7796_PD_ALWAYS_ON, 25 PD_SCU }, 26 { "ca53-cpu0", 0x200, 0, R8A7796_PD_CA53_CPU0, R8A7796_PD_CA53_SCU, 27 PD_CPU_NOCR }, 28 { "ca53-cpu1", 0x200, 1, R8A7796_PD_CA53_CPU1, R8A7796_PD_CA53_SCU, 29 PD_CPU_NOCR }, 30 { "ca53-cpu2", 0x200, 2, R8A7796_PD_CA53_CPU2, R8A7796_PD_CA53_SCU, 31 PD_CPU_NOCR }, 32 { "ca53-cpu3", 0x200, 3, R8A7796_PD_CA53_CPU3, R8A7796_PD_CA53_SCU, 33 PD_CPU_NOCR }, 34 { "cr7", 0x240, 0, R8A7796_PD_CR7, R8A7796_PD_ALWAYS_ON }, 35 { "a3vc", 0x380, 0, R8A7796_PD_A3VC, R8A7796_PD_ALWAYS_ON }, 36 { "a2vc1", 0x3c0, 1, R8A7796_PD_A2VC1, R8A7796_PD_A3VC }, 37 { "3dg-a", 0x100, 0, R8A7796_PD_3DG_A, R8A7796_PD_ALWAYS_ON }, 38 { "3dg-b", 0x100, 1, R8A7796_PD_3DG_B, R8A7796_PD_3DG_A }, 39 { "a3ir", 0x180, 0, R8A7796_PD_A3IR, R8A7796_PD_ALWAYS_ON }, 40 }; 41 42 const struct rcar_sysc_info r8a77961_sysc_info __initconst = { 43 .areas = r8a77961_areas, 44 .num_areas = ARRAY_SIZE(r8a77961_areas), 45 .extmask_offs = 0x2f8, 46 .extmask_val = BIT(0), 47 }; 48