1e2ad626fSUlf Hansson /* SPDX-License-Identifier: GPL-2.0-only */ 2e2ad626fSUlf Hansson 3e2ad626fSUlf Hansson #ifndef __SOC_MEDIATEK_MT8192_PM_DOMAINS_H 4e2ad626fSUlf Hansson #define __SOC_MEDIATEK_MT8192_PM_DOMAINS_H 5e2ad626fSUlf Hansson 6e2ad626fSUlf Hansson #include "mtk-pm-domains.h" 7e2ad626fSUlf Hansson #include <dt-bindings/power/mt8192-power.h> 8e2ad626fSUlf Hansson 9e2ad626fSUlf Hansson /* 10e2ad626fSUlf Hansson * MT8192 power domain support 11e2ad626fSUlf Hansson */ 12e2ad626fSUlf Hansson 13e2ad626fSUlf Hansson static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = { 14e2ad626fSUlf Hansson [MT8192_POWER_DOMAIN_AUDIO] = { 15e2ad626fSUlf Hansson .name = "audio", 16e2ad626fSUlf Hansson .sta_mask = BIT(21), 17e2ad626fSUlf Hansson .ctl_offs = 0x0354, 18e2ad626fSUlf Hansson .pwr_sta_offs = 0x016c, 19e2ad626fSUlf Hansson .pwr_sta2nd_offs = 0x0170, 20e2ad626fSUlf Hansson .sram_pdn_bits = GENMASK(8, 8), 21e2ad626fSUlf Hansson .sram_pdn_ack_bits = GENMASK(12, 12), 22*151bd6c5SMarkus Schneider-Pargmann .bp_cfg = { 23*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 24*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_2_AUDIO, 25e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_2_SET, 26e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_2_CLR, 27e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_2_STA1), 28e2ad626fSUlf Hansson }, 29e2ad626fSUlf Hansson }, 30e2ad626fSUlf Hansson [MT8192_POWER_DOMAIN_CONN] = { 31e2ad626fSUlf Hansson .name = "conn", 32e2ad626fSUlf Hansson .sta_mask = PWR_STATUS_CONN, 33e2ad626fSUlf Hansson .ctl_offs = 0x0304, 34e2ad626fSUlf Hansson .pwr_sta_offs = 0x016c, 35e2ad626fSUlf Hansson .pwr_sta2nd_offs = 0x0170, 36e2ad626fSUlf Hansson .sram_pdn_bits = 0, 37e2ad626fSUlf Hansson .sram_pdn_ack_bits = 0, 38*151bd6c5SMarkus Schneider-Pargmann .bp_cfg = { 39*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 40*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_CONN, 41e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_SET, 42e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_CLR, 43e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_STA1), 44*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 45*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_CONN_2ND, 46e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_SET, 47e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_CLR, 48e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_STA1), 49*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 50*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_1_CONN, 51e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_1_SET, 52e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_1_CLR, 53e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_1_STA1), 54e2ad626fSUlf Hansson }, 55e2ad626fSUlf Hansson .caps = MTK_SCPD_KEEP_DEFAULT_OFF, 56e2ad626fSUlf Hansson }, 57e2ad626fSUlf Hansson [MT8192_POWER_DOMAIN_MFG0] = { 58e2ad626fSUlf Hansson .name = "mfg0", 59e2ad626fSUlf Hansson .sta_mask = BIT(2), 60e2ad626fSUlf Hansson .ctl_offs = 0x0308, 61e2ad626fSUlf Hansson .pwr_sta_offs = 0x016c, 62e2ad626fSUlf Hansson .pwr_sta2nd_offs = 0x0170, 63e2ad626fSUlf Hansson .sram_pdn_bits = GENMASK(8, 8), 64e2ad626fSUlf Hansson .sram_pdn_ack_bits = GENMASK(12, 12), 65e2ad626fSUlf Hansson .caps = MTK_SCPD_DOMAIN_SUPPLY, 66e2ad626fSUlf Hansson }, 67e2ad626fSUlf Hansson [MT8192_POWER_DOMAIN_MFG1] = { 68e2ad626fSUlf Hansson .name = "mfg1", 69e2ad626fSUlf Hansson .sta_mask = BIT(3), 70e2ad626fSUlf Hansson .ctl_offs = 0x030c, 71e2ad626fSUlf Hansson .pwr_sta_offs = 0x016c, 72e2ad626fSUlf Hansson .pwr_sta2nd_offs = 0x0170, 73e2ad626fSUlf Hansson .sram_pdn_bits = GENMASK(8, 8), 74e2ad626fSUlf Hansson .sram_pdn_ack_bits = GENMASK(12, 12), 75*151bd6c5SMarkus Schneider-Pargmann .bp_cfg = { 76*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 77*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_1_MFG1, 78e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_1_SET, 79e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_1_CLR, 80e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_1_STA1), 81*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 82*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_2_MFG1, 83e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_2_SET, 84e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_2_CLR, 85e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_2_STA1), 86*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 87*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_MFG1, 88e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_SET, 89e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_CLR, 90e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_STA1), 91*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 92*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_2_MFG1_2ND, 93e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_2_SET, 94e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_2_CLR, 95e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_2_STA1), 96e2ad626fSUlf Hansson }, 97e2ad626fSUlf Hansson .caps = MTK_SCPD_DOMAIN_SUPPLY, 98e2ad626fSUlf Hansson }, 99e2ad626fSUlf Hansson [MT8192_POWER_DOMAIN_MFG2] = { 100e2ad626fSUlf Hansson .name = "mfg2", 101e2ad626fSUlf Hansson .sta_mask = BIT(4), 102e2ad626fSUlf Hansson .ctl_offs = 0x0310, 103e2ad626fSUlf Hansson .pwr_sta_offs = 0x016c, 104e2ad626fSUlf Hansson .pwr_sta2nd_offs = 0x0170, 105e2ad626fSUlf Hansson .sram_pdn_bits = GENMASK(8, 8), 106e2ad626fSUlf Hansson .sram_pdn_ack_bits = GENMASK(12, 12), 107e2ad626fSUlf Hansson }, 108e2ad626fSUlf Hansson [MT8192_POWER_DOMAIN_MFG3] = { 109e2ad626fSUlf Hansson .name = "mfg3", 110e2ad626fSUlf Hansson .sta_mask = BIT(5), 111e2ad626fSUlf Hansson .ctl_offs = 0x0314, 112e2ad626fSUlf Hansson .pwr_sta_offs = 0x016c, 113e2ad626fSUlf Hansson .pwr_sta2nd_offs = 0x0170, 114e2ad626fSUlf Hansson .sram_pdn_bits = GENMASK(8, 8), 115e2ad626fSUlf Hansson .sram_pdn_ack_bits = GENMASK(12, 12), 116e2ad626fSUlf Hansson }, 117e2ad626fSUlf Hansson [MT8192_POWER_DOMAIN_MFG4] = { 118e2ad626fSUlf Hansson .name = "mfg4", 119e2ad626fSUlf Hansson .sta_mask = BIT(6), 120e2ad626fSUlf Hansson .ctl_offs = 0x0318, 121e2ad626fSUlf Hansson .pwr_sta_offs = 0x016c, 122e2ad626fSUlf Hansson .pwr_sta2nd_offs = 0x0170, 123e2ad626fSUlf Hansson .sram_pdn_bits = GENMASK(8, 8), 124e2ad626fSUlf Hansson .sram_pdn_ack_bits = GENMASK(12, 12), 125e2ad626fSUlf Hansson }, 126e2ad626fSUlf Hansson [MT8192_POWER_DOMAIN_MFG5] = { 127e2ad626fSUlf Hansson .name = "mfg5", 128e2ad626fSUlf Hansson .sta_mask = BIT(7), 129e2ad626fSUlf Hansson .ctl_offs = 0x031c, 130e2ad626fSUlf Hansson .pwr_sta_offs = 0x016c, 131e2ad626fSUlf Hansson .pwr_sta2nd_offs = 0x0170, 132e2ad626fSUlf Hansson .sram_pdn_bits = GENMASK(8, 8), 133e2ad626fSUlf Hansson .sram_pdn_ack_bits = GENMASK(12, 12), 134e2ad626fSUlf Hansson }, 135e2ad626fSUlf Hansson [MT8192_POWER_DOMAIN_MFG6] = { 136e2ad626fSUlf Hansson .name = "mfg6", 137e2ad626fSUlf Hansson .sta_mask = BIT(8), 138e2ad626fSUlf Hansson .ctl_offs = 0x0320, 139e2ad626fSUlf Hansson .pwr_sta_offs = 0x016c, 140e2ad626fSUlf Hansson .pwr_sta2nd_offs = 0x0170, 141e2ad626fSUlf Hansson .sram_pdn_bits = GENMASK(8, 8), 142e2ad626fSUlf Hansson .sram_pdn_ack_bits = GENMASK(12, 12), 143e2ad626fSUlf Hansson }, 144e2ad626fSUlf Hansson [MT8192_POWER_DOMAIN_DISP] = { 145e2ad626fSUlf Hansson .name = "disp", 146e2ad626fSUlf Hansson .sta_mask = BIT(20), 147e2ad626fSUlf Hansson .ctl_offs = 0x0350, 148e2ad626fSUlf Hansson .pwr_sta_offs = 0x016c, 149e2ad626fSUlf Hansson .pwr_sta2nd_offs = 0x0170, 150e2ad626fSUlf Hansson .sram_pdn_bits = GENMASK(8, 8), 151e2ad626fSUlf Hansson .sram_pdn_ack_bits = GENMASK(12, 12), 152*151bd6c5SMarkus Schneider-Pargmann .bp_cfg = { 153*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR_IGN(INFRA, 154*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_MM_DISP, 155e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_SET, 156e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_CLR, 157e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_STA1), 158*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR_IGN(INFRA, 159*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_MM_2_DISP, 160e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_2_SET, 161e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_2_CLR, 162e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_2_STA1), 163*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 164*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_DISP, 165e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_SET, 166e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_CLR, 167e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_STA1), 168*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 169*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_MM_DISP_2ND, 170e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_SET, 171e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_CLR, 172e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_STA1), 173*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 174*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_MM_2_DISP_2ND, 175e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_2_SET, 176e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_2_CLR, 177e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_2_STA1), 178e2ad626fSUlf Hansson }, 179e2ad626fSUlf Hansson }, 180e2ad626fSUlf Hansson [MT8192_POWER_DOMAIN_IPE] = { 181e2ad626fSUlf Hansson .name = "ipe", 182e2ad626fSUlf Hansson .sta_mask = BIT(14), 183e2ad626fSUlf Hansson .ctl_offs = 0x0338, 184e2ad626fSUlf Hansson .pwr_sta_offs = 0x016c, 185e2ad626fSUlf Hansson .pwr_sta2nd_offs = 0x0170, 186e2ad626fSUlf Hansson .sram_pdn_bits = GENMASK(8, 8), 187e2ad626fSUlf Hansson .sram_pdn_ack_bits = GENMASK(12, 12), 188*151bd6c5SMarkus Schneider-Pargmann .bp_cfg = { 189*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 190*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_MM_IPE, 191e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_SET, 192e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_CLR, 193e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_STA1), 194*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 195*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_MM_IPE_2ND, 196e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_SET, 197e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_CLR, 198e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_STA1), 199e2ad626fSUlf Hansson }, 200e2ad626fSUlf Hansson }, 201e2ad626fSUlf Hansson [MT8192_POWER_DOMAIN_ISP] = { 202e2ad626fSUlf Hansson .name = "isp", 203e2ad626fSUlf Hansson .sta_mask = BIT(12), 204e2ad626fSUlf Hansson .ctl_offs = 0x0330, 205e2ad626fSUlf Hansson .pwr_sta_offs = 0x016c, 206e2ad626fSUlf Hansson .pwr_sta2nd_offs = 0x0170, 207e2ad626fSUlf Hansson .sram_pdn_bits = GENMASK(8, 8), 208e2ad626fSUlf Hansson .sram_pdn_ack_bits = GENMASK(12, 12), 209*151bd6c5SMarkus Schneider-Pargmann .bp_cfg = { 210*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 211*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_MM_2_ISP, 212e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_2_SET, 213e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_2_CLR, 214e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_2_STA1), 215*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 216*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_MM_2_ISP_2ND, 217e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_2_SET, 218e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_2_CLR, 219e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_2_STA1), 220e2ad626fSUlf Hansson }, 221e2ad626fSUlf Hansson }, 222e2ad626fSUlf Hansson [MT8192_POWER_DOMAIN_ISP2] = { 223e2ad626fSUlf Hansson .name = "isp2", 224e2ad626fSUlf Hansson .sta_mask = BIT(13), 225e2ad626fSUlf Hansson .ctl_offs = 0x0334, 226e2ad626fSUlf Hansson .pwr_sta_offs = 0x016c, 227e2ad626fSUlf Hansson .pwr_sta2nd_offs = 0x0170, 228e2ad626fSUlf Hansson .sram_pdn_bits = GENMASK(8, 8), 229e2ad626fSUlf Hansson .sram_pdn_ack_bits = GENMASK(12, 12), 230*151bd6c5SMarkus Schneider-Pargmann .bp_cfg = { 231*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 232*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_MM_ISP2, 233e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_SET, 234e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_CLR, 235e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_STA1), 236*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 237*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_MM_ISP2_2ND, 238e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_SET, 239e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_CLR, 240e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_STA1), 241e2ad626fSUlf Hansson }, 242e2ad626fSUlf Hansson }, 243e2ad626fSUlf Hansson [MT8192_POWER_DOMAIN_MDP] = { 244e2ad626fSUlf Hansson .name = "mdp", 245e2ad626fSUlf Hansson .sta_mask = BIT(19), 246e2ad626fSUlf Hansson .ctl_offs = 0x034c, 247e2ad626fSUlf Hansson .pwr_sta_offs = 0x016c, 248e2ad626fSUlf Hansson .pwr_sta2nd_offs = 0x0170, 249e2ad626fSUlf Hansson .sram_pdn_bits = GENMASK(8, 8), 250e2ad626fSUlf Hansson .sram_pdn_ack_bits = GENMASK(12, 12), 251*151bd6c5SMarkus Schneider-Pargmann .bp_cfg = { 252*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 253*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_MM_2_MDP, 254e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_2_SET, 255e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_2_CLR, 256e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_2_STA1), 257*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 258*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_MM_2_MDP_2ND, 259e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_2_SET, 260e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_2_CLR, 261e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_2_STA1), 262e2ad626fSUlf Hansson }, 263e2ad626fSUlf Hansson }, 264e2ad626fSUlf Hansson [MT8192_POWER_DOMAIN_VENC] = { 265e2ad626fSUlf Hansson .name = "venc", 266e2ad626fSUlf Hansson .sta_mask = BIT(17), 267e2ad626fSUlf Hansson .ctl_offs = 0x0344, 268e2ad626fSUlf Hansson .pwr_sta_offs = 0x016c, 269e2ad626fSUlf Hansson .pwr_sta2nd_offs = 0x0170, 270e2ad626fSUlf Hansson .sram_pdn_bits = GENMASK(8, 8), 271e2ad626fSUlf Hansson .sram_pdn_ack_bits = GENMASK(12, 12), 272*151bd6c5SMarkus Schneider-Pargmann .bp_cfg = { 273*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 274*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_MM_VENC, 275e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_SET, 276e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_CLR, 277e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_STA1), 278*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 279*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_MM_VENC_2ND, 280e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_SET, 281e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_CLR, 282e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_STA1), 283e2ad626fSUlf Hansson }, 284e2ad626fSUlf Hansson }, 285e2ad626fSUlf Hansson [MT8192_POWER_DOMAIN_VDEC] = { 286e2ad626fSUlf Hansson .name = "vdec", 287e2ad626fSUlf Hansson .sta_mask = BIT(15), 288e2ad626fSUlf Hansson .ctl_offs = 0x033c, 289e2ad626fSUlf Hansson .pwr_sta_offs = 0x016c, 290e2ad626fSUlf Hansson .pwr_sta2nd_offs = 0x0170, 291e2ad626fSUlf Hansson .sram_pdn_bits = GENMASK(8, 8), 292e2ad626fSUlf Hansson .sram_pdn_ack_bits = GENMASK(12, 12), 293*151bd6c5SMarkus Schneider-Pargmann .bp_cfg = { 294*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 295*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_MM_VDEC, 296e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_SET, 297e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_CLR, 298e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_STA1), 299*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 300*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_MM_VDEC_2ND, 301e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_SET, 302e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_CLR, 303e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_STA1), 304e2ad626fSUlf Hansson }, 305e2ad626fSUlf Hansson }, 306e2ad626fSUlf Hansson [MT8192_POWER_DOMAIN_VDEC2] = { 307e2ad626fSUlf Hansson .name = "vdec2", 308e2ad626fSUlf Hansson .sta_mask = BIT(16), 309e2ad626fSUlf Hansson .ctl_offs = 0x0340, 310e2ad626fSUlf Hansson .pwr_sta_offs = 0x016c, 311e2ad626fSUlf Hansson .pwr_sta2nd_offs = 0x0170, 312e2ad626fSUlf Hansson .sram_pdn_bits = GENMASK(8, 8), 313e2ad626fSUlf Hansson .sram_pdn_ack_bits = GENMASK(12, 12), 314e2ad626fSUlf Hansson }, 315e2ad626fSUlf Hansson [MT8192_POWER_DOMAIN_CAM] = { 316e2ad626fSUlf Hansson .name = "cam", 317e2ad626fSUlf Hansson .sta_mask = BIT(23), 318e2ad626fSUlf Hansson .ctl_offs = 0x035c, 319e2ad626fSUlf Hansson .pwr_sta_offs = 0x016c, 320e2ad626fSUlf Hansson .pwr_sta2nd_offs = 0x0170, 321e2ad626fSUlf Hansson .sram_pdn_bits = GENMASK(8, 8), 322e2ad626fSUlf Hansson .sram_pdn_ack_bits = GENMASK(12, 12), 323*151bd6c5SMarkus Schneider-Pargmann .bp_cfg = { 324*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 325*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_2_CAM, 326e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_2_SET, 327e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_2_CLR, 328e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_2_STA1), 329*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 330*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_MM_CAM, 331e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_SET, 332e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_CLR, 333e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_STA1), 334*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 335*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_1_CAM, 336e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_1_SET, 337e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_1_CLR, 338e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_1_STA1), 339*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 340*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_MM_CAM_2ND, 341e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_SET, 342e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_CLR, 343e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_MM_STA1), 344*151bd6c5SMarkus Schneider-Pargmann BUS_PROT_WR(INFRA, 345*151bd6c5SMarkus Schneider-Pargmann MT8192_TOP_AXI_PROT_EN_VDNR_CAM, 346e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_VDNR_SET, 347e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_VDNR_CLR, 348e2ad626fSUlf Hansson MT8192_TOP_AXI_PROT_EN_VDNR_STA1), 349e2ad626fSUlf Hansson }, 350e2ad626fSUlf Hansson }, 351e2ad626fSUlf Hansson [MT8192_POWER_DOMAIN_CAM_RAWA] = { 352e2ad626fSUlf Hansson .name = "cam_rawa", 353e2ad626fSUlf Hansson .sta_mask = BIT(24), 354e2ad626fSUlf Hansson .ctl_offs = 0x0360, 355e2ad626fSUlf Hansson .pwr_sta_offs = 0x016c, 356e2ad626fSUlf Hansson .pwr_sta2nd_offs = 0x0170, 357e2ad626fSUlf Hansson .sram_pdn_bits = GENMASK(8, 8), 358e2ad626fSUlf Hansson .sram_pdn_ack_bits = GENMASK(12, 12), 359e2ad626fSUlf Hansson }, 360e2ad626fSUlf Hansson [MT8192_POWER_DOMAIN_CAM_RAWB] = { 361e2ad626fSUlf Hansson .name = "cam_rawb", 362e2ad626fSUlf Hansson .sta_mask = BIT(25), 363e2ad626fSUlf Hansson .ctl_offs = 0x0364, 364e2ad626fSUlf Hansson .pwr_sta_offs = 0x016c, 365e2ad626fSUlf Hansson .pwr_sta2nd_offs = 0x0170, 366e2ad626fSUlf Hansson .sram_pdn_bits = GENMASK(8, 8), 367e2ad626fSUlf Hansson .sram_pdn_ack_bits = GENMASK(12, 12), 368e2ad626fSUlf Hansson }, 369e2ad626fSUlf Hansson [MT8192_POWER_DOMAIN_CAM_RAWC] = { 370e2ad626fSUlf Hansson .name = "cam_rawc", 371e2ad626fSUlf Hansson .sta_mask = BIT(26), 372e2ad626fSUlf Hansson .ctl_offs = 0x0368, 373e2ad626fSUlf Hansson .pwr_sta_offs = 0x016c, 374e2ad626fSUlf Hansson .pwr_sta2nd_offs = 0x0170, 375e2ad626fSUlf Hansson .sram_pdn_bits = GENMASK(8, 8), 376e2ad626fSUlf Hansson .sram_pdn_ack_bits = GENMASK(12, 12), 377e2ad626fSUlf Hansson }, 378e2ad626fSUlf Hansson }; 379e2ad626fSUlf Hansson 380e2ad626fSUlf Hansson static const struct scpsys_soc_data mt8192_scpsys_data = { 381e2ad626fSUlf Hansson .domains_data = scpsys_domain_data_mt8192, 382e2ad626fSUlf Hansson .num_domains = ARRAY_SIZE(scpsys_domain_data_mt8192), 383e2ad626fSUlf Hansson }; 384e2ad626fSUlf Hansson 385e2ad626fSUlf Hansson #endif /* __SOC_MEDIATEK_MT8192_PM_DOMAINS_H */ 386