xref: /linux/drivers/pmdomain/imx/imx93-pd.c (revision 4b132aacb0768ac1e652cf517097ea6f237214b9)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright 2022 NXP
4  */
5 
6 #include <linux/clk.h>
7 #include <linux/delay.h>
8 #include <linux/iopoll.h>
9 #include <linux/mod_devicetable.h>
10 #include <linux/module.h>
11 #include <linux/platform_device.h>
12 #include <linux/pm_domain.h>
13 
14 #define MIX_SLICE_SW_CTRL_OFF		0x20
15 #define SLICE_SW_CTRL_PSW_CTRL_OFF_MASK	BIT(4)
16 #define SLICE_SW_CTRL_PDN_SOFT_MASK	BIT(31)
17 
18 #define MIX_FUNC_STAT_OFF		0xB4
19 
20 #define FUNC_STAT_PSW_STAT_MASK		BIT(0)
21 #define FUNC_STAT_RST_STAT_MASK		BIT(2)
22 #define FUNC_STAT_ISO_STAT_MASK		BIT(4)
23 #define FUNC_STAT_SSAR_STAT_MASK	BIT(8)
24 
25 struct imx93_power_domain {
26 	struct generic_pm_domain genpd;
27 	struct device *dev;
28 	void __iomem *addr;
29 	struct clk_bulk_data *clks;
30 	int num_clks;
31 	bool init_off;
32 };
33 
34 #define to_imx93_pd(_genpd) container_of(_genpd, struct imx93_power_domain, genpd)
35 
36 static int imx93_pd_on(struct generic_pm_domain *genpd)
37 {
38 	struct imx93_power_domain *domain = to_imx93_pd(genpd);
39 	void __iomem *addr = domain->addr;
40 	u32 val;
41 	int ret;
42 
43 	ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
44 	if (ret) {
45 		dev_err(domain->dev, "failed to enable clocks for domain: %s\n", genpd->name);
46 		return ret;
47 	}
48 
49 	val = readl(addr + MIX_SLICE_SW_CTRL_OFF);
50 	val &= ~SLICE_SW_CTRL_PDN_SOFT_MASK;
51 	writel(val, addr + MIX_SLICE_SW_CTRL_OFF);
52 
53 	ret = readl_poll_timeout(addr + MIX_FUNC_STAT_OFF, val,
54 				 !(val & FUNC_STAT_SSAR_STAT_MASK), 1, 10000);
55 	if (ret) {
56 		dev_err(domain->dev, "pd_on timeout: name: %s, stat: %x\n", genpd->name, val);
57 		return ret;
58 	}
59 
60 	return 0;
61 }
62 
63 static int imx93_pd_off(struct generic_pm_domain *genpd)
64 {
65 	struct imx93_power_domain *domain = to_imx93_pd(genpd);
66 	void __iomem *addr = domain->addr;
67 	int ret;
68 	u32 val;
69 
70 	/* Power off MIX */
71 	val = readl(addr + MIX_SLICE_SW_CTRL_OFF);
72 	val |= SLICE_SW_CTRL_PDN_SOFT_MASK;
73 	writel(val, addr + MIX_SLICE_SW_CTRL_OFF);
74 
75 	ret = readl_poll_timeout(addr + MIX_FUNC_STAT_OFF, val,
76 				 val & FUNC_STAT_PSW_STAT_MASK, 1, 10000);
77 	if (ret) {
78 		dev_err(domain->dev, "pd_off timeout: name: %s, stat: %x\n", genpd->name, val);
79 		return ret;
80 	}
81 
82 	clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
83 
84 	return 0;
85 };
86 
87 static void imx93_pd_remove(struct platform_device *pdev)
88 {
89 	struct imx93_power_domain *domain = platform_get_drvdata(pdev);
90 	struct device *dev = &pdev->dev;
91 	struct device_node *np = dev->of_node;
92 
93 	if (!domain->init_off)
94 		clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
95 
96 	of_genpd_del_provider(np);
97 	pm_genpd_remove(&domain->genpd);
98 }
99 
100 static int imx93_pd_probe(struct platform_device *pdev)
101 {
102 	struct device *dev = &pdev->dev;
103 	struct device_node *np = dev->of_node;
104 	struct imx93_power_domain *domain;
105 	int ret;
106 
107 	domain = devm_kzalloc(dev, sizeof(*domain), GFP_KERNEL);
108 	if (!domain)
109 		return -ENOMEM;
110 
111 	domain->addr = devm_platform_ioremap_resource(pdev, 0);
112 	if (IS_ERR(domain->addr))
113 		return PTR_ERR(domain->addr);
114 
115 	domain->num_clks = devm_clk_bulk_get_all(dev, &domain->clks);
116 	if (domain->num_clks < 0)
117 		return dev_err_probe(dev, domain->num_clks, "Failed to get domain's clocks\n");
118 
119 	domain->genpd.name = dev_name(dev);
120 	domain->genpd.power_off = imx93_pd_off;
121 	domain->genpd.power_on = imx93_pd_on;
122 	domain->dev = dev;
123 
124 	domain->init_off = readl(domain->addr + MIX_FUNC_STAT_OFF) & FUNC_STAT_ISO_STAT_MASK;
125 	/* Just to sync the status of hardware */
126 	if (!domain->init_off) {
127 		ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
128 		if (ret) {
129 			dev_err(domain->dev, "failed to enable clocks for domain: %s\n",
130 				domain->genpd.name);
131 			return ret;
132 		}
133 	}
134 
135 	ret = pm_genpd_init(&domain->genpd, NULL, domain->init_off);
136 	if (ret)
137 		goto err_clk_unprepare;
138 
139 	platform_set_drvdata(pdev, domain);
140 
141 	ret = of_genpd_add_provider_simple(np, &domain->genpd);
142 	if (ret)
143 		goto err_genpd_remove;
144 
145 	return 0;
146 
147 err_genpd_remove:
148 	pm_genpd_remove(&domain->genpd);
149 
150 err_clk_unprepare:
151 	if (!domain->init_off)
152 		clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
153 
154 	return ret;
155 }
156 
157 static const struct of_device_id imx93_pd_ids[] = {
158 	{ .compatible = "fsl,imx93-src-slice" },
159 	{ }
160 };
161 MODULE_DEVICE_TABLE(of, imx93_pd_ids);
162 
163 static struct platform_driver imx93_power_domain_driver = {
164 	.driver = {
165 		.name	= "imx93_power_domain",
166 		.of_match_table = imx93_pd_ids,
167 	},
168 	.probe = imx93_pd_probe,
169 	.remove_new = imx93_pd_remove,
170 };
171 module_platform_driver(imx93_power_domain_driver);
172 
173 MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
174 MODULE_DESCRIPTION("NXP i.MX93 power domain driver");
175 MODULE_LICENSE("GPL");
176