1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Actions Semi Owl Smart Power System (SPS) 4 * 5 * Copyright 2012 Actions Semi Inc. 6 * Author: Actions Semi, Inc. 7 * 8 * Copyright (c) 2017 Andreas Färber 9 */ 10 11 #include <linux/mod_devicetable.h> 12 #include <linux/of_address.h> 13 #include <linux/platform_device.h> 14 #include <linux/property.h> 15 #include <linux/pm_domain.h> 16 #include <linux/soc/actions/owl-sps.h> 17 #include <dt-bindings/power/owl-s500-powergate.h> 18 #include <dt-bindings/power/owl-s700-powergate.h> 19 #include <dt-bindings/power/owl-s900-powergate.h> 20 21 struct owl_sps_domain_info { 22 const char *name; 23 int pwr_bit; 24 int ack_bit; 25 unsigned int genpd_flags; 26 }; 27 28 struct owl_sps_info { 29 unsigned num_domains; 30 const struct owl_sps_domain_info *domains; 31 }; 32 33 struct owl_sps { 34 struct device *dev; 35 const struct owl_sps_info *info; 36 void __iomem *base; 37 struct genpd_onecell_data genpd_data; 38 struct generic_pm_domain *domains[]; 39 }; 40 41 #define to_owl_pd(gpd) container_of(gpd, struct owl_sps_domain, genpd) 42 43 struct owl_sps_domain { 44 struct generic_pm_domain genpd; 45 const struct owl_sps_domain_info *info; 46 struct owl_sps *sps; 47 }; 48 49 static int owl_sps_set_power(struct owl_sps_domain *pd, bool enable) 50 { 51 u32 pwr_mask, ack_mask; 52 53 ack_mask = BIT(pd->info->ack_bit); 54 pwr_mask = BIT(pd->info->pwr_bit); 55 56 return owl_sps_set_pg(pd->sps->base, pwr_mask, ack_mask, enable); 57 } 58 59 static int owl_sps_power_on(struct generic_pm_domain *domain) 60 { 61 struct owl_sps_domain *pd = to_owl_pd(domain); 62 63 dev_dbg(pd->sps->dev, "%s power on", pd->info->name); 64 65 return owl_sps_set_power(pd, true); 66 } 67 68 static int owl_sps_power_off(struct generic_pm_domain *domain) 69 { 70 struct owl_sps_domain *pd = to_owl_pd(domain); 71 72 dev_dbg(pd->sps->dev, "%s power off", pd->info->name); 73 74 return owl_sps_set_power(pd, false); 75 } 76 77 static int owl_sps_init_domain(struct owl_sps *sps, int index) 78 { 79 struct owl_sps_domain *pd; 80 81 pd = devm_kzalloc(sps->dev, sizeof(*pd), GFP_KERNEL); 82 if (!pd) 83 return -ENOMEM; 84 85 pd->info = &sps->info->domains[index]; 86 pd->sps = sps; 87 88 pd->genpd.name = pd->info->name; 89 pd->genpd.power_on = owl_sps_power_on; 90 pd->genpd.power_off = owl_sps_power_off; 91 pd->genpd.flags = pd->info->genpd_flags; 92 pm_genpd_init(&pd->genpd, NULL, false); 93 94 sps->genpd_data.domains[index] = &pd->genpd; 95 96 return 0; 97 } 98 99 static int owl_sps_probe(struct platform_device *pdev) 100 { 101 const struct owl_sps_info *sps_info; 102 struct owl_sps *sps; 103 int i, ret; 104 105 sps_info = device_get_match_data(&pdev->dev); 106 if (!sps_info) { 107 dev_err(&pdev->dev, "unknown compatible or missing data\n"); 108 return -EINVAL; 109 } 110 111 sps = devm_kzalloc(&pdev->dev, 112 struct_size(sps, domains, sps_info->num_domains), 113 GFP_KERNEL); 114 if (!sps) 115 return -ENOMEM; 116 117 sps->base = of_io_request_and_map(pdev->dev.of_node, 0, "owl-sps"); 118 if (IS_ERR(sps->base)) { 119 dev_err(&pdev->dev, "failed to map sps registers\n"); 120 return PTR_ERR(sps->base); 121 } 122 123 sps->dev = &pdev->dev; 124 sps->info = sps_info; 125 sps->genpd_data.domains = sps->domains; 126 sps->genpd_data.num_domains = sps_info->num_domains; 127 128 for (i = 0; i < sps_info->num_domains; i++) { 129 ret = owl_sps_init_domain(sps, i); 130 if (ret) 131 return ret; 132 } 133 134 ret = of_genpd_add_provider_onecell(pdev->dev.of_node, &sps->genpd_data); 135 if (ret) { 136 dev_err(&pdev->dev, "failed to add provider (%d)", ret); 137 return ret; 138 } 139 140 return 0; 141 } 142 143 static const struct owl_sps_domain_info s500_sps_domains[] = { 144 [S500_PD_VDE] = { 145 .name = "VDE", 146 .pwr_bit = 0, 147 .ack_bit = 16, 148 }, 149 [S500_PD_VCE_SI] = { 150 .name = "VCE_SI", 151 .pwr_bit = 1, 152 .ack_bit = 17, 153 }, 154 [S500_PD_USB2_1] = { 155 .name = "USB2_1", 156 .pwr_bit = 2, 157 .ack_bit = 18, 158 }, 159 [S500_PD_CPU2] = { 160 .name = "CPU2", 161 .pwr_bit = 5, 162 .ack_bit = 21, 163 .genpd_flags = GENPD_FLAG_ALWAYS_ON, 164 }, 165 [S500_PD_CPU3] = { 166 .name = "CPU3", 167 .pwr_bit = 6, 168 .ack_bit = 22, 169 .genpd_flags = GENPD_FLAG_ALWAYS_ON, 170 }, 171 [S500_PD_DMA] = { 172 .name = "DMA", 173 .pwr_bit = 8, 174 .ack_bit = 12, 175 }, 176 [S500_PD_DS] = { 177 .name = "DS", 178 .pwr_bit = 9, 179 .ack_bit = 13, 180 }, 181 [S500_PD_USB3] = { 182 .name = "USB3", 183 .pwr_bit = 10, 184 .ack_bit = 14, 185 }, 186 [S500_PD_USB2_0] = { 187 .name = "USB2_0", 188 .pwr_bit = 11, 189 .ack_bit = 15, 190 }, 191 }; 192 193 static const struct owl_sps_info s500_sps_info = { 194 .num_domains = ARRAY_SIZE(s500_sps_domains), 195 .domains = s500_sps_domains, 196 }; 197 198 static const struct owl_sps_domain_info s700_sps_domains[] = { 199 [S700_PD_VDE] = { 200 .name = "VDE", 201 .pwr_bit = 0, 202 }, 203 [S700_PD_VCE_SI] = { 204 .name = "VCE_SI", 205 .pwr_bit = 1, 206 }, 207 [S700_PD_USB2_1] = { 208 .name = "USB2_1", 209 .pwr_bit = 2, 210 }, 211 [S700_PD_HDE] = { 212 .name = "HDE", 213 .pwr_bit = 7, 214 }, 215 [S700_PD_DMA] = { 216 .name = "DMA", 217 .pwr_bit = 8, 218 }, 219 [S700_PD_DS] = { 220 .name = "DS", 221 .pwr_bit = 9, 222 }, 223 [S700_PD_USB3] = { 224 .name = "USB3", 225 .pwr_bit = 10, 226 }, 227 [S700_PD_USB2_0] = { 228 .name = "USB2_0", 229 .pwr_bit = 11, 230 }, 231 }; 232 233 static const struct owl_sps_info s700_sps_info = { 234 .num_domains = ARRAY_SIZE(s700_sps_domains), 235 .domains = s700_sps_domains, 236 }; 237 238 static const struct owl_sps_domain_info s900_sps_domains[] = { 239 [S900_PD_GPU_B] = { 240 .name = "GPU_B", 241 .pwr_bit = 3, 242 }, 243 [S900_PD_VCE] = { 244 .name = "VCE", 245 .pwr_bit = 4, 246 }, 247 [S900_PD_SENSOR] = { 248 .name = "SENSOR", 249 .pwr_bit = 5, 250 }, 251 [S900_PD_VDE] = { 252 .name = "VDE", 253 .pwr_bit = 6, 254 }, 255 [S900_PD_HDE] = { 256 .name = "HDE", 257 .pwr_bit = 7, 258 }, 259 [S900_PD_USB3] = { 260 .name = "USB3", 261 .pwr_bit = 8, 262 }, 263 [S900_PD_DDR0] = { 264 .name = "DDR0", 265 .pwr_bit = 9, 266 }, 267 [S900_PD_DDR1] = { 268 .name = "DDR1", 269 .pwr_bit = 10, 270 }, 271 [S900_PD_DE] = { 272 .name = "DE", 273 .pwr_bit = 13, 274 }, 275 [S900_PD_NAND] = { 276 .name = "NAND", 277 .pwr_bit = 14, 278 }, 279 [S900_PD_USB2_H0] = { 280 .name = "USB2_H0", 281 .pwr_bit = 15, 282 }, 283 [S900_PD_USB2_H1] = { 284 .name = "USB2_H1", 285 .pwr_bit = 16, 286 }, 287 }; 288 289 static const struct owl_sps_info s900_sps_info = { 290 .num_domains = ARRAY_SIZE(s900_sps_domains), 291 .domains = s900_sps_domains, 292 }; 293 294 static const struct of_device_id owl_sps_of_matches[] = { 295 { .compatible = "actions,s500-sps", .data = &s500_sps_info }, 296 { .compatible = "actions,s700-sps", .data = &s700_sps_info }, 297 { .compatible = "actions,s900-sps", .data = &s900_sps_info }, 298 { } 299 }; 300 301 static struct platform_driver owl_sps_platform_driver = { 302 .probe = owl_sps_probe, 303 .driver = { 304 .name = "owl-sps", 305 .of_match_table = owl_sps_of_matches, 306 .suppress_bind_attrs = true, 307 }, 308 }; 309 310 static int __init owl_sps_init(void) 311 { 312 return platform_driver_register(&owl_sps_platform_driver); 313 } 314 postcore_initcall(owl_sps_init); 315