xref: /linux/drivers/pmdomain/actions/owl-sps.c (revision e2ad626f8f409899baf1bf192d0533a851128b19)
1*e2ad626fSUlf Hansson // SPDX-License-Identifier: GPL-2.0+
2*e2ad626fSUlf Hansson /*
3*e2ad626fSUlf Hansson  * Actions Semi Owl Smart Power System (SPS)
4*e2ad626fSUlf Hansson  *
5*e2ad626fSUlf Hansson  * Copyright 2012 Actions Semi Inc.
6*e2ad626fSUlf Hansson  * Author: Actions Semi, Inc.
7*e2ad626fSUlf Hansson  *
8*e2ad626fSUlf Hansson  * Copyright (c) 2017 Andreas Färber
9*e2ad626fSUlf Hansson  */
10*e2ad626fSUlf Hansson 
11*e2ad626fSUlf Hansson #include <linux/of_address.h>
12*e2ad626fSUlf Hansson #include <linux/of_platform.h>
13*e2ad626fSUlf Hansson #include <linux/pm_domain.h>
14*e2ad626fSUlf Hansson #include <linux/soc/actions/owl-sps.h>
15*e2ad626fSUlf Hansson #include <dt-bindings/power/owl-s500-powergate.h>
16*e2ad626fSUlf Hansson #include <dt-bindings/power/owl-s700-powergate.h>
17*e2ad626fSUlf Hansson #include <dt-bindings/power/owl-s900-powergate.h>
18*e2ad626fSUlf Hansson 
19*e2ad626fSUlf Hansson struct owl_sps_domain_info {
20*e2ad626fSUlf Hansson 	const char *name;
21*e2ad626fSUlf Hansson 	int pwr_bit;
22*e2ad626fSUlf Hansson 	int ack_bit;
23*e2ad626fSUlf Hansson 	unsigned int genpd_flags;
24*e2ad626fSUlf Hansson };
25*e2ad626fSUlf Hansson 
26*e2ad626fSUlf Hansson struct owl_sps_info {
27*e2ad626fSUlf Hansson 	unsigned num_domains;
28*e2ad626fSUlf Hansson 	const struct owl_sps_domain_info *domains;
29*e2ad626fSUlf Hansson };
30*e2ad626fSUlf Hansson 
31*e2ad626fSUlf Hansson struct owl_sps {
32*e2ad626fSUlf Hansson 	struct device *dev;
33*e2ad626fSUlf Hansson 	const struct owl_sps_info *info;
34*e2ad626fSUlf Hansson 	void __iomem *base;
35*e2ad626fSUlf Hansson 	struct genpd_onecell_data genpd_data;
36*e2ad626fSUlf Hansson 	struct generic_pm_domain *domains[];
37*e2ad626fSUlf Hansson };
38*e2ad626fSUlf Hansson 
39*e2ad626fSUlf Hansson #define to_owl_pd(gpd) container_of(gpd, struct owl_sps_domain, genpd)
40*e2ad626fSUlf Hansson 
41*e2ad626fSUlf Hansson struct owl_sps_domain {
42*e2ad626fSUlf Hansson 	struct generic_pm_domain genpd;
43*e2ad626fSUlf Hansson 	const struct owl_sps_domain_info *info;
44*e2ad626fSUlf Hansson 	struct owl_sps *sps;
45*e2ad626fSUlf Hansson };
46*e2ad626fSUlf Hansson 
47*e2ad626fSUlf Hansson static int owl_sps_set_power(struct owl_sps_domain *pd, bool enable)
48*e2ad626fSUlf Hansson {
49*e2ad626fSUlf Hansson 	u32 pwr_mask, ack_mask;
50*e2ad626fSUlf Hansson 
51*e2ad626fSUlf Hansson 	ack_mask = BIT(pd->info->ack_bit);
52*e2ad626fSUlf Hansson 	pwr_mask = BIT(pd->info->pwr_bit);
53*e2ad626fSUlf Hansson 
54*e2ad626fSUlf Hansson 	return owl_sps_set_pg(pd->sps->base, pwr_mask, ack_mask, enable);
55*e2ad626fSUlf Hansson }
56*e2ad626fSUlf Hansson 
57*e2ad626fSUlf Hansson static int owl_sps_power_on(struct generic_pm_domain *domain)
58*e2ad626fSUlf Hansson {
59*e2ad626fSUlf Hansson 	struct owl_sps_domain *pd = to_owl_pd(domain);
60*e2ad626fSUlf Hansson 
61*e2ad626fSUlf Hansson 	dev_dbg(pd->sps->dev, "%s power on", pd->info->name);
62*e2ad626fSUlf Hansson 
63*e2ad626fSUlf Hansson 	return owl_sps_set_power(pd, true);
64*e2ad626fSUlf Hansson }
65*e2ad626fSUlf Hansson 
66*e2ad626fSUlf Hansson static int owl_sps_power_off(struct generic_pm_domain *domain)
67*e2ad626fSUlf Hansson {
68*e2ad626fSUlf Hansson 	struct owl_sps_domain *pd = to_owl_pd(domain);
69*e2ad626fSUlf Hansson 
70*e2ad626fSUlf Hansson 	dev_dbg(pd->sps->dev, "%s power off", pd->info->name);
71*e2ad626fSUlf Hansson 
72*e2ad626fSUlf Hansson 	return owl_sps_set_power(pd, false);
73*e2ad626fSUlf Hansson }
74*e2ad626fSUlf Hansson 
75*e2ad626fSUlf Hansson static int owl_sps_init_domain(struct owl_sps *sps, int index)
76*e2ad626fSUlf Hansson {
77*e2ad626fSUlf Hansson 	struct owl_sps_domain *pd;
78*e2ad626fSUlf Hansson 
79*e2ad626fSUlf Hansson 	pd = devm_kzalloc(sps->dev, sizeof(*pd), GFP_KERNEL);
80*e2ad626fSUlf Hansson 	if (!pd)
81*e2ad626fSUlf Hansson 		return -ENOMEM;
82*e2ad626fSUlf Hansson 
83*e2ad626fSUlf Hansson 	pd->info = &sps->info->domains[index];
84*e2ad626fSUlf Hansson 	pd->sps = sps;
85*e2ad626fSUlf Hansson 
86*e2ad626fSUlf Hansson 	pd->genpd.name = pd->info->name;
87*e2ad626fSUlf Hansson 	pd->genpd.power_on = owl_sps_power_on;
88*e2ad626fSUlf Hansson 	pd->genpd.power_off = owl_sps_power_off;
89*e2ad626fSUlf Hansson 	pd->genpd.flags = pd->info->genpd_flags;
90*e2ad626fSUlf Hansson 	pm_genpd_init(&pd->genpd, NULL, false);
91*e2ad626fSUlf Hansson 
92*e2ad626fSUlf Hansson 	sps->genpd_data.domains[index] = &pd->genpd;
93*e2ad626fSUlf Hansson 
94*e2ad626fSUlf Hansson 	return 0;
95*e2ad626fSUlf Hansson }
96*e2ad626fSUlf Hansson 
97*e2ad626fSUlf Hansson static int owl_sps_probe(struct platform_device *pdev)
98*e2ad626fSUlf Hansson {
99*e2ad626fSUlf Hansson 	const struct of_device_id *match;
100*e2ad626fSUlf Hansson 	const struct owl_sps_info *sps_info;
101*e2ad626fSUlf Hansson 	struct owl_sps *sps;
102*e2ad626fSUlf Hansson 	int i, ret;
103*e2ad626fSUlf Hansson 
104*e2ad626fSUlf Hansson 	if (!pdev->dev.of_node) {
105*e2ad626fSUlf Hansson 		dev_err(&pdev->dev, "no device node\n");
106*e2ad626fSUlf Hansson 		return -ENODEV;
107*e2ad626fSUlf Hansson 	}
108*e2ad626fSUlf Hansson 
109*e2ad626fSUlf Hansson 	match = of_match_device(pdev->dev.driver->of_match_table, &pdev->dev);
110*e2ad626fSUlf Hansson 	if (!match || !match->data) {
111*e2ad626fSUlf Hansson 		dev_err(&pdev->dev, "unknown compatible or missing data\n");
112*e2ad626fSUlf Hansson 		return -EINVAL;
113*e2ad626fSUlf Hansson 	}
114*e2ad626fSUlf Hansson 
115*e2ad626fSUlf Hansson 	sps_info = match->data;
116*e2ad626fSUlf Hansson 
117*e2ad626fSUlf Hansson 	sps = devm_kzalloc(&pdev->dev,
118*e2ad626fSUlf Hansson 			   struct_size(sps, domains, sps_info->num_domains),
119*e2ad626fSUlf Hansson 			   GFP_KERNEL);
120*e2ad626fSUlf Hansson 	if (!sps)
121*e2ad626fSUlf Hansson 		return -ENOMEM;
122*e2ad626fSUlf Hansson 
123*e2ad626fSUlf Hansson 	sps->base = of_io_request_and_map(pdev->dev.of_node, 0, "owl-sps");
124*e2ad626fSUlf Hansson 	if (IS_ERR(sps->base)) {
125*e2ad626fSUlf Hansson 		dev_err(&pdev->dev, "failed to map sps registers\n");
126*e2ad626fSUlf Hansson 		return PTR_ERR(sps->base);
127*e2ad626fSUlf Hansson 	}
128*e2ad626fSUlf Hansson 
129*e2ad626fSUlf Hansson 	sps->dev = &pdev->dev;
130*e2ad626fSUlf Hansson 	sps->info = sps_info;
131*e2ad626fSUlf Hansson 	sps->genpd_data.domains = sps->domains;
132*e2ad626fSUlf Hansson 	sps->genpd_data.num_domains = sps_info->num_domains;
133*e2ad626fSUlf Hansson 
134*e2ad626fSUlf Hansson 	for (i = 0; i < sps_info->num_domains; i++) {
135*e2ad626fSUlf Hansson 		ret = owl_sps_init_domain(sps, i);
136*e2ad626fSUlf Hansson 		if (ret)
137*e2ad626fSUlf Hansson 			return ret;
138*e2ad626fSUlf Hansson 	}
139*e2ad626fSUlf Hansson 
140*e2ad626fSUlf Hansson 	ret = of_genpd_add_provider_onecell(pdev->dev.of_node, &sps->genpd_data);
141*e2ad626fSUlf Hansson 	if (ret) {
142*e2ad626fSUlf Hansson 		dev_err(&pdev->dev, "failed to add provider (%d)", ret);
143*e2ad626fSUlf Hansson 		return ret;
144*e2ad626fSUlf Hansson 	}
145*e2ad626fSUlf Hansson 
146*e2ad626fSUlf Hansson 	return 0;
147*e2ad626fSUlf Hansson }
148*e2ad626fSUlf Hansson 
149*e2ad626fSUlf Hansson static const struct owl_sps_domain_info s500_sps_domains[] = {
150*e2ad626fSUlf Hansson 	[S500_PD_VDE] = {
151*e2ad626fSUlf Hansson 		.name = "VDE",
152*e2ad626fSUlf Hansson 		.pwr_bit = 0,
153*e2ad626fSUlf Hansson 		.ack_bit = 16,
154*e2ad626fSUlf Hansson 	},
155*e2ad626fSUlf Hansson 	[S500_PD_VCE_SI] = {
156*e2ad626fSUlf Hansson 		.name = "VCE_SI",
157*e2ad626fSUlf Hansson 		.pwr_bit = 1,
158*e2ad626fSUlf Hansson 		.ack_bit = 17,
159*e2ad626fSUlf Hansson 	},
160*e2ad626fSUlf Hansson 	[S500_PD_USB2_1] = {
161*e2ad626fSUlf Hansson 		.name = "USB2_1",
162*e2ad626fSUlf Hansson 		.pwr_bit = 2,
163*e2ad626fSUlf Hansson 		.ack_bit = 18,
164*e2ad626fSUlf Hansson 	},
165*e2ad626fSUlf Hansson 	[S500_PD_CPU2] = {
166*e2ad626fSUlf Hansson 		.name = "CPU2",
167*e2ad626fSUlf Hansson 		.pwr_bit = 5,
168*e2ad626fSUlf Hansson 		.ack_bit = 21,
169*e2ad626fSUlf Hansson 		.genpd_flags = GENPD_FLAG_ALWAYS_ON,
170*e2ad626fSUlf Hansson 	},
171*e2ad626fSUlf Hansson 	[S500_PD_CPU3] = {
172*e2ad626fSUlf Hansson 		.name = "CPU3",
173*e2ad626fSUlf Hansson 		.pwr_bit = 6,
174*e2ad626fSUlf Hansson 		.ack_bit = 22,
175*e2ad626fSUlf Hansson 		.genpd_flags = GENPD_FLAG_ALWAYS_ON,
176*e2ad626fSUlf Hansson 	},
177*e2ad626fSUlf Hansson 	[S500_PD_DMA] = {
178*e2ad626fSUlf Hansson 		.name = "DMA",
179*e2ad626fSUlf Hansson 		.pwr_bit = 8,
180*e2ad626fSUlf Hansson 		.ack_bit = 12,
181*e2ad626fSUlf Hansson 	},
182*e2ad626fSUlf Hansson 	[S500_PD_DS] = {
183*e2ad626fSUlf Hansson 		.name = "DS",
184*e2ad626fSUlf Hansson 		.pwr_bit = 9,
185*e2ad626fSUlf Hansson 		.ack_bit = 13,
186*e2ad626fSUlf Hansson 	},
187*e2ad626fSUlf Hansson 	[S500_PD_USB3] = {
188*e2ad626fSUlf Hansson 		.name = "USB3",
189*e2ad626fSUlf Hansson 		.pwr_bit = 10,
190*e2ad626fSUlf Hansson 		.ack_bit = 14,
191*e2ad626fSUlf Hansson 	},
192*e2ad626fSUlf Hansson 	[S500_PD_USB2_0] = {
193*e2ad626fSUlf Hansson 		.name = "USB2_0",
194*e2ad626fSUlf Hansson 		.pwr_bit = 11,
195*e2ad626fSUlf Hansson 		.ack_bit = 15,
196*e2ad626fSUlf Hansson 	},
197*e2ad626fSUlf Hansson };
198*e2ad626fSUlf Hansson 
199*e2ad626fSUlf Hansson static const struct owl_sps_info s500_sps_info = {
200*e2ad626fSUlf Hansson 	.num_domains = ARRAY_SIZE(s500_sps_domains),
201*e2ad626fSUlf Hansson 	.domains = s500_sps_domains,
202*e2ad626fSUlf Hansson };
203*e2ad626fSUlf Hansson 
204*e2ad626fSUlf Hansson static const struct owl_sps_domain_info s700_sps_domains[] = {
205*e2ad626fSUlf Hansson 	[S700_PD_VDE] = {
206*e2ad626fSUlf Hansson 		.name = "VDE",
207*e2ad626fSUlf Hansson 		.pwr_bit = 0,
208*e2ad626fSUlf Hansson 	},
209*e2ad626fSUlf Hansson 	[S700_PD_VCE_SI] = {
210*e2ad626fSUlf Hansson 		.name = "VCE_SI",
211*e2ad626fSUlf Hansson 		.pwr_bit = 1,
212*e2ad626fSUlf Hansson 	},
213*e2ad626fSUlf Hansson 	[S700_PD_USB2_1] = {
214*e2ad626fSUlf Hansson 		.name = "USB2_1",
215*e2ad626fSUlf Hansson 		.pwr_bit = 2,
216*e2ad626fSUlf Hansson 	},
217*e2ad626fSUlf Hansson 	[S700_PD_HDE] = {
218*e2ad626fSUlf Hansson 		.name = "HDE",
219*e2ad626fSUlf Hansson 		.pwr_bit = 7,
220*e2ad626fSUlf Hansson 	},
221*e2ad626fSUlf Hansson 	[S700_PD_DMA] = {
222*e2ad626fSUlf Hansson 		.name = "DMA",
223*e2ad626fSUlf Hansson 		.pwr_bit = 8,
224*e2ad626fSUlf Hansson 	},
225*e2ad626fSUlf Hansson 	[S700_PD_DS] = {
226*e2ad626fSUlf Hansson 		.name = "DS",
227*e2ad626fSUlf Hansson 		.pwr_bit = 9,
228*e2ad626fSUlf Hansson 	},
229*e2ad626fSUlf Hansson 	[S700_PD_USB3] = {
230*e2ad626fSUlf Hansson 		.name = "USB3",
231*e2ad626fSUlf Hansson 		.pwr_bit = 10,
232*e2ad626fSUlf Hansson 	},
233*e2ad626fSUlf Hansson 	[S700_PD_USB2_0] = {
234*e2ad626fSUlf Hansson 		.name = "USB2_0",
235*e2ad626fSUlf Hansson 		.pwr_bit = 11,
236*e2ad626fSUlf Hansson 	},
237*e2ad626fSUlf Hansson };
238*e2ad626fSUlf Hansson 
239*e2ad626fSUlf Hansson static const struct owl_sps_info s700_sps_info = {
240*e2ad626fSUlf Hansson 	.num_domains = ARRAY_SIZE(s700_sps_domains),
241*e2ad626fSUlf Hansson 	.domains = s700_sps_domains,
242*e2ad626fSUlf Hansson };
243*e2ad626fSUlf Hansson 
244*e2ad626fSUlf Hansson static const struct owl_sps_domain_info s900_sps_domains[] = {
245*e2ad626fSUlf Hansson 	[S900_PD_GPU_B] = {
246*e2ad626fSUlf Hansson 		.name = "GPU_B",
247*e2ad626fSUlf Hansson 		.pwr_bit = 3,
248*e2ad626fSUlf Hansson 	},
249*e2ad626fSUlf Hansson 	[S900_PD_VCE] = {
250*e2ad626fSUlf Hansson 		.name = "VCE",
251*e2ad626fSUlf Hansson 		.pwr_bit = 4,
252*e2ad626fSUlf Hansson 	},
253*e2ad626fSUlf Hansson 	[S900_PD_SENSOR] = {
254*e2ad626fSUlf Hansson 		.name = "SENSOR",
255*e2ad626fSUlf Hansson 		.pwr_bit = 5,
256*e2ad626fSUlf Hansson 	},
257*e2ad626fSUlf Hansson 	[S900_PD_VDE] = {
258*e2ad626fSUlf Hansson 		.name = "VDE",
259*e2ad626fSUlf Hansson 		.pwr_bit = 6,
260*e2ad626fSUlf Hansson 	},
261*e2ad626fSUlf Hansson 	[S900_PD_HDE] = {
262*e2ad626fSUlf Hansson 		.name = "HDE",
263*e2ad626fSUlf Hansson 		.pwr_bit = 7,
264*e2ad626fSUlf Hansson 	},
265*e2ad626fSUlf Hansson 	[S900_PD_USB3] = {
266*e2ad626fSUlf Hansson 		.name = "USB3",
267*e2ad626fSUlf Hansson 		.pwr_bit = 8,
268*e2ad626fSUlf Hansson 	},
269*e2ad626fSUlf Hansson 	[S900_PD_DDR0] = {
270*e2ad626fSUlf Hansson 		.name = "DDR0",
271*e2ad626fSUlf Hansson 		.pwr_bit = 9,
272*e2ad626fSUlf Hansson 	},
273*e2ad626fSUlf Hansson 	[S900_PD_DDR1] = {
274*e2ad626fSUlf Hansson 		.name = "DDR1",
275*e2ad626fSUlf Hansson 		.pwr_bit = 10,
276*e2ad626fSUlf Hansson 	},
277*e2ad626fSUlf Hansson 	[S900_PD_DE] = {
278*e2ad626fSUlf Hansson 		.name = "DE",
279*e2ad626fSUlf Hansson 		.pwr_bit = 13,
280*e2ad626fSUlf Hansson 	},
281*e2ad626fSUlf Hansson 	[S900_PD_NAND] = {
282*e2ad626fSUlf Hansson 		.name = "NAND",
283*e2ad626fSUlf Hansson 		.pwr_bit = 14,
284*e2ad626fSUlf Hansson 	},
285*e2ad626fSUlf Hansson 	[S900_PD_USB2_H0] = {
286*e2ad626fSUlf Hansson 		.name = "USB2_H0",
287*e2ad626fSUlf Hansson 		.pwr_bit = 15,
288*e2ad626fSUlf Hansson 	},
289*e2ad626fSUlf Hansson 	[S900_PD_USB2_H1] = {
290*e2ad626fSUlf Hansson 		.name = "USB2_H1",
291*e2ad626fSUlf Hansson 		.pwr_bit = 16,
292*e2ad626fSUlf Hansson 	},
293*e2ad626fSUlf Hansson };
294*e2ad626fSUlf Hansson 
295*e2ad626fSUlf Hansson static const struct owl_sps_info s900_sps_info = {
296*e2ad626fSUlf Hansson 	.num_domains = ARRAY_SIZE(s900_sps_domains),
297*e2ad626fSUlf Hansson 	.domains = s900_sps_domains,
298*e2ad626fSUlf Hansson };
299*e2ad626fSUlf Hansson 
300*e2ad626fSUlf Hansson static const struct of_device_id owl_sps_of_matches[] = {
301*e2ad626fSUlf Hansson 	{ .compatible = "actions,s500-sps", .data = &s500_sps_info },
302*e2ad626fSUlf Hansson 	{ .compatible = "actions,s700-sps", .data = &s700_sps_info },
303*e2ad626fSUlf Hansson 	{ .compatible = "actions,s900-sps", .data = &s900_sps_info },
304*e2ad626fSUlf Hansson 	{ }
305*e2ad626fSUlf Hansson };
306*e2ad626fSUlf Hansson 
307*e2ad626fSUlf Hansson static struct platform_driver owl_sps_platform_driver = {
308*e2ad626fSUlf Hansson 	.probe = owl_sps_probe,
309*e2ad626fSUlf Hansson 	.driver = {
310*e2ad626fSUlf Hansson 		.name = "owl-sps",
311*e2ad626fSUlf Hansson 		.of_match_table = owl_sps_of_matches,
312*e2ad626fSUlf Hansson 		.suppress_bind_attrs = true,
313*e2ad626fSUlf Hansson 	},
314*e2ad626fSUlf Hansson };
315*e2ad626fSUlf Hansson 
316*e2ad626fSUlf Hansson static int __init owl_sps_init(void)
317*e2ad626fSUlf Hansson {
318*e2ad626fSUlf Hansson 	return platform_driver_register(&owl_sps_platform_driver);
319*e2ad626fSUlf Hansson }
320*e2ad626fSUlf Hansson postcore_initcall(owl_sps_init);
321