1e2ad626fSUlf Hansson // SPDX-License-Identifier: GPL-2.0+ 2e2ad626fSUlf Hansson /* 3e2ad626fSUlf Hansson * Actions Semi Owl Smart Power System (SPS) 4e2ad626fSUlf Hansson * 5e2ad626fSUlf Hansson * Copyright 2012 Actions Semi Inc. 6e2ad626fSUlf Hansson * Author: Actions Semi, Inc. 7e2ad626fSUlf Hansson * 8e2ad626fSUlf Hansson * Copyright (c) 2017 Andreas Färber 9e2ad626fSUlf Hansson */ 10e2ad626fSUlf Hansson 11*3ba9fdfaSRob Herring #include <linux/mod_devicetable.h> 12e2ad626fSUlf Hansson #include <linux/of_address.h> 13*3ba9fdfaSRob Herring #include <linux/platform_device.h> 14*3ba9fdfaSRob Herring #include <linux/property.h> 15e2ad626fSUlf Hansson #include <linux/pm_domain.h> 16e2ad626fSUlf Hansson #include <linux/soc/actions/owl-sps.h> 17e2ad626fSUlf Hansson #include <dt-bindings/power/owl-s500-powergate.h> 18e2ad626fSUlf Hansson #include <dt-bindings/power/owl-s700-powergate.h> 19e2ad626fSUlf Hansson #include <dt-bindings/power/owl-s900-powergate.h> 20e2ad626fSUlf Hansson 21e2ad626fSUlf Hansson struct owl_sps_domain_info { 22e2ad626fSUlf Hansson const char *name; 23e2ad626fSUlf Hansson int pwr_bit; 24e2ad626fSUlf Hansson int ack_bit; 25e2ad626fSUlf Hansson unsigned int genpd_flags; 26e2ad626fSUlf Hansson }; 27e2ad626fSUlf Hansson 28e2ad626fSUlf Hansson struct owl_sps_info { 29e2ad626fSUlf Hansson unsigned num_domains; 30e2ad626fSUlf Hansson const struct owl_sps_domain_info *domains; 31e2ad626fSUlf Hansson }; 32e2ad626fSUlf Hansson 33e2ad626fSUlf Hansson struct owl_sps { 34e2ad626fSUlf Hansson struct device *dev; 35e2ad626fSUlf Hansson const struct owl_sps_info *info; 36e2ad626fSUlf Hansson void __iomem *base; 37e2ad626fSUlf Hansson struct genpd_onecell_data genpd_data; 38e2ad626fSUlf Hansson struct generic_pm_domain *domains[]; 39e2ad626fSUlf Hansson }; 40e2ad626fSUlf Hansson 41e2ad626fSUlf Hansson #define to_owl_pd(gpd) container_of(gpd, struct owl_sps_domain, genpd) 42e2ad626fSUlf Hansson 43e2ad626fSUlf Hansson struct owl_sps_domain { 44e2ad626fSUlf Hansson struct generic_pm_domain genpd; 45e2ad626fSUlf Hansson const struct owl_sps_domain_info *info; 46e2ad626fSUlf Hansson struct owl_sps *sps; 47e2ad626fSUlf Hansson }; 48e2ad626fSUlf Hansson 49e2ad626fSUlf Hansson static int owl_sps_set_power(struct owl_sps_domain *pd, bool enable) 50e2ad626fSUlf Hansson { 51e2ad626fSUlf Hansson u32 pwr_mask, ack_mask; 52e2ad626fSUlf Hansson 53e2ad626fSUlf Hansson ack_mask = BIT(pd->info->ack_bit); 54e2ad626fSUlf Hansson pwr_mask = BIT(pd->info->pwr_bit); 55e2ad626fSUlf Hansson 56e2ad626fSUlf Hansson return owl_sps_set_pg(pd->sps->base, pwr_mask, ack_mask, enable); 57e2ad626fSUlf Hansson } 58e2ad626fSUlf Hansson 59e2ad626fSUlf Hansson static int owl_sps_power_on(struct generic_pm_domain *domain) 60e2ad626fSUlf Hansson { 61e2ad626fSUlf Hansson struct owl_sps_domain *pd = to_owl_pd(domain); 62e2ad626fSUlf Hansson 63e2ad626fSUlf Hansson dev_dbg(pd->sps->dev, "%s power on", pd->info->name); 64e2ad626fSUlf Hansson 65e2ad626fSUlf Hansson return owl_sps_set_power(pd, true); 66e2ad626fSUlf Hansson } 67e2ad626fSUlf Hansson 68e2ad626fSUlf Hansson static int owl_sps_power_off(struct generic_pm_domain *domain) 69e2ad626fSUlf Hansson { 70e2ad626fSUlf Hansson struct owl_sps_domain *pd = to_owl_pd(domain); 71e2ad626fSUlf Hansson 72e2ad626fSUlf Hansson dev_dbg(pd->sps->dev, "%s power off", pd->info->name); 73e2ad626fSUlf Hansson 74e2ad626fSUlf Hansson return owl_sps_set_power(pd, false); 75e2ad626fSUlf Hansson } 76e2ad626fSUlf Hansson 77e2ad626fSUlf Hansson static int owl_sps_init_domain(struct owl_sps *sps, int index) 78e2ad626fSUlf Hansson { 79e2ad626fSUlf Hansson struct owl_sps_domain *pd; 80e2ad626fSUlf Hansson 81e2ad626fSUlf Hansson pd = devm_kzalloc(sps->dev, sizeof(*pd), GFP_KERNEL); 82e2ad626fSUlf Hansson if (!pd) 83e2ad626fSUlf Hansson return -ENOMEM; 84e2ad626fSUlf Hansson 85e2ad626fSUlf Hansson pd->info = &sps->info->domains[index]; 86e2ad626fSUlf Hansson pd->sps = sps; 87e2ad626fSUlf Hansson 88e2ad626fSUlf Hansson pd->genpd.name = pd->info->name; 89e2ad626fSUlf Hansson pd->genpd.power_on = owl_sps_power_on; 90e2ad626fSUlf Hansson pd->genpd.power_off = owl_sps_power_off; 91e2ad626fSUlf Hansson pd->genpd.flags = pd->info->genpd_flags; 92e2ad626fSUlf Hansson pm_genpd_init(&pd->genpd, NULL, false); 93e2ad626fSUlf Hansson 94e2ad626fSUlf Hansson sps->genpd_data.domains[index] = &pd->genpd; 95e2ad626fSUlf Hansson 96e2ad626fSUlf Hansson return 0; 97e2ad626fSUlf Hansson } 98e2ad626fSUlf Hansson 99e2ad626fSUlf Hansson static int owl_sps_probe(struct platform_device *pdev) 100e2ad626fSUlf Hansson { 101e2ad626fSUlf Hansson const struct owl_sps_info *sps_info; 102e2ad626fSUlf Hansson struct owl_sps *sps; 103e2ad626fSUlf Hansson int i, ret; 104e2ad626fSUlf Hansson 105*3ba9fdfaSRob Herring sps_info = device_get_match_data(&pdev->dev); 106*3ba9fdfaSRob Herring if (!sps_info) { 107e2ad626fSUlf Hansson dev_err(&pdev->dev, "unknown compatible or missing data\n"); 108e2ad626fSUlf Hansson return -EINVAL; 109e2ad626fSUlf Hansson } 110e2ad626fSUlf Hansson 111e2ad626fSUlf Hansson sps = devm_kzalloc(&pdev->dev, 112e2ad626fSUlf Hansson struct_size(sps, domains, sps_info->num_domains), 113e2ad626fSUlf Hansson GFP_KERNEL); 114e2ad626fSUlf Hansson if (!sps) 115e2ad626fSUlf Hansson return -ENOMEM; 116e2ad626fSUlf Hansson 117e2ad626fSUlf Hansson sps->base = of_io_request_and_map(pdev->dev.of_node, 0, "owl-sps"); 118e2ad626fSUlf Hansson if (IS_ERR(sps->base)) { 119e2ad626fSUlf Hansson dev_err(&pdev->dev, "failed to map sps registers\n"); 120e2ad626fSUlf Hansson return PTR_ERR(sps->base); 121e2ad626fSUlf Hansson } 122e2ad626fSUlf Hansson 123e2ad626fSUlf Hansson sps->dev = &pdev->dev; 124e2ad626fSUlf Hansson sps->info = sps_info; 125e2ad626fSUlf Hansson sps->genpd_data.domains = sps->domains; 126e2ad626fSUlf Hansson sps->genpd_data.num_domains = sps_info->num_domains; 127e2ad626fSUlf Hansson 128e2ad626fSUlf Hansson for (i = 0; i < sps_info->num_domains; i++) { 129e2ad626fSUlf Hansson ret = owl_sps_init_domain(sps, i); 130e2ad626fSUlf Hansson if (ret) 131e2ad626fSUlf Hansson return ret; 132e2ad626fSUlf Hansson } 133e2ad626fSUlf Hansson 134e2ad626fSUlf Hansson ret = of_genpd_add_provider_onecell(pdev->dev.of_node, &sps->genpd_data); 135e2ad626fSUlf Hansson if (ret) { 136e2ad626fSUlf Hansson dev_err(&pdev->dev, "failed to add provider (%d)", ret); 137e2ad626fSUlf Hansson return ret; 138e2ad626fSUlf Hansson } 139e2ad626fSUlf Hansson 140e2ad626fSUlf Hansson return 0; 141e2ad626fSUlf Hansson } 142e2ad626fSUlf Hansson 143e2ad626fSUlf Hansson static const struct owl_sps_domain_info s500_sps_domains[] = { 144e2ad626fSUlf Hansson [S500_PD_VDE] = { 145e2ad626fSUlf Hansson .name = "VDE", 146e2ad626fSUlf Hansson .pwr_bit = 0, 147e2ad626fSUlf Hansson .ack_bit = 16, 148e2ad626fSUlf Hansson }, 149e2ad626fSUlf Hansson [S500_PD_VCE_SI] = { 150e2ad626fSUlf Hansson .name = "VCE_SI", 151e2ad626fSUlf Hansson .pwr_bit = 1, 152e2ad626fSUlf Hansson .ack_bit = 17, 153e2ad626fSUlf Hansson }, 154e2ad626fSUlf Hansson [S500_PD_USB2_1] = { 155e2ad626fSUlf Hansson .name = "USB2_1", 156e2ad626fSUlf Hansson .pwr_bit = 2, 157e2ad626fSUlf Hansson .ack_bit = 18, 158e2ad626fSUlf Hansson }, 159e2ad626fSUlf Hansson [S500_PD_CPU2] = { 160e2ad626fSUlf Hansson .name = "CPU2", 161e2ad626fSUlf Hansson .pwr_bit = 5, 162e2ad626fSUlf Hansson .ack_bit = 21, 163e2ad626fSUlf Hansson .genpd_flags = GENPD_FLAG_ALWAYS_ON, 164e2ad626fSUlf Hansson }, 165e2ad626fSUlf Hansson [S500_PD_CPU3] = { 166e2ad626fSUlf Hansson .name = "CPU3", 167e2ad626fSUlf Hansson .pwr_bit = 6, 168e2ad626fSUlf Hansson .ack_bit = 22, 169e2ad626fSUlf Hansson .genpd_flags = GENPD_FLAG_ALWAYS_ON, 170e2ad626fSUlf Hansson }, 171e2ad626fSUlf Hansson [S500_PD_DMA] = { 172e2ad626fSUlf Hansson .name = "DMA", 173e2ad626fSUlf Hansson .pwr_bit = 8, 174e2ad626fSUlf Hansson .ack_bit = 12, 175e2ad626fSUlf Hansson }, 176e2ad626fSUlf Hansson [S500_PD_DS] = { 177e2ad626fSUlf Hansson .name = "DS", 178e2ad626fSUlf Hansson .pwr_bit = 9, 179e2ad626fSUlf Hansson .ack_bit = 13, 180e2ad626fSUlf Hansson }, 181e2ad626fSUlf Hansson [S500_PD_USB3] = { 182e2ad626fSUlf Hansson .name = "USB3", 183e2ad626fSUlf Hansson .pwr_bit = 10, 184e2ad626fSUlf Hansson .ack_bit = 14, 185e2ad626fSUlf Hansson }, 186e2ad626fSUlf Hansson [S500_PD_USB2_0] = { 187e2ad626fSUlf Hansson .name = "USB2_0", 188e2ad626fSUlf Hansson .pwr_bit = 11, 189e2ad626fSUlf Hansson .ack_bit = 15, 190e2ad626fSUlf Hansson }, 191e2ad626fSUlf Hansson }; 192e2ad626fSUlf Hansson 193e2ad626fSUlf Hansson static const struct owl_sps_info s500_sps_info = { 194e2ad626fSUlf Hansson .num_domains = ARRAY_SIZE(s500_sps_domains), 195e2ad626fSUlf Hansson .domains = s500_sps_domains, 196e2ad626fSUlf Hansson }; 197e2ad626fSUlf Hansson 198e2ad626fSUlf Hansson static const struct owl_sps_domain_info s700_sps_domains[] = { 199e2ad626fSUlf Hansson [S700_PD_VDE] = { 200e2ad626fSUlf Hansson .name = "VDE", 201e2ad626fSUlf Hansson .pwr_bit = 0, 202e2ad626fSUlf Hansson }, 203e2ad626fSUlf Hansson [S700_PD_VCE_SI] = { 204e2ad626fSUlf Hansson .name = "VCE_SI", 205e2ad626fSUlf Hansson .pwr_bit = 1, 206e2ad626fSUlf Hansson }, 207e2ad626fSUlf Hansson [S700_PD_USB2_1] = { 208e2ad626fSUlf Hansson .name = "USB2_1", 209e2ad626fSUlf Hansson .pwr_bit = 2, 210e2ad626fSUlf Hansson }, 211e2ad626fSUlf Hansson [S700_PD_HDE] = { 212e2ad626fSUlf Hansson .name = "HDE", 213e2ad626fSUlf Hansson .pwr_bit = 7, 214e2ad626fSUlf Hansson }, 215e2ad626fSUlf Hansson [S700_PD_DMA] = { 216e2ad626fSUlf Hansson .name = "DMA", 217e2ad626fSUlf Hansson .pwr_bit = 8, 218e2ad626fSUlf Hansson }, 219e2ad626fSUlf Hansson [S700_PD_DS] = { 220e2ad626fSUlf Hansson .name = "DS", 221e2ad626fSUlf Hansson .pwr_bit = 9, 222e2ad626fSUlf Hansson }, 223e2ad626fSUlf Hansson [S700_PD_USB3] = { 224e2ad626fSUlf Hansson .name = "USB3", 225e2ad626fSUlf Hansson .pwr_bit = 10, 226e2ad626fSUlf Hansson }, 227e2ad626fSUlf Hansson [S700_PD_USB2_0] = { 228e2ad626fSUlf Hansson .name = "USB2_0", 229e2ad626fSUlf Hansson .pwr_bit = 11, 230e2ad626fSUlf Hansson }, 231e2ad626fSUlf Hansson }; 232e2ad626fSUlf Hansson 233e2ad626fSUlf Hansson static const struct owl_sps_info s700_sps_info = { 234e2ad626fSUlf Hansson .num_domains = ARRAY_SIZE(s700_sps_domains), 235e2ad626fSUlf Hansson .domains = s700_sps_domains, 236e2ad626fSUlf Hansson }; 237e2ad626fSUlf Hansson 238e2ad626fSUlf Hansson static const struct owl_sps_domain_info s900_sps_domains[] = { 239e2ad626fSUlf Hansson [S900_PD_GPU_B] = { 240e2ad626fSUlf Hansson .name = "GPU_B", 241e2ad626fSUlf Hansson .pwr_bit = 3, 242e2ad626fSUlf Hansson }, 243e2ad626fSUlf Hansson [S900_PD_VCE] = { 244e2ad626fSUlf Hansson .name = "VCE", 245e2ad626fSUlf Hansson .pwr_bit = 4, 246e2ad626fSUlf Hansson }, 247e2ad626fSUlf Hansson [S900_PD_SENSOR] = { 248e2ad626fSUlf Hansson .name = "SENSOR", 249e2ad626fSUlf Hansson .pwr_bit = 5, 250e2ad626fSUlf Hansson }, 251e2ad626fSUlf Hansson [S900_PD_VDE] = { 252e2ad626fSUlf Hansson .name = "VDE", 253e2ad626fSUlf Hansson .pwr_bit = 6, 254e2ad626fSUlf Hansson }, 255e2ad626fSUlf Hansson [S900_PD_HDE] = { 256e2ad626fSUlf Hansson .name = "HDE", 257e2ad626fSUlf Hansson .pwr_bit = 7, 258e2ad626fSUlf Hansson }, 259e2ad626fSUlf Hansson [S900_PD_USB3] = { 260e2ad626fSUlf Hansson .name = "USB3", 261e2ad626fSUlf Hansson .pwr_bit = 8, 262e2ad626fSUlf Hansson }, 263e2ad626fSUlf Hansson [S900_PD_DDR0] = { 264e2ad626fSUlf Hansson .name = "DDR0", 265e2ad626fSUlf Hansson .pwr_bit = 9, 266e2ad626fSUlf Hansson }, 267e2ad626fSUlf Hansson [S900_PD_DDR1] = { 268e2ad626fSUlf Hansson .name = "DDR1", 269e2ad626fSUlf Hansson .pwr_bit = 10, 270e2ad626fSUlf Hansson }, 271e2ad626fSUlf Hansson [S900_PD_DE] = { 272e2ad626fSUlf Hansson .name = "DE", 273e2ad626fSUlf Hansson .pwr_bit = 13, 274e2ad626fSUlf Hansson }, 275e2ad626fSUlf Hansson [S900_PD_NAND] = { 276e2ad626fSUlf Hansson .name = "NAND", 277e2ad626fSUlf Hansson .pwr_bit = 14, 278e2ad626fSUlf Hansson }, 279e2ad626fSUlf Hansson [S900_PD_USB2_H0] = { 280e2ad626fSUlf Hansson .name = "USB2_H0", 281e2ad626fSUlf Hansson .pwr_bit = 15, 282e2ad626fSUlf Hansson }, 283e2ad626fSUlf Hansson [S900_PD_USB2_H1] = { 284e2ad626fSUlf Hansson .name = "USB2_H1", 285e2ad626fSUlf Hansson .pwr_bit = 16, 286e2ad626fSUlf Hansson }, 287e2ad626fSUlf Hansson }; 288e2ad626fSUlf Hansson 289e2ad626fSUlf Hansson static const struct owl_sps_info s900_sps_info = { 290e2ad626fSUlf Hansson .num_domains = ARRAY_SIZE(s900_sps_domains), 291e2ad626fSUlf Hansson .domains = s900_sps_domains, 292e2ad626fSUlf Hansson }; 293e2ad626fSUlf Hansson 294e2ad626fSUlf Hansson static const struct of_device_id owl_sps_of_matches[] = { 295e2ad626fSUlf Hansson { .compatible = "actions,s500-sps", .data = &s500_sps_info }, 296e2ad626fSUlf Hansson { .compatible = "actions,s700-sps", .data = &s700_sps_info }, 297e2ad626fSUlf Hansson { .compatible = "actions,s900-sps", .data = &s900_sps_info }, 298e2ad626fSUlf Hansson { } 299e2ad626fSUlf Hansson }; 300e2ad626fSUlf Hansson 301e2ad626fSUlf Hansson static struct platform_driver owl_sps_platform_driver = { 302e2ad626fSUlf Hansson .probe = owl_sps_probe, 303e2ad626fSUlf Hansson .driver = { 304e2ad626fSUlf Hansson .name = "owl-sps", 305e2ad626fSUlf Hansson .of_match_table = owl_sps_of_matches, 306e2ad626fSUlf Hansson .suppress_bind_attrs = true, 307e2ad626fSUlf Hansson }, 308e2ad626fSUlf Hansson }; 309e2ad626fSUlf Hansson 310e2ad626fSUlf Hansson static int __init owl_sps_init(void) 311e2ad626fSUlf Hansson { 312e2ad626fSUlf Hansson return platform_driver_register(&owl_sps_platform_driver); 313e2ad626fSUlf Hansson } 314e2ad626fSUlf Hansson postcore_initcall(owl_sps_init); 315