xref: /linux/drivers/platform/x86/uniwill/uniwill-acpi.c (revision e02c8d7a197d8a94e30fdcdee2a626d8a9ae1549)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Linux driver for Uniwill notebooks.
4  *
5  * Special thanks go to Pőcze Barnabás, Christoffer Sandberg and Werner Sembach
6  * for supporting the development of this driver either through prior work or
7  * by answering questions regarding the underlying ACPI and WMI interfaces.
8  *
9  * Copyright (C) 2025 Armin Wolf <W_Armin@gmx.de>
10  */
11 
12 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13 
14 #include <linux/acpi.h>
15 #include <linux/array_size.h>
16 #include <linux/bits.h>
17 #include <linux/bitfield.h>
18 #include <linux/cleanup.h>
19 #include <linux/debugfs.h>
20 #include <linux/delay.h>
21 #include <linux/device.h>
22 #include <linux/device/driver.h>
23 #include <linux/dmi.h>
24 #include <linux/errno.h>
25 #include <linux/fixp-arith.h>
26 #include <linux/hwmon.h>
27 #include <linux/hwmon-sysfs.h>
28 #include <linux/init.h>
29 #include <linux/input.h>
30 #include <linux/input/sparse-keymap.h>
31 #include <linux/kernel.h>
32 #include <linux/kstrtox.h>
33 #include <linux/leds.h>
34 #include <linux/led-class-multicolor.h>
35 #include <linux/limits.h>
36 #include <linux/list.h>
37 #include <linux/minmax.h>
38 #include <linux/module.h>
39 #include <linux/mutex.h>
40 #include <linux/notifier.h>
41 #include <linux/platform_device.h>
42 #include <linux/pm.h>
43 #include <linux/printk.h>
44 #include <linux/regmap.h>
45 #include <linux/string.h>
46 #include <linux/sysfs.h>
47 #include <linux/types.h>
48 #include <linux/units.h>
49 
50 #include <acpi/battery.h>
51 
52 #include "uniwill-wmi.h"
53 
54 #define EC_ADDR_BAT_POWER_UNIT_1	0x0400
55 
56 #define EC_ADDR_BAT_POWER_UNIT_2	0x0401
57 
58 #define EC_ADDR_BAT_DESIGN_CAPACITY_1	0x0402
59 
60 #define EC_ADDR_BAT_DESIGN_CAPACITY_2	0x0403
61 
62 #define EC_ADDR_BAT_FULL_CAPACITY_1	0x0404
63 
64 #define EC_ADDR_BAT_FULL_CAPACITY_2	0x0405
65 
66 #define EC_ADDR_BAT_DESIGN_VOLTAGE_1	0x0408
67 
68 #define EC_ADDR_BAT_DESIGN_VOLTAGE_2	0x0409
69 
70 #define EC_ADDR_BAT_STATUS_1		0x0432
71 #define BAT_DISCHARGING			BIT(0)
72 
73 #define EC_ADDR_BAT_STATUS_2		0x0433
74 
75 #define EC_ADDR_BAT_CURRENT_1		0x0434
76 
77 #define EC_ADDR_BAT_CURRENT_2		0x0435
78 
79 #define EC_ADDR_BAT_REMAIN_CAPACITY_1	0x0436
80 
81 #define EC_ADDR_BAT_REMAIN_CAPACITY_2	0x0437
82 
83 #define EC_ADDR_BAT_VOLTAGE_1		0x0438
84 
85 #define EC_ADDR_BAT_VOLTAGE_2		0x0439
86 
87 #define EC_ADDR_CPU_TEMP		0x043E
88 
89 #define EC_ADDR_GPU_TEMP		0x044F
90 
91 #define EC_ADDR_SYSTEM_ID		0x0456
92 #define HAS_GPU				BIT(7)
93 
94 #define EC_ADDR_MAIN_FAN_RPM_1		0x0464
95 
96 #define EC_ADDR_MAIN_FAN_RPM_2		0x0465
97 
98 #define EC_ADDR_SCREEN_STATUS		0x0466
99 #define SCREEN_SUSPENDED		BIT(6)
100 
101 #define EC_ADDR_SECOND_FAN_RPM_1	0x046C
102 
103 #define EC_ADDR_SECOND_FAN_RPM_2	0x046D
104 
105 #define EC_ADDR_DEVICE_STATUS		0x047B
106 #define WIFI_STATUS_ON			BIT(7)
107 /* BIT(5) is also unset depending on the rfkill state (bluetooth?) */
108 
109 #define EC_ADDR_BAT_ALERT		0x0494
110 
111 #define EC_ADDR_BAT_CYCLE_COUNT_1	0x04A6
112 
113 #define EC_ADDR_BAT_CYCLE_COUNT_2	0x04A7
114 
115 #define EC_ADDR_OEM_9			0x0726
116 #define AC_AUTO_BOOT_ENABLE		BIT(3)
117 
118 #define EC_ADDR_PROJECT_ID		0x0740
119 #define PROJECT_ID_NONE			0x00
120 #define PROJECT_ID_GI			0x01
121 #define PROJECT_ID_GJ			0x02
122 #define PROJECT_ID_GK			0x03
123 #define PROJECT_ID_GICN			0x04
124 #define PROJECT_ID_GJCN			0x05
125 #define PROJECT_ID_GK5CN_X		0x06
126 #define PROJECT_ID_GK7CN_S		0x07
127 #define PROJECT_ID_GK7CPCS_GK5CQ7Z	0x08
128 #define PROJECT_ID_PF			0x09
129 #define PROJECT_ID_GK5CP_4X_5X_6X	0x0A
130 #define PROJECT_ID_IDP			0x0B
131 #define PROJECT_ID_IDY_6Y		0x0C
132 #define PROJECT_ID_IDY_7Y		0x0D
133 #define PROJECT_ID_PF4MU_PF4MN_PF5MU	0x0E
134 #define PROJECT_ID_CML_GAMING		0x0F
135 #define PROJECT_ID_GK7NXXR		0x10
136 #define PROJECT_ID_GM5MU1Y		0x11
137 #define PROJECT_ID_PH4TRX1		0x12
138 #define PROJECT_ID_PH4TUX1		0x13
139 #define PROJECT_ID_PH4TQX1		0x14
140 #define PROJECT_ID_PH6TRX1		0x15
141 #define PROJECT_ID_PH6TQXX		0x16
142 #define PROJECT_ID_PHXAXXX		0x17
143 #define PROJECT_ID_PHXPXXX		0x18
144 
145 #define EC_ADDR_AP_OEM			0x0741
146 #define	ENABLE_MANUAL_CTRL		BIT(0)
147 #define ITE_KBD_EFFECT_REACTIVE		BIT(3)
148 #define FAN_ABNORMAL			BIT(5)
149 
150 #define EC_ADDR_SUPPORT_5		0x0742
151 #define FAN_TURBO_SUPPORTED		BIT(4)
152 #define FAN_SUPPORT			BIT(5)
153 
154 #define EC_ADDR_CTGP_DB_CTRL		0x0743
155 #define CTGP_DB_GENERAL_ENABLE		BIT(0)
156 #define CTGP_DB_DB_ENABLE		BIT(1)
157 #define CTGP_DB_CTGP_ENABLE		BIT(2)
158 
159 #define EC_ADDR_CTGP_DB_CTGP_OFFSET	0x0744
160 
161 #define EC_ADDR_CTGP_DB_TPP_OFFSET	0x0745
162 
163 #define EC_ADDR_CTGP_DB_DB_OFFSET	0x0746
164 
165 #define EC_ADDR_LIGHTBAR_AC_CTRL	0x0748
166 #define LIGHTBAR_APP_EXISTS		BIT(0)
167 #define LIGHTBAR_POWER_SAVE		BIT(1)
168 #define LIGHTBAR_S0_OFF			BIT(2)
169 #define LIGHTBAR_S3_OFF			BIT(3)	// Breathing animation when suspended
170 #define LIGHTBAR_WELCOME		BIT(7)	// Rainbow animation
171 
172 #define EC_ADDR_LIGHTBAR_AC_RED		0x0749
173 
174 #define EC_ADDR_LIGHTBAR_AC_GREEN	0x074A
175 
176 #define EC_ADDR_LIGHTBAR_AC_BLUE	0x074B
177 
178 #define EC_ADDR_BIOS_OEM		0x074E
179 #define FN_LOCK_STATUS			BIT(4)
180 
181 #define EC_ADDR_MANUAL_FAN_CTRL		0x0751
182 #define FAN_LEVEL_MASK			GENMASK(2, 0)
183 #define FAN_MODE_TURBO			BIT(4)
184 #define FAN_MODE_HIGH			BIT(5)
185 #define FAN_MODE_BOOST			BIT(6)
186 #define FAN_MODE_USER			BIT(7)
187 
188 #define EC_ADDR_PWM_1			0x075B
189 
190 #define EC_ADDR_PWM_2			0x075C
191 
192 /* Unreliable */
193 #define EC_ADDR_SUPPORT_1		0x0765
194 #define AIRPLANE_MODE			BIT(0)
195 #define GPS_SWITCH			BIT(1)
196 #define OVERCLOCK			BIT(2)
197 #define MACRO_KEY			BIT(3)
198 #define SHORTCUT_KEY			BIT(4)
199 #define SUPER_KEY_LOCK			BIT(5)
200 #define LIGHTBAR			BIT(6)
201 #define FAN_BOOST			BIT(7)
202 
203 #define EC_ADDR_SUPPORT_2		0x0766
204 #define SILENT_MODE			BIT(0)
205 #define USB_CHARGING			BIT(1)
206 #define RGB_KEYBOARD			BIT(2)
207 #define CHINA_MODE			BIT(5)
208 #define MY_BATTERY			BIT(6)
209 
210 #define EC_ADDR_TRIGGER			0x0767
211 #define TRIGGER_SUPER_KEY_LOCK		BIT(0)
212 #define TRIGGER_LIGHTBAR		BIT(1)
213 #define TRIGGER_FAN_BOOST		BIT(2)
214 #define TRIGGER_SILENT_MODE		BIT(3)
215 #define TRIGGER_USB_CHARGING		BIT(4)
216 #define RGB_APPLY_COLOR			BIT(5)
217 #define RGB_LOGO_EFFECT			BIT(6)
218 #define RGB_RAINBOW_EFFECT		BIT(7)
219 
220 #define EC_ADDR_SWITCH_STATUS		0x0768
221 #define SUPER_KEY_LOCK_STATUS		BIT(0)
222 #define LIGHTBAR_STATUS			BIT(1)
223 #define FAN_BOOST_STATUS		BIT(2)
224 #define MACRO_KEY_STATUS		BIT(3)
225 #define MY_BAT_POWER_BAT_STATUS		BIT(4)
226 
227 #define EC_ADDR_RGB_RED			0x0769
228 
229 #define EC_ADDR_RGB_GREEN		0x076A
230 
231 #define EC_ADDR_RGB_BLUE		0x076B
232 
233 #define EC_ADDR_ROMID_START		0x0770
234 #define ROMID_LENGTH			14
235 
236 #define EC_ADDR_ROMID_EXTRA_1		0x077E
237 
238 #define EC_ADDR_ROMID_EXTRA_2		0x077F
239 
240 #define EC_ADDR_BIOS_OEM_2		0x0782
241 #define FAN_V2_NEW			BIT(0)
242 #define FAN_QKEY			BIT(1)
243 #define FAN_TABLE_OFFICE_MODE		BIT(2)
244 #define FAN_V3				BIT(3)
245 #define DEFAULT_MODE			BIT(4)
246 #define ENABLE_CHINA_MODE		BIT(6)
247 
248 #define EC_ADDR_PL1_SETTING		0x0783
249 
250 #define EC_ADDR_PL2_SETTING		0x0784
251 
252 #define EC_ADDR_PL4_SETTING		0x0785
253 
254 #define EC_ADDR_FAN_DEFAULT		0x0786
255 #define FAN_CURVE_LENGTH		5
256 
257 #define EC_ADDR_KBD_STATUS		0x078C
258 #define KBD_WHITE_ONLY			BIT(0)
259 #define KBD_POWER_OFF			BIT(1)
260 #define KBD_TURBO_LEVEL_MASK		GENMASK(3, 2)
261 #define KBD_APPLY			BIT(4)
262 #define KBD_BRIGHTNESS_MASK		GENMASK(7, 5)
263 
264 #define EC_ADDR_FAN_CTRL		0x078E
265 #define FAN3P5				BIT(1)
266 #define CHARGING_PROFILE		BIT(3)
267 #define UNIVERSAL_FAN_CTRL		BIT(6)
268 
269 #define EC_ADDR_BIOS_OEM_3		0x07A3
270 #define FAN_REDUCED_DURY_CYCLE		BIT(5)
271 #define FAN_ALWAYS_ON			BIT(6)
272 
273 #define EC_ADDR_BIOS_BYTE		0x07A4
274 #define FN_LOCK_SWITCH			BIT(3)
275 
276 #define EC_ADDR_OEM_3			0x07A5
277 #define POWER_LED_MASK			GENMASK(1, 0)
278 #define POWER_LED_LEFT			0x00
279 #define POWER_LED_BOTH			0x01
280 #define POWER_LED_NONE			0x02
281 #define FAN_QUIET			BIT(2)
282 #define OVERBOOST			BIT(4)
283 #define HIGH_POWER			BIT(7)
284 
285 #define EC_ADDR_OEM_4			0x07A6
286 #define OVERBOOST_DYN_TEMP_OFF		BIT(1)
287 #define CHARGING_PROFILE_MASK		GENMASK(5, 4)
288 #define CHARGING_PROFILE_HIGH_CAPACITY	0x00
289 #define CHARGING_PROFILE_BALANCED	0x01
290 #define CHARGING_PROFILE_STATIONARY	0x02
291 #define TOUCHPAD_TOGGLE_OFF		BIT(6)
292 
293 #define EC_ADDR_CHARGE_CTRL		0x07B9
294 #define CHARGE_CTRL_MASK		GENMASK(6, 0)
295 #define CHARGE_CTRL_REACHED		BIT(7)
296 
297 #define EC_ADDR_UNIVERSAL_FAN_CTRL	0x07C5
298 #define SPLIT_TABLES			BIT(7)
299 
300 #define EC_ADDR_AP_OEM_6		0x07C6
301 #define ENABLE_UNIVERSAL_FAN_CTRL	BIT(2)
302 #define BATTERY_CHARGE_FULL_OVER_24H	BIT(3)
303 #define BATTERY_ERM_STATUS_REACHED	BIT(4)
304 
305 #define EC_ADDR_USB_C_POWER_PRIORITY	0x07CC
306 #define USB_C_POWER_PRIORITY		BIT(7)
307 
308 /* Same bits as EC_ADDR_LIGHTBAR_AC_CTRL except LIGHTBAR_S3_OFF */
309 #define EC_ADDR_LIGHTBAR_BAT_CTRL	0x07E2
310 
311 #define EC_ADDR_LIGHTBAR_BAT_RED	0x07E3
312 
313 #define EC_ADDR_LIGHTBAR_BAT_GREEN	0x07E4
314 
315 #define EC_ADDR_LIGHTBAR_BAT_BLUE	0x07E5
316 
317 #define EC_ADDR_CPU_TEMP_END_TABLE	0x0F00
318 
319 #define EC_ADDR_CPU_TEMP_START_TABLE	0x0F10
320 
321 #define EC_ADDR_CPU_FAN_SPEED_TABLE	0x0F20
322 
323 #define EC_ADDR_GPU_TEMP_END_TABLE	0x0F30
324 
325 #define EC_ADDR_GPU_TEMP_START_TABLE	0x0F40
326 
327 #define EC_ADDR_GPU_FAN_SPEED_TABLE	0x0F50
328 
329 /*
330  * Those two registers technically allow for manual fan control,
331  * but are unstable on some models and are likely not meant to
332  * be used by applications as they are only accessible when using
333  * the WMI interface.
334  */
335 #define EC_ADDR_PWM_1_WRITEABLE		0x1804
336 
337 #define EC_ADDR_PWM_2_WRITEABLE		0x1809
338 
339 #define DRIVER_NAME	"uniwill"
340 
341 /*
342  * The OEM software always sleeps up to 6 ms after reading/writing EC
343  * registers, so we emulate this behaviour for maximum compatibility.
344  */
345 #define UNIWILL_EC_DELAY_US	6000
346 
347 #define PWM_MAX			200
348 #define FAN_TABLE_LENGTH	16
349 
350 #define LED_CHANNELS		3
351 #define LED_MAX_BRIGHTNESS	200
352 
353 #define KBD_LED_CHANNELS	3
354 #define KBD_LED_MAX_INTENSITY	50
355 
356 #define UNIWILL_FEATURE_FN_LOCK			BIT(0)
357 #define UNIWILL_FEATURE_SUPER_KEY		BIT(1)
358 #define UNIWILL_FEATURE_TOUCHPAD_TOGGLE		BIT(2)
359 #define UNIWILL_FEATURE_LIGHTBAR		BIT(3)
360 #define UNIWILL_FEATURE_BATTERY_CHARGE_LIMIT	BIT(4)
361 /* Mutually exclusive with the charge limit feature */
362 #define UNIWILL_FEATURE_BATTERY_CHARGE_MODES	BIT(5)
363 #define UNIWILL_FEATURE_CPU_TEMP		BIT(6)
364 #define UNIWILL_FEATURE_GPU_TEMP		BIT(7)
365 #define UNIWILL_FEATURE_PRIMARY_FAN		BIT(8)
366 #define UNIWILL_FEATURE_SECONDARY_FAN		BIT(9)
367 #define UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL	BIT(10)
368 #define UNIWILL_FEATURE_USB_C_POWER_PRIORITY	BIT(11)
369 #define UNIWILL_FEATURE_KEYBOARD_BACKLIGHT	BIT(12)
370 #define UNIWILL_FEATURE_AC_AUTO_BOOT		BIT(13)
371 #define UNIWILL_FEATURE_USB_POWERSHARE		BIT(14)
372 
373 enum usb_c_power_priority_options {
374 	USB_C_POWER_PRIORITY_CHARGING = 0,
375 	USB_C_POWER_PRIORITY_PERFORMANCE,
376 };
377 
378 struct uniwill_data {
379 	struct device *dev;
380 	acpi_handle handle;
381 	struct regmap *regmap;
382 	unsigned int features;
383 	u8 project_id;
384 	struct acpi_battery_hook hook;
385 	struct mutex battery_lock;	/* Protects the list of currently registered batteries */
386 	union {
387 		struct {
388 			/* Protects writes to last_charge_type */
389 			struct mutex charge_type_lock;
390 			enum power_supply_charge_type last_charge_type;
391 		};
392 		unsigned int last_charge_ctrl;
393 	};
394 	bool last_fn_lock_state;
395 	bool last_super_key_enable_state;
396 	bool last_touchpad_toggle_enable_state;
397 	bool last_usb_powershare_high_state;
398 	struct mutex super_key_lock;	/* Protects the toggling of the super key lock state */
399 	struct list_head batteries;
400 	struct mutex led_lock;		/* Protects writes to the lightbar registers */
401 	struct led_classdev_mc led_mc_cdev;
402 	struct mc_subled led_mc_subled_info[LED_CHANNELS];
403 	bool single_color_kbd;
404 	u8 kbd_led_max_brightness;
405 	unsigned int last_kbd_status;
406 	union {
407 		struct {
408 			/* Protects writes to the RGB keyboard backlight registers */
409 			struct mutex kbd_rgb_led_lock;
410 			struct led_classdev_mc kbd_led_mc_cdev;
411 			struct mc_subled kbd_led_mc_subled_info[KBD_LED_CHANNELS];
412 		};
413 		struct led_classdev kbd_led_cdev;
414 	};
415 	struct mutex input_lock;	/* Protects input sequence during notify */
416 	struct input_dev *input_device;
417 	struct notifier_block nb;
418 	struct mutex usb_c_power_priority_lock; /* Protects dependent bit write and state safe */
419 	enum usb_c_power_priority_options last_usb_c_power_priority_option;
420 };
421 
422 struct uniwill_battery_entry {
423 	struct list_head head;
424 	struct power_supply *battery;
425 };
426 
427 struct uniwill_device_descriptor {
428 	unsigned int features;
429 	u8 kbd_led_max_brightness;
430 	/* Executed during driver probing */
431 	int (*probe)(struct uniwill_data *data);
432 };
433 
434 static bool force;
435 module_param_unsafe(force, bool, 0);
436 MODULE_PARM_DESC(force, "Force loading without checking for supported devices\n");
437 
438 /*
439  * Contains device specific data like the feature bitmap since
440  * the associated registers are not always reliable.
441  */
442 static struct uniwill_device_descriptor device_descriptor __ro_after_init;
443 
444 static const char * const uniwill_temp_labels[] = {
445 	"CPU",
446 	"GPU",
447 };
448 
449 static const char * const uniwill_fan_labels[] = {
450 	"Main",
451 	"Secondary",
452 };
453 
454 static const struct key_entry uniwill_keymap[] = {
455 	/* Reported via keyboard controller */
456 	{ KE_IGNORE,    UNIWILL_OSD_CAPSLOCK,                   { KEY_CAPSLOCK }},
457 	{ KE_IGNORE,    UNIWILL_OSD_NUMLOCK,                    { KEY_NUMLOCK }},
458 
459 	/*
460 	 * Reported when the user enables/disables the super key.
461 	 * Those events might even be reported when the change was done
462 	 * using the sysfs attribute!
463 	 */
464 	{ KE_IGNORE,    UNIWILL_OSD_SUPER_KEY_DISABLE,		{ KEY_UNKNOWN }},
465 	{ KE_IGNORE,    UNIWILL_OSD_SUPER_KEY_ENABLE,		{ KEY_UNKNOWN }},
466 	/* Optional, might not be reported by all devices */
467 	{ KE_IGNORE,	UNIWILL_OSD_SUPER_KEY_STATE_CHANGED,	{ KEY_UNKNOWN }},
468 
469 	/* Reported in manual mode when toggling the airplane mode status */
470 	{ KE_KEY,       UNIWILL_OSD_RFKILL,                     { KEY_RFKILL }},
471 	{ KE_IGNORE,    UNIWILL_OSD_RADIOON,                    { KEY_UNKNOWN }},
472 	{ KE_IGNORE,    UNIWILL_OSD_RADIOOFF,                   { KEY_UNKNOWN }},
473 
474 	/* Reported when user wants to cycle the platform profile */
475 	{ KE_KEY,       UNIWILL_OSD_PERFORMANCE_MODE_TOGGLE,    { KEY_F14 }},
476 
477 	/* Reported when the user wants to adjust the brightness of the keyboard */
478 	{ KE_KEY,       UNIWILL_OSD_KBDILLUMDOWN,               { KEY_KBDILLUMDOWN }},
479 	{ KE_KEY,       UNIWILL_OSD_KBDILLUMUP,                 { KEY_KBDILLUMUP }},
480 
481 	/* Reported when the EC changed the keyboard backlight brightness */
482 	{ KE_IGNORE,	UNIWILL_OSD_BACKLIGHT_LEVEL_CHANGE,	{ KEY_UNKNOWN }},
483 
484 	/* Reported when the user wants to toggle the microphone mute status */
485 	{ KE_KEY,       UNIWILL_OSD_MIC_MUTE,                   { KEY_MICMUTE }},
486 
487 	/* Reported when the user wants to toggle the mute status */
488 	{ KE_IGNORE,    UNIWILL_OSD_MUTE,                       { KEY_MUTE }},
489 
490 	/* Reported when the user wants to toggle the brightness of the keyboard */
491 	{ KE_KEY,       UNIWILL_OSD_KBDILLUMTOGGLE,             { KEY_KBDILLUMTOGGLE }},
492 
493 	/* FIXME: find out the exact meaning of those events */
494 	{ KE_IGNORE,    UNIWILL_OSD_BAT_CHARGE_FULL_24_H,       { KEY_UNKNOWN }},
495 	{ KE_IGNORE,    UNIWILL_OSD_BAT_ERM_UPDATE,             { KEY_UNKNOWN }},
496 
497 	/* Reported when the user wants to toggle the benchmark mode status */
498 	{ KE_IGNORE,    UNIWILL_OSD_BENCHMARK_MODE_TOGGLE,      { KEY_UNKNOWN }},
499 
500 	/* Reported when the screen is enabled/disabled during resume/suspend */
501 	{ KE_IGNORE,	UNIWILL_OSD_SCREEN_STATE_CHANGED,	{ KEY_UNKNOWN }},
502 
503 	/* Reported when the user wants to toggle the webcam */
504 	{ KE_IGNORE,    UNIWILL_OSD_WEBCAM_TOGGLE,              { KEY_UNKNOWN }},
505 
506 	{ KE_END }
507 };
508 
509 static inline bool uniwill_device_supports(const struct uniwill_data *data,
510 					   unsigned int features)
511 {
512 	return (data->features & features) == features;
513 }
514 
515 static inline bool uniwill_device_supports_any(const struct uniwill_data *data,
516 					       unsigned int features)
517 {
518 	return data->features & features;
519 }
520 
521 static int uniwill_ec_reg_write(void *context, unsigned int reg, unsigned int val)
522 {
523 	union acpi_object params[2] = {
524 		{
525 			.integer = {
526 				.type = ACPI_TYPE_INTEGER,
527 				.value = reg,
528 			},
529 		},
530 		{
531 			.integer = {
532 				.type = ACPI_TYPE_INTEGER,
533 				.value = val,
534 			},
535 		},
536 	};
537 	struct uniwill_data *data = context;
538 	struct acpi_object_list input = {
539 		.count = ARRAY_SIZE(params),
540 		.pointer = params,
541 	};
542 	acpi_status status;
543 
544 	status = acpi_evaluate_object(data->handle, "ECRW", &input, NULL);
545 	if (ACPI_FAILURE(status))
546 		return -EIO;
547 
548 	usleep_range(UNIWILL_EC_DELAY_US, UNIWILL_EC_DELAY_US * 2);
549 
550 	return 0;
551 }
552 
553 static int uniwill_ec_reg_read(void *context, unsigned int reg, unsigned int *val)
554 {
555 	union acpi_object params[1] = {
556 		{
557 			.integer = {
558 				.type = ACPI_TYPE_INTEGER,
559 				.value = reg,
560 			},
561 		},
562 	};
563 	struct uniwill_data *data = context;
564 	struct acpi_object_list input = {
565 		.count = ARRAY_SIZE(params),
566 		.pointer = params,
567 	};
568 	unsigned long long output;
569 	acpi_status status;
570 
571 	status = acpi_evaluate_integer(data->handle, "ECRR", &input, &output);
572 	if (ACPI_FAILURE(status))
573 		return -EIO;
574 
575 	if (output > U8_MAX)
576 		return -ENXIO;
577 
578 	usleep_range(UNIWILL_EC_DELAY_US, UNIWILL_EC_DELAY_US * 2);
579 
580 	*val = output;
581 
582 	return 0;
583 }
584 
585 static const struct regmap_bus uniwill_ec_bus = {
586 	.reg_write = uniwill_ec_reg_write,
587 	.reg_read = uniwill_ec_reg_read,
588 	.reg_format_endian_default = REGMAP_ENDIAN_LITTLE,
589 	.val_format_endian_default = REGMAP_ENDIAN_LITTLE,
590 };
591 
592 static bool uniwill_writeable_reg(struct device *dev, unsigned int reg)
593 {
594 	switch (reg) {
595 	case EC_ADDR_OEM_9:
596 	case EC_ADDR_AP_OEM:
597 	case EC_ADDR_LIGHTBAR_AC_CTRL:
598 	case EC_ADDR_LIGHTBAR_AC_RED:
599 	case EC_ADDR_LIGHTBAR_AC_GREEN:
600 	case EC_ADDR_LIGHTBAR_AC_BLUE:
601 	case EC_ADDR_BIOS_OEM:
602 	case EC_ADDR_TRIGGER:
603 	case EC_ADDR_RGB_RED:
604 	case EC_ADDR_RGB_GREEN:
605 	case EC_ADDR_RGB_BLUE:
606 	case EC_ADDR_BIOS_OEM_2:
607 	case EC_ADDR_KBD_STATUS:
608 	case EC_ADDR_OEM_4:
609 	case EC_ADDR_CHARGE_CTRL:
610 	case EC_ADDR_LIGHTBAR_BAT_CTRL:
611 	case EC_ADDR_LIGHTBAR_BAT_RED:
612 	case EC_ADDR_LIGHTBAR_BAT_GREEN:
613 	case EC_ADDR_LIGHTBAR_BAT_BLUE:
614 	case EC_ADDR_CTGP_DB_CTRL:
615 	case EC_ADDR_CTGP_DB_CTGP_OFFSET:
616 	case EC_ADDR_CTGP_DB_TPP_OFFSET:
617 	case EC_ADDR_CTGP_DB_DB_OFFSET:
618 	case EC_ADDR_USB_C_POWER_PRIORITY:
619 		return true;
620 	default:
621 		return false;
622 	}
623 }
624 
625 static bool uniwill_readable_reg(struct device *dev, unsigned int reg)
626 {
627 	switch (reg) {
628 	case EC_ADDR_CPU_TEMP:
629 	case EC_ADDR_GPU_TEMP:
630 	case EC_ADDR_MAIN_FAN_RPM_1:
631 	case EC_ADDR_MAIN_FAN_RPM_2:
632 	case EC_ADDR_SECOND_FAN_RPM_1:
633 	case EC_ADDR_SECOND_FAN_RPM_2:
634 	case EC_ADDR_BAT_ALERT:
635 	case EC_ADDR_OEM_9:
636 	case EC_ADDR_PROJECT_ID:
637 	case EC_ADDR_AP_OEM:
638 	case EC_ADDR_LIGHTBAR_AC_CTRL:
639 	case EC_ADDR_LIGHTBAR_AC_RED:
640 	case EC_ADDR_LIGHTBAR_AC_GREEN:
641 	case EC_ADDR_LIGHTBAR_AC_BLUE:
642 	case EC_ADDR_BIOS_OEM:
643 	case EC_ADDR_PWM_1:
644 	case EC_ADDR_PWM_2:
645 	case EC_ADDR_SUPPORT_2:
646 	case EC_ADDR_TRIGGER:
647 	case EC_ADDR_SWITCH_STATUS:
648 	case EC_ADDR_RGB_RED:
649 	case EC_ADDR_RGB_GREEN:
650 	case EC_ADDR_RGB_BLUE:
651 	case EC_ADDR_BIOS_OEM_2:
652 	case EC_ADDR_KBD_STATUS:
653 	case EC_ADDR_OEM_4:
654 	case EC_ADDR_CHARGE_CTRL:
655 	case EC_ADDR_LIGHTBAR_BAT_CTRL:
656 	case EC_ADDR_LIGHTBAR_BAT_RED:
657 	case EC_ADDR_LIGHTBAR_BAT_GREEN:
658 	case EC_ADDR_LIGHTBAR_BAT_BLUE:
659 	case EC_ADDR_SYSTEM_ID:
660 	case EC_ADDR_CTGP_DB_CTRL:
661 	case EC_ADDR_CTGP_DB_CTGP_OFFSET:
662 	case EC_ADDR_CTGP_DB_TPP_OFFSET:
663 	case EC_ADDR_CTGP_DB_DB_OFFSET:
664 	case EC_ADDR_USB_C_POWER_PRIORITY:
665 		return true;
666 	default:
667 		return false;
668 	}
669 }
670 
671 static bool uniwill_volatile_reg(struct device *dev, unsigned int reg)
672 {
673 	switch (reg) {
674 	case EC_ADDR_CPU_TEMP:
675 	case EC_ADDR_GPU_TEMP:
676 	case EC_ADDR_MAIN_FAN_RPM_1:
677 	case EC_ADDR_MAIN_FAN_RPM_2:
678 	case EC_ADDR_SECOND_FAN_RPM_1:
679 	case EC_ADDR_SECOND_FAN_RPM_2:
680 	case EC_ADDR_BAT_ALERT:
681 	case EC_ADDR_BIOS_OEM:
682 	case EC_ADDR_PWM_1:
683 	case EC_ADDR_PWM_2:
684 	case EC_ADDR_SUPPORT_2:
685 	case EC_ADDR_TRIGGER:
686 	case EC_ADDR_SWITCH_STATUS:
687 	case EC_ADDR_KBD_STATUS:
688 	case EC_ADDR_OEM_4:
689 	case EC_ADDR_CHARGE_CTRL:
690 	case EC_ADDR_USB_C_POWER_PRIORITY:
691 		return true;
692 	default:
693 		return false;
694 	}
695 }
696 
697 static const struct regmap_config uniwill_ec_config = {
698 	.reg_bits = 16,
699 	.val_bits = 8,
700 	.writeable_reg = uniwill_writeable_reg,
701 	.readable_reg = uniwill_readable_reg,
702 	.volatile_reg = uniwill_volatile_reg,
703 	.can_sleep = true,
704 	.max_register = 0xFFF,
705 	.cache_type = REGCACHE_MAPLE,
706 	.use_single_read = true,
707 	.use_single_write = true,
708 };
709 
710 static int uniwill_write_fn_lock(struct uniwill_data *data, bool status)
711 {
712 	unsigned int value;
713 
714 	if (status)
715 		value = FN_LOCK_STATUS;
716 	else
717 		value = 0;
718 
719 	return regmap_update_bits(data->regmap, EC_ADDR_BIOS_OEM, FN_LOCK_STATUS, value);
720 }
721 
722 static ssize_t fn_lock_store(struct device *dev, struct device_attribute *attr, const char *buf,
723 			     size_t count)
724 {
725 	struct uniwill_data *data = dev_get_drvdata(dev);
726 	bool enable;
727 	int ret;
728 
729 	ret = kstrtobool(buf, &enable);
730 	if (ret < 0)
731 		return ret;
732 
733 	ret = uniwill_write_fn_lock(data, enable);
734 	if (ret < 0)
735 		return ret;
736 
737 	return count;
738 }
739 
740 static int uniwill_read_fn_lock(struct uniwill_data *data, bool *status)
741 {
742 	unsigned int value;
743 	int ret;
744 
745 	ret = regmap_read(data->regmap, EC_ADDR_BIOS_OEM, &value);
746 	if (ret < 0)
747 		return ret;
748 
749 	*status = !!(value & FN_LOCK_STATUS);
750 
751 	return 0;
752 }
753 
754 static ssize_t fn_lock_show(struct device *dev, struct device_attribute *attr, char *buf)
755 {
756 	struct uniwill_data *data = dev_get_drvdata(dev);
757 	bool status;
758 	int ret;
759 
760 	ret = uniwill_read_fn_lock(data, &status);
761 	if (ret < 0)
762 		return ret;
763 
764 	return sysfs_emit(buf, "%d\n", status);
765 }
766 
767 static DEVICE_ATTR_RW(fn_lock);
768 
769 static int uniwill_write_super_key_enable(struct uniwill_data *data, bool status)
770 {
771 	unsigned int value;
772 	int ret;
773 
774 	guard(mutex)(&data->super_key_lock);
775 
776 	ret = regmap_read(data->regmap, EC_ADDR_SWITCH_STATUS, &value);
777 	if (ret < 0)
778 		return ret;
779 
780 	/*
781 	 * We can only toggle the super key lock, so we return early if the setting
782 	 * is already in the correct state.
783 	 */
784 	if (status == !(value & SUPER_KEY_LOCK_STATUS))
785 		return 0;
786 
787 	return regmap_write_bits(data->regmap, EC_ADDR_TRIGGER, TRIGGER_SUPER_KEY_LOCK,
788 				 TRIGGER_SUPER_KEY_LOCK);
789 }
790 
791 static ssize_t super_key_enable_store(struct device *dev, struct device_attribute *attr,
792 				      const char *buf, size_t count)
793 {
794 	struct uniwill_data *data = dev_get_drvdata(dev);
795 	bool enable;
796 	int ret;
797 
798 	ret = kstrtobool(buf, &enable);
799 	if (ret < 0)
800 		return ret;
801 
802 	ret = uniwill_write_super_key_enable(data, enable);
803 	if (ret < 0)
804 		return ret;
805 
806 	return count;
807 }
808 
809 static int uniwill_read_super_key_enable(struct uniwill_data *data, bool *status)
810 {
811 	unsigned int value;
812 	int ret;
813 
814 	ret = regmap_read(data->regmap, EC_ADDR_SWITCH_STATUS, &value);
815 	if (ret < 0)
816 		return ret;
817 
818 	*status = !(value & SUPER_KEY_LOCK_STATUS);
819 
820 	return 0;
821 }
822 
823 static ssize_t super_key_enable_show(struct device *dev, struct device_attribute *attr, char *buf)
824 {
825 	struct uniwill_data *data = dev_get_drvdata(dev);
826 	bool status;
827 	int ret;
828 
829 	ret = uniwill_read_super_key_enable(data, &status);
830 	if (ret < 0)
831 		return ret;
832 
833 	return sysfs_emit(buf, "%d\n", status);
834 }
835 
836 static DEVICE_ATTR_RW(super_key_enable);
837 
838 static int uniwill_write_touchpad_toggle_enable(struct uniwill_data *data, bool status)
839 {
840 	unsigned int value;
841 
842 	if (status)
843 		value = 0;
844 	else
845 		value = TOUCHPAD_TOGGLE_OFF;
846 
847 	return regmap_update_bits(data->regmap, EC_ADDR_OEM_4, TOUCHPAD_TOGGLE_OFF, value);
848 }
849 
850 static ssize_t touchpad_toggle_enable_store(struct device *dev, struct device_attribute *attr,
851 					    const char *buf, size_t count)
852 {
853 	struct uniwill_data *data = dev_get_drvdata(dev);
854 	bool enable;
855 	int ret;
856 
857 	ret = kstrtobool(buf, &enable);
858 	if (ret < 0)
859 		return ret;
860 
861 	ret = uniwill_write_touchpad_toggle_enable(data, enable);
862 	if (ret < 0)
863 		return ret;
864 
865 	return count;
866 }
867 
868 static int uniwill_read_touchpad_toggle_enable(struct uniwill_data *data, bool *status)
869 {
870 	unsigned int value;
871 	int ret;
872 
873 	ret = regmap_read(data->regmap, EC_ADDR_OEM_4, &value);
874 	if (ret < 0)
875 		return ret;
876 
877 	*status = !(value & TOUCHPAD_TOGGLE_OFF);
878 
879 	return 0;
880 }
881 
882 static ssize_t touchpad_toggle_enable_show(struct device *dev, struct device_attribute *attr,
883 					   char *buf)
884 {
885 	struct uniwill_data *data = dev_get_drvdata(dev);
886 	bool status;
887 	int ret;
888 
889 	ret = uniwill_read_touchpad_toggle_enable(data, &status);
890 	if (ret < 0)
891 		return ret;
892 
893 	return sysfs_emit(buf, "%d\n", status);
894 }
895 
896 static DEVICE_ATTR_RW(touchpad_toggle_enable);
897 
898 static ssize_t rainbow_animation_store(struct device *dev, struct device_attribute *attr,
899 				       const char *buf, size_t count)
900 {
901 	struct uniwill_data *data = dev_get_drvdata(dev);
902 	unsigned int value;
903 	bool enable;
904 	int ret;
905 
906 	ret = kstrtobool(buf, &enable);
907 	if (ret < 0)
908 		return ret;
909 
910 	if (enable)
911 		value = LIGHTBAR_WELCOME;
912 	else
913 		value = 0;
914 
915 	guard(mutex)(&data->led_lock);
916 
917 	ret = regmap_update_bits(data->regmap, EC_ADDR_LIGHTBAR_AC_CTRL, LIGHTBAR_WELCOME, value);
918 	if (ret < 0)
919 		return ret;
920 
921 	ret = regmap_update_bits(data->regmap, EC_ADDR_LIGHTBAR_BAT_CTRL, LIGHTBAR_WELCOME, value);
922 	if (ret < 0)
923 		return ret;
924 
925 	return count;
926 }
927 
928 static ssize_t rainbow_animation_show(struct device *dev, struct device_attribute *attr, char *buf)
929 {
930 	struct uniwill_data *data = dev_get_drvdata(dev);
931 	unsigned int value;
932 	int ret;
933 
934 	ret = regmap_read(data->regmap, EC_ADDR_LIGHTBAR_AC_CTRL, &value);
935 	if (ret < 0)
936 		return ret;
937 
938 	return sysfs_emit(buf, "%d\n", !!(value & LIGHTBAR_WELCOME));
939 }
940 
941 static DEVICE_ATTR_RW(rainbow_animation);
942 
943 static ssize_t breathing_in_suspend_store(struct device *dev, struct device_attribute *attr,
944 					  const char *buf, size_t count)
945 {
946 	struct uniwill_data *data = dev_get_drvdata(dev);
947 	unsigned int value;
948 	bool enable;
949 	int ret;
950 
951 	ret = kstrtobool(buf, &enable);
952 	if (ret < 0)
953 		return ret;
954 
955 	if (enable)
956 		value = 0;
957 	else
958 		value = LIGHTBAR_S3_OFF;
959 
960 	/* We only access a single register here, so we do not need to use data->led_lock */
961 	ret = regmap_update_bits(data->regmap, EC_ADDR_LIGHTBAR_AC_CTRL, LIGHTBAR_S3_OFF, value);
962 	if (ret < 0)
963 		return ret;
964 
965 	return count;
966 }
967 
968 static ssize_t breathing_in_suspend_show(struct device *dev, struct device_attribute *attr,
969 					 char *buf)
970 {
971 	struct uniwill_data *data = dev_get_drvdata(dev);
972 	unsigned int value;
973 	int ret;
974 
975 	ret = regmap_read(data->regmap, EC_ADDR_LIGHTBAR_AC_CTRL, &value);
976 	if (ret < 0)
977 		return ret;
978 
979 	return sysfs_emit(buf, "%d\n", !(value & LIGHTBAR_S3_OFF));
980 }
981 
982 static DEVICE_ATTR_RW(breathing_in_suspend);
983 
984 static ssize_t ctgp_offset_store(struct device *dev, struct device_attribute *attr,
985 				 const char *buf, size_t count)
986 {
987 	struct uniwill_data *data = dev_get_drvdata(dev);
988 	unsigned int value;
989 	int ret;
990 
991 	ret = kstrtouint(buf, 0, &value);
992 	if (ret < 0)
993 		return ret;
994 
995 	if (value > U8_MAX)
996 		return -EINVAL;
997 
998 	ret = regmap_write(data->regmap, EC_ADDR_CTGP_DB_CTGP_OFFSET, value);
999 	if (ret < 0)
1000 		return ret;
1001 
1002 	return count;
1003 }
1004 
1005 static ssize_t ctgp_offset_show(struct device *dev, struct device_attribute *attr,
1006 				char *buf)
1007 {
1008 	struct uniwill_data *data = dev_get_drvdata(dev);
1009 	unsigned int value;
1010 	int ret;
1011 
1012 	ret = regmap_read(data->regmap, EC_ADDR_CTGP_DB_CTGP_OFFSET, &value);
1013 	if (ret < 0)
1014 		return ret;
1015 
1016 	return sysfs_emit(buf, "%u\n", value);
1017 }
1018 
1019 static DEVICE_ATTR_RW(ctgp_offset);
1020 
1021 static int uniwill_nvidia_ctgp_init(struct uniwill_data *data)
1022 {
1023 	int ret;
1024 
1025 	if (!uniwill_device_supports(data, UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL))
1026 		return 0;
1027 
1028 	ret = regmap_write(data->regmap, EC_ADDR_CTGP_DB_CTGP_OFFSET, 0);
1029 	if (ret < 0)
1030 		return ret;
1031 
1032 	ret = regmap_write(data->regmap, EC_ADDR_CTGP_DB_TPP_OFFSET, 255);
1033 	if (ret < 0)
1034 		return ret;
1035 
1036 	ret = regmap_write(data->regmap, EC_ADDR_CTGP_DB_DB_OFFSET, 25);
1037 	if (ret < 0)
1038 		return ret;
1039 
1040 	ret = regmap_set_bits(data->regmap, EC_ADDR_CTGP_DB_CTRL,
1041 			      CTGP_DB_GENERAL_ENABLE | CTGP_DB_DB_ENABLE | CTGP_DB_CTGP_ENABLE);
1042 	if (ret < 0)
1043 		return ret;
1044 
1045 	return 0;
1046 }
1047 
1048 static const char * const usb_c_power_priority_text[] = {
1049 	[USB_C_POWER_PRIORITY_CHARGING]		= "charging",
1050 	[USB_C_POWER_PRIORITY_PERFORMANCE]	= "performance",
1051 };
1052 
1053 static const u8 usb_c_power_priority_value[] = {
1054 	[USB_C_POWER_PRIORITY_CHARGING]		= 0,
1055 	[USB_C_POWER_PRIORITY_PERFORMANCE]	= USB_C_POWER_PRIORITY,
1056 };
1057 
1058 static ssize_t usb_c_power_priority_store(struct device *dev,
1059 					  struct device_attribute *attr,
1060 					  const char *buf, size_t count)
1061 {
1062 	struct uniwill_data *data = dev_get_drvdata(dev);
1063 	enum usb_c_power_priority_options option;
1064 	unsigned int value;
1065 	int ret;
1066 
1067 	ret = sysfs_match_string(usb_c_power_priority_text, buf);
1068 	if (ret < 0)
1069 		return ret;
1070 
1071 	option = ret;
1072 	value = usb_c_power_priority_value[option];
1073 
1074 	guard(mutex)(&data->usb_c_power_priority_lock);
1075 
1076 	ret = regmap_update_bits(data->regmap, EC_ADDR_USB_C_POWER_PRIORITY,
1077 				 USB_C_POWER_PRIORITY, value);
1078 	if (ret < 0)
1079 		return ret;
1080 
1081 	data->last_usb_c_power_priority_option = option;
1082 
1083 	return count;
1084 }
1085 
1086 static ssize_t usb_c_power_priority_show(struct device *dev,
1087 					 struct device_attribute *attr,
1088 					 char *buf)
1089 {
1090 	struct uniwill_data *data = dev_get_drvdata(dev);
1091 	unsigned int value;
1092 	int ret;
1093 
1094 	ret = regmap_read(data->regmap, EC_ADDR_USB_C_POWER_PRIORITY, &value);
1095 	if (ret < 0)
1096 		return ret;
1097 
1098 	value &= USB_C_POWER_PRIORITY;
1099 
1100 	if (usb_c_power_priority_value[USB_C_POWER_PRIORITY_PERFORMANCE] == value)
1101 		return sysfs_emit(buf, "%s\n",
1102 				  usb_c_power_priority_text[USB_C_POWER_PRIORITY_PERFORMANCE]);
1103 
1104 	return sysfs_emit(buf, "%s\n", usb_c_power_priority_text[USB_C_POWER_PRIORITY_CHARGING]);
1105 }
1106 
1107 static DEVICE_ATTR_RW(usb_c_power_priority);
1108 
1109 static int usb_c_power_priority_restore(struct uniwill_data *data)
1110 {
1111 	unsigned int value;
1112 
1113 	value = usb_c_power_priority_value[data->last_usb_c_power_priority_option];
1114 
1115 	guard(mutex)(&data->usb_c_power_priority_lock);
1116 
1117 	return regmap_update_bits(data->regmap, EC_ADDR_USB_C_POWER_PRIORITY,
1118 				  USB_C_POWER_PRIORITY, value);
1119 }
1120 
1121 static int usb_c_power_priority_init(struct uniwill_data *data)
1122 {
1123 	unsigned int value;
1124 	int ret;
1125 
1126 	if (!uniwill_device_supports(data, UNIWILL_FEATURE_USB_C_POWER_PRIORITY))
1127 		return 0;
1128 
1129 	ret = devm_mutex_init(data->dev, &data->usb_c_power_priority_lock);
1130 	if (ret < 0)
1131 		return ret;
1132 
1133 	ret = regmap_read(data->regmap, EC_ADDR_USB_C_POWER_PRIORITY, &value);
1134 	if (ret < 0)
1135 		return ret;
1136 
1137 	value &= USB_C_POWER_PRIORITY;
1138 
1139 	data->last_usb_c_power_priority_option =
1140 		usb_c_power_priority_value[USB_C_POWER_PRIORITY_PERFORMANCE] == value ?
1141 			USB_C_POWER_PRIORITY_PERFORMANCE :
1142 			USB_C_POWER_PRIORITY_CHARGING;
1143 
1144 	return 0;
1145 }
1146 
1147 static ssize_t ac_auto_boot_store(struct device *dev, struct device_attribute *attr,
1148 				  const char *buf, size_t count)
1149 {
1150 	struct uniwill_data *data = dev_get_drvdata(dev);
1151 	unsigned int regval;
1152 	bool enable;
1153 	int ret;
1154 
1155 	ret = kstrtobool(buf, &enable);
1156 	if (ret < 0)
1157 		return ret;
1158 
1159 	if (enable)
1160 		regval = AC_AUTO_BOOT_ENABLE;
1161 	else
1162 		regval = 0;
1163 
1164 	ret = regmap_update_bits(data->regmap, EC_ADDR_OEM_9, AC_AUTO_BOOT_ENABLE, regval);
1165 	if (ret < 0)
1166 		return ret;
1167 
1168 	return count;
1169 }
1170 
1171 static ssize_t ac_auto_boot_show(struct device *dev, struct device_attribute *attr, char *buf)
1172 {
1173 	struct uniwill_data *data = dev_get_drvdata(dev);
1174 	unsigned int regval;
1175 	int ret;
1176 
1177 	ret = regmap_read(data->regmap, EC_ADDR_OEM_9, &regval);
1178 	if (ret < 0)
1179 		return ret;
1180 
1181 	return sysfs_emit(buf, "%d\n", !!(regval & AC_AUTO_BOOT_ENABLE));
1182 }
1183 
1184 static DEVICE_ATTR_RW(ac_auto_boot);
1185 
1186 static int uniwill_write_usb_powershare_high(struct uniwill_data *data, bool status)
1187 {
1188 	unsigned int value;
1189 
1190 	if (status)
1191 		value = TRIGGER_USB_CHARGING;
1192 	else
1193 		value = 0;
1194 
1195 	/*
1196 	 * Normaly this RMW-sequence could also trigger the super key toggle,
1197 	 * but the EC seems to take care that those bits are always read as 0.
1198 	 */
1199 	return regmap_update_bits(data->regmap, EC_ADDR_TRIGGER, TRIGGER_USB_CHARGING, value);
1200 }
1201 
1202 static ssize_t usb_powershare_high_store(struct device *dev, struct device_attribute *attr,
1203 					 const char *buf, size_t count)
1204 {
1205 	struct uniwill_data *data = dev_get_drvdata(dev);
1206 	bool enable;
1207 	int ret;
1208 
1209 	ret = kstrtobool(buf, &enable);
1210 	if (ret < 0)
1211 		return ret;
1212 
1213 	ret = uniwill_write_usb_powershare_high(data, enable);
1214 	if (ret < 0)
1215 		return ret;
1216 
1217 	return count;
1218 }
1219 
1220 static int uniwill_read_usb_powershare_high(struct uniwill_data *data, bool *status)
1221 {
1222 	unsigned int value;
1223 	int ret;
1224 
1225 	ret = regmap_read(data->regmap, EC_ADDR_TRIGGER, &value);
1226 	if (ret < 0)
1227 		return ret;
1228 
1229 	*status = !!(value & TRIGGER_USB_CHARGING);
1230 
1231 	return 0;
1232 }
1233 
1234 static ssize_t usb_powershare_high_show(struct device *dev, struct device_attribute *attr,
1235 					char *buf)
1236 {
1237 	struct uniwill_data *data = dev_get_drvdata(dev);
1238 	bool status;
1239 	int ret;
1240 
1241 	ret = uniwill_read_usb_powershare_high(data, &status);
1242 	if (ret < 0)
1243 		return ret;
1244 
1245 	return sysfs_emit(buf, "%d\n", status);
1246 }
1247 
1248 static DEVICE_ATTR_RW(usb_powershare_high);
1249 
1250 static struct attribute *uniwill_attrs[] = {
1251 	/* Keyboard-related */
1252 	&dev_attr_fn_lock.attr,
1253 	&dev_attr_super_key_enable.attr,
1254 	&dev_attr_touchpad_toggle_enable.attr,
1255 	/* Lightbar-related */
1256 	&dev_attr_rainbow_animation.attr,
1257 	&dev_attr_breathing_in_suspend.attr,
1258 	/* Power-management-related */
1259 	&dev_attr_ctgp_offset.attr,
1260 	&dev_attr_usb_c_power_priority.attr,
1261 	&dev_attr_ac_auto_boot.attr,
1262 	&dev_attr_usb_powershare_high.attr,
1263 	NULL
1264 };
1265 
1266 static umode_t uniwill_attr_is_visible(struct kobject *kobj, struct attribute *attr, int n)
1267 {
1268 	struct device *dev = kobj_to_dev(kobj);
1269 	struct uniwill_data *data = dev_get_drvdata(dev);
1270 
1271 	if (attr == &dev_attr_fn_lock.attr) {
1272 		if (uniwill_device_supports(data, UNIWILL_FEATURE_FN_LOCK))
1273 			return attr->mode;
1274 	}
1275 
1276 	if (attr == &dev_attr_super_key_enable.attr) {
1277 		if (uniwill_device_supports(data, UNIWILL_FEATURE_SUPER_KEY))
1278 			return attr->mode;
1279 	}
1280 
1281 	if (attr == &dev_attr_touchpad_toggle_enable.attr) {
1282 		if (uniwill_device_supports(data, UNIWILL_FEATURE_TOUCHPAD_TOGGLE))
1283 			return attr->mode;
1284 	}
1285 
1286 	if (attr == &dev_attr_rainbow_animation.attr ||
1287 	    attr == &dev_attr_breathing_in_suspend.attr) {
1288 		if (uniwill_device_supports(data, UNIWILL_FEATURE_LIGHTBAR))
1289 			return attr->mode;
1290 	}
1291 
1292 	if (attr == &dev_attr_ctgp_offset.attr) {
1293 		if (uniwill_device_supports(data, UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL))
1294 			return attr->mode;
1295 	}
1296 
1297 	if (attr == &dev_attr_usb_c_power_priority.attr) {
1298 		if (uniwill_device_supports(data, UNIWILL_FEATURE_USB_C_POWER_PRIORITY))
1299 			return attr->mode;
1300 	}
1301 
1302 	if (attr == &dev_attr_ac_auto_boot.attr) {
1303 		if (uniwill_device_supports(data, UNIWILL_FEATURE_AC_AUTO_BOOT))
1304 			return attr->mode;
1305 	}
1306 
1307 	if (attr == &dev_attr_usb_powershare_high.attr) {
1308 		if (uniwill_device_supports(data, UNIWILL_FEATURE_USB_POWERSHARE))
1309 			return attr->mode;
1310 	}
1311 
1312 	return 0;
1313 }
1314 
1315 static const struct attribute_group uniwill_group = {
1316 	.is_visible = uniwill_attr_is_visible,
1317 	.attrs = uniwill_attrs,
1318 };
1319 
1320 static const struct attribute_group *uniwill_groups[] = {
1321 	&uniwill_group,
1322 	NULL
1323 };
1324 
1325 static umode_t uniwill_is_visible(const void *drvdata, enum hwmon_sensor_types type, u32 attr,
1326 				  int channel)
1327 {
1328 	const struct uniwill_data *data = drvdata;
1329 	unsigned int feature;
1330 
1331 	switch (type) {
1332 	case hwmon_temp:
1333 		switch (channel) {
1334 		case 0:
1335 			feature = UNIWILL_FEATURE_CPU_TEMP;
1336 			break;
1337 		case 1:
1338 			feature = UNIWILL_FEATURE_GPU_TEMP;
1339 			break;
1340 		default:
1341 			return 0;
1342 		}
1343 		break;
1344 	case hwmon_fan:
1345 	case hwmon_pwm:
1346 		switch (channel) {
1347 		case 0:
1348 			feature = UNIWILL_FEATURE_PRIMARY_FAN;
1349 			break;
1350 		case 1:
1351 			feature = UNIWILL_FEATURE_SECONDARY_FAN;
1352 			break;
1353 		default:
1354 			return 0;
1355 		}
1356 		break;
1357 	default:
1358 		return 0;
1359 	}
1360 
1361 	if (uniwill_device_supports(data, feature))
1362 		return 0444;
1363 
1364 	return 0;
1365 }
1366 
1367 static int uniwill_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel,
1368 			long *val)
1369 {
1370 	struct uniwill_data *data = dev_get_drvdata(dev);
1371 	unsigned int value;
1372 	__be16 rpm;
1373 	int ret;
1374 
1375 	switch (type) {
1376 	case hwmon_temp:
1377 		switch (channel) {
1378 		case 0:
1379 			ret = regmap_read(data->regmap, EC_ADDR_CPU_TEMP, &value);
1380 			break;
1381 		case 1:
1382 			ret = regmap_read(data->regmap, EC_ADDR_GPU_TEMP, &value);
1383 			break;
1384 		default:
1385 			return -EOPNOTSUPP;
1386 		}
1387 
1388 		if (ret < 0)
1389 			return ret;
1390 
1391 		*val = value * MILLIDEGREE_PER_DEGREE;
1392 		return 0;
1393 	case hwmon_fan:
1394 		switch (channel) {
1395 		case 0:
1396 			ret = regmap_bulk_read(data->regmap, EC_ADDR_MAIN_FAN_RPM_1, &rpm,
1397 					       sizeof(rpm));
1398 			break;
1399 		case 1:
1400 			ret = regmap_bulk_read(data->regmap, EC_ADDR_SECOND_FAN_RPM_1, &rpm,
1401 					       sizeof(rpm));
1402 			break;
1403 		default:
1404 			return -EOPNOTSUPP;
1405 		}
1406 
1407 		if (ret < 0)
1408 			return ret;
1409 
1410 		*val = be16_to_cpu(rpm);
1411 		return 0;
1412 	case hwmon_pwm:
1413 		switch (channel) {
1414 		case 0:
1415 			ret = regmap_read(data->regmap, EC_ADDR_PWM_1, &value);
1416 			break;
1417 		case 1:
1418 			ret = regmap_read(data->regmap, EC_ADDR_PWM_2, &value);
1419 			break;
1420 		default:
1421 			return -EOPNOTSUPP;
1422 		}
1423 
1424 		if (ret < 0)
1425 			return ret;
1426 
1427 		*val = fixp_linear_interpolate(0, 0, PWM_MAX, U8_MAX, value);
1428 		return 0;
1429 	default:
1430 		return -EOPNOTSUPP;
1431 	}
1432 }
1433 
1434 static int uniwill_read_string(struct device *dev, enum hwmon_sensor_types type, u32 attr,
1435 			       int channel, const char **str)
1436 {
1437 	switch (type) {
1438 	case hwmon_temp:
1439 		*str = uniwill_temp_labels[channel];
1440 		return 0;
1441 	case hwmon_fan:
1442 		*str = uniwill_fan_labels[channel];
1443 		return 0;
1444 	default:
1445 		return -EOPNOTSUPP;
1446 	}
1447 }
1448 
1449 static const struct hwmon_ops uniwill_ops = {
1450 	.is_visible = uniwill_is_visible,
1451 	.read = uniwill_read,
1452 	.read_string = uniwill_read_string,
1453 };
1454 
1455 static const struct hwmon_channel_info * const uniwill_info[] = {
1456 	HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),
1457 	HWMON_CHANNEL_INFO(temp,
1458 			   HWMON_T_INPUT | HWMON_T_LABEL,
1459 			   HWMON_T_INPUT | HWMON_T_LABEL),
1460 	HWMON_CHANNEL_INFO(fan,
1461 			   HWMON_F_INPUT | HWMON_F_LABEL,
1462 			   HWMON_F_INPUT | HWMON_F_LABEL),
1463 	HWMON_CHANNEL_INFO(pwm,
1464 			   HWMON_PWM_INPUT,
1465 			   HWMON_PWM_INPUT),
1466 	NULL
1467 };
1468 
1469 static const struct hwmon_chip_info uniwill_chip_info = {
1470 	.ops = &uniwill_ops,
1471 	.info = uniwill_info,
1472 };
1473 
1474 static int uniwill_hwmon_init(struct uniwill_data *data)
1475 {
1476 	struct device *hdev;
1477 
1478 	if (!uniwill_device_supports(data, UNIWILL_FEATURE_CPU_TEMP) &&
1479 	    !uniwill_device_supports(data, UNIWILL_FEATURE_GPU_TEMP) &&
1480 	    !uniwill_device_supports(data, UNIWILL_FEATURE_PRIMARY_FAN) &&
1481 	    !uniwill_device_supports(data, UNIWILL_FEATURE_SECONDARY_FAN))
1482 		return 0;
1483 
1484 	hdev = devm_hwmon_device_register_with_info(data->dev, "uniwill", data,
1485 						    &uniwill_chip_info, NULL);
1486 
1487 	return PTR_ERR_OR_ZERO(hdev);
1488 }
1489 
1490 static const unsigned int uniwill_led_channel_to_bat_reg[LED_CHANNELS] = {
1491 	EC_ADDR_LIGHTBAR_BAT_RED,
1492 	EC_ADDR_LIGHTBAR_BAT_GREEN,
1493 	EC_ADDR_LIGHTBAR_BAT_BLUE,
1494 };
1495 
1496 static const unsigned int uniwill_led_channel_to_ac_reg[LED_CHANNELS] = {
1497 	EC_ADDR_LIGHTBAR_AC_RED,
1498 	EC_ADDR_LIGHTBAR_AC_GREEN,
1499 	EC_ADDR_LIGHTBAR_AC_BLUE,
1500 };
1501 
1502 static int uniwill_led_brightness_set(struct led_classdev *led_cdev, enum led_brightness brightness)
1503 {
1504 	struct led_classdev_mc *led_mc_cdev = lcdev_to_mccdev(led_cdev);
1505 	struct uniwill_data *data = container_of(led_mc_cdev, struct uniwill_data, led_mc_cdev);
1506 	unsigned int value;
1507 	int ret;
1508 
1509 	ret = led_mc_calc_color_components(led_mc_cdev, brightness);
1510 	if (ret < 0)
1511 		return ret;
1512 
1513 	guard(mutex)(&data->led_lock);
1514 
1515 	for (int i = 0; i < LED_CHANNELS; i++) {
1516 		/* Prevent the brightness values from overflowing */
1517 		value = min(LED_MAX_BRIGHTNESS, data->led_mc_subled_info[i].brightness);
1518 		ret = regmap_write(data->regmap, uniwill_led_channel_to_ac_reg[i], value);
1519 		if (ret < 0)
1520 			return ret;
1521 
1522 		ret = regmap_write(data->regmap, uniwill_led_channel_to_bat_reg[i], value);
1523 		if (ret < 0)
1524 			return ret;
1525 	}
1526 
1527 	if (brightness)
1528 		value = 0;
1529 	else
1530 		value = LIGHTBAR_S0_OFF;
1531 
1532 	ret = regmap_update_bits(data->regmap, EC_ADDR_LIGHTBAR_AC_CTRL, LIGHTBAR_S0_OFF, value);
1533 	if (ret < 0)
1534 		return ret;
1535 
1536 	return regmap_update_bits(data->regmap, EC_ADDR_LIGHTBAR_BAT_CTRL, LIGHTBAR_S0_OFF, value);
1537 }
1538 
1539 #define LIGHTBAR_MASK	(LIGHTBAR_APP_EXISTS | LIGHTBAR_S0_OFF | LIGHTBAR_S3_OFF | LIGHTBAR_WELCOME)
1540 
1541 static int uniwill_led_init(struct uniwill_data *data)
1542 {
1543 	struct led_init_data init_data = {
1544 		.devicename = DRIVER_NAME,
1545 		.default_label = "multicolor:" LED_FUNCTION_STATUS,
1546 		.devname_mandatory = true,
1547 	};
1548 	unsigned int color_indices[3] = {
1549 		LED_COLOR_ID_RED,
1550 		LED_COLOR_ID_GREEN,
1551 		LED_COLOR_ID_BLUE,
1552 	};
1553 	unsigned int value;
1554 	int ret;
1555 
1556 	if (!uniwill_device_supports(data, UNIWILL_FEATURE_LIGHTBAR))
1557 		return 0;
1558 
1559 	ret = devm_mutex_init(data->dev, &data->led_lock);
1560 	if (ret < 0)
1561 		return ret;
1562 
1563 	/*
1564 	 * The EC has separate lightbar settings for AC and battery mode,
1565 	 * so we have to ensure that both settings are the same.
1566 	 */
1567 	ret = regmap_read(data->regmap, EC_ADDR_LIGHTBAR_AC_CTRL, &value);
1568 	if (ret < 0)
1569 		return ret;
1570 
1571 	value |= LIGHTBAR_APP_EXISTS;
1572 	ret = regmap_write(data->regmap, EC_ADDR_LIGHTBAR_AC_CTRL, value);
1573 	if (ret < 0)
1574 		return ret;
1575 
1576 	/*
1577 	 * The breathing animation during suspend is not supported when
1578 	 * running on battery power.
1579 	 */
1580 	value |= LIGHTBAR_S3_OFF;
1581 	ret = regmap_update_bits(data->regmap, EC_ADDR_LIGHTBAR_BAT_CTRL, LIGHTBAR_MASK, value);
1582 	if (ret < 0)
1583 		return ret;
1584 
1585 	data->led_mc_cdev.led_cdev.color = LED_COLOR_ID_MULTI;
1586 	data->led_mc_cdev.led_cdev.max_brightness = LED_MAX_BRIGHTNESS;
1587 	data->led_mc_cdev.led_cdev.flags = LED_REJECT_NAME_CONFLICT;
1588 	data->led_mc_cdev.led_cdev.brightness_set_blocking = uniwill_led_brightness_set;
1589 
1590 	if (value & LIGHTBAR_S0_OFF)
1591 		data->led_mc_cdev.led_cdev.brightness = 0;
1592 	else
1593 		data->led_mc_cdev.led_cdev.brightness = LED_MAX_BRIGHTNESS;
1594 
1595 	for (int i = 0; i < LED_CHANNELS; i++) {
1596 		data->led_mc_subled_info[i].color_index = color_indices[i];
1597 
1598 		ret = regmap_read(data->regmap, uniwill_led_channel_to_ac_reg[i], &value);
1599 		if (ret < 0)
1600 			return ret;
1601 
1602 		/*
1603 		 * Make sure that the initial intensity value is not greater than
1604 		 * the maximum brightness.
1605 		 */
1606 		value = min(LED_MAX_BRIGHTNESS, value);
1607 		ret = regmap_write(data->regmap, uniwill_led_channel_to_ac_reg[i], value);
1608 		if (ret < 0)
1609 			return ret;
1610 
1611 		ret = regmap_write(data->regmap, uniwill_led_channel_to_bat_reg[i], value);
1612 		if (ret < 0)
1613 			return ret;
1614 
1615 		data->led_mc_subled_info[i].intensity = value;
1616 		data->led_mc_subled_info[i].channel = i;
1617 	}
1618 
1619 	data->led_mc_cdev.subled_info = data->led_mc_subled_info;
1620 	data->led_mc_cdev.num_colors = LED_CHANNELS;
1621 
1622 	return devm_led_classdev_multicolor_register_ext(data->dev, &data->led_mc_cdev,
1623 							 &init_data);
1624 }
1625 
1626 static int uniwill_notify_kbd_led(struct uniwill_data *data, int brightness)
1627 {
1628 	struct led_classdev *led_cdev;
1629 	int ret;
1630 
1631 	if (data->single_color_kbd)
1632 		led_cdev = &data->kbd_led_cdev;
1633 	else
1634 		led_cdev = &data->kbd_led_mc_cdev.led_cdev;
1635 
1636 	guard(mutex)(&led_cdev->led_access);
1637 
1638 	/* Sync the LED brightness with the actual hardware state */
1639 	ret = led_update_brightness(led_cdev);
1640 	if (ret < 0)
1641 		return ret;
1642 
1643 	led_classdev_notify_brightness_hw_changed(led_cdev, brightness);
1644 
1645 	return 0;
1646 }
1647 
1648 #define KBD_LED_MASK	(KBD_BRIGHTNESS_MASK | KBD_APPLY | KBD_POWER_OFF)
1649 
1650 static int uniwill_kbd_led_write_brightness(struct uniwill_data *data, int brightness)
1651 {
1652 	/* KBD_POWER_OFF is always implicitly cleared */
1653 	unsigned int regval = FIELD_PREP(KBD_BRIGHTNESS_MASK, brightness) | KBD_APPLY;
1654 
1655 	/* We must ensure that the "apply" bit is always written */
1656 	return regmap_write_bits(data->regmap, EC_ADDR_KBD_STATUS, KBD_LED_MASK, regval);
1657 }
1658 
1659 static int uniwill_kbd_led_read_brightness(struct uniwill_data *data)
1660 {
1661 	unsigned int regval;
1662 	int ret;
1663 
1664 	ret = regmap_read(data->regmap, EC_ADDR_KBD_STATUS, &regval);
1665 	if (ret < 0)
1666 		return ret;
1667 
1668 	return min(FIELD_GET(KBD_BRIGHTNESS_MASK, regval), data->kbd_led_max_brightness);
1669 }
1670 
1671 static int uniwill_kbd_led_brightness_set(struct led_classdev *led_cdev,
1672 					  enum led_brightness brightness)
1673 {
1674 	struct uniwill_data *data = container_of(led_cdev, struct uniwill_data, kbd_led_cdev);
1675 
1676 	return uniwill_kbd_led_write_brightness(data, brightness);
1677 }
1678 
1679 static enum led_brightness uniwill_kbd_led_brightness_get(struct led_classdev *led_cdev)
1680 {
1681 	struct uniwill_data *data = container_of(led_cdev, struct uniwill_data, kbd_led_cdev);
1682 
1683 	return uniwill_kbd_led_read_brightness(data);
1684 }
1685 
1686 static const unsigned int uniwill_kbd_led_channel_to_reg[KBD_LED_CHANNELS] = {
1687 	EC_ADDR_RGB_RED,
1688 	EC_ADDR_RGB_GREEN,
1689 	EC_ADDR_RGB_BLUE,
1690 };
1691 
1692 static int uniwill_kbd_led_mc_brightness_set(struct led_classdev *led_cdev,
1693 					     enum led_brightness brightness)
1694 {
1695 	struct led_classdev_mc *led_mc_cdev = lcdev_to_mccdev(led_cdev);
1696 	struct uniwill_data *data = container_of(led_mc_cdev, struct uniwill_data, kbd_led_mc_cdev);
1697 	unsigned int min_intensity = 0;
1698 	unsigned int regval;
1699 	int ret;
1700 
1701 	guard(mutex)(&data->kbd_rgb_led_lock);
1702 
1703 	/*
1704 	 * The EC interprets a RGB value of 0x000000 as a command to restore
1705 	 * the device-specfic default RGB value. Work around this by writing
1706 	 * a RGB value of 0x010101 (faint white) instead.
1707 	 */
1708 	if (data->kbd_led_mc_subled_info[0].intensity == 0 &&
1709 	    data->kbd_led_mc_subled_info[1].intensity == 0 &&
1710 	    data->kbd_led_mc_subled_info[2].intensity == 0)
1711 		min_intensity = 1;
1712 
1713 	for (int i = 0; i < KBD_LED_CHANNELS; i++) {
1714 		regval = max(data->kbd_led_mc_subled_info[i].intensity, min_intensity);
1715 		ret = regmap_write(data->regmap, uniwill_kbd_led_channel_to_reg[i], regval);
1716 		if (ret < 0)
1717 			return ret;
1718 	}
1719 
1720 	ret = regmap_write_bits(data->regmap, EC_ADDR_TRIGGER, RGB_APPLY_COLOR, RGB_APPLY_COLOR);
1721 	if (ret < 0)
1722 		return ret;
1723 
1724 	return uniwill_kbd_led_write_brightness(data, brightness);
1725 }
1726 
1727 static enum led_brightness uniwill_kbd_led_mc_brightness_get(struct led_classdev *led_cdev)
1728 {
1729 	struct led_classdev_mc *led_mc_cdev = lcdev_to_mccdev(led_cdev);
1730 	struct uniwill_data *data = container_of(led_mc_cdev, struct uniwill_data, kbd_led_mc_cdev);
1731 
1732 	return uniwill_kbd_led_read_brightness(data);
1733 }
1734 
1735 static int uniwill_kbd_led_init(struct uniwill_data *data)
1736 {
1737 	unsigned int color_indices[KBD_LED_CHANNELS] = {
1738 		LED_COLOR_ID_RED,
1739 		LED_COLOR_ID_GREEN,
1740 		LED_COLOR_ID_BLUE,
1741 	};
1742 	struct led_init_data init_data = {
1743 		.devicename = DRIVER_NAME,
1744 		.devname_mandatory = true,
1745 	};
1746 	bool intensity_all_zeros = true;
1747 	bool needs_trigger = false;
1748 	unsigned int regval;
1749 	int ret;
1750 
1751 	if (!uniwill_device_supports(data, UNIWILL_FEATURE_KEYBOARD_BACKLIGHT))
1752 		return 0;
1753 
1754 	ret = regmap_read(data->regmap, EC_ADDR_SUPPORT_2, &regval);
1755 	if (ret < 0)
1756 		return ret;
1757 
1758 	if (!(regval & CHINA_MODE)) {
1759 		ret = regmap_set_bits(data->regmap, EC_ADDR_BIOS_OEM_2, ENABLE_CHINA_MODE);
1760 		if (ret < 0)
1761 			return ret;
1762 	}
1763 
1764 	ret = regmap_read(data->regmap, EC_ADDR_KBD_STATUS, &regval);
1765 	if (ret < 0)
1766 		return ret;
1767 
1768 	regval |= KBD_APPLY;
1769 	regval &= ~KBD_POWER_OFF;
1770 	ret = regmap_write(data->regmap, EC_ADDR_KBD_STATUS, regval);
1771 	if (ret < 0)
1772 		return ret;
1773 
1774 	switch (data->project_id) {
1775 	case PROJECT_ID_PF:
1776 	case PROJECT_ID_PF4MU_PF4MN_PF5MU:
1777 	case PROJECT_ID_PH4TRX1:
1778 	case PROJECT_ID_PH4TUX1:
1779 	case PROJECT_ID_PH4TQX1:
1780 	case PROJECT_ID_PH6TRX1:
1781 	case PROJECT_ID_PH6TQXX:
1782 	case PROJECT_ID_PHXAXXX:
1783 	case PROJECT_ID_PHXPXXX:
1784 		data->single_color_kbd = true;
1785 		break;
1786 	default:
1787 		data->single_color_kbd = regval & KBD_WHITE_ONLY;
1788 		break;
1789 	}
1790 
1791 	if (data->single_color_kbd) {
1792 		init_data.default_label = "white:" LED_FUNCTION_KBD_BACKLIGHT;
1793 		data->kbd_led_cdev.max_brightness = data->kbd_led_max_brightness;
1794 		data->kbd_led_cdev.color = LED_COLOR_ID_WHITE;
1795 		data->kbd_led_cdev.flags = LED_BRIGHT_HW_CHANGED | LED_REJECT_NAME_CONFLICT;
1796 		data->kbd_led_cdev.brightness_set_blocking = uniwill_kbd_led_brightness_set;
1797 		data->kbd_led_cdev.brightness_get = uniwill_kbd_led_brightness_get;
1798 
1799 		return devm_led_classdev_register_ext(data->dev, &data->kbd_led_cdev, &init_data);
1800 	}
1801 
1802 	for (int i = 0; i < KBD_LED_CHANNELS; i++) {
1803 		data->kbd_led_mc_subled_info[i].color_index = color_indices[i];
1804 
1805 		ret = regmap_read(data->regmap, uniwill_kbd_led_channel_to_reg[i], &regval);
1806 		if (ret < 0)
1807 			return ret;
1808 
1809 		/*
1810 		 * Make sure that the initial intensity value is not greater than
1811 		 * the maximum intensity.
1812 		 */
1813 		if (regval > KBD_LED_MAX_INTENSITY) {
1814 			regval = KBD_LED_MAX_INTENSITY;
1815 			ret = regmap_write(data->regmap, uniwill_kbd_led_channel_to_reg[i], regval);
1816 			if (ret < 0)
1817 				return ret;
1818 
1819 			needs_trigger = true;
1820 		}
1821 
1822 		if (regval)
1823 			intensity_all_zeros = false;
1824 
1825 		data->kbd_led_mc_subled_info[i].intensity = regval;
1826 		data->kbd_led_mc_subled_info[i].max_intensity = KBD_LED_MAX_INTENSITY;
1827 		data->kbd_led_mc_subled_info[i].channel = i;
1828 	}
1829 
1830 	/* See uniwill_kbd_led_mc_brightness_set() for an explaination. */
1831 	if (intensity_all_zeros) {
1832 		for (int i = 0; i < KBD_LED_CHANNELS; i++) {
1833 			data->kbd_led_mc_subled_info[i].intensity = 1;
1834 			ret = regmap_write(data->regmap, uniwill_kbd_led_channel_to_reg[i], 1);
1835 			if (ret < 0)
1836 				return ret;
1837 		}
1838 
1839 		needs_trigger = true;
1840 	}
1841 
1842 	if (needs_trigger) {
1843 		ret = regmap_write_bits(data->regmap, EC_ADDR_TRIGGER, RGB_APPLY_COLOR,
1844 					RGB_APPLY_COLOR);
1845 		if (ret < 0)
1846 			return ret;
1847 	}
1848 
1849 	ret = devm_mutex_init(data->dev, &data->kbd_rgb_led_lock);
1850 	if (ret < 0)
1851 		return ret;
1852 
1853 	init_data.default_label = "multicolor:" LED_FUNCTION_KBD_BACKLIGHT;
1854 	data->kbd_led_mc_cdev.led_cdev.max_brightness = data->kbd_led_max_brightness;
1855 	data->kbd_led_mc_cdev.led_cdev.color = LED_COLOR_ID_MULTI;
1856 	data->kbd_led_mc_cdev.led_cdev.flags = LED_BRIGHT_HW_CHANGED | LED_REJECT_NAME_CONFLICT;
1857 	data->kbd_led_mc_cdev.led_cdev.brightness_set_blocking = uniwill_kbd_led_mc_brightness_set;
1858 	data->kbd_led_mc_cdev.led_cdev.brightness_get = uniwill_kbd_led_mc_brightness_get;
1859 	data->kbd_led_mc_cdev.subled_info = data->kbd_led_mc_subled_info;
1860 	data->kbd_led_mc_cdev.num_colors = KBD_LED_CHANNELS;
1861 
1862 	return devm_led_classdev_multicolor_register_ext(data->dev, &data->kbd_led_mc_cdev,
1863 							 &init_data);
1864 }
1865 
1866 static unsigned int uniwill_sanitize_battery_threshold(unsigned int value)
1867 {
1868 	/* 0 means "charging threshold not active" */
1869 	if (!value)
1870 		return 100;
1871 
1872 	/* Guard against invalid values */
1873 	return min(value, 100);
1874 }
1875 
1876 static int uniwill_read_charge_type(struct uniwill_data *data, enum power_supply_charge_type *type)
1877 {
1878 	unsigned int value;
1879 	int ret;
1880 
1881 	ret = regmap_read(data->regmap, EC_ADDR_OEM_4, &value);
1882 	if (ret < 0)
1883 		return ret;
1884 
1885 	switch (FIELD_GET(CHARGING_PROFILE_MASK, value)) {
1886 	case CHARGING_PROFILE_HIGH_CAPACITY:
1887 		*type = POWER_SUPPLY_CHARGE_TYPE_STANDARD;
1888 		return 0;
1889 	case CHARGING_PROFILE_BALANCED:
1890 		*type = POWER_SUPPLY_CHARGE_TYPE_LONGLIFE;
1891 		return 0;
1892 	case CHARGING_PROFILE_STATIONARY:
1893 		*type = POWER_SUPPLY_CHARGE_TYPE_TRICKLE;
1894 		return 0;
1895 	default:
1896 		return -EPROTO;
1897 	}
1898 }
1899 
1900 static int uniwill_get_property(struct power_supply *psy, const struct power_supply_ext *ext,
1901 				void *drvdata, enum power_supply_property psp,
1902 				union power_supply_propval *val)
1903 {
1904 	struct uniwill_data *data = drvdata;
1905 	union power_supply_propval prop;
1906 	unsigned int regval;
1907 	int ret;
1908 
1909 	switch (psp) {
1910 	case POWER_SUPPLY_PROP_CHARGE_TYPES:
1911 		/*
1912 		 * We need to use the cached value here because the charging mode
1913 		 * reported by the EC might temporarily change when a external power
1914 		 * source has been connected.
1915 		 */
1916 		mutex_lock(&data->charge_type_lock);
1917 		val->intval = data->last_charge_type;
1918 		mutex_unlock(&data->charge_type_lock);
1919 		return 0;
1920 	case POWER_SUPPLY_PROP_HEALTH:
1921 		ret = power_supply_get_property_direct(psy, POWER_SUPPLY_PROP_PRESENT, &prop);
1922 		if (ret < 0)
1923 			return ret;
1924 
1925 		if (!prop.intval) {
1926 			val->intval = POWER_SUPPLY_HEALTH_NO_BATTERY;
1927 			return 0;
1928 		}
1929 
1930 		ret = power_supply_get_property_direct(psy, POWER_SUPPLY_PROP_STATUS, &prop);
1931 		if (ret < 0)
1932 			return ret;
1933 
1934 		if (prop.intval == POWER_SUPPLY_STATUS_UNKNOWN) {
1935 			val->intval = POWER_SUPPLY_HEALTH_UNKNOWN;
1936 			return 0;
1937 		}
1938 
1939 		ret = regmap_read(data->regmap, EC_ADDR_BAT_ALERT, &regval);
1940 		if (ret < 0)
1941 			return ret;
1942 
1943 		if (regval) {
1944 			/* Charging issue */
1945 			val->intval = POWER_SUPPLY_HEALTH_UNSPEC_FAILURE;
1946 			return 0;
1947 		}
1948 
1949 		val->intval = POWER_SUPPLY_HEALTH_GOOD;
1950 		return 0;
1951 	case POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD:
1952 		ret = regmap_read(data->regmap, EC_ADDR_CHARGE_CTRL, &regval);
1953 		if (ret < 0)
1954 			return ret;
1955 
1956 		regval = FIELD_GET(CHARGE_CTRL_MASK, regval);
1957 		val->intval = uniwill_sanitize_battery_threshold(regval);
1958 		return 0;
1959 	default:
1960 		return -EINVAL;
1961 	}
1962 }
1963 
1964 static int uniwill_write_charge_type(struct uniwill_data *data, enum power_supply_charge_type type)
1965 {
1966 	unsigned int value;
1967 
1968 	switch (type) {
1969 	case POWER_SUPPLY_CHARGE_TYPE_TRICKLE:
1970 		value = FIELD_PREP(CHARGING_PROFILE_MASK, CHARGING_PROFILE_STATIONARY);
1971 		break;
1972 	case POWER_SUPPLY_CHARGE_TYPE_STANDARD:
1973 		value = FIELD_PREP(CHARGING_PROFILE_MASK, CHARGING_PROFILE_HIGH_CAPACITY);
1974 		break;
1975 	case POWER_SUPPLY_CHARGE_TYPE_LONGLIFE:
1976 		value = FIELD_PREP(CHARGING_PROFILE_MASK, CHARGING_PROFILE_BALANCED);
1977 		break;
1978 	default:
1979 		return -EINVAL;
1980 	}
1981 
1982 	return regmap_update_bits(data->regmap, EC_ADDR_OEM_4, CHARGING_PROFILE_MASK, value);
1983 }
1984 
1985 static int uniwill_restore_charge_type(struct uniwill_data *data)
1986 {
1987 	guard(mutex)(&data->charge_type_lock);
1988 
1989 	return uniwill_write_charge_type(data, data->last_charge_type);
1990 }
1991 
1992 static int uniwill_set_property(struct power_supply *psy, const struct power_supply_ext *ext,
1993 				void *drvdata, enum power_supply_property psp,
1994 				const union power_supply_propval *val)
1995 {
1996 	struct uniwill_data *data = drvdata;
1997 	int ret;
1998 
1999 	switch (psp) {
2000 	case POWER_SUPPLY_PROP_CHARGE_TYPES:
2001 		mutex_lock(&data->charge_type_lock);
2002 
2003 		ret = uniwill_write_charge_type(data, val->intval);
2004 		if (ret >= 0)
2005 			data->last_charge_type = val->intval;
2006 
2007 		mutex_unlock(&data->charge_type_lock);
2008 
2009 		return ret;
2010 	case POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD:
2011 		if (val->intval < 0 || val->intval > 100)
2012 			return -EINVAL;
2013 
2014 		return regmap_update_bits(data->regmap, EC_ADDR_CHARGE_CTRL, CHARGE_CTRL_MASK,
2015 					  max(val->intval, 1));
2016 	default:
2017 		return -EINVAL;
2018 	}
2019 }
2020 
2021 static int uniwill_property_is_writeable(struct power_supply *psy,
2022 					 const struct power_supply_ext *ext, void *drvdata,
2023 					 enum power_supply_property psp)
2024 {
2025 	switch (psp) {
2026 	case POWER_SUPPLY_PROP_CHARGE_TYPES:
2027 	case POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD:
2028 		return true;
2029 	default:
2030 		return false;
2031 	}
2032 }
2033 
2034 static const enum power_supply_property uniwill_charge_limit_properties[] = {
2035 	POWER_SUPPLY_PROP_HEALTH,
2036 	POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD,
2037 };
2038 
2039 static const struct power_supply_ext uniwill_charge_limit_extension = {
2040 	.name = DRIVER_NAME,
2041 	.properties = uniwill_charge_limit_properties,
2042 	.num_properties = ARRAY_SIZE(uniwill_charge_limit_properties),
2043 	.get_property = uniwill_get_property,
2044 	.set_property = uniwill_set_property,
2045 	.property_is_writeable = uniwill_property_is_writeable,
2046 };
2047 
2048 static const enum power_supply_property uniwill_charge_modes_properties[] = {
2049 	POWER_SUPPLY_PROP_CHARGE_TYPES,
2050 	POWER_SUPPLY_PROP_HEALTH,
2051 };
2052 
2053 static const struct power_supply_ext uniwill_charge_modes_extension = {
2054 	.name = DRIVER_NAME,
2055 	.charge_types = BIT(POWER_SUPPLY_CHARGE_TYPE_TRICKLE) |
2056 			BIT(POWER_SUPPLY_CHARGE_TYPE_STANDARD) |
2057 			BIT(POWER_SUPPLY_CHARGE_TYPE_LONGLIFE),
2058 	.properties = uniwill_charge_modes_properties,
2059 	.num_properties = ARRAY_SIZE(uniwill_charge_modes_properties),
2060 	.get_property = uniwill_get_property,
2061 	.set_property = uniwill_set_property,
2062 	.property_is_writeable = uniwill_property_is_writeable,
2063 };
2064 
2065 static int uniwill_add_battery(struct power_supply *battery, struct acpi_battery_hook *hook)
2066 {
2067 	struct uniwill_data *data = container_of(hook, struct uniwill_data, hook);
2068 	struct uniwill_battery_entry *entry;
2069 	int ret;
2070 
2071 	entry = kzalloc_obj(*entry);
2072 	if (!entry)
2073 		return -ENOMEM;
2074 
2075 	if (uniwill_device_supports(data, UNIWILL_FEATURE_BATTERY_CHARGE_LIMIT))
2076 		ret = power_supply_register_extension(battery, &uniwill_charge_limit_extension,
2077 						      data->dev, data);
2078 	else
2079 		ret = power_supply_register_extension(battery, &uniwill_charge_modes_extension,
2080 						      data->dev, data);
2081 
2082 	if (ret < 0) {
2083 		kfree(entry);
2084 		return ret;
2085 	}
2086 
2087 	guard(mutex)(&data->battery_lock);
2088 
2089 	entry->battery = battery;
2090 	list_add(&entry->head, &data->batteries);
2091 
2092 	return 0;
2093 }
2094 
2095 static int uniwill_remove_battery(struct power_supply *battery, struct acpi_battery_hook *hook)
2096 {
2097 	struct uniwill_data *data = container_of(hook, struct uniwill_data, hook);
2098 	struct uniwill_battery_entry *entry, *tmp;
2099 
2100 	scoped_guard(mutex, &data->battery_lock) {
2101 		list_for_each_entry_safe(entry, tmp, &data->batteries, head) {
2102 			if (entry->battery == battery) {
2103 				list_del(&entry->head);
2104 				kfree(entry);
2105 				break;
2106 			}
2107 		}
2108 	}
2109 
2110 	if (uniwill_device_supports(data, UNIWILL_FEATURE_BATTERY_CHARGE_LIMIT))
2111 		power_supply_unregister_extension(battery, &uniwill_charge_limit_extension);
2112 	else
2113 		power_supply_unregister_extension(battery, &uniwill_charge_modes_extension);
2114 
2115 	return 0;
2116 }
2117 
2118 static int uniwill_battery_init(struct uniwill_data *data)
2119 {
2120 	unsigned int value, threshold, sanitized;
2121 	int ret;
2122 
2123 	if (uniwill_device_supports(data, UNIWILL_FEATURE_BATTERY_CHARGE_LIMIT)) {
2124 		ret = regmap_read(data->regmap, EC_ADDR_CHARGE_CTRL, &value);
2125 		if (ret < 0)
2126 			return ret;
2127 
2128 		/*
2129 		 * The charge control threshold might be initialized with 0 by
2130 		 * the EC to signal that said threshold is uninitialized. We thus
2131 		 * need to replace this placeholder value with a valid one (100)
2132 		 * to signal that we want to take control of battery charging.
2133 		 * For the sake of completeness we also apply this to other
2134 		 * invalid threshold values.
2135 		 */
2136 		threshold = FIELD_GET(CHARGE_CTRL_MASK, value);
2137 		sanitized = uniwill_sanitize_battery_threshold(threshold);
2138 		if (threshold != sanitized) {
2139 			FIELD_MODIFY(CHARGE_CTRL_MASK, &value, sanitized);
2140 			ret = regmap_write(data->regmap, EC_ADDR_CHARGE_CTRL, value);
2141 			if (ret < 0)
2142 				return ret;
2143 		}
2144 	} else if (uniwill_device_supports(data, UNIWILL_FEATURE_BATTERY_CHARGE_MODES)) {
2145 		ret = devm_mutex_init(data->dev, &data->charge_type_lock);
2146 		if (ret < 0)
2147 			return ret;
2148 
2149 		ret = uniwill_read_charge_type(data, &data->last_charge_type);
2150 		if (ret < 0)
2151 			return ret;
2152 	} else {
2153 		return 0;
2154 	}
2155 
2156 	ret = devm_mutex_init(data->dev, &data->battery_lock);
2157 	if (ret < 0)
2158 		return ret;
2159 
2160 	INIT_LIST_HEAD(&data->batteries);
2161 	data->hook.name = "Uniwill Battery Extension";
2162 	data->hook.add_battery = uniwill_add_battery;
2163 	data->hook.remove_battery = uniwill_remove_battery;
2164 
2165 	return devm_battery_hook_register(data->dev, &data->hook);
2166 }
2167 
2168 static int uniwill_notifier_call(struct notifier_block *nb, unsigned long action, void *dummy)
2169 {
2170 	struct uniwill_data *data = container_of(nb, struct uniwill_data, nb);
2171 	struct uniwill_battery_entry *entry;
2172 	int ret;
2173 
2174 	switch (action) {
2175 	case UNIWILL_OSD_BATTERY_ALERT:
2176 		if (!uniwill_device_supports_any(data,
2177 						 UNIWILL_FEATURE_BATTERY_CHARGE_LIMIT |
2178 						 UNIWILL_FEATURE_BATTERY_CHARGE_MODES))
2179 			return NOTIFY_DONE;
2180 
2181 		mutex_lock(&data->battery_lock);
2182 		list_for_each_entry(entry, &data->batteries, head) {
2183 			power_supply_changed(entry->battery);
2184 		}
2185 		mutex_unlock(&data->battery_lock);
2186 
2187 		return NOTIFY_OK;
2188 	case UNIWILL_OSD_DC_ADAPTER_CHANGED:
2189 		if (!uniwill_device_supports_any(data,
2190 						 UNIWILL_FEATURE_BATTERY_CHARGE_MODES |
2191 						 UNIWILL_FEATURE_USB_C_POWER_PRIORITY))
2192 			return NOTIFY_DONE;
2193 
2194 		if (uniwill_device_supports(data, UNIWILL_FEATURE_BATTERY_CHARGE_MODES)) {
2195 			ret = uniwill_restore_charge_type(data);
2196 			if (ret < 0)
2197 				return notifier_from_errno(ret);
2198 		}
2199 
2200 		if (uniwill_device_supports(data, UNIWILL_FEATURE_USB_C_POWER_PRIORITY)) {
2201 			ret = usb_c_power_priority_restore(data);
2202 			if (ret < 0)
2203 				return notifier_from_errno(ret);
2204 		}
2205 
2206 		return NOTIFY_OK;
2207 	case UNIWILL_OSD_FN_LOCK:
2208 		if (!uniwill_device_supports(data, UNIWILL_FEATURE_FN_LOCK))
2209 			return NOTIFY_DONE;
2210 
2211 		sysfs_notify(&data->dev->kobj, NULL, "fn_lock");
2212 
2213 		return NOTIFY_OK;
2214 	case UNIWILL_OSD_KB_LED_LEVEL0:
2215 		if (!uniwill_device_supports(data, UNIWILL_FEATURE_KEYBOARD_BACKLIGHT))
2216 			return NOTIFY_DONE;
2217 
2218 		return notifier_from_errno(uniwill_notify_kbd_led(data, 0));
2219 	case UNIWILL_OSD_KB_LED_LEVEL1:
2220 		if (!uniwill_device_supports(data, UNIWILL_FEATURE_KEYBOARD_BACKLIGHT))
2221 			return NOTIFY_DONE;
2222 
2223 		return notifier_from_errno(uniwill_notify_kbd_led(data, 1));
2224 	case UNIWILL_OSD_KB_LED_LEVEL2:
2225 		if (!uniwill_device_supports(data, UNIWILL_FEATURE_KEYBOARD_BACKLIGHT))
2226 			return NOTIFY_DONE;
2227 
2228 		return notifier_from_errno(uniwill_notify_kbd_led(data, 2));
2229 	case UNIWILL_OSD_KB_LED_LEVEL3:
2230 		if (!uniwill_device_supports(data, UNIWILL_FEATURE_KEYBOARD_BACKLIGHT))
2231 			return NOTIFY_DONE;
2232 
2233 		return notifier_from_errno(uniwill_notify_kbd_led(data, 3));
2234 	case UNIWILL_OSD_KB_LED_LEVEL4:
2235 		if (!uniwill_device_supports(data, UNIWILL_FEATURE_KEYBOARD_BACKLIGHT))
2236 			return NOTIFY_DONE;
2237 
2238 		return notifier_from_errno(uniwill_notify_kbd_led(data, 4));
2239 	default:
2240 		mutex_lock(&data->input_lock);
2241 		sparse_keymap_report_event(data->input_device, action, 1, true);
2242 		mutex_unlock(&data->input_lock);
2243 
2244 		return NOTIFY_OK;
2245 	}
2246 }
2247 
2248 static int uniwill_input_init(struct uniwill_data *data)
2249 {
2250 	int ret;
2251 
2252 	ret = devm_mutex_init(data->dev, &data->input_lock);
2253 	if (ret < 0)
2254 		return ret;
2255 
2256 	data->input_device = devm_input_allocate_device(data->dev);
2257 	if (!data->input_device)
2258 		return -ENOMEM;
2259 
2260 	ret = sparse_keymap_setup(data->input_device, uniwill_keymap, NULL);
2261 	if (ret < 0)
2262 		return ret;
2263 
2264 	data->input_device->name = "Uniwill WMI hotkeys";
2265 	data->input_device->phys = "wmi/input0";
2266 	data->input_device->id.bustype = BUS_HOST;
2267 	ret = input_register_device(data->input_device);
2268 	if (ret < 0)
2269 		return ret;
2270 
2271 	data->nb.notifier_call = uniwill_notifier_call;
2272 
2273 	return devm_uniwill_wmi_register_notifier(data->dev, &data->nb);
2274 }
2275 
2276 static void uniwill_disable_manual_control(void *context)
2277 {
2278 	struct uniwill_data *data = context;
2279 
2280 	regmap_clear_bits(data->regmap, EC_ADDR_AP_OEM, ENABLE_MANUAL_CTRL);
2281 }
2282 
2283 static int uniwill_ec_init(struct uniwill_data *data)
2284 {
2285 	unsigned int value;
2286 	int ret;
2287 
2288 	ret = regmap_read(data->regmap, EC_ADDR_PROJECT_ID, &value);
2289 	if (ret < 0)
2290 		return ret;
2291 
2292 	data->project_id = value;
2293 	dev_dbg(data->dev, "Project ID: %u\n", value);
2294 
2295 	ret = regmap_set_bits(data->regmap, EC_ADDR_AP_OEM, ENABLE_MANUAL_CTRL);
2296 	if (ret < 0)
2297 		return ret;
2298 
2299 	return devm_add_action_or_reset(data->dev, uniwill_disable_manual_control, data);
2300 }
2301 
2302 static int uniwill_probe(struct platform_device *pdev)
2303 {
2304 	struct uniwill_data *data;
2305 	struct regmap *regmap;
2306 	acpi_handle handle;
2307 	int ret;
2308 
2309 	handle = ACPI_HANDLE(&pdev->dev);
2310 	if (!handle)
2311 		return -ENODEV;
2312 
2313 	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
2314 	if (!data)
2315 		return -ENOMEM;
2316 
2317 	data->dev = &pdev->dev;
2318 	data->handle = handle;
2319 	platform_set_drvdata(pdev, data);
2320 
2321 	regmap = devm_regmap_init(&pdev->dev, &uniwill_ec_bus, data, &uniwill_ec_config);
2322 	if (IS_ERR(regmap))
2323 		return PTR_ERR(regmap);
2324 
2325 	data->regmap = regmap;
2326 
2327 	ret = devm_mutex_init(&pdev->dev, &data->super_key_lock);
2328 	if (ret < 0)
2329 		return ret;
2330 
2331 	ret = uniwill_ec_init(data);
2332 	if (ret < 0)
2333 		return ret;
2334 
2335 	data->features = device_descriptor.features;
2336 	data->kbd_led_max_brightness = device_descriptor.kbd_led_max_brightness;
2337 
2338 	/*
2339 	 * Some devices might need to perform some device-specific initialization steps
2340 	 * before the supported features are initialized. Because of this we have to call
2341 	 * this callback just after the EC itself was initialized.
2342 	 */
2343 	if (device_descriptor.probe) {
2344 		ret = device_descriptor.probe(data);
2345 		if (ret < 0)
2346 			return ret;
2347 	}
2348 
2349 	ret = uniwill_battery_init(data);
2350 	if (ret < 0)
2351 		return ret;
2352 
2353 	ret = uniwill_led_init(data);
2354 	if (ret < 0)
2355 		return ret;
2356 
2357 	ret = uniwill_kbd_led_init(data);
2358 	if (ret < 0)
2359 		return ret;
2360 
2361 	ret = uniwill_hwmon_init(data);
2362 	if (ret < 0)
2363 		return ret;
2364 
2365 	ret = uniwill_nvidia_ctgp_init(data);
2366 	if (ret < 0)
2367 		return ret;
2368 
2369 	ret = usb_c_power_priority_init(data);
2370 	if (ret < 0)
2371 		return ret;
2372 
2373 	return uniwill_input_init(data);
2374 }
2375 
2376 static void uniwill_shutdown(struct platform_device *pdev)
2377 {
2378 	struct uniwill_data *data = platform_get_drvdata(pdev);
2379 
2380 	regmap_clear_bits(data->regmap, EC_ADDR_AP_OEM, ENABLE_MANUAL_CTRL);
2381 }
2382 
2383 static int uniwill_suspend_fn_lock(struct uniwill_data *data)
2384 {
2385 	if (!uniwill_device_supports(data, UNIWILL_FEATURE_FN_LOCK))
2386 		return 0;
2387 
2388 	/*
2389 	 * EC_ADDR_BIOS_OEM is marked as volatile, so we have to restore it
2390 	 * ourselves.
2391 	 */
2392 	return uniwill_read_fn_lock(data, &data->last_fn_lock_state);
2393 }
2394 
2395 static int uniwill_suspend_super_key(struct uniwill_data *data)
2396 {
2397 	if (!uniwill_device_supports(data, UNIWILL_FEATURE_SUPER_KEY))
2398 		return 0;
2399 
2400 	/*
2401 	 * EC_ADDR_SWITCH_STATUS is marked as volatile, so we have to restore it
2402 	 * ourselves.
2403 	 */
2404 	return uniwill_read_super_key_enable(data, &data->last_super_key_enable_state);
2405 }
2406 
2407 static int uniwill_suspend_touchpad_toggle(struct uniwill_data *data)
2408 {
2409 	if (!uniwill_device_supports(data, UNIWILL_FEATURE_TOUCHPAD_TOGGLE))
2410 		return 0;
2411 
2412 	/*
2413 	 * EC_ADDR_OEM_4 is marked as volatile, so we have to restore it
2414 	 * ourselves.
2415 	 */
2416 	return uniwill_read_touchpad_toggle_enable(data, &data->last_touchpad_toggle_enable_state);
2417 }
2418 
2419 static int uniwill_suspend_battery(struct uniwill_data *data)
2420 {
2421 	if (!uniwill_device_supports(data, UNIWILL_FEATURE_BATTERY_CHARGE_LIMIT))
2422 		return 0;
2423 
2424 	/*
2425 	 * Save the current charge limit in order to restore it during resume.
2426 	 * We cannot use the regmap code for that since this register needs to
2427 	 * be declared as volatile due to CHARGE_CTRL_REACHED.
2428 	 */
2429 	return regmap_read(data->regmap, EC_ADDR_CHARGE_CTRL, &data->last_charge_ctrl);
2430 }
2431 
2432 static int uniwill_suspend_kbd_led(struct uniwill_data *data)
2433 {
2434 	unsigned int regval;
2435 	int ret;
2436 
2437 	if (!uniwill_device_supports(data, UNIWILL_FEATURE_KEYBOARD_BACKLIGHT))
2438 		return 0;
2439 
2440 	ret = regmap_read(data->regmap, EC_ADDR_KBD_STATUS, &regval);
2441 	if (ret < 0)
2442 		return ret;
2443 
2444 	/*
2445 	 * Save the current keyboard backlight settings in order to restore them
2446 	 * during resume. We cannot use the regmap code for that since this register
2447 	 * needs to be declared as volatile because the brightness can be changed
2448 	 * by the EC.
2449 	 */
2450 	data->last_kbd_status = regval;
2451 	FIELD_MODIFY(KBD_BRIGHTNESS_MASK, &regval, 0);
2452 	regval |= KBD_APPLY | KBD_POWER_OFF;
2453 
2454 	return regmap_write(data->regmap, EC_ADDR_KBD_STATUS, regval);
2455 }
2456 
2457 static int uniwill_suspend_usb_powershare(struct uniwill_data *data)
2458 {
2459 	if (!uniwill_device_supports(data, UNIWILL_FEATURE_USB_POWERSHARE))
2460 		return 0;
2461 
2462 	/*
2463 	 * EC_ADDR_TRIGGER is marked as volatile, so we have to restore it
2464 	 * ourselves.
2465 	 */
2466 	return uniwill_read_usb_powershare_high(data, &data->last_usb_powershare_high_state);
2467 }
2468 
2469 static int uniwill_suspend_nvidia_ctgp(struct uniwill_data *data)
2470 {
2471 	if (!uniwill_device_supports(data, UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL))
2472 		return 0;
2473 
2474 	return regmap_clear_bits(data->regmap, EC_ADDR_CTGP_DB_CTRL,
2475 				 CTGP_DB_DB_ENABLE | CTGP_DB_CTGP_ENABLE);
2476 }
2477 
2478 static int uniwill_suspend(struct device *dev)
2479 {
2480 	struct uniwill_data *data = dev_get_drvdata(dev);
2481 	int ret;
2482 
2483 	ret = uniwill_suspend_fn_lock(data);
2484 	if (ret < 0)
2485 		return ret;
2486 
2487 	ret = uniwill_suspend_super_key(data);
2488 	if (ret < 0)
2489 		return ret;
2490 
2491 	ret = uniwill_suspend_touchpad_toggle(data);
2492 	if (ret < 0)
2493 		return ret;
2494 
2495 	ret = uniwill_suspend_battery(data);
2496 	if (ret < 0)
2497 		return ret;
2498 
2499 	ret = uniwill_suspend_kbd_led(data);
2500 	if (ret < 0)
2501 		return ret;
2502 
2503 	ret = uniwill_suspend_usb_powershare(data);
2504 	if (ret < 0)
2505 		return ret;
2506 
2507 	ret = uniwill_suspend_nvidia_ctgp(data);
2508 	if (ret < 0)
2509 		return ret;
2510 
2511 	regcache_cache_only(data->regmap, true);
2512 	regcache_mark_dirty(data->regmap);
2513 
2514 	return 0;
2515 }
2516 
2517 static int uniwill_resume_fn_lock(struct uniwill_data *data)
2518 {
2519 	if (!uniwill_device_supports(data, UNIWILL_FEATURE_FN_LOCK))
2520 		return 0;
2521 
2522 	return uniwill_write_fn_lock(data, data->last_fn_lock_state);
2523 }
2524 
2525 static int uniwill_resume_super_key(struct uniwill_data *data)
2526 {
2527 	if (!uniwill_device_supports(data, UNIWILL_FEATURE_SUPER_KEY))
2528 		return 0;
2529 
2530 	return uniwill_write_super_key_enable(data, data->last_super_key_enable_state);
2531 }
2532 
2533 static int uniwill_resume_touchpad_toggle(struct uniwill_data *data)
2534 {
2535 	if (!uniwill_device_supports(data, UNIWILL_FEATURE_TOUCHPAD_TOGGLE))
2536 		return 0;
2537 
2538 	return uniwill_write_touchpad_toggle_enable(data, data->last_touchpad_toggle_enable_state);
2539 }
2540 
2541 static int uniwill_resume_battery(struct uniwill_data *data)
2542 {
2543 	if (uniwill_device_supports(data, UNIWILL_FEATURE_BATTERY_CHARGE_MODES))
2544 		return uniwill_restore_charge_type(data);
2545 
2546 	if (uniwill_device_supports(data, UNIWILL_FEATURE_BATTERY_CHARGE_LIMIT))
2547 		return regmap_update_bits(data->regmap, EC_ADDR_CHARGE_CTRL, CHARGE_CTRL_MASK,
2548 					  data->last_charge_ctrl);
2549 
2550 	return 0;
2551 }
2552 
2553 static int uniwill_resume_kbd_led(struct uniwill_data *data)
2554 {
2555 	int ret;
2556 
2557 	if (!uniwill_device_supports(data, UNIWILL_FEATURE_KEYBOARD_BACKLIGHT))
2558 		return 0;
2559 
2560 	ret = regmap_write(data->regmap, EC_ADDR_KBD_STATUS, data->last_kbd_status | KBD_APPLY);
2561 	if (ret < 0)
2562 		return ret;
2563 
2564 	if (data->single_color_kbd)
2565 		return 0;
2566 
2567 	return regmap_write_bits(data->regmap, EC_ADDR_TRIGGER, RGB_APPLY_COLOR, RGB_APPLY_COLOR);
2568 }
2569 
2570 static int uniwill_resume_usb_powershare(struct uniwill_data *data)
2571 {
2572 	if (!uniwill_device_supports(data, UNIWILL_FEATURE_USB_POWERSHARE))
2573 		return 0;
2574 
2575 	return uniwill_write_usb_powershare_high(data, data->last_usb_powershare_high_state);
2576 }
2577 
2578 static int uniwill_resume_nvidia_ctgp(struct uniwill_data *data)
2579 {
2580 	if (!uniwill_device_supports(data, UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL))
2581 		return 0;
2582 
2583 	return regmap_set_bits(data->regmap, EC_ADDR_CTGP_DB_CTRL,
2584 			       CTGP_DB_DB_ENABLE | CTGP_DB_CTGP_ENABLE);
2585 }
2586 
2587 static int uniwill_resume_usb_c_power_priority(struct uniwill_data *data)
2588 {
2589 	if (!uniwill_device_supports(data, UNIWILL_FEATURE_USB_C_POWER_PRIORITY))
2590 		return 0;
2591 
2592 	return usb_c_power_priority_restore(data);
2593 }
2594 
2595 static int uniwill_resume(struct device *dev)
2596 {
2597 	struct uniwill_data *data = dev_get_drvdata(dev);
2598 	int ret;
2599 
2600 	regcache_cache_only(data->regmap, false);
2601 
2602 	ret = regcache_sync(data->regmap);
2603 	if (ret < 0)
2604 		return ret;
2605 
2606 	ret = uniwill_resume_fn_lock(data);
2607 	if (ret < 0)
2608 		return ret;
2609 
2610 	ret = uniwill_resume_super_key(data);
2611 	if (ret < 0)
2612 		return ret;
2613 
2614 	ret = uniwill_resume_touchpad_toggle(data);
2615 	if (ret < 0)
2616 		return ret;
2617 
2618 	ret = uniwill_resume_battery(data);
2619 	if (ret < 0)
2620 		return ret;
2621 
2622 	ret = uniwill_resume_kbd_led(data);
2623 	if (ret < 0)
2624 		return ret;
2625 
2626 	ret = uniwill_resume_usb_powershare(data);
2627 	if (ret < 0)
2628 		return ret;
2629 
2630 	ret = uniwill_resume_nvidia_ctgp(data);
2631 	if (ret < 0)
2632 		return ret;
2633 
2634 	return uniwill_resume_usb_c_power_priority(data);
2635 }
2636 
2637 static DEFINE_SIMPLE_DEV_PM_OPS(uniwill_pm_ops, uniwill_suspend, uniwill_resume);
2638 
2639 /*
2640  * We only use the DMI table for auoloading because the ACPI device itself
2641  * does not guarantee that the underlying EC implementation is supported.
2642  */
2643 static const struct acpi_device_id uniwill_id_table[] = {
2644 	{ "INOU0000" },
2645 	{ },
2646 };
2647 
2648 static struct platform_driver uniwill_driver = {
2649 	.driver = {
2650 		.name = DRIVER_NAME,
2651 		.dev_groups = uniwill_groups,
2652 		.probe_type = PROBE_PREFER_ASYNCHRONOUS,
2653 		.acpi_match_table = uniwill_id_table,
2654 		.pm = pm_sleep_ptr(&uniwill_pm_ops),
2655 	},
2656 	.probe = uniwill_probe,
2657 	.shutdown = uniwill_shutdown,
2658 };
2659 
2660 static struct uniwill_device_descriptor lapqc71a_lapqc71b_descriptor __initdata = {
2661 	.features = UNIWILL_FEATURE_SUPER_KEY |
2662 		    UNIWILL_FEATURE_BATTERY_CHARGE_LIMIT |
2663 		    UNIWILL_FEATURE_CPU_TEMP |
2664 		    UNIWILL_FEATURE_GPU_TEMP |
2665 		    UNIWILL_FEATURE_PRIMARY_FAN |
2666 		    UNIWILL_FEATURE_SECONDARY_FAN,
2667 };
2668 
2669 static struct uniwill_device_descriptor lapac71h_descriptor __initdata = {
2670 	.features = UNIWILL_FEATURE_FN_LOCK |
2671 		    UNIWILL_FEATURE_SUPER_KEY |
2672 		    UNIWILL_FEATURE_TOUCHPAD_TOGGLE |
2673 		    UNIWILL_FEATURE_BATTERY_CHARGE_LIMIT |
2674 		    UNIWILL_FEATURE_CPU_TEMP |
2675 		    UNIWILL_FEATURE_GPU_TEMP |
2676 		    UNIWILL_FEATURE_PRIMARY_FAN |
2677 		    UNIWILL_FEATURE_SECONDARY_FAN,
2678 };
2679 
2680 static struct uniwill_device_descriptor lapkc71f_descriptor __initdata = {
2681 	.features = UNIWILL_FEATURE_FN_LOCK |
2682 		    UNIWILL_FEATURE_SUPER_KEY |
2683 		    UNIWILL_FEATURE_TOUCHPAD_TOGGLE |
2684 		    UNIWILL_FEATURE_LIGHTBAR |
2685 		    UNIWILL_FEATURE_BATTERY_CHARGE_LIMIT |
2686 		    UNIWILL_FEATURE_CPU_TEMP |
2687 		    UNIWILL_FEATURE_GPU_TEMP |
2688 		    UNIWILL_FEATURE_PRIMARY_FAN |
2689 		    UNIWILL_FEATURE_SECONDARY_FAN,
2690 };
2691 
2692 /*
2693  * The featuresets below reflect somewhat chronological changes:
2694  * 1 -> 2: UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL is added to the EC firmware.
2695  * 2 -> 3: UNIWILL_FEATURE_USB_C_POWER_PRIORITY is removed from the EC firmware.
2696  * Some devices might divert from this timeline.
2697  */
2698 
2699 static struct uniwill_device_descriptor tux_featureset_1_descriptor __initdata = {
2700 	.features = UNIWILL_FEATURE_FN_LOCK |
2701 		    UNIWILL_FEATURE_SUPER_KEY |
2702 		    UNIWILL_FEATURE_BATTERY_CHARGE_MODES |
2703 		    UNIWILL_FEATURE_CPU_TEMP |
2704 		    UNIWILL_FEATURE_PRIMARY_FAN |
2705 		    UNIWILL_FEATURE_SECONDARY_FAN |
2706 		    UNIWILL_FEATURE_USB_C_POWER_PRIORITY,
2707 };
2708 
2709 static struct uniwill_device_descriptor tux_featureset_1_nvidia_descriptor __initdata = {
2710 	.features = UNIWILL_FEATURE_FN_LOCK |
2711 		    UNIWILL_FEATURE_SUPER_KEY |
2712 		    UNIWILL_FEATURE_BATTERY_CHARGE_MODES |
2713 		    UNIWILL_FEATURE_CPU_TEMP |
2714 		    UNIWILL_FEATURE_GPU_TEMP |
2715 		    UNIWILL_FEATURE_PRIMARY_FAN |
2716 		    UNIWILL_FEATURE_SECONDARY_FAN |
2717 		    UNIWILL_FEATURE_USB_C_POWER_PRIORITY,
2718 };
2719 
2720 static struct uniwill_device_descriptor tux_featureset_2_nvidia_descriptor __initdata = {
2721 	.features = UNIWILL_FEATURE_FN_LOCK |
2722 		    UNIWILL_FEATURE_SUPER_KEY |
2723 		    UNIWILL_FEATURE_BATTERY_CHARGE_MODES |
2724 		    UNIWILL_FEATURE_CPU_TEMP |
2725 		    UNIWILL_FEATURE_GPU_TEMP |
2726 		    UNIWILL_FEATURE_PRIMARY_FAN |
2727 		    UNIWILL_FEATURE_SECONDARY_FAN |
2728 		    UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL |
2729 		    UNIWILL_FEATURE_USB_C_POWER_PRIORITY,
2730 };
2731 
2732 static struct uniwill_device_descriptor tux_featureset_3_descriptor __initdata = {
2733 	.features = UNIWILL_FEATURE_FN_LOCK |
2734 		    UNIWILL_FEATURE_SUPER_KEY |
2735 		    UNIWILL_FEATURE_BATTERY_CHARGE_MODES |
2736 		    UNIWILL_FEATURE_CPU_TEMP |
2737 		    UNIWILL_FEATURE_PRIMARY_FAN |
2738 		    UNIWILL_FEATURE_SECONDARY_FAN,
2739 };
2740 
2741 static struct uniwill_device_descriptor tux_featureset_3_nvidia_descriptor __initdata = {
2742 	.features = UNIWILL_FEATURE_FN_LOCK |
2743 		    UNIWILL_FEATURE_SUPER_KEY |
2744 		    UNIWILL_FEATURE_BATTERY_CHARGE_MODES |
2745 		    UNIWILL_FEATURE_CPU_TEMP |
2746 		    UNIWILL_FEATURE_GPU_TEMP |
2747 		    UNIWILL_FEATURE_PRIMARY_FAN |
2748 		    UNIWILL_FEATURE_SECONDARY_FAN |
2749 		    UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL,
2750 };
2751 
2752 static int phxtxx1_probe(struct uniwill_data *data)
2753 {
2754 	unsigned int value;
2755 	int ret;
2756 
2757 	ret = regmap_read(data->regmap, EC_ADDR_PROJECT_ID, &value);
2758 	if (ret < 0)
2759 		return ret;
2760 
2761 	if (value == PROJECT_ID_PH4TRX1 || value == PROJECT_ID_PH6TRX1)
2762 		data->features |= UNIWILL_FEATURE_SECONDARY_FAN;
2763 
2764 	return 0;
2765 };
2766 
2767 static struct uniwill_device_descriptor phxtxx1_descriptor __initdata = {
2768 	.features = UNIWILL_FEATURE_FN_LOCK |
2769 		    UNIWILL_FEATURE_SUPER_KEY |
2770 		    UNIWILL_FEATURE_BATTERY_CHARGE_MODES |
2771 		    UNIWILL_FEATURE_CPU_TEMP |
2772 		    UNIWILL_FEATURE_PRIMARY_FAN |
2773 		    UNIWILL_FEATURE_USB_C_POWER_PRIORITY,
2774 	.probe = phxtxx1_probe,
2775 };
2776 
2777 static int phxarx1_phxaqf1_probe(struct uniwill_data *data)
2778 {
2779 	unsigned int value;
2780 	int ret;
2781 
2782 	ret = regmap_read(data->regmap, EC_ADDR_SYSTEM_ID, &value);
2783 	if (ret < 0)
2784 		return ret;
2785 
2786 	if (value & HAS_GPU)
2787 		data->features |= UNIWILL_FEATURE_GPU_TEMP |
2788 				  UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL;
2789 
2790 	return 0;
2791 };
2792 
2793 static struct uniwill_device_descriptor phxarx1_phxaqf1_descriptor __initdata = {
2794 	.features = UNIWILL_FEATURE_FN_LOCK |
2795 		    UNIWILL_FEATURE_SUPER_KEY |
2796 		    UNIWILL_FEATURE_BATTERY_CHARGE_MODES |
2797 		    UNIWILL_FEATURE_CPU_TEMP |
2798 		    UNIWILL_FEATURE_PRIMARY_FAN |
2799 		    UNIWILL_FEATURE_SECONDARY_FAN |
2800 		    UNIWILL_FEATURE_USB_C_POWER_PRIORITY,
2801 	.probe = phxarx1_phxaqf1_probe,
2802 };
2803 
2804 static struct uniwill_device_descriptor pf5pu1g_descriptor __initdata = {
2805 	.features = UNIWILL_FEATURE_FN_LOCK |
2806 		    UNIWILL_FEATURE_SUPER_KEY |
2807 		    UNIWILL_FEATURE_CPU_TEMP |
2808 		    UNIWILL_FEATURE_PRIMARY_FAN,
2809 };
2810 
2811 static const struct dmi_system_id uniwill_dmi_table[] __initconst = {
2812 	{
2813 		.ident = "XMG FUSION 15 (L19)",
2814 		.matches = {
2815 			DMI_MATCH(DMI_SYS_VENDOR, "SchenkerTechnologiesGmbH"),
2816 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "LAPQC71A"),
2817 		},
2818 		.driver_data = &lapqc71a_lapqc71b_descriptor,
2819 	},
2820 	{
2821 		.ident = "XMG FUSION 15 (L19)",
2822 		.matches = {
2823 			DMI_MATCH(DMI_SYS_VENDOR, "SchenkerTechnologiesGmbH"),
2824 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "LAPQC71B"),
2825 		},
2826 		.driver_data = &lapqc71a_lapqc71b_descriptor,
2827 	},
2828 	{
2829 		.ident = "XMG FUSION 15 (L19)",
2830 		.matches = {
2831 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
2832 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "LAPQC71A"),
2833 		},
2834 		.driver_data = &lapqc71a_lapqc71b_descriptor,
2835 	},
2836 	{
2837 		.ident = "XMG FUSION 15 (L19)",
2838 		.matches = {
2839 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
2840 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "LAPQC71B"),
2841 		},
2842 		.driver_data = &lapqc71a_lapqc71b_descriptor,
2843 	},
2844 	{
2845 		.ident = "Intel NUC x15",
2846 		.matches = {
2847 			DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Intel(R) Client Systems"),
2848 			DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "LAPAC71H"),
2849 		},
2850 		.driver_data = &lapac71h_descriptor,
2851 	},
2852 	{
2853 		.ident = "Intel NUC x15",
2854 		.matches = {
2855 			DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Intel(R) Client Systems"),
2856 			DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "LAPKC71F"),
2857 		},
2858 		.driver_data = &lapkc71f_descriptor,
2859 	},
2860 	{
2861 		.ident = "TUXEDO InfinityBook Pro 14 Gen6 Intel",
2862 		.matches = {
2863 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
2864 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "PHxTxX1"),
2865 		},
2866 		.driver_data = &phxtxx1_descriptor,
2867 	},
2868 	{
2869 		.ident = "TUXEDO InfinityBook Pro 14 Gen6 Intel",
2870 		.matches = {
2871 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
2872 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "PHxTQx1"),
2873 		},
2874 		.driver_data = &tux_featureset_2_nvidia_descriptor,
2875 	},
2876 	{
2877 		.ident = "TUXEDO InfinityBook Pro 14/16 Gen7 Intel",
2878 		.matches = {
2879 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
2880 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "PHxARX1_PHxAQF1"),
2881 		},
2882 		.driver_data = &phxarx1_phxaqf1_descriptor,
2883 	},
2884 	{
2885 		.ident = "TUXEDO InfinityBook Pro 16 Gen7 Intel/Commodore Omnia-Book Pro Gen 7",
2886 		.matches = {
2887 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
2888 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "PH6AG01_PH6AQ71_PH6AQI1"),
2889 		},
2890 		.driver_data = &tux_featureset_2_nvidia_descriptor,
2891 	},
2892 	{
2893 		.ident = "TUXEDO InfinityBook Pro 14/16 Gen8 Intel/Commodore Omnia-Book Pro Gen 8",
2894 		.matches = {
2895 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
2896 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "PH4PRX1_PH6PRX1"),
2897 		},
2898 		.driver_data = &tux_featureset_1_descriptor,
2899 	},
2900 	{
2901 		.ident = "TUXEDO InfinityBook Pro 14 Gen8 Intel/Commodore Omnia-Book Pro Gen 8",
2902 		.matches = {
2903 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
2904 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "PH4PG31"),
2905 		},
2906 		.driver_data = &tux_featureset_2_nvidia_descriptor,
2907 	},
2908 	{
2909 		.ident = "TUXEDO InfinityBook Pro 16 Gen8 Intel",
2910 		.matches = {
2911 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
2912 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "PH6PG01_PH6PG71"),
2913 		},
2914 		.driver_data = &tux_featureset_2_nvidia_descriptor,
2915 	},
2916 	{
2917 		.ident = "TUXEDO InfinityBook Pro 14/15 Gen9 AMD",
2918 		.matches = {
2919 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
2920 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "GXxHRXx"),
2921 		},
2922 		.driver_data = &tux_featureset_3_descriptor,
2923 	},
2924 	{
2925 		.ident = "TUXEDO InfinityBook Pro 14/15 Gen9 Intel/Commodore Omnia-Book 15 Gen9",
2926 		.matches = {
2927 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
2928 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "GXxMRXx"),
2929 		},
2930 		.driver_data = &tux_featureset_3_descriptor,
2931 	},
2932 	{
2933 		.ident = "TUXEDO InfinityBook Pro 14/15 Gen10 AMD",
2934 		.matches = {
2935 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
2936 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "XxHP4NAx"),
2937 		},
2938 		.driver_data = &tux_featureset_3_descriptor,
2939 	},
2940 	{
2941 		.ident = "TUXEDO InfinityBook Pro 14/15 Gen10 AMD",
2942 		.matches = {
2943 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
2944 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "XxKK4NAx_XxSP4NAx"),
2945 		},
2946 		.driver_data = &tux_featureset_3_descriptor,
2947 	},
2948 	{
2949 		.ident = "TUXEDO InfinityBook Pro 15 Gen10 Intel",
2950 		.matches = {
2951 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
2952 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "XxAR4NAx"),
2953 		},
2954 		.driver_data = &tux_featureset_3_descriptor,
2955 	},
2956 	{
2957 		.ident = "TUXEDO InfinityBook Max 15 Gen10 AMD",
2958 		.matches = {
2959 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
2960 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "X5KK45xS_X5SP45xS"),
2961 		},
2962 		.driver_data = &tux_featureset_3_nvidia_descriptor,
2963 	},
2964 	{
2965 		.ident = "TUXEDO InfinityBook Max 16 Gen10 AMD",
2966 		.matches = {
2967 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
2968 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "X6HP45xU"),
2969 		},
2970 		.driver_data = &tux_featureset_3_nvidia_descriptor,
2971 	},
2972 	{
2973 		.ident = "TUXEDO InfinityBook Max 16 Gen10 AMD",
2974 		.matches = {
2975 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
2976 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "X6KK45xU_X6SP45xU"),
2977 		},
2978 		.driver_data = &tux_featureset_3_nvidia_descriptor,
2979 	},
2980 	{
2981 		.ident = "TUXEDO InfinityBook Max 15 Gen10 Intel",
2982 		.matches = {
2983 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
2984 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "X5AR45xS"),
2985 		},
2986 		.driver_data = &tux_featureset_3_nvidia_descriptor,
2987 	},
2988 	{
2989 		.ident = "TUXEDO InfinityBook Max 16 Gen10 Intel",
2990 		.matches = {
2991 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
2992 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "X6AR55xU"),
2993 		},
2994 		.driver_data = &tux_featureset_3_nvidia_descriptor,
2995 	},
2996 	{
2997 		.ident = "TUXEDO Polaris 15 Gen1 AMD",
2998 		.matches = {
2999 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3000 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1501A1650TI"),
3001 		},
3002 		.driver_data = &tux_featureset_1_nvidia_descriptor,
3003 	},
3004 	{
3005 		.ident = "TUXEDO Polaris 15 Gen1 AMD",
3006 		.matches = {
3007 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3008 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1501A2060"),
3009 		},
3010 		.driver_data = &tux_featureset_1_nvidia_descriptor,
3011 	},
3012 	{
3013 		.ident = "TUXEDO Polaris 17 Gen1 AMD",
3014 		.matches = {
3015 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3016 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1701A1650TI"),
3017 		},
3018 		.driver_data = &tux_featureset_1_nvidia_descriptor,
3019 	},
3020 	{
3021 		.ident = "TUXEDO Polaris 17 Gen1 AMD",
3022 		.matches = {
3023 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3024 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1701A2060"),
3025 		},
3026 		.driver_data = &tux_featureset_1_nvidia_descriptor,
3027 	},
3028 	{
3029 		.ident = "TUXEDO Polaris 15 Gen1 Intel",
3030 		.matches = {
3031 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3032 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1501I1650TI"),
3033 		},
3034 		.driver_data = &tux_featureset_1_nvidia_descriptor,
3035 	},
3036 	{
3037 		.ident = "TUXEDO Polaris 15 Gen1 Intel",
3038 		.matches = {
3039 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3040 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1501I2060"),
3041 		},
3042 		.driver_data = &tux_featureset_1_nvidia_descriptor,
3043 	},
3044 	{
3045 		.ident = "TUXEDO Polaris 17 Gen1 Intel",
3046 		.matches = {
3047 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3048 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1701I1650TI"),
3049 		},
3050 		.driver_data = &tux_featureset_1_nvidia_descriptor,
3051 	},
3052 	{
3053 		.ident = "TUXEDO Polaris 17 Gen1 Intel",
3054 		.matches = {
3055 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3056 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1701I2060"),
3057 		},
3058 		.driver_data = &tux_featureset_1_nvidia_descriptor,
3059 	},
3060 	{
3061 		.ident = "TUXEDO Trinity 15 Intel Gen1",
3062 		.matches = {
3063 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3064 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "TRINITY1501I"),
3065 		},
3066 		.driver_data = &tux_featureset_1_nvidia_descriptor,
3067 	},
3068 	{
3069 		.ident = "TUXEDO Trinity 17 Intel Gen1",
3070 		.matches = {
3071 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3072 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "TRINITY1701I"),
3073 		},
3074 		.driver_data = &tux_featureset_1_nvidia_descriptor,
3075 	},
3076 	{
3077 		.ident = "TUXEDO Polaris 15/17 Gen2 AMD",
3078 		.matches = {
3079 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3080 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxMGxx"),
3081 		},
3082 		.driver_data = &tux_featureset_2_nvidia_descriptor,
3083 	},
3084 	{
3085 		.ident = "TUXEDO Polaris 15/17 Gen2 Intel",
3086 		.matches = {
3087 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3088 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxNGxx"),
3089 		},
3090 		.driver_data = &tux_featureset_2_nvidia_descriptor,
3091 	},
3092 	{
3093 		.ident = "TUXEDO Stellaris/Polaris 15/17 Gen3 AMD",
3094 		.matches = {
3095 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3096 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxZGxx"),
3097 		},
3098 		.driver_data = &tux_featureset_2_nvidia_descriptor,
3099 	},
3100 	{
3101 		.ident = "TUXEDO Stellaris/Polaris 15/17 Gen3 Intel",
3102 		.matches = {
3103 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3104 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxTGxx"),
3105 		},
3106 		.driver_data = &tux_featureset_2_nvidia_descriptor,
3107 	},
3108 	{
3109 		.ident = "TUXEDO Stellaris/Polaris 15/17 Gen4 AMD",
3110 		.matches = {
3111 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3112 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxRGxx"),
3113 		},
3114 		.driver_data = &tux_featureset_3_nvidia_descriptor,
3115 	},
3116 	{
3117 		.ident = "TUXEDO Stellaris 15 Gen4 Intel",
3118 		.matches = {
3119 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3120 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxAGxx"),
3121 		},
3122 		.driver_data = &tux_featureset_3_nvidia_descriptor,
3123 	},
3124 	{
3125 		.ident = "TUXEDO Polaris 15/17 Gen5 AMD",
3126 		.matches = {
3127 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3128 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxXGxx"),
3129 		},
3130 		.driver_data = &tux_featureset_2_nvidia_descriptor,
3131 	},
3132 	{
3133 		.ident = "TUXEDO Stellaris 16 Gen5 AMD",
3134 		.matches = {
3135 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3136 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "GM6XGxX"),
3137 		},
3138 		.driver_data = &tux_featureset_3_nvidia_descriptor,
3139 	},
3140 	{
3141 		.ident = "TUXEDO Stellaris 16/17 Gen5 Intel/Commodore ORION Gen 5",
3142 		.matches = {
3143 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3144 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxPXxx"),
3145 		},
3146 		.driver_data = &tux_featureset_3_nvidia_descriptor,
3147 	},
3148 	{
3149 		.ident = "TUXEDO Stellaris Slim 15 Gen6 AMD",
3150 		.matches = {
3151 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3152 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxHGxx"),
3153 		},
3154 		.driver_data = &tux_featureset_3_nvidia_descriptor,
3155 	},
3156 	{
3157 		.ident = "TUXEDO Stellaris Slim 15 Gen6 Intel/Commodore ORION Slim 15 Gen6",
3158 		.matches = {
3159 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3160 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "GM5IXxA"),
3161 		},
3162 		.driver_data = &tux_featureset_3_nvidia_descriptor,
3163 	},
3164 	{
3165 		.ident = "TUXEDO Stellaris 16 Gen6 Intel/Commodore ORION 16 Gen6",
3166 		.matches = {
3167 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3168 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "GM6IXxB_MB1"),
3169 		},
3170 		.driver_data = &tux_featureset_3_nvidia_descriptor,
3171 	},
3172 	{
3173 		.ident = "TUXEDO Stellaris 16 Gen6 Intel/Commodore ORION 16 Gen6",
3174 		.matches = {
3175 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3176 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "GM6IXxB_MB2"),
3177 		},
3178 		.driver_data = &tux_featureset_3_nvidia_descriptor,
3179 	},
3180 	{
3181 		.ident = "TUXEDO Stellaris 17 Gen6 Intel/Commodore ORION 17 Gen6",
3182 		.matches = {
3183 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3184 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "GM7IXxN"),
3185 		},
3186 		.driver_data = &tux_featureset_3_nvidia_descriptor,
3187 	},
3188 	{
3189 		.ident = "TUXEDO Stellaris 16 Gen7 AMD",
3190 		.matches = {
3191 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3192 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "X6FR5xxY"),
3193 		},
3194 		.driver_data = &tux_featureset_3_nvidia_descriptor,
3195 	},
3196 	{
3197 		.ident = "TUXEDO Stellaris 16 Gen7 Intel",
3198 		.matches = {
3199 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3200 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "X6AR5xxY"),
3201 		},
3202 		.driver_data = &tux_featureset_3_nvidia_descriptor,
3203 	},
3204 	{
3205 		.ident = "TUXEDO Stellaris 16 Gen7 Intel",
3206 		.matches = {
3207 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3208 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "X6AR5xxY_mLED"),
3209 		},
3210 		.driver_data = &tux_featureset_3_nvidia_descriptor,
3211 	},
3212 	{
3213 		.ident = "TUXEDO Book BA15 Gen10 AMD",
3214 		.matches = {
3215 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3216 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "PF5PU1G"),
3217 		},
3218 		.driver_data = &pf5pu1g_descriptor,
3219 	},
3220 	{
3221 		.ident = "TUXEDO Pulse 14 Gen1 AMD",
3222 		.matches = {
3223 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3224 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "PULSE1401"),
3225 		},
3226 		.driver_data = &tux_featureset_1_descriptor,
3227 	},
3228 	{
3229 		.ident = "TUXEDO Pulse 15 Gen1 AMD",
3230 		.matches = {
3231 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3232 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "PULSE1501"),
3233 		},
3234 		.driver_data = &tux_featureset_1_descriptor,
3235 	},
3236 	{
3237 		.ident = "TUXEDO Pulse 15 Gen2 AMD",
3238 		.matches = {
3239 			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
3240 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "PF5LUXG"),
3241 		},
3242 		.driver_data = &tux_featureset_1_descriptor,
3243 	},
3244 	{ }
3245 };
3246 MODULE_DEVICE_TABLE(dmi, uniwill_dmi_table);
3247 
3248 static int __init uniwill_init(void)
3249 {
3250 	const struct uniwill_device_descriptor *descriptor;
3251 	const struct dmi_system_id *id;
3252 	int ret;
3253 
3254 	id = dmi_first_match(uniwill_dmi_table);
3255 	if (!id) {
3256 		if (!force)
3257 			return -ENODEV;
3258 
3259 		pr_warn("Loading on a potentially unsupported device\n");
3260 	} else {
3261 		/*
3262 		 * Some devices might support additional features depending on
3263 		 * the BIOS version/date, so we call this callback to let them
3264 		 * modify their device descriptor accordingly.
3265 		 */
3266 		if (id->callback) {
3267 			ret = id->callback(id);
3268 			if (ret < 0)
3269 				return ret;
3270 		}
3271 
3272 		descriptor = id->driver_data;
3273 		device_descriptor = *descriptor;
3274 	}
3275 
3276 	if (force) {
3277 		/* Assume that the device supports all features except the charge limit */
3278 		device_descriptor.features = UINT_MAX & ~UNIWILL_FEATURE_BATTERY_CHARGE_LIMIT;
3279 		/* Some models only support 3 brightness levels */
3280 		device_descriptor.kbd_led_max_brightness = 4;
3281 		pr_warn("Enabling potentially unsupported features\n");
3282 	}
3283 
3284 	ret = platform_driver_register(&uniwill_driver);
3285 	if (ret < 0)
3286 		return ret;
3287 
3288 	ret = uniwill_wmi_register_driver();
3289 	if (ret < 0) {
3290 		platform_driver_unregister(&uniwill_driver);
3291 		return ret;
3292 	}
3293 
3294 	return 0;
3295 }
3296 module_init(uniwill_init);
3297 
3298 static void __exit uniwill_exit(void)
3299 {
3300 	uniwill_wmi_unregister_driver();
3301 	platform_driver_unregister(&uniwill_driver);
3302 }
3303 module_exit(uniwill_exit);
3304 
3305 MODULE_AUTHOR("Armin Wolf <W_Armin@gmx.de>");
3306 MODULE_DESCRIPTION("Uniwill notebook driver");
3307 MODULE_LICENSE("GPL");
3308