1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Linux driver for Uniwill notebooks. 4 * 5 * Special thanks go to Pőcze Barnabás, Christoffer Sandberg and Werner Sembach 6 * for supporting the development of this driver either through prior work or 7 * by answering questions regarding the underlying ACPI and WMI interfaces. 8 * 9 * Copyright (C) 2025 Armin Wolf <W_Armin@gmx.de> 10 */ 11 12 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 13 14 #include <linux/acpi.h> 15 #include <linux/array_size.h> 16 #include <linux/bits.h> 17 #include <linux/bitfield.h> 18 #include <linux/cleanup.h> 19 #include <linux/debugfs.h> 20 #include <linux/delay.h> 21 #include <linux/device.h> 22 #include <linux/device/driver.h> 23 #include <linux/dmi.h> 24 #include <linux/errno.h> 25 #include <linux/fixp-arith.h> 26 #include <linux/hwmon.h> 27 #include <linux/hwmon-sysfs.h> 28 #include <linux/init.h> 29 #include <linux/input.h> 30 #include <linux/input/sparse-keymap.h> 31 #include <linux/kernel.h> 32 #include <linux/kstrtox.h> 33 #include <linux/leds.h> 34 #include <linux/led-class-multicolor.h> 35 #include <linux/limits.h> 36 #include <linux/list.h> 37 #include <linux/minmax.h> 38 #include <linux/module.h> 39 #include <linux/mutex.h> 40 #include <linux/notifier.h> 41 #include <linux/platform_device.h> 42 #include <linux/pm.h> 43 #include <linux/printk.h> 44 #include <linux/regmap.h> 45 #include <linux/string.h> 46 #include <linux/sysfs.h> 47 #include <linux/types.h> 48 #include <linux/units.h> 49 50 #include <acpi/battery.h> 51 52 #include "uniwill-wmi.h" 53 54 #define EC_ADDR_BAT_POWER_UNIT_1 0x0400 55 56 #define EC_ADDR_BAT_POWER_UNIT_2 0x0401 57 58 #define EC_ADDR_BAT_DESIGN_CAPACITY_1 0x0402 59 60 #define EC_ADDR_BAT_DESIGN_CAPACITY_2 0x0403 61 62 #define EC_ADDR_BAT_FULL_CAPACITY_1 0x0404 63 64 #define EC_ADDR_BAT_FULL_CAPACITY_2 0x0405 65 66 #define EC_ADDR_BAT_DESIGN_VOLTAGE_1 0x0408 67 68 #define EC_ADDR_BAT_DESIGN_VOLTAGE_2 0x0409 69 70 #define EC_ADDR_BAT_STATUS_1 0x0432 71 #define BAT_DISCHARGING BIT(0) 72 73 #define EC_ADDR_BAT_STATUS_2 0x0433 74 75 #define EC_ADDR_BAT_CURRENT_1 0x0434 76 77 #define EC_ADDR_BAT_CURRENT_2 0x0435 78 79 #define EC_ADDR_BAT_REMAIN_CAPACITY_1 0x0436 80 81 #define EC_ADDR_BAT_REMAIN_CAPACITY_2 0x0437 82 83 #define EC_ADDR_BAT_VOLTAGE_1 0x0438 84 85 #define EC_ADDR_BAT_VOLTAGE_2 0x0439 86 87 #define EC_ADDR_CPU_TEMP 0x043E 88 89 #define EC_ADDR_GPU_TEMP 0x044F 90 91 #define EC_ADDR_SYSTEM_ID 0x0456 92 #define HAS_GPU BIT(7) 93 94 #define EC_ADDR_MAIN_FAN_RPM_1 0x0464 95 96 #define EC_ADDR_MAIN_FAN_RPM_2 0x0465 97 98 #define EC_ADDR_SECOND_FAN_RPM_1 0x046C 99 100 #define EC_ADDR_SECOND_FAN_RPM_2 0x046D 101 102 #define EC_ADDR_DEVICE_STATUS 0x047B 103 #define WIFI_STATUS_ON BIT(7) 104 /* BIT(5) is also unset depending on the rfkill state (bluetooth?) */ 105 106 #define EC_ADDR_BAT_ALERT 0x0494 107 108 #define EC_ADDR_BAT_CYCLE_COUNT_1 0x04A6 109 110 #define EC_ADDR_BAT_CYCLE_COUNT_2 0x04A7 111 112 #define EC_ADDR_PROJECT_ID 0x0740 113 114 #define EC_ADDR_AP_OEM 0x0741 115 #define ENABLE_MANUAL_CTRL BIT(0) 116 #define ITE_KBD_EFFECT_REACTIVE BIT(3) 117 #define FAN_ABNORMAL BIT(5) 118 119 #define EC_ADDR_SUPPORT_5 0x0742 120 #define FAN_TURBO_SUPPORTED BIT(4) 121 #define FAN_SUPPORT BIT(5) 122 123 #define EC_ADDR_CTGP_DB_CTRL 0x0743 124 #define CTGP_DB_GENERAL_ENABLE BIT(0) 125 #define CTGP_DB_DB_ENABLE BIT(1) 126 #define CTGP_DB_CTGP_ENABLE BIT(2) 127 128 #define EC_ADDR_CTGP_DB_CTGP_OFFSET 0x0744 129 130 #define EC_ADDR_CTGP_DB_TPP_OFFSET 0x0745 131 132 #define EC_ADDR_CTGP_DB_DB_OFFSET 0x0746 133 134 #define EC_ADDR_LIGHTBAR_AC_CTRL 0x0748 135 #define LIGHTBAR_APP_EXISTS BIT(0) 136 #define LIGHTBAR_POWER_SAVE BIT(1) 137 #define LIGHTBAR_S0_OFF BIT(2) 138 #define LIGHTBAR_S3_OFF BIT(3) // Breathing animation when suspended 139 #define LIGHTBAR_WELCOME BIT(7) // Rainbow animation 140 141 #define EC_ADDR_LIGHTBAR_AC_RED 0x0749 142 143 #define EC_ADDR_LIGHTBAR_AC_GREEN 0x074A 144 145 #define EC_ADDR_LIGHTBAR_AC_BLUE 0x074B 146 147 #define EC_ADDR_BIOS_OEM 0x074E 148 #define FN_LOCK_STATUS BIT(4) 149 150 #define EC_ADDR_MANUAL_FAN_CTRL 0x0751 151 #define FAN_LEVEL_MASK GENMASK(2, 0) 152 #define FAN_MODE_TURBO BIT(4) 153 #define FAN_MODE_HIGH BIT(5) 154 #define FAN_MODE_BOOST BIT(6) 155 #define FAN_MODE_USER BIT(7) 156 157 #define EC_ADDR_PWM_1 0x075B 158 159 #define EC_ADDR_PWM_2 0x075C 160 161 /* Unreliable */ 162 #define EC_ADDR_SUPPORT_1 0x0765 163 #define AIRPLANE_MODE BIT(0) 164 #define GPS_SWITCH BIT(1) 165 #define OVERCLOCK BIT(2) 166 #define MACRO_KEY BIT(3) 167 #define SHORTCUT_KEY BIT(4) 168 #define SUPER_KEY_LOCK BIT(5) 169 #define LIGHTBAR BIT(6) 170 #define FAN_BOOST BIT(7) 171 172 #define EC_ADDR_SUPPORT_2 0x0766 173 #define SILENT_MODE BIT(0) 174 #define USB_CHARGING BIT(1) 175 #define RGB_KEYBOARD BIT(2) 176 #define CHINA_MODE BIT(5) 177 #define MY_BATTERY BIT(6) 178 179 #define EC_ADDR_TRIGGER 0x0767 180 #define TRIGGER_SUPER_KEY_LOCK BIT(0) 181 #define TRIGGER_LIGHTBAR BIT(1) 182 #define TRIGGER_FAN_BOOST BIT(2) 183 #define TRIGGER_SILENT_MODE BIT(3) 184 #define TRIGGER_USB_CHARGING BIT(4) 185 #define RGB_APPLY_COLOR BIT(5) 186 #define RGB_LOGO_EFFECT BIT(6) 187 #define RGB_RAINBOW_EFFECT BIT(7) 188 189 #define EC_ADDR_SWITCH_STATUS 0x0768 190 #define SUPER_KEY_LOCK_STATUS BIT(0) 191 #define LIGHTBAR_STATUS BIT(1) 192 #define FAN_BOOST_STATUS BIT(2) 193 #define MACRO_KEY_STATUS BIT(3) 194 #define MY_BAT_POWER_BAT_STATUS BIT(4) 195 196 #define EC_ADDR_RGB_RED 0x0769 197 198 #define EC_ADDR_RGB_GREEN 0x076A 199 200 #define EC_ADDR_RGB_BLUE 0x076B 201 202 #define EC_ADDR_ROMID_START 0x0770 203 #define ROMID_LENGTH 14 204 205 #define EC_ADDR_ROMID_EXTRA_1 0x077E 206 207 #define EC_ADDR_ROMID_EXTRA_2 0x077F 208 209 #define EC_ADDR_BIOS_OEM_2 0x0782 210 #define FAN_V2_NEW BIT(0) 211 #define FAN_QKEY BIT(1) 212 #define FAN_TABLE_OFFICE_MODE BIT(2) 213 #define FAN_V3 BIT(3) 214 #define DEFAULT_MODE BIT(4) 215 216 #define EC_ADDR_PL1_SETTING 0x0783 217 218 #define EC_ADDR_PL2_SETTING 0x0784 219 220 #define EC_ADDR_PL4_SETTING 0x0785 221 222 #define EC_ADDR_FAN_DEFAULT 0x0786 223 #define FAN_CURVE_LENGTH 5 224 225 #define EC_ADDR_KBD_STATUS 0x078C 226 #define KBD_WHITE_ONLY BIT(0) // ~single color 227 #define KBD_SINGLE_COLOR_OFF BIT(1) 228 #define KBD_TURBO_LEVEL_MASK GENMASK(3, 2) 229 #define KBD_APPLY BIT(4) 230 #define KBD_BRIGHTNESS GENMASK(7, 5) 231 232 #define EC_ADDR_FAN_CTRL 0x078E 233 #define FAN3P5 BIT(1) 234 #define CHARGING_PROFILE BIT(3) 235 #define UNIVERSAL_FAN_CTRL BIT(6) 236 237 #define EC_ADDR_BIOS_OEM_3 0x07A3 238 #define FAN_REDUCED_DURY_CYCLE BIT(5) 239 #define FAN_ALWAYS_ON BIT(6) 240 241 #define EC_ADDR_BIOS_BYTE 0x07A4 242 #define FN_LOCK_SWITCH BIT(3) 243 244 #define EC_ADDR_OEM_3 0x07A5 245 #define POWER_LED_MASK GENMASK(1, 0) 246 #define POWER_LED_LEFT 0x00 247 #define POWER_LED_BOTH 0x01 248 #define POWER_LED_NONE 0x02 249 #define FAN_QUIET BIT(2) 250 #define OVERBOOST BIT(4) 251 #define HIGH_POWER BIT(7) 252 253 #define EC_ADDR_OEM_4 0x07A6 254 #define OVERBOOST_DYN_TEMP_OFF BIT(1) 255 #define TOUCHPAD_TOGGLE_OFF BIT(6) 256 257 #define EC_ADDR_CHARGE_CTRL 0x07B9 258 #define CHARGE_CTRL_MASK GENMASK(6, 0) 259 #define CHARGE_CTRL_REACHED BIT(7) 260 261 #define EC_ADDR_UNIVERSAL_FAN_CTRL 0x07C5 262 #define SPLIT_TABLES BIT(7) 263 264 #define EC_ADDR_AP_OEM_6 0x07C6 265 #define ENABLE_UNIVERSAL_FAN_CTRL BIT(2) 266 #define BATTERY_CHARGE_FULL_OVER_24H BIT(3) 267 #define BATTERY_ERM_STATUS_REACHED BIT(4) 268 269 #define EC_ADDR_CHARGE_PRIO 0x07CC 270 #define CHARGING_PERFORMANCE BIT(7) 271 272 /* Same bits as EC_ADDR_LIGHTBAR_AC_CTRL except LIGHTBAR_S3_OFF */ 273 #define EC_ADDR_LIGHTBAR_BAT_CTRL 0x07E2 274 275 #define EC_ADDR_LIGHTBAR_BAT_RED 0x07E3 276 277 #define EC_ADDR_LIGHTBAR_BAT_GREEN 0x07E4 278 279 #define EC_ADDR_LIGHTBAR_BAT_BLUE 0x07E5 280 281 #define EC_ADDR_CPU_TEMP_END_TABLE 0x0F00 282 283 #define EC_ADDR_CPU_TEMP_START_TABLE 0x0F10 284 285 #define EC_ADDR_CPU_FAN_SPEED_TABLE 0x0F20 286 287 #define EC_ADDR_GPU_TEMP_END_TABLE 0x0F30 288 289 #define EC_ADDR_GPU_TEMP_START_TABLE 0x0F40 290 291 #define EC_ADDR_GPU_FAN_SPEED_TABLE 0x0F50 292 293 /* 294 * Those two registers technically allow for manual fan control, 295 * but are unstable on some models and are likely not meant to 296 * be used by applications as they are only accessible when using 297 * the WMI interface. 298 */ 299 #define EC_ADDR_PWM_1_WRITEABLE 0x1804 300 301 #define EC_ADDR_PWM_2_WRITEABLE 0x1809 302 303 #define DRIVER_NAME "uniwill" 304 305 /* 306 * The OEM software always sleeps up to 6 ms after reading/writing EC 307 * registers, so we emulate this behaviour for maximum compatibility. 308 */ 309 #define UNIWILL_EC_DELAY_US 6000 310 311 #define PWM_MAX 200 312 #define FAN_TABLE_LENGTH 16 313 314 #define LED_CHANNELS 3 315 #define LED_MAX_BRIGHTNESS 200 316 317 #define UNIWILL_FEATURE_FN_LOCK BIT(0) 318 #define UNIWILL_FEATURE_SUPER_KEY BIT(1) 319 #define UNIWILL_FEATURE_TOUCHPAD_TOGGLE BIT(2) 320 #define UNIWILL_FEATURE_LIGHTBAR BIT(3) 321 #define UNIWILL_FEATURE_BATTERY BIT(4) 322 #define UNIWILL_FEATURE_HWMON BIT(5) 323 #define UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL BIT(6) 324 325 struct uniwill_data { 326 struct device *dev; 327 acpi_handle handle; 328 struct regmap *regmap; 329 unsigned int features; 330 struct acpi_battery_hook hook; 331 unsigned int last_charge_ctrl; 332 struct mutex battery_lock; /* Protects the list of currently registered batteries */ 333 unsigned int last_status; 334 unsigned int last_switch_status; 335 struct mutex super_key_lock; /* Protects the toggling of the super key lock state */ 336 struct list_head batteries; 337 struct mutex led_lock; /* Protects writes to the lightbar registers */ 338 struct led_classdev_mc led_mc_cdev; 339 struct mc_subled led_mc_subled_info[LED_CHANNELS]; 340 struct mutex input_lock; /* Protects input sequence during notify */ 341 struct input_dev *input_device; 342 struct notifier_block nb; 343 }; 344 345 struct uniwill_battery_entry { 346 struct list_head head; 347 struct power_supply *battery; 348 }; 349 350 struct uniwill_device_descriptor { 351 unsigned int features; 352 /* Executed during driver probing */ 353 int (*probe)(struct uniwill_data *data); 354 }; 355 356 static bool force; 357 module_param_unsafe(force, bool, 0); 358 MODULE_PARM_DESC(force, "Force loading without checking for supported devices\n"); 359 360 /* 361 * Contains device specific data like the feature bitmap since 362 * the associated registers are not always reliable. 363 */ 364 static struct uniwill_device_descriptor device_descriptor __ro_after_init; 365 366 static const char * const uniwill_temp_labels[] = { 367 "CPU", 368 "GPU", 369 }; 370 371 static const char * const uniwill_fan_labels[] = { 372 "Main", 373 "Secondary", 374 }; 375 376 static const struct key_entry uniwill_keymap[] = { 377 /* Reported via keyboard controller */ 378 { KE_IGNORE, UNIWILL_OSD_CAPSLOCK, { KEY_CAPSLOCK }}, 379 { KE_IGNORE, UNIWILL_OSD_NUMLOCK, { KEY_NUMLOCK }}, 380 381 /* 382 * Reported when the user enables/disables the super key. 383 * Those events might even be reported when the change was done 384 * using the sysfs attribute! 385 */ 386 { KE_IGNORE, UNIWILL_OSD_SUPER_KEY_DISABLE, { KEY_UNKNOWN }}, 387 { KE_IGNORE, UNIWILL_OSD_SUPER_KEY_ENABLE, { KEY_UNKNOWN }}, 388 /* Optional, might not be reported by all devices */ 389 { KE_IGNORE, UNIWILL_OSD_SUPER_KEY_STATE_CHANGED, { KEY_UNKNOWN }}, 390 391 /* Reported in manual mode when toggling the airplane mode status */ 392 { KE_KEY, UNIWILL_OSD_RFKILL, { KEY_RFKILL }}, 393 { KE_IGNORE, UNIWILL_OSD_RADIOON, { KEY_UNKNOWN }}, 394 { KE_IGNORE, UNIWILL_OSD_RADIOOFF, { KEY_UNKNOWN }}, 395 396 /* Reported when user wants to cycle the platform profile */ 397 { KE_KEY, UNIWILL_OSD_PERFORMANCE_MODE_TOGGLE, { KEY_F14 }}, 398 399 /* Reported when the user wants to adjust the brightness of the keyboard */ 400 { KE_KEY, UNIWILL_OSD_KBDILLUMDOWN, { KEY_KBDILLUMDOWN }}, 401 { KE_KEY, UNIWILL_OSD_KBDILLUMUP, { KEY_KBDILLUMUP }}, 402 403 /* Reported when the user wants to toggle the microphone mute status */ 404 { KE_KEY, UNIWILL_OSD_MIC_MUTE, { KEY_MICMUTE }}, 405 406 /* Reported when the user wants to toggle the mute status */ 407 { KE_IGNORE, UNIWILL_OSD_MUTE, { KEY_MUTE }}, 408 409 /* Reported when the user wants to toggle the brightness of the keyboard */ 410 { KE_KEY, UNIWILL_OSD_KBDILLUMTOGGLE, { KEY_KBDILLUMTOGGLE }}, 411 { KE_KEY, UNIWILL_OSD_KB_LED_LEVEL0, { KEY_KBDILLUMTOGGLE }}, 412 { KE_KEY, UNIWILL_OSD_KB_LED_LEVEL1, { KEY_KBDILLUMTOGGLE }}, 413 { KE_KEY, UNIWILL_OSD_KB_LED_LEVEL2, { KEY_KBDILLUMTOGGLE }}, 414 { KE_KEY, UNIWILL_OSD_KB_LED_LEVEL3, { KEY_KBDILLUMTOGGLE }}, 415 { KE_KEY, UNIWILL_OSD_KB_LED_LEVEL4, { KEY_KBDILLUMTOGGLE }}, 416 417 /* FIXME: find out the exact meaning of those events */ 418 { KE_IGNORE, UNIWILL_OSD_BAT_CHARGE_FULL_24_H, { KEY_UNKNOWN }}, 419 { KE_IGNORE, UNIWILL_OSD_BAT_ERM_UPDATE, { KEY_UNKNOWN }}, 420 421 /* Reported when the user wants to toggle the benchmark mode status */ 422 { KE_IGNORE, UNIWILL_OSD_BENCHMARK_MODE_TOGGLE, { KEY_UNKNOWN }}, 423 424 /* Reported when the user wants to toggle the webcam */ 425 { KE_IGNORE, UNIWILL_OSD_WEBCAM_TOGGLE, { KEY_UNKNOWN }}, 426 427 { KE_END } 428 }; 429 430 static inline bool uniwill_device_supports(struct uniwill_data *data, 431 unsigned int features) 432 { 433 return (data->features & features) == features; 434 } 435 436 static int uniwill_ec_reg_write(void *context, unsigned int reg, unsigned int val) 437 { 438 union acpi_object params[2] = { 439 { 440 .integer = { 441 .type = ACPI_TYPE_INTEGER, 442 .value = reg, 443 }, 444 }, 445 { 446 .integer = { 447 .type = ACPI_TYPE_INTEGER, 448 .value = val, 449 }, 450 }, 451 }; 452 struct uniwill_data *data = context; 453 struct acpi_object_list input = { 454 .count = ARRAY_SIZE(params), 455 .pointer = params, 456 }; 457 acpi_status status; 458 459 status = acpi_evaluate_object(data->handle, "ECRW", &input, NULL); 460 if (ACPI_FAILURE(status)) 461 return -EIO; 462 463 usleep_range(UNIWILL_EC_DELAY_US, UNIWILL_EC_DELAY_US * 2); 464 465 return 0; 466 } 467 468 static int uniwill_ec_reg_read(void *context, unsigned int reg, unsigned int *val) 469 { 470 union acpi_object params[1] = { 471 { 472 .integer = { 473 .type = ACPI_TYPE_INTEGER, 474 .value = reg, 475 }, 476 }, 477 }; 478 struct uniwill_data *data = context; 479 struct acpi_object_list input = { 480 .count = ARRAY_SIZE(params), 481 .pointer = params, 482 }; 483 unsigned long long output; 484 acpi_status status; 485 486 status = acpi_evaluate_integer(data->handle, "ECRR", &input, &output); 487 if (ACPI_FAILURE(status)) 488 return -EIO; 489 490 if (output > U8_MAX) 491 return -ENXIO; 492 493 usleep_range(UNIWILL_EC_DELAY_US, UNIWILL_EC_DELAY_US * 2); 494 495 *val = output; 496 497 return 0; 498 } 499 500 static const struct regmap_bus uniwill_ec_bus = { 501 .reg_write = uniwill_ec_reg_write, 502 .reg_read = uniwill_ec_reg_read, 503 .reg_format_endian_default = REGMAP_ENDIAN_LITTLE, 504 .val_format_endian_default = REGMAP_ENDIAN_LITTLE, 505 }; 506 507 static bool uniwill_writeable_reg(struct device *dev, unsigned int reg) 508 { 509 switch (reg) { 510 case EC_ADDR_AP_OEM: 511 case EC_ADDR_LIGHTBAR_AC_CTRL: 512 case EC_ADDR_LIGHTBAR_AC_RED: 513 case EC_ADDR_LIGHTBAR_AC_GREEN: 514 case EC_ADDR_LIGHTBAR_AC_BLUE: 515 case EC_ADDR_BIOS_OEM: 516 case EC_ADDR_TRIGGER: 517 case EC_ADDR_OEM_4: 518 case EC_ADDR_CHARGE_CTRL: 519 case EC_ADDR_LIGHTBAR_BAT_CTRL: 520 case EC_ADDR_LIGHTBAR_BAT_RED: 521 case EC_ADDR_LIGHTBAR_BAT_GREEN: 522 case EC_ADDR_LIGHTBAR_BAT_BLUE: 523 case EC_ADDR_CTGP_DB_CTRL: 524 case EC_ADDR_CTGP_DB_CTGP_OFFSET: 525 case EC_ADDR_CTGP_DB_TPP_OFFSET: 526 case EC_ADDR_CTGP_DB_DB_OFFSET: 527 return true; 528 default: 529 return false; 530 } 531 } 532 533 static bool uniwill_readable_reg(struct device *dev, unsigned int reg) 534 { 535 switch (reg) { 536 case EC_ADDR_CPU_TEMP: 537 case EC_ADDR_GPU_TEMP: 538 case EC_ADDR_MAIN_FAN_RPM_1: 539 case EC_ADDR_MAIN_FAN_RPM_2: 540 case EC_ADDR_SECOND_FAN_RPM_1: 541 case EC_ADDR_SECOND_FAN_RPM_2: 542 case EC_ADDR_BAT_ALERT: 543 case EC_ADDR_PROJECT_ID: 544 case EC_ADDR_AP_OEM: 545 case EC_ADDR_LIGHTBAR_AC_CTRL: 546 case EC_ADDR_LIGHTBAR_AC_RED: 547 case EC_ADDR_LIGHTBAR_AC_GREEN: 548 case EC_ADDR_LIGHTBAR_AC_BLUE: 549 case EC_ADDR_BIOS_OEM: 550 case EC_ADDR_PWM_1: 551 case EC_ADDR_PWM_2: 552 case EC_ADDR_TRIGGER: 553 case EC_ADDR_SWITCH_STATUS: 554 case EC_ADDR_OEM_4: 555 case EC_ADDR_CHARGE_CTRL: 556 case EC_ADDR_LIGHTBAR_BAT_CTRL: 557 case EC_ADDR_LIGHTBAR_BAT_RED: 558 case EC_ADDR_LIGHTBAR_BAT_GREEN: 559 case EC_ADDR_LIGHTBAR_BAT_BLUE: 560 case EC_ADDR_SYSTEM_ID: 561 case EC_ADDR_CTGP_DB_CTRL: 562 case EC_ADDR_CTGP_DB_CTGP_OFFSET: 563 case EC_ADDR_CTGP_DB_TPP_OFFSET: 564 case EC_ADDR_CTGP_DB_DB_OFFSET: 565 return true; 566 default: 567 return false; 568 } 569 } 570 571 static bool uniwill_volatile_reg(struct device *dev, unsigned int reg) 572 { 573 switch (reg) { 574 case EC_ADDR_CPU_TEMP: 575 case EC_ADDR_GPU_TEMP: 576 case EC_ADDR_MAIN_FAN_RPM_1: 577 case EC_ADDR_MAIN_FAN_RPM_2: 578 case EC_ADDR_SECOND_FAN_RPM_1: 579 case EC_ADDR_SECOND_FAN_RPM_2: 580 case EC_ADDR_BAT_ALERT: 581 case EC_ADDR_BIOS_OEM: 582 case EC_ADDR_PWM_1: 583 case EC_ADDR_PWM_2: 584 case EC_ADDR_TRIGGER: 585 case EC_ADDR_SWITCH_STATUS: 586 case EC_ADDR_CHARGE_CTRL: 587 return true; 588 default: 589 return false; 590 } 591 } 592 593 static const struct regmap_config uniwill_ec_config = { 594 .reg_bits = 16, 595 .val_bits = 8, 596 .writeable_reg = uniwill_writeable_reg, 597 .readable_reg = uniwill_readable_reg, 598 .volatile_reg = uniwill_volatile_reg, 599 .can_sleep = true, 600 .max_register = 0xFFF, 601 .cache_type = REGCACHE_MAPLE, 602 .use_single_read = true, 603 .use_single_write = true, 604 }; 605 606 static ssize_t fn_lock_store(struct device *dev, struct device_attribute *attr, const char *buf, 607 size_t count) 608 { 609 struct uniwill_data *data = dev_get_drvdata(dev); 610 unsigned int value; 611 bool enable; 612 int ret; 613 614 ret = kstrtobool(buf, &enable); 615 if (ret < 0) 616 return ret; 617 618 if (enable) 619 value = FN_LOCK_STATUS; 620 else 621 value = 0; 622 623 ret = regmap_update_bits(data->regmap, EC_ADDR_BIOS_OEM, FN_LOCK_STATUS, value); 624 if (ret < 0) 625 return ret; 626 627 return count; 628 } 629 630 static ssize_t fn_lock_show(struct device *dev, struct device_attribute *attr, char *buf) 631 { 632 struct uniwill_data *data = dev_get_drvdata(dev); 633 unsigned int value; 634 int ret; 635 636 ret = regmap_read(data->regmap, EC_ADDR_BIOS_OEM, &value); 637 if (ret < 0) 638 return ret; 639 640 return sysfs_emit(buf, "%d\n", !!(value & FN_LOCK_STATUS)); 641 } 642 643 static DEVICE_ATTR_RW(fn_lock); 644 645 static ssize_t super_key_enable_store(struct device *dev, struct device_attribute *attr, 646 const char *buf, size_t count) 647 { 648 struct uniwill_data *data = dev_get_drvdata(dev); 649 unsigned int value; 650 bool enable; 651 int ret; 652 653 ret = kstrtobool(buf, &enable); 654 if (ret < 0) 655 return ret; 656 657 guard(mutex)(&data->super_key_lock); 658 659 ret = regmap_read(data->regmap, EC_ADDR_SWITCH_STATUS, &value); 660 if (ret < 0) 661 return ret; 662 663 /* 664 * We can only toggle the super key lock, so we return early if the setting 665 * is already in the correct state. 666 */ 667 if (enable == !(value & SUPER_KEY_LOCK_STATUS)) 668 return count; 669 670 ret = regmap_write_bits(data->regmap, EC_ADDR_TRIGGER, TRIGGER_SUPER_KEY_LOCK, 671 TRIGGER_SUPER_KEY_LOCK); 672 if (ret < 0) 673 return ret; 674 675 return count; 676 } 677 678 static ssize_t super_key_enable_show(struct device *dev, struct device_attribute *attr, char *buf) 679 { 680 struct uniwill_data *data = dev_get_drvdata(dev); 681 unsigned int value; 682 int ret; 683 684 ret = regmap_read(data->regmap, EC_ADDR_SWITCH_STATUS, &value); 685 if (ret < 0) 686 return ret; 687 688 return sysfs_emit(buf, "%d\n", !(value & SUPER_KEY_LOCK_STATUS)); 689 } 690 691 static DEVICE_ATTR_RW(super_key_enable); 692 693 static ssize_t touchpad_toggle_enable_store(struct device *dev, struct device_attribute *attr, 694 const char *buf, size_t count) 695 { 696 struct uniwill_data *data = dev_get_drvdata(dev); 697 unsigned int value; 698 bool enable; 699 int ret; 700 701 ret = kstrtobool(buf, &enable); 702 if (ret < 0) 703 return ret; 704 705 if (enable) 706 value = 0; 707 else 708 value = TOUCHPAD_TOGGLE_OFF; 709 710 ret = regmap_update_bits(data->regmap, EC_ADDR_OEM_4, TOUCHPAD_TOGGLE_OFF, value); 711 if (ret < 0) 712 return ret; 713 714 return count; 715 } 716 717 static ssize_t touchpad_toggle_enable_show(struct device *dev, struct device_attribute *attr, 718 char *buf) 719 { 720 struct uniwill_data *data = dev_get_drvdata(dev); 721 unsigned int value; 722 int ret; 723 724 ret = regmap_read(data->regmap, EC_ADDR_OEM_4, &value); 725 if (ret < 0) 726 return ret; 727 728 return sysfs_emit(buf, "%d\n", !(value & TOUCHPAD_TOGGLE_OFF)); 729 } 730 731 static DEVICE_ATTR_RW(touchpad_toggle_enable); 732 733 static ssize_t rainbow_animation_store(struct device *dev, struct device_attribute *attr, 734 const char *buf, size_t count) 735 { 736 struct uniwill_data *data = dev_get_drvdata(dev); 737 unsigned int value; 738 bool enable; 739 int ret; 740 741 ret = kstrtobool(buf, &enable); 742 if (ret < 0) 743 return ret; 744 745 if (enable) 746 value = LIGHTBAR_WELCOME; 747 else 748 value = 0; 749 750 guard(mutex)(&data->led_lock); 751 752 ret = regmap_update_bits(data->regmap, EC_ADDR_LIGHTBAR_AC_CTRL, LIGHTBAR_WELCOME, value); 753 if (ret < 0) 754 return ret; 755 756 ret = regmap_update_bits(data->regmap, EC_ADDR_LIGHTBAR_BAT_CTRL, LIGHTBAR_WELCOME, value); 757 if (ret < 0) 758 return ret; 759 760 return count; 761 } 762 763 static ssize_t rainbow_animation_show(struct device *dev, struct device_attribute *attr, char *buf) 764 { 765 struct uniwill_data *data = dev_get_drvdata(dev); 766 unsigned int value; 767 int ret; 768 769 ret = regmap_read(data->regmap, EC_ADDR_LIGHTBAR_AC_CTRL, &value); 770 if (ret < 0) 771 return ret; 772 773 return sysfs_emit(buf, "%d\n", !!(value & LIGHTBAR_WELCOME)); 774 } 775 776 static DEVICE_ATTR_RW(rainbow_animation); 777 778 static ssize_t breathing_in_suspend_store(struct device *dev, struct device_attribute *attr, 779 const char *buf, size_t count) 780 { 781 struct uniwill_data *data = dev_get_drvdata(dev); 782 unsigned int value; 783 bool enable; 784 int ret; 785 786 ret = kstrtobool(buf, &enable); 787 if (ret < 0) 788 return ret; 789 790 if (enable) 791 value = 0; 792 else 793 value = LIGHTBAR_S3_OFF; 794 795 /* We only access a single register here, so we do not need to use data->led_lock */ 796 ret = regmap_update_bits(data->regmap, EC_ADDR_LIGHTBAR_AC_CTRL, LIGHTBAR_S3_OFF, value); 797 if (ret < 0) 798 return ret; 799 800 return count; 801 } 802 803 static ssize_t breathing_in_suspend_show(struct device *dev, struct device_attribute *attr, 804 char *buf) 805 { 806 struct uniwill_data *data = dev_get_drvdata(dev); 807 unsigned int value; 808 int ret; 809 810 ret = regmap_read(data->regmap, EC_ADDR_LIGHTBAR_AC_CTRL, &value); 811 if (ret < 0) 812 return ret; 813 814 return sysfs_emit(buf, "%d\n", !(value & LIGHTBAR_S3_OFF)); 815 } 816 817 static DEVICE_ATTR_RW(breathing_in_suspend); 818 819 static ssize_t ctgp_offset_store(struct device *dev, struct device_attribute *attr, 820 const char *buf, size_t count) 821 { 822 struct uniwill_data *data = dev_get_drvdata(dev); 823 unsigned int value; 824 int ret; 825 826 ret = kstrtouint(buf, 0, &value); 827 if (ret < 0) 828 return ret; 829 830 if (value > U8_MAX) 831 return -EINVAL; 832 833 ret = regmap_write(data->regmap, EC_ADDR_CTGP_DB_CTGP_OFFSET, value); 834 if (ret < 0) 835 return ret; 836 837 return count; 838 } 839 840 static ssize_t ctgp_offset_show(struct device *dev, struct device_attribute *attr, 841 char *buf) 842 { 843 struct uniwill_data *data = dev_get_drvdata(dev); 844 unsigned int value; 845 int ret; 846 847 ret = regmap_read(data->regmap, EC_ADDR_CTGP_DB_CTGP_OFFSET, &value); 848 if (ret < 0) 849 return ret; 850 851 return sysfs_emit(buf, "%u\n", value); 852 } 853 854 static DEVICE_ATTR_RW(ctgp_offset); 855 856 static int uniwill_nvidia_ctgp_init(struct uniwill_data *data) 857 { 858 int ret; 859 860 if (!uniwill_device_supports(data, UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL)) 861 return 0; 862 863 ret = regmap_write(data->regmap, EC_ADDR_CTGP_DB_CTGP_OFFSET, 0); 864 if (ret < 0) 865 return ret; 866 867 ret = regmap_write(data->regmap, EC_ADDR_CTGP_DB_TPP_OFFSET, 255); 868 if (ret < 0) 869 return ret; 870 871 ret = regmap_write(data->regmap, EC_ADDR_CTGP_DB_DB_OFFSET, 25); 872 if (ret < 0) 873 return ret; 874 875 ret = regmap_set_bits(data->regmap, EC_ADDR_CTGP_DB_CTRL, 876 CTGP_DB_GENERAL_ENABLE | CTGP_DB_DB_ENABLE | CTGP_DB_CTGP_ENABLE); 877 if (ret < 0) 878 return ret; 879 880 return 0; 881 } 882 883 static struct attribute *uniwill_attrs[] = { 884 /* Keyboard-related */ 885 &dev_attr_fn_lock.attr, 886 &dev_attr_super_key_enable.attr, 887 &dev_attr_touchpad_toggle_enable.attr, 888 /* Lightbar-related */ 889 &dev_attr_rainbow_animation.attr, 890 &dev_attr_breathing_in_suspend.attr, 891 /* Power-management-related */ 892 &dev_attr_ctgp_offset.attr, 893 NULL 894 }; 895 896 static umode_t uniwill_attr_is_visible(struct kobject *kobj, struct attribute *attr, int n) 897 { 898 struct device *dev = kobj_to_dev(kobj); 899 struct uniwill_data *data = dev_get_drvdata(dev); 900 901 if (attr == &dev_attr_fn_lock.attr) { 902 if (uniwill_device_supports(data, UNIWILL_FEATURE_FN_LOCK)) 903 return attr->mode; 904 } 905 906 if (attr == &dev_attr_super_key_enable.attr) { 907 if (uniwill_device_supports(data, UNIWILL_FEATURE_SUPER_KEY)) 908 return attr->mode; 909 } 910 911 if (attr == &dev_attr_touchpad_toggle_enable.attr) { 912 if (uniwill_device_supports(data, UNIWILL_FEATURE_TOUCHPAD_TOGGLE)) 913 return attr->mode; 914 } 915 916 if (attr == &dev_attr_rainbow_animation.attr || 917 attr == &dev_attr_breathing_in_suspend.attr) { 918 if (uniwill_device_supports(data, UNIWILL_FEATURE_LIGHTBAR)) 919 return attr->mode; 920 } 921 922 if (attr == &dev_attr_ctgp_offset.attr) { 923 if (uniwill_device_supports(data, UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL)) 924 return attr->mode; 925 } 926 927 return 0; 928 } 929 930 static const struct attribute_group uniwill_group = { 931 .is_visible = uniwill_attr_is_visible, 932 .attrs = uniwill_attrs, 933 }; 934 935 static const struct attribute_group *uniwill_groups[] = { 936 &uniwill_group, 937 NULL 938 }; 939 940 static int uniwill_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, 941 long *val) 942 { 943 struct uniwill_data *data = dev_get_drvdata(dev); 944 unsigned int value; 945 __be16 rpm; 946 int ret; 947 948 switch (type) { 949 case hwmon_temp: 950 switch (channel) { 951 case 0: 952 ret = regmap_read(data->regmap, EC_ADDR_CPU_TEMP, &value); 953 break; 954 case 1: 955 ret = regmap_read(data->regmap, EC_ADDR_GPU_TEMP, &value); 956 break; 957 default: 958 return -EOPNOTSUPP; 959 } 960 961 if (ret < 0) 962 return ret; 963 964 *val = value * MILLIDEGREE_PER_DEGREE; 965 return 0; 966 case hwmon_fan: 967 switch (channel) { 968 case 0: 969 ret = regmap_bulk_read(data->regmap, EC_ADDR_MAIN_FAN_RPM_1, &rpm, 970 sizeof(rpm)); 971 break; 972 case 1: 973 ret = regmap_bulk_read(data->regmap, EC_ADDR_SECOND_FAN_RPM_1, &rpm, 974 sizeof(rpm)); 975 break; 976 default: 977 return -EOPNOTSUPP; 978 } 979 980 if (ret < 0) 981 return ret; 982 983 *val = be16_to_cpu(rpm); 984 return 0; 985 case hwmon_pwm: 986 switch (channel) { 987 case 0: 988 ret = regmap_read(data->regmap, EC_ADDR_PWM_1, &value); 989 break; 990 case 1: 991 ret = regmap_read(data->regmap, EC_ADDR_PWM_2, &value); 992 break; 993 default: 994 return -EOPNOTSUPP; 995 } 996 997 if (ret < 0) 998 return ret; 999 1000 *val = fixp_linear_interpolate(0, 0, PWM_MAX, U8_MAX, value); 1001 return 0; 1002 default: 1003 return -EOPNOTSUPP; 1004 } 1005 } 1006 1007 static int uniwill_read_string(struct device *dev, enum hwmon_sensor_types type, u32 attr, 1008 int channel, const char **str) 1009 { 1010 switch (type) { 1011 case hwmon_temp: 1012 *str = uniwill_temp_labels[channel]; 1013 return 0; 1014 case hwmon_fan: 1015 *str = uniwill_fan_labels[channel]; 1016 return 0; 1017 default: 1018 return -EOPNOTSUPP; 1019 } 1020 } 1021 1022 static const struct hwmon_ops uniwill_ops = { 1023 .visible = 0444, 1024 .read = uniwill_read, 1025 .read_string = uniwill_read_string, 1026 }; 1027 1028 static const struct hwmon_channel_info * const uniwill_info[] = { 1029 HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ), 1030 HWMON_CHANNEL_INFO(temp, 1031 HWMON_T_INPUT | HWMON_T_LABEL, 1032 HWMON_T_INPUT | HWMON_T_LABEL), 1033 HWMON_CHANNEL_INFO(fan, 1034 HWMON_F_INPUT | HWMON_F_LABEL, 1035 HWMON_F_INPUT | HWMON_F_LABEL), 1036 HWMON_CHANNEL_INFO(pwm, 1037 HWMON_PWM_INPUT, 1038 HWMON_PWM_INPUT), 1039 NULL 1040 }; 1041 1042 static const struct hwmon_chip_info uniwill_chip_info = { 1043 .ops = &uniwill_ops, 1044 .info = uniwill_info, 1045 }; 1046 1047 static int uniwill_hwmon_init(struct uniwill_data *data) 1048 { 1049 struct device *hdev; 1050 1051 if (!uniwill_device_supports(data, UNIWILL_FEATURE_HWMON)) 1052 return 0; 1053 1054 hdev = devm_hwmon_device_register_with_info(data->dev, "uniwill", data, 1055 &uniwill_chip_info, NULL); 1056 1057 return PTR_ERR_OR_ZERO(hdev); 1058 } 1059 1060 static const unsigned int uniwill_led_channel_to_bat_reg[LED_CHANNELS] = { 1061 EC_ADDR_LIGHTBAR_BAT_RED, 1062 EC_ADDR_LIGHTBAR_BAT_GREEN, 1063 EC_ADDR_LIGHTBAR_BAT_BLUE, 1064 }; 1065 1066 static const unsigned int uniwill_led_channel_to_ac_reg[LED_CHANNELS] = { 1067 EC_ADDR_LIGHTBAR_AC_RED, 1068 EC_ADDR_LIGHTBAR_AC_GREEN, 1069 EC_ADDR_LIGHTBAR_AC_BLUE, 1070 }; 1071 1072 static int uniwill_led_brightness_set(struct led_classdev *led_cdev, enum led_brightness brightness) 1073 { 1074 struct led_classdev_mc *led_mc_cdev = lcdev_to_mccdev(led_cdev); 1075 struct uniwill_data *data = container_of(led_mc_cdev, struct uniwill_data, led_mc_cdev); 1076 unsigned int value; 1077 int ret; 1078 1079 ret = led_mc_calc_color_components(led_mc_cdev, brightness); 1080 if (ret < 0) 1081 return ret; 1082 1083 guard(mutex)(&data->led_lock); 1084 1085 for (int i = 0; i < LED_CHANNELS; i++) { 1086 /* Prevent the brightness values from overflowing */ 1087 value = min(LED_MAX_BRIGHTNESS, data->led_mc_subled_info[i].brightness); 1088 ret = regmap_write(data->regmap, uniwill_led_channel_to_ac_reg[i], value); 1089 if (ret < 0) 1090 return ret; 1091 1092 ret = regmap_write(data->regmap, uniwill_led_channel_to_bat_reg[i], value); 1093 if (ret < 0) 1094 return ret; 1095 } 1096 1097 if (brightness) 1098 value = 0; 1099 else 1100 value = LIGHTBAR_S0_OFF; 1101 1102 ret = regmap_update_bits(data->regmap, EC_ADDR_LIGHTBAR_AC_CTRL, LIGHTBAR_S0_OFF, value); 1103 if (ret < 0) 1104 return ret; 1105 1106 return regmap_update_bits(data->regmap, EC_ADDR_LIGHTBAR_BAT_CTRL, LIGHTBAR_S0_OFF, value); 1107 } 1108 1109 #define LIGHTBAR_MASK (LIGHTBAR_APP_EXISTS | LIGHTBAR_S0_OFF | LIGHTBAR_S3_OFF | LIGHTBAR_WELCOME) 1110 1111 static int uniwill_led_init(struct uniwill_data *data) 1112 { 1113 struct led_init_data init_data = { 1114 .devicename = DRIVER_NAME, 1115 .default_label = "multicolor:" LED_FUNCTION_STATUS, 1116 .devname_mandatory = true, 1117 }; 1118 unsigned int color_indices[3] = { 1119 LED_COLOR_ID_RED, 1120 LED_COLOR_ID_GREEN, 1121 LED_COLOR_ID_BLUE, 1122 }; 1123 unsigned int value; 1124 int ret; 1125 1126 if (!uniwill_device_supports(data, UNIWILL_FEATURE_LIGHTBAR)) 1127 return 0; 1128 1129 ret = devm_mutex_init(data->dev, &data->led_lock); 1130 if (ret < 0) 1131 return ret; 1132 1133 /* 1134 * The EC has separate lightbar settings for AC and battery mode, 1135 * so we have to ensure that both settings are the same. 1136 */ 1137 ret = regmap_read(data->regmap, EC_ADDR_LIGHTBAR_AC_CTRL, &value); 1138 if (ret < 0) 1139 return ret; 1140 1141 value |= LIGHTBAR_APP_EXISTS; 1142 ret = regmap_write(data->regmap, EC_ADDR_LIGHTBAR_AC_CTRL, value); 1143 if (ret < 0) 1144 return ret; 1145 1146 /* 1147 * The breathing animation during suspend is not supported when 1148 * running on battery power. 1149 */ 1150 value |= LIGHTBAR_S3_OFF; 1151 ret = regmap_update_bits(data->regmap, EC_ADDR_LIGHTBAR_BAT_CTRL, LIGHTBAR_MASK, value); 1152 if (ret < 0) 1153 return ret; 1154 1155 data->led_mc_cdev.led_cdev.color = LED_COLOR_ID_MULTI; 1156 data->led_mc_cdev.led_cdev.max_brightness = LED_MAX_BRIGHTNESS; 1157 data->led_mc_cdev.led_cdev.flags = LED_REJECT_NAME_CONFLICT; 1158 data->led_mc_cdev.led_cdev.brightness_set_blocking = uniwill_led_brightness_set; 1159 1160 if (value & LIGHTBAR_S0_OFF) 1161 data->led_mc_cdev.led_cdev.brightness = 0; 1162 else 1163 data->led_mc_cdev.led_cdev.brightness = LED_MAX_BRIGHTNESS; 1164 1165 for (int i = 0; i < LED_CHANNELS; i++) { 1166 data->led_mc_subled_info[i].color_index = color_indices[i]; 1167 1168 ret = regmap_read(data->regmap, uniwill_led_channel_to_ac_reg[i], &value); 1169 if (ret < 0) 1170 return ret; 1171 1172 /* 1173 * Make sure that the initial intensity value is not greater than 1174 * the maximum brightness. 1175 */ 1176 value = min(LED_MAX_BRIGHTNESS, value); 1177 ret = regmap_write(data->regmap, uniwill_led_channel_to_ac_reg[i], value); 1178 if (ret < 0) 1179 return ret; 1180 1181 ret = regmap_write(data->regmap, uniwill_led_channel_to_bat_reg[i], value); 1182 if (ret < 0) 1183 return ret; 1184 1185 data->led_mc_subled_info[i].intensity = value; 1186 data->led_mc_subled_info[i].channel = i; 1187 } 1188 1189 data->led_mc_cdev.subled_info = data->led_mc_subled_info; 1190 data->led_mc_cdev.num_colors = LED_CHANNELS; 1191 1192 return devm_led_classdev_multicolor_register_ext(data->dev, &data->led_mc_cdev, 1193 &init_data); 1194 } 1195 1196 static int uniwill_get_property(struct power_supply *psy, const struct power_supply_ext *ext, 1197 void *drvdata, enum power_supply_property psp, 1198 union power_supply_propval *val) 1199 { 1200 struct uniwill_data *data = drvdata; 1201 union power_supply_propval prop; 1202 unsigned int regval; 1203 int ret; 1204 1205 switch (psp) { 1206 case POWER_SUPPLY_PROP_HEALTH: 1207 ret = power_supply_get_property_direct(psy, POWER_SUPPLY_PROP_PRESENT, &prop); 1208 if (ret < 0) 1209 return ret; 1210 1211 if (!prop.intval) { 1212 val->intval = POWER_SUPPLY_HEALTH_NO_BATTERY; 1213 return 0; 1214 } 1215 1216 ret = power_supply_get_property_direct(psy, POWER_SUPPLY_PROP_STATUS, &prop); 1217 if (ret < 0) 1218 return ret; 1219 1220 if (prop.intval == POWER_SUPPLY_STATUS_UNKNOWN) { 1221 val->intval = POWER_SUPPLY_HEALTH_UNKNOWN; 1222 return 0; 1223 } 1224 1225 ret = regmap_read(data->regmap, EC_ADDR_BAT_ALERT, ®val); 1226 if (ret < 0) 1227 return ret; 1228 1229 if (regval) { 1230 /* Charging issue */ 1231 val->intval = POWER_SUPPLY_HEALTH_UNSPEC_FAILURE; 1232 return 0; 1233 } 1234 1235 val->intval = POWER_SUPPLY_HEALTH_GOOD; 1236 return 0; 1237 case POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD: 1238 ret = regmap_read(data->regmap, EC_ADDR_CHARGE_CTRL, ®val); 1239 if (ret < 0) 1240 return ret; 1241 1242 val->intval = clamp_val(FIELD_GET(CHARGE_CTRL_MASK, regval), 0, 100); 1243 return 0; 1244 default: 1245 return -EINVAL; 1246 } 1247 } 1248 1249 static int uniwill_set_property(struct power_supply *psy, const struct power_supply_ext *ext, 1250 void *drvdata, enum power_supply_property psp, 1251 const union power_supply_propval *val) 1252 { 1253 struct uniwill_data *data = drvdata; 1254 1255 switch (psp) { 1256 case POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD: 1257 if (val->intval < 1 || val->intval > 100) 1258 return -EINVAL; 1259 1260 return regmap_update_bits(data->regmap, EC_ADDR_CHARGE_CTRL, CHARGE_CTRL_MASK, 1261 val->intval); 1262 default: 1263 return -EINVAL; 1264 } 1265 } 1266 1267 static int uniwill_property_is_writeable(struct power_supply *psy, 1268 const struct power_supply_ext *ext, void *drvdata, 1269 enum power_supply_property psp) 1270 { 1271 if (psp == POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD) 1272 return true; 1273 1274 return false; 1275 } 1276 1277 static const enum power_supply_property uniwill_properties[] = { 1278 POWER_SUPPLY_PROP_HEALTH, 1279 POWER_SUPPLY_PROP_CHARGE_CONTROL_END_THRESHOLD, 1280 }; 1281 1282 static const struct power_supply_ext uniwill_extension = { 1283 .name = DRIVER_NAME, 1284 .properties = uniwill_properties, 1285 .num_properties = ARRAY_SIZE(uniwill_properties), 1286 .get_property = uniwill_get_property, 1287 .set_property = uniwill_set_property, 1288 .property_is_writeable = uniwill_property_is_writeable, 1289 }; 1290 1291 static int uniwill_add_battery(struct power_supply *battery, struct acpi_battery_hook *hook) 1292 { 1293 struct uniwill_data *data = container_of(hook, struct uniwill_data, hook); 1294 struct uniwill_battery_entry *entry; 1295 int ret; 1296 1297 entry = kzalloc_obj(*entry); 1298 if (!entry) 1299 return -ENOMEM; 1300 1301 ret = power_supply_register_extension(battery, &uniwill_extension, data->dev, data); 1302 if (ret < 0) { 1303 kfree(entry); 1304 return ret; 1305 } 1306 1307 guard(mutex)(&data->battery_lock); 1308 1309 entry->battery = battery; 1310 list_add(&entry->head, &data->batteries); 1311 1312 return 0; 1313 } 1314 1315 static int uniwill_remove_battery(struct power_supply *battery, struct acpi_battery_hook *hook) 1316 { 1317 struct uniwill_data *data = container_of(hook, struct uniwill_data, hook); 1318 struct uniwill_battery_entry *entry, *tmp; 1319 1320 scoped_guard(mutex, &data->battery_lock) { 1321 list_for_each_entry_safe(entry, tmp, &data->batteries, head) { 1322 if (entry->battery == battery) { 1323 list_del(&entry->head); 1324 kfree(entry); 1325 break; 1326 } 1327 } 1328 } 1329 1330 power_supply_unregister_extension(battery, &uniwill_extension); 1331 1332 return 0; 1333 } 1334 1335 static int uniwill_battery_init(struct uniwill_data *data) 1336 { 1337 int ret; 1338 1339 if (!uniwill_device_supports(data, UNIWILL_FEATURE_BATTERY)) 1340 return 0; 1341 1342 ret = devm_mutex_init(data->dev, &data->battery_lock); 1343 if (ret < 0) 1344 return ret; 1345 1346 INIT_LIST_HEAD(&data->batteries); 1347 data->hook.name = "Uniwill Battery Extension"; 1348 data->hook.add_battery = uniwill_add_battery; 1349 data->hook.remove_battery = uniwill_remove_battery; 1350 1351 return devm_battery_hook_register(data->dev, &data->hook); 1352 } 1353 1354 static int uniwill_notifier_call(struct notifier_block *nb, unsigned long action, void *dummy) 1355 { 1356 struct uniwill_data *data = container_of(nb, struct uniwill_data, nb); 1357 struct uniwill_battery_entry *entry; 1358 1359 switch (action) { 1360 case UNIWILL_OSD_BATTERY_ALERT: 1361 if (!uniwill_device_supports(data, UNIWILL_FEATURE_BATTERY)) 1362 return NOTIFY_DONE; 1363 1364 mutex_lock(&data->battery_lock); 1365 list_for_each_entry(entry, &data->batteries, head) { 1366 power_supply_changed(entry->battery); 1367 } 1368 mutex_unlock(&data->battery_lock); 1369 1370 return NOTIFY_OK; 1371 case UNIWILL_OSD_DC_ADAPTER_CHANGED: 1372 /* noop for the time being, will change once charging priority 1373 * gets implemented. 1374 */ 1375 1376 return NOTIFY_OK; 1377 case UNIWILL_OSD_FN_LOCK: 1378 if (!uniwill_device_supports(data, UNIWILL_FEATURE_FN_LOCK)) 1379 return NOTIFY_DONE; 1380 1381 sysfs_notify(&data->dev->kobj, NULL, "fn_lock"); 1382 1383 return NOTIFY_OK; 1384 default: 1385 mutex_lock(&data->input_lock); 1386 sparse_keymap_report_event(data->input_device, action, 1, true); 1387 mutex_unlock(&data->input_lock); 1388 1389 return NOTIFY_OK; 1390 } 1391 } 1392 1393 static int uniwill_input_init(struct uniwill_data *data) 1394 { 1395 int ret; 1396 1397 ret = devm_mutex_init(data->dev, &data->input_lock); 1398 if (ret < 0) 1399 return ret; 1400 1401 data->input_device = devm_input_allocate_device(data->dev); 1402 if (!data->input_device) 1403 return -ENOMEM; 1404 1405 ret = sparse_keymap_setup(data->input_device, uniwill_keymap, NULL); 1406 if (ret < 0) 1407 return ret; 1408 1409 data->input_device->name = "Uniwill WMI hotkeys"; 1410 data->input_device->phys = "wmi/input0"; 1411 data->input_device->id.bustype = BUS_HOST; 1412 ret = input_register_device(data->input_device); 1413 if (ret < 0) 1414 return ret; 1415 1416 data->nb.notifier_call = uniwill_notifier_call; 1417 1418 return devm_uniwill_wmi_register_notifier(data->dev, &data->nb); 1419 } 1420 1421 static void uniwill_disable_manual_control(void *context) 1422 { 1423 struct uniwill_data *data = context; 1424 1425 regmap_clear_bits(data->regmap, EC_ADDR_AP_OEM, ENABLE_MANUAL_CTRL); 1426 } 1427 1428 static int uniwill_ec_init(struct uniwill_data *data) 1429 { 1430 unsigned int value; 1431 int ret; 1432 1433 ret = regmap_read(data->regmap, EC_ADDR_PROJECT_ID, &value); 1434 if (ret < 0) 1435 return ret; 1436 1437 dev_dbg(data->dev, "Project ID: %u\n", value); 1438 1439 ret = regmap_set_bits(data->regmap, EC_ADDR_AP_OEM, ENABLE_MANUAL_CTRL); 1440 if (ret < 0) 1441 return ret; 1442 1443 return devm_add_action_or_reset(data->dev, uniwill_disable_manual_control, data); 1444 } 1445 1446 static int uniwill_probe(struct platform_device *pdev) 1447 { 1448 struct uniwill_data *data; 1449 struct regmap *regmap; 1450 acpi_handle handle; 1451 int ret; 1452 1453 handle = ACPI_HANDLE(&pdev->dev); 1454 if (!handle) 1455 return -ENODEV; 1456 1457 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); 1458 if (!data) 1459 return -ENOMEM; 1460 1461 data->dev = &pdev->dev; 1462 data->handle = handle; 1463 platform_set_drvdata(pdev, data); 1464 1465 regmap = devm_regmap_init(&pdev->dev, &uniwill_ec_bus, data, &uniwill_ec_config); 1466 if (IS_ERR(regmap)) 1467 return PTR_ERR(regmap); 1468 1469 data->regmap = regmap; 1470 ret = devm_mutex_init(&pdev->dev, &data->super_key_lock); 1471 if (ret < 0) 1472 return ret; 1473 1474 ret = uniwill_ec_init(data); 1475 if (ret < 0) 1476 return ret; 1477 1478 data->features = device_descriptor.features; 1479 1480 /* 1481 * Some devices might need to perform some device-specific initialization steps 1482 * before the supported features are initialized. Because of this we have to call 1483 * this callback just after the EC itself was initialized. 1484 */ 1485 if (device_descriptor.probe) { 1486 ret = device_descriptor.probe(data); 1487 if (ret < 0) 1488 return ret; 1489 } 1490 1491 ret = uniwill_battery_init(data); 1492 if (ret < 0) 1493 return ret; 1494 1495 ret = uniwill_led_init(data); 1496 if (ret < 0) 1497 return ret; 1498 1499 ret = uniwill_hwmon_init(data); 1500 if (ret < 0) 1501 return ret; 1502 1503 ret = uniwill_nvidia_ctgp_init(data); 1504 if (ret < 0) 1505 return ret; 1506 1507 return uniwill_input_init(data); 1508 } 1509 1510 static void uniwill_shutdown(struct platform_device *pdev) 1511 { 1512 struct uniwill_data *data = platform_get_drvdata(pdev); 1513 1514 regmap_clear_bits(data->regmap, EC_ADDR_AP_OEM, ENABLE_MANUAL_CTRL); 1515 } 1516 1517 static int uniwill_suspend_fn_lock(struct uniwill_data *data) 1518 { 1519 if (!uniwill_device_supports(data, UNIWILL_FEATURE_FN_LOCK)) 1520 return 0; 1521 1522 /* 1523 * The EC_ADDR_BIOS_OEM is marked as volatile, so we have to restore it 1524 * ourselves. 1525 */ 1526 return regmap_read(data->regmap, EC_ADDR_BIOS_OEM, &data->last_status); 1527 } 1528 1529 static int uniwill_suspend_super_key(struct uniwill_data *data) 1530 { 1531 if (!uniwill_device_supports(data, UNIWILL_FEATURE_SUPER_KEY)) 1532 return 0; 1533 1534 /* 1535 * The EC_ADDR_SWITCH_STATUS is marked as volatile, so we have to restore it 1536 * ourselves. 1537 */ 1538 return regmap_read(data->regmap, EC_ADDR_SWITCH_STATUS, &data->last_switch_status); 1539 } 1540 1541 static int uniwill_suspend_battery(struct uniwill_data *data) 1542 { 1543 if (!uniwill_device_supports(data, UNIWILL_FEATURE_BATTERY)) 1544 return 0; 1545 1546 /* 1547 * Save the current charge limit in order to restore it during resume. 1548 * We cannot use the regmap code for that since this register needs to 1549 * be declared as volatile due to CHARGE_CTRL_REACHED. 1550 */ 1551 return regmap_read(data->regmap, EC_ADDR_CHARGE_CTRL, &data->last_charge_ctrl); 1552 } 1553 1554 static int uniwill_suspend_nvidia_ctgp(struct uniwill_data *data) 1555 { 1556 if (!uniwill_device_supports(data, UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL)) 1557 return 0; 1558 1559 return regmap_clear_bits(data->regmap, EC_ADDR_CTGP_DB_CTRL, 1560 CTGP_DB_DB_ENABLE | CTGP_DB_CTGP_ENABLE); 1561 } 1562 1563 static int uniwill_suspend(struct device *dev) 1564 { 1565 struct uniwill_data *data = dev_get_drvdata(dev); 1566 int ret; 1567 1568 ret = uniwill_suspend_fn_lock(data); 1569 if (ret < 0) 1570 return ret; 1571 1572 ret = uniwill_suspend_super_key(data); 1573 if (ret < 0) 1574 return ret; 1575 1576 ret = uniwill_suspend_battery(data); 1577 if (ret < 0) 1578 return ret; 1579 1580 ret = uniwill_suspend_nvidia_ctgp(data); 1581 if (ret < 0) 1582 return ret; 1583 1584 regcache_cache_only(data->regmap, true); 1585 regcache_mark_dirty(data->regmap); 1586 1587 return 0; 1588 } 1589 1590 static int uniwill_resume_fn_lock(struct uniwill_data *data) 1591 { 1592 if (!uniwill_device_supports(data, UNIWILL_FEATURE_FN_LOCK)) 1593 return 0; 1594 1595 return regmap_update_bits(data->regmap, EC_ADDR_BIOS_OEM, FN_LOCK_STATUS, 1596 data->last_status); 1597 } 1598 1599 static int uniwill_resume_super_key(struct uniwill_data *data) 1600 { 1601 unsigned int value; 1602 int ret; 1603 1604 if (!uniwill_device_supports(data, UNIWILL_FEATURE_SUPER_KEY)) 1605 return 0; 1606 1607 ret = regmap_read(data->regmap, EC_ADDR_SWITCH_STATUS, &value); 1608 if (ret < 0) 1609 return ret; 1610 1611 if ((data->last_switch_status & SUPER_KEY_LOCK_STATUS) == (value & SUPER_KEY_LOCK_STATUS)) 1612 return 0; 1613 1614 return regmap_write_bits(data->regmap, EC_ADDR_TRIGGER, TRIGGER_SUPER_KEY_LOCK, 1615 TRIGGER_SUPER_KEY_LOCK); 1616 } 1617 1618 static int uniwill_resume_battery(struct uniwill_data *data) 1619 { 1620 if (!uniwill_device_supports(data, UNIWILL_FEATURE_BATTERY)) 1621 return 0; 1622 1623 return regmap_update_bits(data->regmap, EC_ADDR_CHARGE_CTRL, CHARGE_CTRL_MASK, 1624 data->last_charge_ctrl); 1625 } 1626 1627 static int uniwill_resume_nvidia_ctgp(struct uniwill_data *data) 1628 { 1629 if (!uniwill_device_supports(data, UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL)) 1630 return 0; 1631 1632 return regmap_set_bits(data->regmap, EC_ADDR_CTGP_DB_CTRL, 1633 CTGP_DB_DB_ENABLE | CTGP_DB_CTGP_ENABLE); 1634 } 1635 1636 static int uniwill_resume(struct device *dev) 1637 { 1638 struct uniwill_data *data = dev_get_drvdata(dev); 1639 int ret; 1640 1641 regcache_cache_only(data->regmap, false); 1642 1643 ret = regcache_sync(data->regmap); 1644 if (ret < 0) 1645 return ret; 1646 1647 ret = uniwill_resume_fn_lock(data); 1648 if (ret < 0) 1649 return ret; 1650 1651 ret = uniwill_resume_super_key(data); 1652 if (ret < 0) 1653 return ret; 1654 1655 ret = uniwill_resume_battery(data); 1656 if (ret < 0) 1657 return ret; 1658 1659 return uniwill_resume_nvidia_ctgp(data); 1660 } 1661 1662 static DEFINE_SIMPLE_DEV_PM_OPS(uniwill_pm_ops, uniwill_suspend, uniwill_resume); 1663 1664 /* 1665 * We only use the DMI table for auoloading because the ACPI device itself 1666 * does not guarantee that the underlying EC implementation is supported. 1667 */ 1668 static const struct acpi_device_id uniwill_id_table[] = { 1669 { "INOU0000" }, 1670 { }, 1671 }; 1672 1673 static struct platform_driver uniwill_driver = { 1674 .driver = { 1675 .name = DRIVER_NAME, 1676 .dev_groups = uniwill_groups, 1677 .probe_type = PROBE_PREFER_ASYNCHRONOUS, 1678 .acpi_match_table = uniwill_id_table, 1679 .pm = pm_sleep_ptr(&uniwill_pm_ops), 1680 }, 1681 .probe = uniwill_probe, 1682 .shutdown = uniwill_shutdown, 1683 }; 1684 1685 static struct uniwill_device_descriptor lapac71h_descriptor __initdata = { 1686 .features = UNIWILL_FEATURE_FN_LOCK | 1687 UNIWILL_FEATURE_SUPER_KEY | 1688 UNIWILL_FEATURE_TOUCHPAD_TOGGLE | 1689 UNIWILL_FEATURE_BATTERY | 1690 UNIWILL_FEATURE_HWMON, 1691 }; 1692 1693 static struct uniwill_device_descriptor lapkc71f_descriptor __initdata = { 1694 .features = UNIWILL_FEATURE_FN_LOCK | 1695 UNIWILL_FEATURE_SUPER_KEY | 1696 UNIWILL_FEATURE_TOUCHPAD_TOGGLE | 1697 UNIWILL_FEATURE_LIGHTBAR | 1698 UNIWILL_FEATURE_BATTERY | 1699 UNIWILL_FEATURE_HWMON, 1700 }; 1701 1702 static int phxarx1_phxaqf1_probe(struct uniwill_data *data) 1703 { 1704 unsigned int value; 1705 int ret; 1706 1707 ret = regmap_read(data->regmap, EC_ADDR_SYSTEM_ID, &value); 1708 if (ret < 0) 1709 return ret; 1710 1711 if (value & HAS_GPU) 1712 data->features |= UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL; 1713 1714 return 0; 1715 }; 1716 1717 static struct uniwill_device_descriptor phxarx1_phxaqf1_descriptor __initdata = { 1718 .probe = phxarx1_phxaqf1_probe, 1719 }; 1720 1721 static struct uniwill_device_descriptor tux_featureset_1_descriptor __initdata = { 1722 .features = UNIWILL_FEATURE_NVIDIA_CTGP_CONTROL, 1723 }; 1724 1725 static struct uniwill_device_descriptor empty_descriptor __initdata = {}; 1726 1727 static const struct dmi_system_id uniwill_dmi_table[] __initconst = { 1728 { 1729 .ident = "XMG FUSION 15", 1730 .matches = { 1731 DMI_MATCH(DMI_SYS_VENDOR, "SchenkerTechnologiesGmbH"), 1732 DMI_EXACT_MATCH(DMI_BOARD_NAME, "LAPQC71A"), 1733 }, 1734 .driver_data = &empty_descriptor, 1735 }, 1736 { 1737 .ident = "XMG FUSION 15", 1738 .matches = { 1739 DMI_MATCH(DMI_SYS_VENDOR, "SchenkerTechnologiesGmbH"), 1740 DMI_EXACT_MATCH(DMI_BOARD_NAME, "LAPQC71B"), 1741 }, 1742 .driver_data = &empty_descriptor, 1743 }, 1744 { 1745 .ident = "Intel NUC x15", 1746 .matches = { 1747 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Intel(R) Client Systems"), 1748 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "LAPAC71H"), 1749 }, 1750 .driver_data = &lapac71h_descriptor, 1751 }, 1752 { 1753 .ident = "Intel NUC x15", 1754 .matches = { 1755 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Intel(R) Client Systems"), 1756 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "LAPKC71F"), 1757 }, 1758 .driver_data = &lapkc71f_descriptor, 1759 }, 1760 { 1761 .ident = "TUXEDO InfinityBook Pro 14 Gen6 Intel", 1762 .matches = { 1763 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1764 DMI_EXACT_MATCH(DMI_BOARD_NAME, "PHxTxX1"), 1765 }, 1766 .driver_data = &empty_descriptor, 1767 }, 1768 { 1769 .ident = "TUXEDO InfinityBook Pro 14 Gen6 Intel", 1770 .matches = { 1771 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1772 DMI_EXACT_MATCH(DMI_BOARD_NAME, "PHxTQx1"), 1773 }, 1774 .driver_data = &tux_featureset_1_descriptor, 1775 }, 1776 { 1777 .ident = "TUXEDO InfinityBook Pro 14/16 Gen7 Intel", 1778 .matches = { 1779 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1780 DMI_EXACT_MATCH(DMI_BOARD_NAME, "PHxARX1_PHxAQF1"), 1781 }, 1782 .driver_data = &phxarx1_phxaqf1_descriptor, 1783 }, 1784 { 1785 .ident = "TUXEDO InfinityBook Pro 16 Gen7 Intel/Commodore Omnia-Book Pro Gen 7", 1786 .matches = { 1787 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1788 DMI_EXACT_MATCH(DMI_BOARD_NAME, "PH6AG01_PH6AQ71_PH6AQI1"), 1789 }, 1790 .driver_data = &tux_featureset_1_descriptor, 1791 }, 1792 { 1793 .ident = "TUXEDO InfinityBook Pro 14/16 Gen8 Intel/Commodore Omnia-Book Pro Gen 8", 1794 .matches = { 1795 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1796 DMI_EXACT_MATCH(DMI_BOARD_NAME, "PH4PRX1_PH6PRX1"), 1797 }, 1798 .driver_data = &empty_descriptor, 1799 }, 1800 { 1801 .ident = "TUXEDO InfinityBook Pro 14 Gen8 Intel/Commodore Omnia-Book Pro Gen 8", 1802 .matches = { 1803 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1804 DMI_EXACT_MATCH(DMI_BOARD_NAME, "PH4PG31"), 1805 }, 1806 .driver_data = &tux_featureset_1_descriptor, 1807 }, 1808 { 1809 .ident = "TUXEDO InfinityBook Pro 16 Gen8 Intel", 1810 .matches = { 1811 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1812 DMI_EXACT_MATCH(DMI_BOARD_NAME, "PH6PG01_PH6PG71"), 1813 }, 1814 .driver_data = &tux_featureset_1_descriptor, 1815 }, 1816 { 1817 .ident = "TUXEDO InfinityBook Pro 14/15 Gen9 AMD", 1818 .matches = { 1819 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1820 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GXxHRXx"), 1821 }, 1822 .driver_data = &empty_descriptor, 1823 }, 1824 { 1825 .ident = "TUXEDO InfinityBook Pro 14/15 Gen9 Intel/Commodore Omnia-Book 15 Gen9", 1826 .matches = { 1827 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1828 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GXxMRXx"), 1829 }, 1830 .driver_data = &empty_descriptor, 1831 }, 1832 { 1833 .ident = "TUXEDO InfinityBook Pro 14/15 Gen10 AMD", 1834 .matches = { 1835 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1836 DMI_EXACT_MATCH(DMI_BOARD_NAME, "XxHP4NAx"), 1837 }, 1838 .driver_data = &empty_descriptor, 1839 }, 1840 { 1841 .ident = "TUXEDO InfinityBook Pro 14/15 Gen10 AMD", 1842 .matches = { 1843 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1844 DMI_EXACT_MATCH(DMI_BOARD_NAME, "XxKK4NAx_XxSP4NAx"), 1845 }, 1846 .driver_data = &empty_descriptor, 1847 }, 1848 { 1849 .ident = "TUXEDO InfinityBook Pro 15 Gen10 Intel", 1850 .matches = { 1851 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1852 DMI_EXACT_MATCH(DMI_BOARD_NAME, "XxAR4NAx"), 1853 }, 1854 .driver_data = &empty_descriptor, 1855 }, 1856 { 1857 .ident = "TUXEDO InfinityBook Max 15 Gen10 AMD", 1858 .matches = { 1859 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1860 DMI_EXACT_MATCH(DMI_BOARD_NAME, "X5KK45xS_X5SP45xS"), 1861 }, 1862 .driver_data = &empty_descriptor, 1863 }, 1864 { 1865 .ident = "TUXEDO InfinityBook Max 16 Gen10 AMD", 1866 .matches = { 1867 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1868 DMI_EXACT_MATCH(DMI_BOARD_NAME, "X6HP45xU"), 1869 }, 1870 .driver_data = &empty_descriptor, 1871 }, 1872 { 1873 .ident = "TUXEDO InfinityBook Max 16 Gen10 AMD", 1874 .matches = { 1875 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1876 DMI_EXACT_MATCH(DMI_BOARD_NAME, "X6KK45xU_X6SP45xU"), 1877 }, 1878 .driver_data = &empty_descriptor, 1879 }, 1880 { 1881 .ident = "TUXEDO InfinityBook Max 15 Gen10 Intel", 1882 .matches = { 1883 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1884 DMI_EXACT_MATCH(DMI_BOARD_NAME, "X5AR45xS"), 1885 }, 1886 .driver_data = &empty_descriptor, 1887 }, 1888 { 1889 .ident = "TUXEDO InfinityBook Max 16 Gen10 Intel", 1890 .matches = { 1891 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1892 DMI_EXACT_MATCH(DMI_BOARD_NAME, "X6AR55xU"), 1893 }, 1894 .driver_data = &empty_descriptor, 1895 }, 1896 { 1897 .ident = "TUXEDO Polaris 15 Gen1 AMD", 1898 .matches = { 1899 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1900 DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1501A1650TI"), 1901 }, 1902 .driver_data = &empty_descriptor, 1903 }, 1904 { 1905 .ident = "TUXEDO Polaris 15 Gen1 AMD", 1906 .matches = { 1907 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1908 DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1501A2060"), 1909 }, 1910 .driver_data = &empty_descriptor, 1911 }, 1912 { 1913 .ident = "TUXEDO Polaris 17 Gen1 AMD", 1914 .matches = { 1915 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1916 DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1701A1650TI"), 1917 }, 1918 .driver_data = &empty_descriptor, 1919 }, 1920 { 1921 .ident = "TUXEDO Polaris 17 Gen1 AMD", 1922 .matches = { 1923 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1924 DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1701A2060"), 1925 }, 1926 .driver_data = &empty_descriptor, 1927 }, 1928 { 1929 .ident = "TUXEDO Polaris 15 Gen1 Intel", 1930 .matches = { 1931 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1932 DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1501I1650TI"), 1933 }, 1934 .driver_data = &empty_descriptor, 1935 }, 1936 { 1937 .ident = "TUXEDO Polaris 15 Gen1 Intel", 1938 .matches = { 1939 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1940 DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1501I2060"), 1941 }, 1942 .driver_data = &empty_descriptor, 1943 }, 1944 { 1945 .ident = "TUXEDO Polaris 17 Gen1 Intel", 1946 .matches = { 1947 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1948 DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1701I1650TI"), 1949 }, 1950 .driver_data = &empty_descriptor, 1951 }, 1952 { 1953 .ident = "TUXEDO Polaris 17 Gen1 Intel", 1954 .matches = { 1955 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1956 DMI_EXACT_MATCH(DMI_BOARD_NAME, "POLARIS1701I2060"), 1957 }, 1958 .driver_data = &empty_descriptor, 1959 }, 1960 { 1961 .ident = "TUXEDO Trinity 15 Intel Gen1", 1962 .matches = { 1963 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1964 DMI_EXACT_MATCH(DMI_BOARD_NAME, "TRINITY1501I"), 1965 }, 1966 .driver_data = &empty_descriptor, 1967 }, 1968 { 1969 .ident = "TUXEDO Trinity 17 Intel Gen1", 1970 .matches = { 1971 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1972 DMI_EXACT_MATCH(DMI_BOARD_NAME, "TRINITY1701I"), 1973 }, 1974 .driver_data = &empty_descriptor, 1975 }, 1976 { 1977 .ident = "TUXEDO Polaris 15/17 Gen2 AMD", 1978 .matches = { 1979 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1980 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxMGxx"), 1981 }, 1982 .driver_data = &tux_featureset_1_descriptor, 1983 }, 1984 { 1985 .ident = "TUXEDO Polaris 15/17 Gen2 Intel", 1986 .matches = { 1987 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1988 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxNGxx"), 1989 }, 1990 .driver_data = &tux_featureset_1_descriptor, 1991 }, 1992 { 1993 .ident = "TUXEDO Stellaris/Polaris 15/17 Gen3 AMD", 1994 .matches = { 1995 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 1996 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxZGxx"), 1997 }, 1998 .driver_data = &tux_featureset_1_descriptor, 1999 }, 2000 { 2001 .ident = "TUXEDO Stellaris/Polaris 15/17 Gen3 Intel", 2002 .matches = { 2003 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2004 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxTGxx"), 2005 }, 2006 .driver_data = &tux_featureset_1_descriptor, 2007 }, 2008 { 2009 .ident = "TUXEDO Stellaris/Polaris 15/17 Gen4 AMD", 2010 .matches = { 2011 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2012 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxRGxx"), 2013 }, 2014 .driver_data = &tux_featureset_1_descriptor, 2015 }, 2016 { 2017 .ident = "TUXEDO Stellaris 15 Gen4 Intel", 2018 .matches = { 2019 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2020 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxAGxx"), 2021 }, 2022 .driver_data = &tux_featureset_1_descriptor, 2023 }, 2024 { 2025 .ident = "TUXEDO Polaris 15/17 Gen5 AMD", 2026 .matches = { 2027 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2028 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxXGxx"), 2029 }, 2030 .driver_data = &tux_featureset_1_descriptor, 2031 }, 2032 { 2033 .ident = "TUXEDO Stellaris 16 Gen5 AMD", 2034 .matches = { 2035 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2036 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GM6XGxX"), 2037 }, 2038 .driver_data = &tux_featureset_1_descriptor, 2039 }, 2040 { 2041 .ident = "TUXEDO Stellaris 16/17 Gen5 Intel/Commodore ORION Gen 5", 2042 .matches = { 2043 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2044 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxPXxx"), 2045 }, 2046 .driver_data = &tux_featureset_1_descriptor, 2047 }, 2048 { 2049 .ident = "TUXEDO Stellaris Slim 15 Gen6 AMD", 2050 .matches = { 2051 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2052 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GMxHGxx"), 2053 }, 2054 .driver_data = &tux_featureset_1_descriptor, 2055 }, 2056 { 2057 .ident = "TUXEDO Stellaris Slim 15 Gen6 Intel/Commodore ORION Slim 15 Gen6", 2058 .matches = { 2059 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2060 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GM5IXxA"), 2061 }, 2062 .driver_data = &tux_featureset_1_descriptor, 2063 }, 2064 { 2065 .ident = "TUXEDO Stellaris 16 Gen6 Intel/Commodore ORION 16 Gen6", 2066 .matches = { 2067 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2068 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GM6IXxB_MB1"), 2069 }, 2070 .driver_data = &tux_featureset_1_descriptor, 2071 }, 2072 { 2073 .ident = "TUXEDO Stellaris 16 Gen6 Intel/Commodore ORION 16 Gen6", 2074 .matches = { 2075 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2076 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GM6IXxB_MB2"), 2077 }, 2078 .driver_data = &tux_featureset_1_descriptor, 2079 }, 2080 { 2081 .ident = "TUXEDO Stellaris 17 Gen6 Intel/Commodore ORION 17 Gen6", 2082 .matches = { 2083 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2084 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GM7IXxN"), 2085 }, 2086 .driver_data = &tux_featureset_1_descriptor, 2087 }, 2088 { 2089 .ident = "TUXEDO Stellaris 16 Gen7 AMD", 2090 .matches = { 2091 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2092 DMI_EXACT_MATCH(DMI_BOARD_NAME, "X6FR5xxY"), 2093 }, 2094 .driver_data = &tux_featureset_1_descriptor, 2095 }, 2096 { 2097 .ident = "TUXEDO Stellaris 16 Gen7 Intel", 2098 .matches = { 2099 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2100 DMI_EXACT_MATCH(DMI_BOARD_NAME, "X6AR5xxY"), 2101 }, 2102 .driver_data = &tux_featureset_1_descriptor, 2103 }, 2104 { 2105 .ident = "TUXEDO Stellaris 16 Gen7 Intel", 2106 .matches = { 2107 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2108 DMI_EXACT_MATCH(DMI_BOARD_NAME, "X6AR5xxY_mLED"), 2109 }, 2110 .driver_data = &tux_featureset_1_descriptor, 2111 }, 2112 { 2113 .ident = "TUXEDO Book BA15 Gen10 AMD", 2114 .matches = { 2115 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2116 DMI_EXACT_MATCH(DMI_BOARD_NAME, "PF5PU1G"), 2117 }, 2118 .driver_data = &empty_descriptor, 2119 }, 2120 { 2121 .ident = "TUXEDO Pulse 14 Gen1 AMD", 2122 .matches = { 2123 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2124 DMI_EXACT_MATCH(DMI_BOARD_NAME, "PULSE1401"), 2125 }, 2126 .driver_data = &empty_descriptor, 2127 }, 2128 { 2129 .ident = "TUXEDO Pulse 15 Gen1 AMD", 2130 .matches = { 2131 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2132 DMI_EXACT_MATCH(DMI_BOARD_NAME, "PULSE1501"), 2133 }, 2134 .driver_data = &empty_descriptor, 2135 }, 2136 { 2137 .ident = "TUXEDO Pulse 15 Gen2 AMD", 2138 .matches = { 2139 DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"), 2140 DMI_EXACT_MATCH(DMI_BOARD_NAME, "PF5LUXG"), 2141 }, 2142 .driver_data = &empty_descriptor, 2143 }, 2144 { } 2145 }; 2146 MODULE_DEVICE_TABLE(dmi, uniwill_dmi_table); 2147 2148 static int __init uniwill_init(void) 2149 { 2150 const struct uniwill_device_descriptor *descriptor; 2151 const struct dmi_system_id *id; 2152 int ret; 2153 2154 id = dmi_first_match(uniwill_dmi_table); 2155 if (!id) { 2156 if (!force) 2157 return -ENODEV; 2158 2159 /* Assume that the device supports all features */ 2160 device_descriptor.features = UINT_MAX; 2161 pr_warn("Loading on a potentially unsupported device\n"); 2162 } else { 2163 /* 2164 * Some devices might support additional features depending on 2165 * the BIOS version/date, so we call this callback to let them 2166 * modify their device descriptor accordingly. 2167 */ 2168 if (id->callback) { 2169 ret = id->callback(id); 2170 if (ret < 0) 2171 return ret; 2172 } 2173 2174 descriptor = id->driver_data; 2175 device_descriptor = *descriptor; 2176 } 2177 2178 ret = platform_driver_register(&uniwill_driver); 2179 if (ret < 0) 2180 return ret; 2181 2182 ret = uniwill_wmi_register_driver(); 2183 if (ret < 0) { 2184 platform_driver_unregister(&uniwill_driver); 2185 return ret; 2186 } 2187 2188 return 0; 2189 } 2190 module_init(uniwill_init); 2191 2192 static void __exit uniwill_exit(void) 2193 { 2194 uniwill_wmi_unregister_driver(); 2195 platform_driver_unregister(&uniwill_driver); 2196 } 2197 module_exit(uniwill_exit); 2198 2199 MODULE_AUTHOR("Armin Wolf <W_Armin@gmx.de>"); 2200 MODULE_DESCRIPTION("Uniwill notebook driver"); 2201 MODULE_LICENSE("GPL"); 2202