1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Driver for the Intel P-Unit Mailbox IPC mechanism 4 * 5 * (C) Copyright 2015 Intel Corporation 6 * 7 * The heart of the P-Unit is the Foxton microcontroller and its firmware, 8 * which provide mailbox interface for power management usage. 9 */ 10 11 #include <linux/bitops.h> 12 #include <linux/delay.h> 13 #include <linux/device.h> 14 #include <linux/interrupt.h> 15 #include <linux/io.h> 16 #include <linux/mod_devicetable.h> 17 #include <linux/module.h> 18 #include <linux/platform_device.h> 19 20 #include <asm/intel_punit_ipc.h> 21 22 /* IPC Mailbox registers */ 23 #define OFFSET_DATA_LOW 0x0 24 #define OFFSET_DATA_HIGH 0x4 25 /* bit field of interface register */ 26 #define CMD_RUN BIT(31) 27 #define CMD_ERRCODE_MASK GENMASK(7, 0) 28 #define CMD_PARA1_SHIFT 8 29 #define CMD_PARA2_SHIFT 16 30 31 #define CMD_TIMEOUT_SECONDS 1 32 33 enum { 34 BASE_DATA = 0, 35 BASE_IFACE, 36 BASE_MAX, 37 }; 38 39 typedef struct { 40 struct device *dev; 41 struct mutex lock; 42 int irq; 43 struct completion cmd_complete; 44 /* base of interface and data registers */ 45 void __iomem *base[RESERVED_IPC][BASE_MAX]; 46 IPC_TYPE type; 47 } IPC_DEV; 48 49 static IPC_DEV *punit_ipcdev; 50 51 static inline u32 ipc_read_status(IPC_DEV *ipcdev, IPC_TYPE type) 52 { 53 return readl(ipcdev->base[type][BASE_IFACE]); 54 } 55 56 static inline void ipc_write_cmd(IPC_DEV *ipcdev, IPC_TYPE type, u32 cmd) 57 { 58 writel(cmd, ipcdev->base[type][BASE_IFACE]); 59 } 60 61 static inline u32 ipc_read_data_low(IPC_DEV *ipcdev, IPC_TYPE type) 62 { 63 return readl(ipcdev->base[type][BASE_DATA] + OFFSET_DATA_LOW); 64 } 65 66 static inline u32 ipc_read_data_high(IPC_DEV *ipcdev, IPC_TYPE type) 67 { 68 return readl(ipcdev->base[type][BASE_DATA] + OFFSET_DATA_HIGH); 69 } 70 71 static inline void ipc_write_data_low(IPC_DEV *ipcdev, IPC_TYPE type, u32 data) 72 { 73 writel(data, ipcdev->base[type][BASE_DATA] + OFFSET_DATA_LOW); 74 } 75 76 static inline void ipc_write_data_high(IPC_DEV *ipcdev, IPC_TYPE type, u32 data) 77 { 78 writel(data, ipcdev->base[type][BASE_DATA] + OFFSET_DATA_HIGH); 79 } 80 81 static const char *ipc_err_string(int error) 82 { 83 if (error == IPC_PUNIT_ERR_SUCCESS) 84 return "no error"; 85 else if (error == IPC_PUNIT_ERR_INVALID_CMD) 86 return "invalid command"; 87 else if (error == IPC_PUNIT_ERR_INVALID_PARAMETER) 88 return "invalid parameter"; 89 else if (error == IPC_PUNIT_ERR_CMD_TIMEOUT) 90 return "command timeout"; 91 else if (error == IPC_PUNIT_ERR_CMD_LOCKED) 92 return "command locked"; 93 else if (error == IPC_PUNIT_ERR_INVALID_VR_ID) 94 return "invalid vr id"; 95 else if (error == IPC_PUNIT_ERR_VR_ERR) 96 return "vr error"; 97 else 98 return "unknown error"; 99 } 100 101 static int intel_punit_ipc_check_status(IPC_DEV *ipcdev, IPC_TYPE type) 102 { 103 int loops = CMD_TIMEOUT_SECONDS * USEC_PER_SEC; 104 int errcode; 105 int status; 106 107 if (ipcdev->irq) { 108 if (!wait_for_completion_timeout(&ipcdev->cmd_complete, 109 CMD_TIMEOUT_SECONDS * HZ)) { 110 dev_err(ipcdev->dev, "IPC timed out\n"); 111 return -ETIMEDOUT; 112 } 113 } else { 114 while ((ipc_read_status(ipcdev, type) & CMD_RUN) && --loops) 115 udelay(1); 116 if (!loops) { 117 dev_err(ipcdev->dev, "IPC timed out\n"); 118 return -ETIMEDOUT; 119 } 120 } 121 122 status = ipc_read_status(ipcdev, type); 123 errcode = status & CMD_ERRCODE_MASK; 124 if (errcode) { 125 dev_err(ipcdev->dev, "IPC failed: %s, IPC_STS=0x%x\n", 126 ipc_err_string(errcode), status); 127 return -EIO; 128 } 129 130 return 0; 131 } 132 133 /** 134 * intel_punit_ipc_command() - IPC command with data and pointers 135 * @cmd: IPC command code. 136 * @para1: First 8bit parameter, set 0 if not used. 137 * @para2: Second 8bit parameter, set 0 if not used. 138 * @in: Input data, 32bit for BIOS cmd, two 32bit for GTD and ISPD. 139 * @out: Output data. 140 * 141 * Send a IPC command to P-Unit with data transaction 142 * 143 * Return: IPC error code or 0 on success. 144 */ 145 int intel_punit_ipc_command(u32 cmd, u32 para1, u32 para2, u32 *in, u32 *out) 146 { 147 IPC_DEV *ipcdev = punit_ipcdev; 148 IPC_TYPE type; 149 u32 val; 150 int ret; 151 152 mutex_lock(&ipcdev->lock); 153 154 reinit_completion(&ipcdev->cmd_complete); 155 type = (cmd & IPC_PUNIT_CMD_TYPE_MASK) >> IPC_TYPE_OFFSET; 156 157 if (in) { 158 ipc_write_data_low(ipcdev, type, *in); 159 if (type == GTDRIVER_IPC || type == ISPDRIVER_IPC) 160 ipc_write_data_high(ipcdev, type, *++in); 161 } 162 163 val = cmd & ~IPC_PUNIT_CMD_TYPE_MASK; 164 val |= CMD_RUN | para2 << CMD_PARA2_SHIFT | para1 << CMD_PARA1_SHIFT; 165 ipc_write_cmd(ipcdev, type, val); 166 167 ret = intel_punit_ipc_check_status(ipcdev, type); 168 if (ret) 169 goto out; 170 171 if (out) { 172 *out = ipc_read_data_low(ipcdev, type); 173 if (type == GTDRIVER_IPC || type == ISPDRIVER_IPC) 174 *++out = ipc_read_data_high(ipcdev, type); 175 } 176 177 out: 178 mutex_unlock(&ipcdev->lock); 179 return ret; 180 } 181 EXPORT_SYMBOL_GPL(intel_punit_ipc_command); 182 183 static irqreturn_t intel_punit_ioc(int irq, void *dev_id) 184 { 185 IPC_DEV *ipcdev = dev_id; 186 187 complete(&ipcdev->cmd_complete); 188 return IRQ_HANDLED; 189 } 190 191 static int intel_punit_get_bars(struct platform_device *pdev) 192 { 193 void __iomem *addr; 194 195 /* 196 * The following resources are required 197 * - BIOS_IPC BASE_DATA 198 * - BIOS_IPC BASE_IFACE 199 */ 200 addr = devm_platform_ioremap_resource(pdev, 0); 201 if (IS_ERR(addr)) 202 return PTR_ERR(addr); 203 punit_ipcdev->base[BIOS_IPC][BASE_DATA] = addr; 204 205 addr = devm_platform_ioremap_resource(pdev, 1); 206 if (IS_ERR(addr)) 207 return PTR_ERR(addr); 208 punit_ipcdev->base[BIOS_IPC][BASE_IFACE] = addr; 209 210 /* 211 * The following resources are optional 212 * - ISPDRIVER_IPC BASE_DATA 213 * - ISPDRIVER_IPC BASE_IFACE 214 * - GTDRIVER_IPC BASE_DATA 215 * - GTDRIVER_IPC BASE_IFACE 216 */ 217 addr = devm_platform_ioremap_resource(pdev, 2); 218 if (!IS_ERR(addr)) 219 punit_ipcdev->base[ISPDRIVER_IPC][BASE_DATA] = addr; 220 221 addr = devm_platform_ioremap_resource(pdev, 3); 222 if (!IS_ERR(addr)) 223 punit_ipcdev->base[ISPDRIVER_IPC][BASE_IFACE] = addr; 224 225 addr = devm_platform_ioremap_resource(pdev, 4); 226 if (!IS_ERR(addr)) 227 punit_ipcdev->base[GTDRIVER_IPC][BASE_DATA] = addr; 228 229 addr = devm_platform_ioremap_resource(pdev, 5); 230 if (!IS_ERR(addr)) 231 punit_ipcdev->base[GTDRIVER_IPC][BASE_IFACE] = addr; 232 233 return 0; 234 } 235 236 static int intel_punit_ipc_probe(struct platform_device *pdev) 237 { 238 int irq, ret; 239 240 punit_ipcdev = devm_kzalloc(&pdev->dev, 241 sizeof(*punit_ipcdev), GFP_KERNEL); 242 if (!punit_ipcdev) 243 return -ENOMEM; 244 245 platform_set_drvdata(pdev, punit_ipcdev); 246 247 irq = platform_get_irq_optional(pdev, 0); 248 if (irq < 0) { 249 dev_warn(&pdev->dev, "Invalid IRQ, using polling mode\n"); 250 } else { 251 ret = devm_request_irq(&pdev->dev, irq, intel_punit_ioc, 252 IRQF_NO_SUSPEND, "intel_punit_ipc", 253 &punit_ipcdev); 254 if (ret) { 255 dev_err(&pdev->dev, "Failed to request irq: %d\n", irq); 256 return ret; 257 } 258 punit_ipcdev->irq = irq; 259 } 260 261 ret = intel_punit_get_bars(pdev); 262 if (ret) 263 return ret; 264 265 punit_ipcdev->dev = &pdev->dev; 266 mutex_init(&punit_ipcdev->lock); 267 init_completion(&punit_ipcdev->cmd_complete); 268 269 return 0; 270 } 271 272 static const struct acpi_device_id punit_ipc_acpi_ids[] = { 273 { "INT34D4", 0 }, 274 { } 275 }; 276 MODULE_DEVICE_TABLE(acpi, punit_ipc_acpi_ids); 277 278 static struct platform_driver intel_punit_ipc_driver = { 279 .probe = intel_punit_ipc_probe, 280 .driver = { 281 .name = "intel_punit_ipc", 282 .acpi_match_table = punit_ipc_acpi_ids, 283 }, 284 }; 285 286 static int __init intel_punit_ipc_init(void) 287 { 288 return platform_driver_register(&intel_punit_ipc_driver); 289 } 290 291 static void __exit intel_punit_ipc_exit(void) 292 { 293 platform_driver_unregister(&intel_punit_ipc_driver); 294 } 295 296 MODULE_AUTHOR("Zha Qipeng <qipeng.zha@intel.com>"); 297 MODULE_DESCRIPTION("Intel P-Unit IPC driver"); 298 MODULE_LICENSE("GPL v2"); 299 300 /* Some modules are dependent on this, so init earlier */ 301 fs_initcall(intel_punit_ipc_init); 302 module_exit(intel_punit_ipc_exit); 303