1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* Copyright(c) 2022 Intel Corporation. */ 3 4 #ifndef _IFS_H_ 5 #define _IFS_H_ 6 7 /** 8 * DOC: In-Field Scan 9 * 10 * ============= 11 * In-Field Scan 12 * ============= 13 * 14 * Introduction 15 * ------------ 16 * 17 * In Field Scan (IFS) is a hardware feature to run circuit level tests on 18 * a CPU core to detect problems that are not caught by parity or ECC checks. 19 * Future CPUs will support more than one type of test which will show up 20 * with a new platform-device instance-id. 21 * 22 * 23 * IFS Image 24 * --------- 25 * 26 * Intel provides a firmware file containing the scan tests via 27 * github [#f1]_. Similar to microcode there is a separate file for each 28 * family-model-stepping. IFS Images are not applicable for some test types. 29 * Wherever applicable the sysfs directory would provide a "current_batch" file 30 * (see below) for loading the image. 31 * 32 * 33 * IFS Image Loading 34 * ----------------- 35 * 36 * The driver loads the tests into memory reserved BIOS local to each CPU 37 * socket in a two step process using writes to MSRs to first load the 38 * SHA hashes for the test. Then the tests themselves. Status MSRs provide 39 * feedback on the success/failure of these steps. 40 * 41 * The test files are kept in a fixed location: /lib/firmware/intel/ifs_<n>/ 42 * For e.g if there are 3 test files, they would be named in the following 43 * fashion: 44 * ff-mm-ss-01.scan 45 * ff-mm-ss-02.scan 46 * ff-mm-ss-03.scan 47 * (where ff refers to family, mm indicates model and ss indicates stepping) 48 * 49 * A different test file can be loaded by writing the numerical portion 50 * (e.g 1, 2 or 3 in the above scenario) into the curent_batch file. 51 * To load ff-mm-ss-02.scan, the following command can be used:: 52 * 53 * # echo 2 > /sys/devices/virtual/misc/intel_ifs_<n>/current_batch 54 * 55 * The above file can also be read to know the currently loaded image. 56 * 57 * Running tests 58 * ------------- 59 * 60 * Tests are run by the driver synchronizing execution of all threads on a 61 * core and then writing to the ACTIVATE_SCAN MSR on all threads. Instruction 62 * execution continues when: 63 * 64 * 1) All tests have completed. 65 * 2) Execution was interrupted. 66 * 3) A test detected a problem. 67 * 68 * Note that ALL THREADS ON THE CORE ARE EFFECTIVELY OFFLINE FOR THE 69 * DURATION OF THE TEST. This can be up to 200 milliseconds. If the system 70 * is running latency sensitive applications that cannot tolerate an 71 * interruption of this magnitude, the system administrator must arrange 72 * to migrate those applications to other cores before running a core test. 73 * It may also be necessary to redirect interrupts to other CPUs. 74 * 75 * In all cases reading the corresponding test's STATUS MSR provides details on what 76 * happened. The driver makes the value of this MSR visible to applications 77 * via the "details" file (see below). Interrupted tests may be restarted. 78 * 79 * The IFS driver provides sysfs interfaces via /sys/devices/virtual/misc/intel_ifs_<n>/ 80 * to control execution: 81 * 82 * Test a specific core:: 83 * 84 * # echo <cpu#> > /sys/devices/virtual/misc/intel_ifs_<n>/run_test 85 * 86 * when HT is enabled any of the sibling cpu# can be specified to test 87 * its corresponding physical core. Since the tests are per physical core, 88 * the result of testing any thread is same. All siblings must be online 89 * to run a core test. It is only necessary to test one thread. 90 * 91 * For e.g. to test core corresponding to cpu5 92 * 93 * # echo 5 > /sys/devices/virtual/misc/intel_ifs_<n>/run_test 94 * 95 * Results of the last test is provided in /sys:: 96 * 97 * $ cat /sys/devices/virtual/misc/intel_ifs_<n>/status 98 * pass 99 * 100 * Status can be one of pass, fail, untested 101 * 102 * Additional details of the last test is provided by the details file:: 103 * 104 * $ cat /sys/devices/virtual/misc/intel_ifs_<n>/details 105 * 0x8081 106 * 107 * The details file reports the hex value of the test specific status MSR. 108 * Hardware defined error codes are documented in volume 4 of the Intel 109 * Software Developer's Manual but the error_code field may contain one of 110 * the following driver defined software codes: 111 * 112 * +------+--------------------+ 113 * | 0xFD | Software timeout | 114 * +------+--------------------+ 115 * | 0xFE | Partial completion | 116 * +------+--------------------+ 117 * 118 * Driver design choices 119 * --------------------- 120 * 121 * 1) The ACTIVATE_SCAN MSR allows for running any consecutive subrange of 122 * available tests. But the driver always tries to run all tests and only 123 * uses the subrange feature to restart an interrupted test. 124 * 125 * 2) Hardware allows for some number of cores to be tested in parallel. 126 * The driver does not make use of this, it only tests one core at a time. 127 * 128 * .. [#f1] https://github.com/intel/TBD 129 */ 130 #include <linux/device.h> 131 #include <linux/miscdevice.h> 132 133 #define MSR_ARRAY_BIST 0x00000105 134 #define MSR_COPY_SCAN_HASHES 0x000002c2 135 #define MSR_SCAN_HASHES_STATUS 0x000002c3 136 #define MSR_AUTHENTICATE_AND_COPY_CHUNK 0x000002c4 137 #define MSR_CHUNKS_AUTHENTICATION_STATUS 0x000002c5 138 #define MSR_ACTIVATE_SCAN 0x000002c6 139 #define MSR_SCAN_STATUS 0x000002c7 140 #define MSR_ARRAY_TRIGGER 0x000002d6 141 #define MSR_ARRAY_STATUS 0x000002d7 142 #define MSR_SAF_CTRL 0x000004f0 143 144 #define SCAN_NOT_TESTED 0 145 #define SCAN_TEST_PASS 1 146 #define SCAN_TEST_FAIL 2 147 148 #define IFS_TYPE_SAF 0 149 #define IFS_TYPE_ARRAY_BIST 1 150 151 #define ARRAY_GEN0 0 152 #define ARRAY_GEN1 1 153 154 /* MSR_SCAN_HASHES_STATUS bit fields */ 155 union ifs_scan_hashes_status { 156 u64 data; 157 struct { 158 u32 chunk_size :16; 159 u32 num_chunks :8; 160 u32 rsvd1 :8; 161 u32 error_code :8; 162 u32 rsvd2 :11; 163 u32 max_core_limit :12; 164 u32 valid :1; 165 }; 166 }; 167 168 union ifs_scan_hashes_status_gen2 { 169 u64 data; 170 struct { 171 u16 chunk_size; 172 u16 num_chunks; 173 u32 error_code :8; 174 u32 chunks_in_stride :9; 175 u32 rsvd :2; 176 u32 max_core_limit :12; 177 u32 valid :1; 178 }; 179 }; 180 181 /* MSR_CHUNKS_AUTH_STATUS bit fields */ 182 union ifs_chunks_auth_status { 183 u64 data; 184 struct { 185 u32 valid_chunks :8; 186 u32 total_chunks :8; 187 u32 rsvd1 :16; 188 u32 error_code :8; 189 u32 rsvd2 :24; 190 }; 191 }; 192 193 union ifs_chunks_auth_status_gen2 { 194 u64 data; 195 struct { 196 u16 valid_chunks; 197 u16 total_chunks; 198 u32 error_code :8; 199 u32 rsvd2 :24; 200 }; 201 }; 202 203 /* MSR_ACTIVATE_SCAN bit fields */ 204 union ifs_scan { 205 u64 data; 206 struct { 207 union { 208 struct { 209 u8 start; 210 u8 stop; 211 u16 rsvd; 212 } gen0; 213 struct { 214 u16 start; 215 u16 stop; 216 } gen2; 217 }; 218 u32 delay :31; 219 u32 sigmce :1; 220 }; 221 }; 222 223 /* MSR_SCAN_STATUS bit fields */ 224 union ifs_status { 225 u64 data; 226 struct { 227 union { 228 struct { 229 u8 chunk_num; 230 u8 chunk_stop_index; 231 u16 rsvd1; 232 } gen0; 233 struct { 234 u16 chunk_num; 235 u16 chunk_stop_index; 236 } gen2; 237 }; 238 u32 error_code :8; 239 u32 rsvd2 :22; 240 u32 control_error :1; 241 u32 signature_error :1; 242 }; 243 }; 244 245 /* MSR_ARRAY_BIST bit fields */ 246 union ifs_array { 247 u64 data; 248 struct { 249 u32 array_bitmask; 250 u16 array_bank; 251 u16 rsvd :15; 252 u16 ctrl_result :1; 253 }; 254 }; 255 256 /* 257 * Driver populated error-codes 258 * 0xFD: Test timed out before completing all the chunks. 259 * 0xFE: not all scan chunks were executed. Maximum forward progress retries exceeded. 260 */ 261 #define IFS_SW_TIMEOUT 0xFD 262 #define IFS_SW_PARTIAL_COMPLETION 0xFE 263 264 struct ifs_test_caps { 265 int integrity_cap_bit; 266 int test_num; 267 }; 268 269 /** 270 * struct ifs_data - attributes related to intel IFS driver 271 * @loaded_version: stores the currently loaded ifs image version. 272 * @loaded: If a valid test binary has been loaded into the memory 273 * @loading_error: Error occurred on another CPU while loading image 274 * @valid_chunks: number of chunks which could be validated. 275 * @status: it holds simple status pass/fail/untested 276 * @scan_details: opaque scan status code from h/w 277 * @cur_batch: number indicating the currently loaded test file 278 * @generation: IFS test generation enumerated by hardware 279 * @chunk_size: size of a test chunk 280 * @array_gen: test generation of array test 281 */ 282 struct ifs_data { 283 int loaded_version; 284 bool loaded; 285 bool loading_error; 286 int valid_chunks; 287 int status; 288 u64 scan_details; 289 u32 cur_batch; 290 u32 generation; 291 u32 chunk_size; 292 u32 array_gen; 293 }; 294 295 struct ifs_work { 296 struct work_struct w; 297 struct device *dev; 298 }; 299 300 struct ifs_device { 301 const struct ifs_test_caps *test_caps; 302 struct ifs_data rw_data; 303 struct miscdevice misc; 304 }; 305 306 static inline struct ifs_data *ifs_get_data(struct device *dev) 307 { 308 struct miscdevice *m = dev_get_drvdata(dev); 309 struct ifs_device *d = container_of(m, struct ifs_device, misc); 310 311 return &d->rw_data; 312 } 313 314 static inline const struct ifs_test_caps *ifs_get_test_caps(struct device *dev) 315 { 316 struct miscdevice *m = dev_get_drvdata(dev); 317 struct ifs_device *d = container_of(m, struct ifs_device, misc); 318 319 return d->test_caps; 320 } 321 322 extern bool *ifs_pkg_auth; 323 int ifs_load_firmware(struct device *dev); 324 int do_core_test(int cpu, struct device *dev); 325 extern struct attribute *plat_ifs_attrs[]; 326 extern struct attribute *plat_ifs_array_attrs[]; 327 328 #endif 329