14c71ae41SShyam Sundar S K // SPDX-License-Identifier: GPL-2.0 24c71ae41SShyam Sundar S K /* 34c71ae41SShyam Sundar S K * AMD Platform Management Framework (PMF) Driver 44c71ae41SShyam Sundar S K * 54c71ae41SShyam Sundar S K * Copyright (c) 2022, Advanced Micro Devices, Inc. 64c71ae41SShyam Sundar S K * All Rights Reserved. 74c71ae41SShyam Sundar S K * 84c71ae41SShyam Sundar S K * Author: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> 94c71ae41SShyam Sundar S K */ 104c71ae41SShyam Sundar S K 114c71ae41SShyam Sundar S K #include "pmf.h" 124c71ae41SShyam Sundar S K 134c71ae41SShyam Sundar S K static struct amd_pmf_static_slider_granular config_store; 144c71ae41SShyam Sundar S K 154c71ae41SShyam Sundar S K static void amd_pmf_load_defaults_sps(struct amd_pmf_dev *dev) 164c71ae41SShyam Sundar S K { 174c71ae41SShyam Sundar S K struct apmf_static_slider_granular_output output; 184c71ae41SShyam Sundar S K int i, j, idx = 0; 194c71ae41SShyam Sundar S K 204c71ae41SShyam Sundar S K memset(&config_store, 0, sizeof(config_store)); 214c71ae41SShyam Sundar S K apmf_get_static_slider_granular(dev, &output); 224c71ae41SShyam Sundar S K 234c71ae41SShyam Sundar S K for (i = 0; i < POWER_SOURCE_MAX; i++) { 244c71ae41SShyam Sundar S K for (j = 0; j < POWER_MODE_MAX; j++) { 254c71ae41SShyam Sundar S K config_store.prop[i][j].spl = output.prop[idx].spl; 264c71ae41SShyam Sundar S K config_store.prop[i][j].sppt = output.prop[idx].sppt; 274c71ae41SShyam Sundar S K config_store.prop[i][j].sppt_apu_only = 284c71ae41SShyam Sundar S K output.prop[idx].sppt_apu_only; 294c71ae41SShyam Sundar S K config_store.prop[i][j].fppt = output.prop[idx].fppt; 304c71ae41SShyam Sundar S K config_store.prop[i][j].stt_min = output.prop[idx].stt_min; 314c71ae41SShyam Sundar S K config_store.prop[i][j].stt_skin_temp[STT_TEMP_APU] = 324c71ae41SShyam Sundar S K output.prop[idx].stt_skin_temp[STT_TEMP_APU]; 334c71ae41SShyam Sundar S K config_store.prop[i][j].stt_skin_temp[STT_TEMP_HS2] = 344c71ae41SShyam Sundar S K output.prop[idx].stt_skin_temp[STT_TEMP_HS2]; 354c71ae41SShyam Sundar S K config_store.prop[i][j].fan_id = output.prop[idx].fan_id; 364c71ae41SShyam Sundar S K idx++; 374c71ae41SShyam Sundar S K } 384c71ae41SShyam Sundar S K } 394c71ae41SShyam Sundar S K } 404c71ae41SShyam Sundar S K 414c71ae41SShyam Sundar S K void amd_pmf_update_slider(struct amd_pmf_dev *dev, bool op, int idx, 424c71ae41SShyam Sundar S K struct amd_pmf_static_slider_granular *table) 434c71ae41SShyam Sundar S K { 444c71ae41SShyam Sundar S K int src = amd_pmf_get_power_source(); 454c71ae41SShyam Sundar S K 464c71ae41SShyam Sundar S K if (op == SLIDER_OP_SET) { 474c71ae41SShyam Sundar S K amd_pmf_send_cmd(dev, SET_SPL, false, config_store.prop[src][idx].spl, NULL); 484c71ae41SShyam Sundar S K amd_pmf_send_cmd(dev, SET_FPPT, false, config_store.prop[src][idx].fppt, NULL); 494c71ae41SShyam Sundar S K amd_pmf_send_cmd(dev, SET_SPPT, false, config_store.prop[src][idx].sppt, NULL); 504c71ae41SShyam Sundar S K amd_pmf_send_cmd(dev, SET_SPPT_APU_ONLY, false, 514c71ae41SShyam Sundar S K config_store.prop[src][idx].sppt_apu_only, NULL); 524c71ae41SShyam Sundar S K amd_pmf_send_cmd(dev, SET_STT_MIN_LIMIT, false, 534c71ae41SShyam Sundar S K config_store.prop[src][idx].stt_min, NULL); 544c71ae41SShyam Sundar S K amd_pmf_send_cmd(dev, SET_STT_LIMIT_APU, false, 554c71ae41SShyam Sundar S K config_store.prop[src][idx].stt_skin_temp[STT_TEMP_APU], NULL); 564c71ae41SShyam Sundar S K amd_pmf_send_cmd(dev, SET_STT_LIMIT_HS2, false, 574c71ae41SShyam Sundar S K config_store.prop[src][idx].stt_skin_temp[STT_TEMP_HS2], NULL); 584c71ae41SShyam Sundar S K } else if (op == SLIDER_OP_GET) { 594c71ae41SShyam Sundar S K amd_pmf_send_cmd(dev, GET_SPL, true, ARG_NONE, &table->prop[src][idx].spl); 604c71ae41SShyam Sundar S K amd_pmf_send_cmd(dev, GET_FPPT, true, ARG_NONE, &table->prop[src][idx].fppt); 614c71ae41SShyam Sundar S K amd_pmf_send_cmd(dev, GET_SPPT, true, ARG_NONE, &table->prop[src][idx].sppt); 624c71ae41SShyam Sundar S K amd_pmf_send_cmd(dev, GET_SPPT_APU_ONLY, true, ARG_NONE, 634c71ae41SShyam Sundar S K &table->prop[src][idx].sppt_apu_only); 644c71ae41SShyam Sundar S K amd_pmf_send_cmd(dev, GET_STT_MIN_LIMIT, true, ARG_NONE, 654c71ae41SShyam Sundar S K &table->prop[src][idx].stt_min); 664c71ae41SShyam Sundar S K amd_pmf_send_cmd(dev, GET_STT_LIMIT_APU, true, ARG_NONE, 674c71ae41SShyam Sundar S K (u32 *)&table->prop[src][idx].stt_skin_temp[STT_TEMP_APU]); 684c71ae41SShyam Sundar S K amd_pmf_send_cmd(dev, GET_STT_LIMIT_HS2, true, ARG_NONE, 694c71ae41SShyam Sundar S K (u32 *)&table->prop[src][idx].stt_skin_temp[STT_TEMP_HS2]); 704c71ae41SShyam Sundar S K } 714c71ae41SShyam Sundar S K } 724c71ae41SShyam Sundar S K 73c5258d39SShyam Sundar S K int amd_pmf_set_sps_power_limits(struct amd_pmf_dev *pmf) 74c5258d39SShyam Sundar S K { 75c5258d39SShyam Sundar S K int mode; 76c5258d39SShyam Sundar S K 77c5258d39SShyam Sundar S K mode = amd_pmf_get_pprof_modes(pmf); 78c5258d39SShyam Sundar S K if (mode < 0) 79c5258d39SShyam Sundar S K return mode; 80c5258d39SShyam Sundar S K 81c5258d39SShyam Sundar S K amd_pmf_update_slider(pmf, SLIDER_OP_SET, mode, NULL); 82c5258d39SShyam Sundar S K 83c5258d39SShyam Sundar S K return 0; 84c5258d39SShyam Sundar S K } 85c5258d39SShyam Sundar S K 8616909aa8SShyam Sundar S K bool is_pprof_balanced(struct amd_pmf_dev *pmf) 8716909aa8SShyam Sundar S K { 8816909aa8SShyam Sundar S K return (pmf->current_profile == PLATFORM_PROFILE_BALANCED) ? true : false; 8916909aa8SShyam Sundar S K } 9016909aa8SShyam Sundar S K 914c71ae41SShyam Sundar S K static int amd_pmf_profile_get(struct platform_profile_handler *pprof, 924c71ae41SShyam Sundar S K enum platform_profile_option *profile) 934c71ae41SShyam Sundar S K { 944c71ae41SShyam Sundar S K struct amd_pmf_dev *pmf = container_of(pprof, struct amd_pmf_dev, pprof); 954c71ae41SShyam Sundar S K 964c71ae41SShyam Sundar S K *profile = pmf->current_profile; 974c71ae41SShyam Sundar S K return 0; 984c71ae41SShyam Sundar S K } 994c71ae41SShyam Sundar S K 100ea522b80SShyam Sundar S K int amd_pmf_get_pprof_modes(struct amd_pmf_dev *pmf) 1014c71ae41SShyam Sundar S K { 102ea522b80SShyam Sundar S K int mode; 1034c71ae41SShyam Sundar S K 1044c71ae41SShyam Sundar S K switch (pmf->current_profile) { 1054c71ae41SShyam Sundar S K case PLATFORM_PROFILE_PERFORMANCE: 1064c71ae41SShyam Sundar S K mode = POWER_MODE_PERFORMANCE; 1074c71ae41SShyam Sundar S K break; 1084c71ae41SShyam Sundar S K case PLATFORM_PROFILE_BALANCED: 1094c71ae41SShyam Sundar S K mode = POWER_MODE_BALANCED_POWER; 1104c71ae41SShyam Sundar S K break; 1114c71ae41SShyam Sundar S K case PLATFORM_PROFILE_LOW_POWER: 1124c71ae41SShyam Sundar S K mode = POWER_MODE_POWER_SAVER; 1134c71ae41SShyam Sundar S K break; 1144c71ae41SShyam Sundar S K default: 1154c71ae41SShyam Sundar S K dev_err(pmf->dev, "Unknown Platform Profile.\n"); 116ea522b80SShyam Sundar S K return -EOPNOTSUPP; 1174c71ae41SShyam Sundar S K } 1184c71ae41SShyam Sundar S K 1194c71ae41SShyam Sundar S K return mode; 1204c71ae41SShyam Sundar S K } 1214c71ae41SShyam Sundar S K 1224c71ae41SShyam Sundar S K static int amd_pmf_profile_set(struct platform_profile_handler *pprof, 1234c71ae41SShyam Sundar S K enum platform_profile_option profile) 1244c71ae41SShyam Sundar S K { 1254c71ae41SShyam Sundar S K struct amd_pmf_dev *pmf = container_of(pprof, struct amd_pmf_dev, pprof); 1264c71ae41SShyam Sundar S K 1274c71ae41SShyam Sundar S K pmf->current_profile = profile; 128ea522b80SShyam Sundar S K 129c5258d39SShyam Sundar S K return amd_pmf_set_sps_power_limits(pmf); 1304c71ae41SShyam Sundar S K } 1314c71ae41SShyam Sundar S K 1324c71ae41SShyam Sundar S K int amd_pmf_init_sps(struct amd_pmf_dev *dev) 1334c71ae41SShyam Sundar S K { 1344c71ae41SShyam Sundar S K int err; 1354c71ae41SShyam Sundar S K 1364c71ae41SShyam Sundar S K dev->current_profile = PLATFORM_PROFILE_BALANCED; 1374c71ae41SShyam Sundar S K amd_pmf_load_defaults_sps(dev); 1384c71ae41SShyam Sundar S K 139*635f79bcSShyam Sundar S K /* update SPS balanced power mode thermals */ 140*635f79bcSShyam Sundar S K amd_pmf_set_sps_power_limits(dev); 141*635f79bcSShyam Sundar S K 1424c71ae41SShyam Sundar S K dev->pprof.profile_get = amd_pmf_profile_get; 1434c71ae41SShyam Sundar S K dev->pprof.profile_set = amd_pmf_profile_set; 1444c71ae41SShyam Sundar S K 1454c71ae41SShyam Sundar S K /* Setup supported modes */ 1464c71ae41SShyam Sundar S K set_bit(PLATFORM_PROFILE_LOW_POWER, dev->pprof.choices); 1474c71ae41SShyam Sundar S K set_bit(PLATFORM_PROFILE_BALANCED, dev->pprof.choices); 1484c71ae41SShyam Sundar S K set_bit(PLATFORM_PROFILE_PERFORMANCE, dev->pprof.choices); 1494c71ae41SShyam Sundar S K 1504c71ae41SShyam Sundar S K /* Create platform_profile structure and register */ 1514c71ae41SShyam Sundar S K err = platform_profile_register(&dev->pprof); 1524c71ae41SShyam Sundar S K if (err) 1534c71ae41SShyam Sundar S K dev_err(dev->dev, "Failed to register SPS support, this is most likely an SBIOS bug: %d\n", 1544c71ae41SShyam Sundar S K err); 1554c71ae41SShyam Sundar S K 1564c71ae41SShyam Sundar S K return err; 1574c71ae41SShyam Sundar S K } 1584c71ae41SShyam Sundar S K 1594c71ae41SShyam Sundar S K void amd_pmf_deinit_sps(struct amd_pmf_dev *dev) 1604c71ae41SShyam Sundar S K { 1614c71ae41SShyam Sundar S K platform_profile_remove(); 1624c71ae41SShyam Sundar S K } 163