1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * AMD HSMP Platform Driver 4 * Copyright (c) 2024, AMD. 5 * All Rights Reserved. 6 * 7 * This file provides platform device implementations. 8 */ 9 10 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 11 12 #include <asm/amd_hsmp.h> 13 14 #include <linux/acpi.h> 15 #include <linux/build_bug.h> 16 #include <linux/device.h> 17 #include <linux/module.h> 18 #include <linux/pci.h> 19 #include <linux/platform_device.h> 20 #include <linux/sysfs.h> 21 22 #include <asm/amd_node.h> 23 24 #include "hsmp.h" 25 26 #define DRIVER_NAME "amd_hsmp" 27 #define DRIVER_VERSION "2.3" 28 29 /* 30 * To access specific HSMP mailbox register, s/w writes the SMN address of HSMP mailbox 31 * register into the SMN_INDEX register, and reads/writes the SMN_DATA reg. 32 * Below are required SMN address for HSMP Mailbox register offsets in SMU address space 33 */ 34 #define SMN_HSMP_BASE 0x3B00000 35 #define SMN_HSMP_MSG_ID 0x0010534 36 #define SMN_HSMP_MSG_ID_F1A_M0H 0x0010934 37 #define SMN_HSMP_MSG_RESP 0x0010980 38 #define SMN_HSMP_MSG_DATA 0x00109E0 39 40 static struct hsmp_plat_device *hsmp_pdev; 41 42 static int amd_hsmp_pci_rdwr(struct hsmp_socket *sock, u32 offset, 43 u32 *value, bool write) 44 { 45 return amd_smn_hsmp_rdwr(sock->sock_ind, sock->mbinfo.base_addr + offset, value, write); 46 } 47 48 static ssize_t hsmp_metric_tbl_plat_read(struct file *filp, struct kobject *kobj, 49 const struct bin_attribute *bin_attr, char *buf, 50 loff_t off, size_t count) 51 { 52 struct hsmp_socket *sock; 53 u16 sock_ind; 54 55 sock_ind = (uintptr_t)bin_attr->private; 56 if (sock_ind >= hsmp_pdev->num_sockets) 57 return -EINVAL; 58 59 sock = &hsmp_pdev->sock[sock_ind]; 60 61 return hsmp_metric_tbl_read(sock, buf, count); 62 } 63 64 static umode_t hsmp_is_sock_attr_visible(struct kobject *kobj, 65 const struct bin_attribute *battr, int id) 66 { 67 u16 sock_ind; 68 69 sock_ind = (uintptr_t)battr->private; 70 71 if (id == 0 && sock_ind >= hsmp_pdev->num_sockets) 72 return SYSFS_GROUP_INVISIBLE; 73 74 if (hsmp_pdev->proto_ver == HSMP_PROTO_VER6) 75 return battr->attr.mode; 76 77 return 0; 78 } 79 80 /* 81 * AMD supports maximum of 8 sockets in a system. 82 * Static array of 8 + 1(for NULL) elements is created below 83 * to create sysfs groups for sockets. 84 * is_bin_visible function is used to show / hide the necessary groups. 85 * 86 * Validate the maximum number against MAX_AMD_NUM_NODES. If this changes, 87 * then the attributes and groups below must be adjusted. 88 */ 89 static_assert(MAX_AMD_NUM_NODES == 8); 90 91 #define HSMP_BIN_ATTR(index, _list) \ 92 static const struct bin_attribute attr##index = { \ 93 .attr = { .name = HSMP_METRICS_TABLE_NAME, .mode = 0444}, \ 94 .private = (void *)index, \ 95 .read_new = hsmp_metric_tbl_plat_read, \ 96 .size = sizeof(struct hsmp_metric_table), \ 97 }; \ 98 static const struct bin_attribute _list[] = { \ 99 &attr##index, \ 100 NULL \ 101 } 102 103 HSMP_BIN_ATTR(0, *sock0_attr_list); 104 HSMP_BIN_ATTR(1, *sock1_attr_list); 105 HSMP_BIN_ATTR(2, *sock2_attr_list); 106 HSMP_BIN_ATTR(3, *sock3_attr_list); 107 HSMP_BIN_ATTR(4, *sock4_attr_list); 108 HSMP_BIN_ATTR(5, *sock5_attr_list); 109 HSMP_BIN_ATTR(6, *sock6_attr_list); 110 HSMP_BIN_ATTR(7, *sock7_attr_list); 111 112 #define HSMP_BIN_ATTR_GRP(index, _list, _name) \ 113 static const struct attribute_group sock##index##_attr_grp = { \ 114 .bin_attrs_new = _list, \ 115 .is_bin_visible = hsmp_is_sock_attr_visible, \ 116 .name = #_name, \ 117 } 118 119 HSMP_BIN_ATTR_GRP(0, sock0_attr_list, socket0); 120 HSMP_BIN_ATTR_GRP(1, sock1_attr_list, socket1); 121 HSMP_BIN_ATTR_GRP(2, sock2_attr_list, socket2); 122 HSMP_BIN_ATTR_GRP(3, sock3_attr_list, socket3); 123 HSMP_BIN_ATTR_GRP(4, sock4_attr_list, socket4); 124 HSMP_BIN_ATTR_GRP(5, sock5_attr_list, socket5); 125 HSMP_BIN_ATTR_GRP(6, sock6_attr_list, socket6); 126 HSMP_BIN_ATTR_GRP(7, sock7_attr_list, socket7); 127 128 static const struct attribute_group *hsmp_groups[] = { 129 &sock0_attr_grp, 130 &sock1_attr_grp, 131 &sock2_attr_grp, 132 &sock3_attr_grp, 133 &sock4_attr_grp, 134 &sock5_attr_grp, 135 &sock6_attr_grp, 136 &sock7_attr_grp, 137 NULL 138 }; 139 140 static inline bool is_f1a_m0h(void) 141 { 142 if (boot_cpu_data.x86 == 0x1A && boot_cpu_data.x86_model <= 0x0F) 143 return true; 144 145 return false; 146 } 147 148 static int init_platform_device(struct device *dev) 149 { 150 struct hsmp_socket *sock; 151 int ret, i; 152 153 for (i = 0; i < hsmp_pdev->num_sockets; i++) { 154 sock = &hsmp_pdev->sock[i]; 155 sock->sock_ind = i; 156 sock->dev = dev; 157 sock->mbinfo.base_addr = SMN_HSMP_BASE; 158 sock->amd_hsmp_rdwr = amd_hsmp_pci_rdwr; 159 160 /* 161 * This is a transitional change from non-ACPI to ACPI, only 162 * family 0x1A, model 0x00 platform is supported for both ACPI and non-ACPI. 163 */ 164 if (is_f1a_m0h()) 165 sock->mbinfo.msg_id_off = SMN_HSMP_MSG_ID_F1A_M0H; 166 else 167 sock->mbinfo.msg_id_off = SMN_HSMP_MSG_ID; 168 169 sock->mbinfo.msg_resp_off = SMN_HSMP_MSG_RESP; 170 sock->mbinfo.msg_arg_off = SMN_HSMP_MSG_DATA; 171 sema_init(&sock->hsmp_sem, 1); 172 173 /* Test the hsmp interface on each socket */ 174 ret = hsmp_test(i, 0xDEADBEEF); 175 if (ret) { 176 dev_err(dev, "HSMP test message failed on Fam:%x model:%x\n", 177 boot_cpu_data.x86, boot_cpu_data.x86_model); 178 dev_err(dev, "Is HSMP disabled in BIOS ?\n"); 179 return ret; 180 } 181 182 ret = hsmp_cache_proto_ver(i); 183 if (ret) { 184 dev_err(dev, "Failed to read HSMP protocol version\n"); 185 return ret; 186 } 187 188 if (hsmp_pdev->proto_ver == HSMP_PROTO_VER6) { 189 ret = hsmp_get_tbl_dram_base(i); 190 if (ret) 191 dev_err(dev, "Failed to init metric table\n"); 192 } 193 } 194 195 return 0; 196 } 197 198 static int hsmp_pltdrv_probe(struct platform_device *pdev) 199 { 200 int ret; 201 202 hsmp_pdev->sock = devm_kcalloc(&pdev->dev, hsmp_pdev->num_sockets, 203 sizeof(*hsmp_pdev->sock), 204 GFP_KERNEL); 205 if (!hsmp_pdev->sock) 206 return -ENOMEM; 207 208 ret = init_platform_device(&pdev->dev); 209 if (ret) { 210 dev_err(&pdev->dev, "Failed to init HSMP mailbox\n"); 211 return ret; 212 } 213 214 return hsmp_misc_register(&pdev->dev); 215 } 216 217 static void hsmp_pltdrv_remove(struct platform_device *pdev) 218 { 219 hsmp_misc_deregister(); 220 } 221 222 static struct platform_driver amd_hsmp_driver = { 223 .probe = hsmp_pltdrv_probe, 224 .remove = hsmp_pltdrv_remove, 225 .driver = { 226 .name = DRIVER_NAME, 227 .dev_groups = hsmp_groups, 228 }, 229 }; 230 231 static struct platform_device *amd_hsmp_platdev; 232 233 static int hsmp_plat_dev_register(void) 234 { 235 int ret; 236 237 amd_hsmp_platdev = platform_device_alloc(DRIVER_NAME, PLATFORM_DEVID_NONE); 238 if (!amd_hsmp_platdev) 239 return -ENOMEM; 240 241 ret = platform_device_add(amd_hsmp_platdev); 242 if (ret) 243 platform_device_put(amd_hsmp_platdev); 244 245 return ret; 246 } 247 248 /* 249 * This check is only needed for backward compatibility of previous platforms. 250 * All new platforms are expected to support ACPI based probing. 251 */ 252 static bool legacy_hsmp_support(void) 253 { 254 if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) 255 return false; 256 257 switch (boot_cpu_data.x86) { 258 case 0x19: 259 switch (boot_cpu_data.x86_model) { 260 case 0x00 ... 0x1F: 261 case 0x30 ... 0x3F: 262 case 0x90 ... 0x9F: 263 case 0xA0 ... 0xAF: 264 return true; 265 default: 266 return false; 267 } 268 case 0x1A: 269 switch (boot_cpu_data.x86_model) { 270 case 0x00 ... 0x0F: 271 return true; 272 default: 273 return false; 274 } 275 default: 276 return false; 277 } 278 279 return false; 280 } 281 282 static int __init hsmp_plt_init(void) 283 { 284 int ret = -ENODEV; 285 286 if (!legacy_hsmp_support()) { 287 pr_info("HSMP is not supported on Family:%x model:%x\n", 288 boot_cpu_data.x86, boot_cpu_data.x86_model); 289 return ret; 290 } 291 292 if (acpi_dev_present(ACPI_HSMP_DEVICE_HID, NULL, -1)) 293 return -ENODEV; 294 295 hsmp_pdev = get_hsmp_pdev(); 296 if (!hsmp_pdev) 297 return -ENOMEM; 298 299 /* 300 * amd_num_nodes() returns number of SMN/DF interfaces present in the system 301 * if we have N SMN/DF interfaces that ideally means N sockets 302 */ 303 hsmp_pdev->num_sockets = amd_num_nodes(); 304 if (hsmp_pdev->num_sockets == 0 || hsmp_pdev->num_sockets > MAX_AMD_NUM_NODES) 305 return ret; 306 307 ret = platform_driver_register(&amd_hsmp_driver); 308 if (ret) 309 return ret; 310 311 ret = hsmp_plat_dev_register(); 312 if (ret) 313 platform_driver_unregister(&amd_hsmp_driver); 314 315 return ret; 316 } 317 318 static void __exit hsmp_plt_exit(void) 319 { 320 platform_device_unregister(amd_hsmp_platdev); 321 platform_driver_unregister(&amd_hsmp_driver); 322 } 323 324 device_initcall(hsmp_plt_init); 325 module_exit(hsmp_plt_exit); 326 327 MODULE_IMPORT_NS("AMD_HSMP"); 328 MODULE_DESCRIPTION("AMD HSMP Platform Interface Driver"); 329 MODULE_VERSION(DRIVER_VERSION); 330 MODULE_LICENSE("GPL"); 331