1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * AMD HSMP Platform Driver 4 * Copyright (c) 2022, AMD. 5 * All Rights Reserved. 6 * 7 * This file provides a device implementation for HSMP interface 8 */ 9 10 #include <asm/amd_hsmp.h> 11 #include <asm/amd_nb.h> 12 13 #include <linux/acpi.h> 14 #include <linux/delay.h> 15 #include <linux/device.h> 16 #include <linux/semaphore.h> 17 #include <linux/sysfs.h> 18 19 #include "hsmp.h" 20 21 /* HSMP Status / Error codes */ 22 #define HSMP_STATUS_NOT_READY 0x00 23 #define HSMP_STATUS_OK 0x01 24 #define HSMP_ERR_INVALID_MSG 0xFE 25 #define HSMP_ERR_INVALID_INPUT 0xFF 26 #define HSMP_ERR_PREREQ_NOT_SATISFIED 0xFD 27 #define HSMP_ERR_SMU_BUSY 0xFC 28 29 /* Timeout in millsec */ 30 #define HSMP_MSG_TIMEOUT 100 31 #define HSMP_SHORT_SLEEP 1 32 33 #define HSMP_WR true 34 #define HSMP_RD false 35 36 #define DRIVER_VERSION "2.3" 37 38 static struct hsmp_plat_device hsmp_pdev; 39 40 /* 41 * Send a message to the HSMP port via PCI-e config space registers 42 * or by writing to MMIO space. 43 * 44 * The caller is expected to zero out any unused arguments. 45 * If a response is expected, the number of response words should be greater than 0. 46 * 47 * Returns 0 for success and populates the requested number of arguments. 48 * Returns a negative error code for failure. 49 */ 50 static int __hsmp_send_message(struct hsmp_socket *sock, struct hsmp_message *msg) 51 { 52 struct hsmp_mbaddr_info *mbinfo; 53 unsigned long timeout, short_sleep; 54 u32 mbox_status; 55 u32 index; 56 int ret; 57 58 mbinfo = &sock->mbinfo; 59 60 /* Clear the status register */ 61 mbox_status = HSMP_STATUS_NOT_READY; 62 ret = sock->amd_hsmp_rdwr(sock, mbinfo->msg_resp_off, &mbox_status, HSMP_WR); 63 if (ret) { 64 dev_err(sock->dev, "Error %d clearing mailbox status register\n", ret); 65 return ret; 66 } 67 68 index = 0; 69 /* Write any message arguments */ 70 while (index < msg->num_args) { 71 ret = sock->amd_hsmp_rdwr(sock, mbinfo->msg_arg_off + (index << 2), 72 &msg->args[index], HSMP_WR); 73 if (ret) { 74 dev_err(sock->dev, "Error %d writing message argument %d\n", ret, index); 75 return ret; 76 } 77 index++; 78 } 79 80 /* Write the message ID which starts the operation */ 81 ret = sock->amd_hsmp_rdwr(sock, mbinfo->msg_id_off, &msg->msg_id, HSMP_WR); 82 if (ret) { 83 dev_err(sock->dev, "Error %d writing message ID %u\n", ret, msg->msg_id); 84 return ret; 85 } 86 87 /* 88 * Depending on when the trigger write completes relative to the SMU 89 * firmware 1 ms cycle, the operation may take from tens of us to 1 ms 90 * to complete. Some operations may take more. Therefore we will try 91 * a few short duration sleeps and switch to long sleeps if we don't 92 * succeed quickly. 93 */ 94 short_sleep = jiffies + msecs_to_jiffies(HSMP_SHORT_SLEEP); 95 timeout = jiffies + msecs_to_jiffies(HSMP_MSG_TIMEOUT); 96 97 while (time_before(jiffies, timeout)) { 98 ret = sock->amd_hsmp_rdwr(sock, mbinfo->msg_resp_off, &mbox_status, HSMP_RD); 99 if (ret) { 100 dev_err(sock->dev, "Error %d reading mailbox status\n", ret); 101 return ret; 102 } 103 104 if (mbox_status != HSMP_STATUS_NOT_READY) 105 break; 106 if (time_before(jiffies, short_sleep)) 107 usleep_range(50, 100); 108 else 109 usleep_range(1000, 2000); 110 } 111 112 if (unlikely(mbox_status == HSMP_STATUS_NOT_READY)) { 113 dev_err(sock->dev, "Message ID 0x%X failure : SMU tmeout (status = 0x%X)\n", 114 msg->msg_id, mbox_status); 115 return -ETIMEDOUT; 116 } else if (unlikely(mbox_status == HSMP_ERR_INVALID_MSG)) { 117 dev_err(sock->dev, "Message ID 0x%X failure : Invalid message (status = 0x%X)\n", 118 msg->msg_id, mbox_status); 119 return -ENOMSG; 120 } else if (unlikely(mbox_status == HSMP_ERR_INVALID_INPUT)) { 121 dev_err(sock->dev, "Message ID 0x%X failure : Invalid arguments (status = 0x%X)\n", 122 msg->msg_id, mbox_status); 123 return -EINVAL; 124 } else if (unlikely(mbox_status == HSMP_ERR_PREREQ_NOT_SATISFIED)) { 125 dev_err(sock->dev, "Message ID 0x%X failure : Prerequisite not satisfied (status = 0x%X)\n", 126 msg->msg_id, mbox_status); 127 return -EREMOTEIO; 128 } else if (unlikely(mbox_status == HSMP_ERR_SMU_BUSY)) { 129 dev_err(sock->dev, "Message ID 0x%X failure : SMU BUSY (status = 0x%X)\n", 130 msg->msg_id, mbox_status); 131 return -EBUSY; 132 } else if (unlikely(mbox_status != HSMP_STATUS_OK)) { 133 dev_err(sock->dev, "Message ID 0x%X unknown failure (status = 0x%X)\n", 134 msg->msg_id, mbox_status); 135 return -EIO; 136 } 137 138 /* 139 * SMU has responded OK. Read response data. 140 * SMU reads the input arguments from eight 32 bit registers starting 141 * from SMN_HSMP_MSG_DATA and writes the response data to the same 142 * SMN_HSMP_MSG_DATA address. 143 * We copy the response data if any, back to the args[]. 144 */ 145 index = 0; 146 while (index < msg->response_sz) { 147 ret = sock->amd_hsmp_rdwr(sock, mbinfo->msg_arg_off + (index << 2), 148 &msg->args[index], HSMP_RD); 149 if (ret) { 150 dev_err(sock->dev, "Error %d reading response %u for message ID:%u\n", 151 ret, index, msg->msg_id); 152 break; 153 } 154 index++; 155 } 156 157 return ret; 158 } 159 160 static int validate_message(struct hsmp_message *msg) 161 { 162 /* msg_id against valid range of message IDs */ 163 if (msg->msg_id < HSMP_TEST || msg->msg_id >= HSMP_MSG_ID_MAX) 164 return -ENOMSG; 165 166 /* msg_id is a reserved message ID */ 167 if (hsmp_msg_desc_table[msg->msg_id].type == HSMP_RSVD) 168 return -ENOMSG; 169 170 /* num_args and response_sz against the HSMP spec */ 171 if (msg->num_args != hsmp_msg_desc_table[msg->msg_id].num_args || 172 msg->response_sz != hsmp_msg_desc_table[msg->msg_id].response_sz) 173 return -EINVAL; 174 175 return 0; 176 } 177 178 int hsmp_send_message(struct hsmp_message *msg) 179 { 180 struct hsmp_socket *sock; 181 int ret; 182 183 if (!msg) 184 return -EINVAL; 185 ret = validate_message(msg); 186 if (ret) 187 return ret; 188 189 if (!hsmp_pdev.sock || msg->sock_ind >= hsmp_pdev.num_sockets) 190 return -ENODEV; 191 sock = &hsmp_pdev.sock[msg->sock_ind]; 192 193 /* 194 * The time taken by smu operation to complete is between 195 * 10us to 1ms. Sometime it may take more time. 196 * In SMP system timeout of 100 millisecs should 197 * be enough for the previous thread to finish the operation 198 */ 199 ret = down_timeout(&sock->hsmp_sem, msecs_to_jiffies(HSMP_MSG_TIMEOUT)); 200 if (ret < 0) 201 return ret; 202 203 ret = __hsmp_send_message(sock, msg); 204 205 up(&sock->hsmp_sem); 206 207 return ret; 208 } 209 EXPORT_SYMBOL_NS_GPL(hsmp_send_message, AMD_HSMP); 210 211 int hsmp_test(u16 sock_ind, u32 value) 212 { 213 struct hsmp_message msg = { 0 }; 214 int ret; 215 216 /* 217 * Test the hsmp port by performing TEST command. The test message 218 * takes one argument and returns the value of that argument + 1. 219 */ 220 msg.msg_id = HSMP_TEST; 221 msg.num_args = 1; 222 msg.response_sz = 1; 223 msg.args[0] = value; 224 msg.sock_ind = sock_ind; 225 226 ret = hsmp_send_message(&msg); 227 if (ret) 228 return ret; 229 230 /* Check the response value */ 231 if (msg.args[0] != (value + 1)) { 232 dev_err(hsmp_pdev.sock[sock_ind].dev, 233 "Socket %d test message failed, Expected 0x%08X, received 0x%08X\n", 234 sock_ind, (value + 1), msg.args[0]); 235 return -EBADE; 236 } 237 238 return ret; 239 } 240 EXPORT_SYMBOL_NS_GPL(hsmp_test, AMD_HSMP); 241 242 long hsmp_ioctl(struct file *fp, unsigned int cmd, unsigned long arg) 243 { 244 int __user *arguser = (int __user *)arg; 245 struct hsmp_message msg = { 0 }; 246 int ret; 247 248 if (copy_struct_from_user(&msg, sizeof(msg), arguser, sizeof(struct hsmp_message))) 249 return -EFAULT; 250 251 /* 252 * Check msg_id is within the range of supported msg ids 253 * i.e within the array bounds of hsmp_msg_desc_table 254 */ 255 if (msg.msg_id < HSMP_TEST || msg.msg_id >= HSMP_MSG_ID_MAX) 256 return -ENOMSG; 257 258 switch (fp->f_mode & (FMODE_WRITE | FMODE_READ)) { 259 case FMODE_WRITE: 260 /* 261 * Device is opened in O_WRONLY mode 262 * Execute only set/configure commands 263 */ 264 if (hsmp_msg_desc_table[msg.msg_id].type != HSMP_SET) 265 return -EPERM; 266 break; 267 case FMODE_READ: 268 /* 269 * Device is opened in O_RDONLY mode 270 * Execute only get/monitor commands 271 */ 272 if (hsmp_msg_desc_table[msg.msg_id].type != HSMP_GET) 273 return -EPERM; 274 break; 275 case FMODE_READ | FMODE_WRITE: 276 /* 277 * Device is opened in O_RDWR mode 278 * Execute both get/monitor and set/configure commands 279 */ 280 break; 281 default: 282 return -EPERM; 283 } 284 285 ret = hsmp_send_message(&msg); 286 if (ret) 287 return ret; 288 289 if (hsmp_msg_desc_table[msg.msg_id].response_sz > 0) { 290 /* Copy results back to user for get/monitor commands */ 291 if (copy_to_user(arguser, &msg, sizeof(struct hsmp_message))) 292 return -EFAULT; 293 } 294 295 return 0; 296 } 297 298 ssize_t hsmp_metric_tbl_read(struct hsmp_socket *sock, char *buf, size_t size) 299 { 300 struct hsmp_message msg = { 0 }; 301 int ret; 302 303 if (!sock || !buf) 304 return -EINVAL; 305 306 /* Do not support lseek(), also don't allow more than the size of metric table */ 307 if (size != sizeof(struct hsmp_metric_table)) { 308 dev_err(sock->dev, "Wrong buffer size\n"); 309 return -EINVAL; 310 } 311 312 msg.msg_id = HSMP_GET_METRIC_TABLE; 313 msg.sock_ind = sock->sock_ind; 314 315 ret = hsmp_send_message(&msg); 316 if (ret) 317 return ret; 318 memcpy_fromio(buf, sock->metric_tbl_addr, size); 319 320 return size; 321 } 322 EXPORT_SYMBOL_NS_GPL(hsmp_metric_tbl_read, AMD_HSMP); 323 324 int hsmp_get_tbl_dram_base(u16 sock_ind) 325 { 326 struct hsmp_socket *sock = &hsmp_pdev.sock[sock_ind]; 327 struct hsmp_message msg = { 0 }; 328 phys_addr_t dram_addr; 329 int ret; 330 331 msg.sock_ind = sock_ind; 332 msg.response_sz = hsmp_msg_desc_table[HSMP_GET_METRIC_TABLE_DRAM_ADDR].response_sz; 333 msg.msg_id = HSMP_GET_METRIC_TABLE_DRAM_ADDR; 334 335 ret = hsmp_send_message(&msg); 336 if (ret) 337 return ret; 338 339 /* 340 * calculate the metric table DRAM address from lower and upper 32 bits 341 * sent from SMU and ioremap it to virtual address. 342 */ 343 dram_addr = msg.args[0] | ((u64)(msg.args[1]) << 32); 344 if (!dram_addr) { 345 dev_err(sock->dev, "Invalid DRAM address for metric table\n"); 346 return -ENOMEM; 347 } 348 sock->metric_tbl_addr = devm_ioremap(sock->dev, dram_addr, 349 sizeof(struct hsmp_metric_table)); 350 if (!sock->metric_tbl_addr) { 351 dev_err(sock->dev, "Failed to ioremap metric table addr\n"); 352 return -ENOMEM; 353 } 354 return 0; 355 } 356 EXPORT_SYMBOL_NS_GPL(hsmp_get_tbl_dram_base, AMD_HSMP); 357 358 int hsmp_cache_proto_ver(u16 sock_ind) 359 { 360 struct hsmp_message msg = { 0 }; 361 int ret; 362 363 msg.msg_id = HSMP_GET_PROTO_VER; 364 msg.sock_ind = sock_ind; 365 msg.response_sz = hsmp_msg_desc_table[HSMP_GET_PROTO_VER].response_sz; 366 367 ret = hsmp_send_message(&msg); 368 if (!ret) 369 hsmp_pdev.proto_ver = msg.args[0]; 370 371 return ret; 372 } 373 EXPORT_SYMBOL_NS_GPL(hsmp_cache_proto_ver, AMD_HSMP); 374 375 static const struct file_operations hsmp_fops = { 376 .owner = THIS_MODULE, 377 .unlocked_ioctl = hsmp_ioctl, 378 .compat_ioctl = hsmp_ioctl, 379 }; 380 381 int hsmp_misc_register(struct device *dev) 382 { 383 hsmp_pdev.mdev.name = HSMP_CDEV_NAME; 384 hsmp_pdev.mdev.minor = MISC_DYNAMIC_MINOR; 385 hsmp_pdev.mdev.fops = &hsmp_fops; 386 hsmp_pdev.mdev.parent = dev; 387 hsmp_pdev.mdev.nodename = HSMP_DEVNODE_NAME; 388 hsmp_pdev.mdev.mode = 0644; 389 390 return misc_register(&hsmp_pdev.mdev); 391 } 392 EXPORT_SYMBOL_NS_GPL(hsmp_misc_register, AMD_HSMP); 393 394 void hsmp_misc_deregister(void) 395 { 396 misc_deregister(&hsmp_pdev.mdev); 397 } 398 EXPORT_SYMBOL_NS_GPL(hsmp_misc_deregister, AMD_HSMP); 399 400 struct hsmp_plat_device *get_hsmp_pdev(void) 401 { 402 return &hsmp_pdev; 403 } 404 EXPORT_SYMBOL_NS_GPL(get_hsmp_pdev, AMD_HSMP); 405 406 MODULE_DESCRIPTION("AMD HSMP Common driver"); 407 MODULE_VERSION(DRIVER_VERSION); 408 MODULE_LICENSE("GPL"); 409