1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * AMD HSMP Platform Driver 4 * Copyright (c) 2022, AMD. 5 * All Rights Reserved. 6 * 7 * This file provides a device implementation for HSMP interface 8 */ 9 10 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 11 12 #include <asm/amd_hsmp.h> 13 #include <asm/amd_nb.h> 14 15 #include <linux/acpi.h> 16 #include <linux/delay.h> 17 #include <linux/device.h> 18 #include <linux/semaphore.h> 19 #include <linux/sysfs.h> 20 21 #include "hsmp.h" 22 23 /* HSMP Status / Error codes */ 24 #define HSMP_STATUS_NOT_READY 0x00 25 #define HSMP_STATUS_OK 0x01 26 #define HSMP_ERR_INVALID_MSG 0xFE 27 #define HSMP_ERR_INVALID_INPUT 0xFF 28 29 /* Timeout in millsec */ 30 #define HSMP_MSG_TIMEOUT 100 31 #define HSMP_SHORT_SLEEP 1 32 33 #define HSMP_WR true 34 #define HSMP_RD false 35 36 #define DRIVER_VERSION "2.3" 37 38 struct hsmp_plat_device hsmp_pdev; 39 EXPORT_SYMBOL_GPL(hsmp_pdev); 40 41 /* 42 * Send a message to the HSMP port via PCI-e config space registers 43 * or by writing to MMIO space. 44 * 45 * The caller is expected to zero out any unused arguments. 46 * If a response is expected, the number of response words should be greater than 0. 47 * 48 * Returns 0 for success and populates the requested number of arguments. 49 * Returns a negative error code for failure. 50 */ 51 static int __hsmp_send_message(struct hsmp_socket *sock, struct hsmp_message *msg) 52 { 53 struct hsmp_mbaddr_info *mbinfo; 54 unsigned long timeout, short_sleep; 55 u32 mbox_status; 56 u32 index; 57 int ret; 58 59 mbinfo = &sock->mbinfo; 60 61 /* Clear the status register */ 62 mbox_status = HSMP_STATUS_NOT_READY; 63 ret = sock->amd_hsmp_rdwr(sock, mbinfo->msg_resp_off, &mbox_status, HSMP_WR); 64 if (ret) { 65 pr_err("Error %d clearing mailbox status register\n", ret); 66 return ret; 67 } 68 69 index = 0; 70 /* Write any message arguments */ 71 while (index < msg->num_args) { 72 ret = sock->amd_hsmp_rdwr(sock, mbinfo->msg_arg_off + (index << 2), 73 &msg->args[index], HSMP_WR); 74 if (ret) { 75 pr_err("Error %d writing message argument %d\n", ret, index); 76 return ret; 77 } 78 index++; 79 } 80 81 /* Write the message ID which starts the operation */ 82 ret = sock->amd_hsmp_rdwr(sock, mbinfo->msg_id_off, &msg->msg_id, HSMP_WR); 83 if (ret) { 84 pr_err("Error %d writing message ID %u\n", ret, msg->msg_id); 85 return ret; 86 } 87 88 /* 89 * Depending on when the trigger write completes relative to the SMU 90 * firmware 1 ms cycle, the operation may take from tens of us to 1 ms 91 * to complete. Some operations may take more. Therefore we will try 92 * a few short duration sleeps and switch to long sleeps if we don't 93 * succeed quickly. 94 */ 95 short_sleep = jiffies + msecs_to_jiffies(HSMP_SHORT_SLEEP); 96 timeout = jiffies + msecs_to_jiffies(HSMP_MSG_TIMEOUT); 97 98 while (time_before(jiffies, timeout)) { 99 ret = sock->amd_hsmp_rdwr(sock, mbinfo->msg_resp_off, &mbox_status, HSMP_RD); 100 if (ret) { 101 pr_err("Error %d reading mailbox status\n", ret); 102 return ret; 103 } 104 105 if (mbox_status != HSMP_STATUS_NOT_READY) 106 break; 107 if (time_before(jiffies, short_sleep)) 108 usleep_range(50, 100); 109 else 110 usleep_range(1000, 2000); 111 } 112 113 if (unlikely(mbox_status == HSMP_STATUS_NOT_READY)) { 114 return -ETIMEDOUT; 115 } else if (unlikely(mbox_status == HSMP_ERR_INVALID_MSG)) { 116 return -ENOMSG; 117 } else if (unlikely(mbox_status == HSMP_ERR_INVALID_INPUT)) { 118 return -EINVAL; 119 } else if (unlikely(mbox_status != HSMP_STATUS_OK)) { 120 pr_err("Message ID %u unknown failure (status = 0x%X)\n", 121 msg->msg_id, mbox_status); 122 return -EIO; 123 } 124 125 /* 126 * SMU has responded OK. Read response data. 127 * SMU reads the input arguments from eight 32 bit registers starting 128 * from SMN_HSMP_MSG_DATA and writes the response data to the same 129 * SMN_HSMP_MSG_DATA address. 130 * We copy the response data if any, back to the args[]. 131 */ 132 index = 0; 133 while (index < msg->response_sz) { 134 ret = sock->amd_hsmp_rdwr(sock, mbinfo->msg_arg_off + (index << 2), 135 &msg->args[index], HSMP_RD); 136 if (ret) { 137 pr_err("Error %d reading response %u for message ID:%u\n", 138 ret, index, msg->msg_id); 139 break; 140 } 141 index++; 142 } 143 144 return ret; 145 } 146 147 static int validate_message(struct hsmp_message *msg) 148 { 149 /* msg_id against valid range of message IDs */ 150 if (msg->msg_id < HSMP_TEST || msg->msg_id >= HSMP_MSG_ID_MAX) 151 return -ENOMSG; 152 153 /* msg_id is a reserved message ID */ 154 if (hsmp_msg_desc_table[msg->msg_id].type == HSMP_RSVD) 155 return -ENOMSG; 156 157 /* num_args and response_sz against the HSMP spec */ 158 if (msg->num_args != hsmp_msg_desc_table[msg->msg_id].num_args || 159 msg->response_sz != hsmp_msg_desc_table[msg->msg_id].response_sz) 160 return -EINVAL; 161 162 return 0; 163 } 164 165 int hsmp_send_message(struct hsmp_message *msg) 166 { 167 struct hsmp_socket *sock; 168 int ret; 169 170 if (!msg) 171 return -EINVAL; 172 ret = validate_message(msg); 173 if (ret) 174 return ret; 175 176 if (!hsmp_pdev.sock || msg->sock_ind >= hsmp_pdev.num_sockets) 177 return -ENODEV; 178 sock = &hsmp_pdev.sock[msg->sock_ind]; 179 180 /* 181 * The time taken by smu operation to complete is between 182 * 10us to 1ms. Sometime it may take more time. 183 * In SMP system timeout of 100 millisecs should 184 * be enough for the previous thread to finish the operation 185 */ 186 ret = down_timeout(&sock->hsmp_sem, msecs_to_jiffies(HSMP_MSG_TIMEOUT)); 187 if (ret < 0) 188 return ret; 189 190 ret = __hsmp_send_message(sock, msg); 191 192 up(&sock->hsmp_sem); 193 194 return ret; 195 } 196 EXPORT_SYMBOL_GPL(hsmp_send_message); 197 198 int hsmp_test(u16 sock_ind, u32 value) 199 { 200 struct hsmp_message msg = { 0 }; 201 int ret; 202 203 /* 204 * Test the hsmp port by performing TEST command. The test message 205 * takes one argument and returns the value of that argument + 1. 206 */ 207 msg.msg_id = HSMP_TEST; 208 msg.num_args = 1; 209 msg.response_sz = 1; 210 msg.args[0] = value; 211 msg.sock_ind = sock_ind; 212 213 ret = hsmp_send_message(&msg); 214 if (ret) 215 return ret; 216 217 /* Check the response value */ 218 if (msg.args[0] != (value + 1)) { 219 dev_err(hsmp_pdev.sock[sock_ind].dev, 220 "Socket %d test message failed, Expected 0x%08X, received 0x%08X\n", 221 sock_ind, (value + 1), msg.args[0]); 222 return -EBADE; 223 } 224 225 return ret; 226 } 227 EXPORT_SYMBOL_GPL(hsmp_test); 228 229 long hsmp_ioctl(struct file *fp, unsigned int cmd, unsigned long arg) 230 { 231 int __user *arguser = (int __user *)arg; 232 struct hsmp_message msg = { 0 }; 233 int ret; 234 235 if (copy_struct_from_user(&msg, sizeof(msg), arguser, sizeof(struct hsmp_message))) 236 return -EFAULT; 237 238 /* 239 * Check msg_id is within the range of supported msg ids 240 * i.e within the array bounds of hsmp_msg_desc_table 241 */ 242 if (msg.msg_id < HSMP_TEST || msg.msg_id >= HSMP_MSG_ID_MAX) 243 return -ENOMSG; 244 245 switch (fp->f_mode & (FMODE_WRITE | FMODE_READ)) { 246 case FMODE_WRITE: 247 /* 248 * Device is opened in O_WRONLY mode 249 * Execute only set/configure commands 250 */ 251 if (hsmp_msg_desc_table[msg.msg_id].type != HSMP_SET) 252 return -EINVAL; 253 break; 254 case FMODE_READ: 255 /* 256 * Device is opened in O_RDONLY mode 257 * Execute only get/monitor commands 258 */ 259 if (hsmp_msg_desc_table[msg.msg_id].type != HSMP_GET) 260 return -EINVAL; 261 break; 262 case FMODE_READ | FMODE_WRITE: 263 /* 264 * Device is opened in O_RDWR mode 265 * Execute both get/monitor and set/configure commands 266 */ 267 break; 268 default: 269 return -EINVAL; 270 } 271 272 ret = hsmp_send_message(&msg); 273 if (ret) 274 return ret; 275 276 if (hsmp_msg_desc_table[msg.msg_id].response_sz > 0) { 277 /* Copy results back to user for get/monitor commands */ 278 if (copy_to_user(arguser, &msg, sizeof(struct hsmp_message))) 279 return -EFAULT; 280 } 281 282 return 0; 283 } 284 285 ssize_t hsmp_metric_tbl_read(struct file *filp, struct kobject *kobj, 286 struct bin_attribute *bin_attr, char *buf, 287 loff_t off, size_t count) 288 { 289 struct hsmp_socket *sock = bin_attr->private; 290 struct hsmp_message msg = { 0 }; 291 int ret; 292 293 if (!sock) 294 return -EINVAL; 295 296 /* Do not support lseek(), reads entire metric table */ 297 if (count < bin_attr->size) { 298 dev_err(sock->dev, "Wrong buffer size\n"); 299 return -EINVAL; 300 } 301 302 msg.msg_id = HSMP_GET_METRIC_TABLE; 303 msg.sock_ind = sock->sock_ind; 304 305 ret = hsmp_send_message(&msg); 306 if (ret) 307 return ret; 308 memcpy_fromio(buf, sock->metric_tbl_addr, bin_attr->size); 309 310 return bin_attr->size; 311 } 312 EXPORT_SYMBOL_GPL(hsmp_metric_tbl_read); 313 314 static int hsmp_get_tbl_dram_base(u16 sock_ind) 315 { 316 struct hsmp_socket *sock = &hsmp_pdev.sock[sock_ind]; 317 struct hsmp_message msg = { 0 }; 318 phys_addr_t dram_addr; 319 int ret; 320 321 msg.sock_ind = sock_ind; 322 msg.response_sz = hsmp_msg_desc_table[HSMP_GET_METRIC_TABLE_DRAM_ADDR].response_sz; 323 msg.msg_id = HSMP_GET_METRIC_TABLE_DRAM_ADDR; 324 325 ret = hsmp_send_message(&msg); 326 if (ret) 327 return ret; 328 329 /* 330 * calculate the metric table DRAM address from lower and upper 32 bits 331 * sent from SMU and ioremap it to virtual address. 332 */ 333 dram_addr = msg.args[0] | ((u64)(msg.args[1]) << 32); 334 if (!dram_addr) { 335 dev_err(sock->dev, "Invalid DRAM address for metric table\n"); 336 return -ENOMEM; 337 } 338 sock->metric_tbl_addr = devm_ioremap(sock->dev, dram_addr, 339 sizeof(struct hsmp_metric_table)); 340 if (!sock->metric_tbl_addr) { 341 dev_err(sock->dev, "Failed to ioremap metric table addr\n"); 342 return -ENOMEM; 343 } 344 return 0; 345 } 346 347 umode_t hsmp_is_sock_attr_visible(struct kobject *kobj, 348 struct bin_attribute *battr, int id) 349 { 350 if (hsmp_pdev.proto_ver == HSMP_PROTO_VER6) 351 return battr->attr.mode; 352 else 353 return 0; 354 } 355 EXPORT_SYMBOL_GPL(hsmp_is_sock_attr_visible); 356 357 static int hsmp_init_metric_tbl_bin_attr(struct bin_attribute **hattrs, u16 sock_ind) 358 { 359 struct bin_attribute *hattr = &hsmp_pdev.sock[sock_ind].hsmp_attr; 360 361 sysfs_bin_attr_init(hattr); 362 hattr->attr.name = HSMP_METRICS_TABLE_NAME; 363 hattr->attr.mode = 0444; 364 hattr->read = hsmp_metric_tbl_read; 365 hattr->size = sizeof(struct hsmp_metric_table); 366 hattr->private = &hsmp_pdev.sock[sock_ind]; 367 hattrs[0] = hattr; 368 369 if (hsmp_pdev.proto_ver == HSMP_PROTO_VER6) 370 return hsmp_get_tbl_dram_base(sock_ind); 371 else 372 return 0; 373 } 374 375 /* One bin sysfs for metrics table */ 376 #define NUM_HSMP_ATTRS 1 377 378 int hsmp_create_attr_list(struct attribute_group *attr_grp, 379 struct device *dev, u16 sock_ind) 380 { 381 struct bin_attribute **hsmp_bin_attrs; 382 383 /* Null terminated list of attributes */ 384 hsmp_bin_attrs = devm_kcalloc(dev, NUM_HSMP_ATTRS + 1, 385 sizeof(*hsmp_bin_attrs), 386 GFP_KERNEL); 387 if (!hsmp_bin_attrs) 388 return -ENOMEM; 389 390 attr_grp->bin_attrs = hsmp_bin_attrs; 391 392 return hsmp_init_metric_tbl_bin_attr(hsmp_bin_attrs, sock_ind); 393 } 394 EXPORT_SYMBOL_GPL(hsmp_create_attr_list); 395 396 int hsmp_cache_proto_ver(u16 sock_ind) 397 { 398 struct hsmp_message msg = { 0 }; 399 int ret; 400 401 msg.msg_id = HSMP_GET_PROTO_VER; 402 msg.sock_ind = sock_ind; 403 msg.response_sz = hsmp_msg_desc_table[HSMP_GET_PROTO_VER].response_sz; 404 405 ret = hsmp_send_message(&msg); 406 if (!ret) 407 hsmp_pdev.proto_ver = msg.args[0]; 408 409 return ret; 410 } 411 EXPORT_SYMBOL_GPL(hsmp_cache_proto_ver); 412 413 static const struct file_operations hsmp_fops = { 414 .owner = THIS_MODULE, 415 .unlocked_ioctl = hsmp_ioctl, 416 .compat_ioctl = hsmp_ioctl, 417 }; 418 419 int hsmp_misc_register(struct device *dev) 420 { 421 hsmp_pdev.mdev.name = HSMP_CDEV_NAME; 422 hsmp_pdev.mdev.minor = MISC_DYNAMIC_MINOR; 423 hsmp_pdev.mdev.fops = &hsmp_fops; 424 hsmp_pdev.mdev.parent = dev; 425 hsmp_pdev.mdev.nodename = HSMP_DEVNODE_NAME; 426 hsmp_pdev.mdev.mode = 0644; 427 428 return misc_register(&hsmp_pdev.mdev); 429 } 430 EXPORT_SYMBOL_GPL(hsmp_misc_register); 431 432 void hsmp_misc_deregister(void) 433 { 434 misc_deregister(&hsmp_pdev.mdev); 435 } 436 EXPORT_SYMBOL_GPL(hsmp_misc_deregister); 437 438 MODULE_DESCRIPTION("AMD HSMP Common driver"); 439 MODULE_VERSION(DRIVER_VERSION); 440 MODULE_LICENSE("GPL"); 441