1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2012 Intel, Inc. 4 * Copyright (C) 2013 Intel, Inc. 5 * Copyright (C) 2014 Linaro Limited 6 * Copyright (C) 2011-2016 Google, Inc. 7 * 8 * This software is licensed under the terms of the GNU General Public 9 * License version 2, as published by the Free Software Foundation, and 10 * may be copied, distributed, and modified under those terms. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 */ 18 19 /* This source file contains the implementation of a special device driver 20 * that intends to provide a *very* fast communication channel between the 21 * guest system and the QEMU emulator. 22 * 23 * Usage from the guest is simply the following (error handling simplified): 24 * 25 * int fd = open("/dev/qemu_pipe",O_RDWR); 26 * .... write() or read() through the pipe. 27 * 28 * This driver doesn't deal with the exact protocol used during the session. 29 * It is intended to be as simple as something like: 30 * 31 * // do this _just_ after opening the fd to connect to a specific 32 * // emulator service. 33 * const char* msg = "<pipename>"; 34 * if (write(fd, msg, strlen(msg)+1) < 0) { 35 * ... could not connect to <pipename> service 36 * close(fd); 37 * } 38 * 39 * // after this, simply read() and write() to communicate with the 40 * // service. Exact protocol details left as an exercise to the reader. 41 * 42 * This driver is very fast because it doesn't copy any data through 43 * intermediate buffers, since the emulator is capable of translating 44 * guest user addresses into host ones. 45 * 46 * Note that we must however ensure that each user page involved in the 47 * exchange is properly mapped during a transfer. 48 */ 49 50 #include <linux/module.h> 51 #include <linux/mod_devicetable.h> 52 #include <linux/interrupt.h> 53 #include <linux/kernel.h> 54 #include <linux/spinlock.h> 55 #include <linux/miscdevice.h> 56 #include <linux/platform_device.h> 57 #include <linux/poll.h> 58 #include <linux/sched.h> 59 #include <linux/bitops.h> 60 #include <linux/slab.h> 61 #include <linux/io.h> 62 #include <linux/dma-mapping.h> 63 #include <linux/mm.h> 64 #include <linux/acpi.h> 65 #include <linux/bug.h> 66 #include "goldfish_pipe_qemu.h" 67 68 /* 69 * Update this when something changes in the driver's behavior so the host 70 * can benefit from knowing it 71 */ 72 enum { 73 PIPE_DRIVER_VERSION = 2, 74 PIPE_CURRENT_DEVICE_VERSION = 2 75 }; 76 77 enum { 78 MAX_BUFFERS_PER_COMMAND = 336, 79 MAX_SIGNALLED_PIPES = 64, 80 INITIAL_PIPES_CAPACITY = 64 81 }; 82 83 struct goldfish_pipe_dev; 84 85 /* A per-pipe command structure, shared with the host */ 86 struct goldfish_pipe_command { 87 s32 cmd; /* PipeCmdCode, guest -> host */ 88 s32 id; /* pipe id, guest -> host */ 89 s32 status; /* command execution status, host -> guest */ 90 s32 reserved; /* to pad to 64-bit boundary */ 91 union { 92 /* Parameters for PIPE_CMD_{READ,WRITE} */ 93 struct { 94 /* number of buffers, guest -> host */ 95 u32 buffers_count; 96 /* number of consumed bytes, host -> guest */ 97 s32 consumed_size; 98 /* buffer pointers, guest -> host */ 99 u64 ptrs[MAX_BUFFERS_PER_COMMAND]; 100 /* buffer sizes, guest -> host */ 101 u32 sizes[MAX_BUFFERS_PER_COMMAND]; 102 } rw_params; 103 }; 104 }; 105 106 /* A single signalled pipe information */ 107 struct signalled_pipe_buffer { 108 u32 id; 109 u32 flags; 110 }; 111 112 /* Parameters for the PIPE_CMD_OPEN command */ 113 struct open_command_param { 114 u64 command_buffer_ptr; 115 u32 rw_params_max_count; 116 }; 117 118 /* Device-level set of buffers shared with the host */ 119 struct goldfish_pipe_dev_buffers { 120 struct open_command_param open_command_params; 121 struct signalled_pipe_buffer 122 signalled_pipe_buffers[MAX_SIGNALLED_PIPES]; 123 }; 124 125 /* This data type models a given pipe instance */ 126 struct goldfish_pipe { 127 /* pipe ID - index into goldfish_pipe_dev::pipes array */ 128 u32 id; 129 130 /* The wake flags pipe is waiting for 131 * Note: not protected with any lock, uses atomic operations 132 * and barriers to make it thread-safe. 133 */ 134 unsigned long flags; 135 136 /* wake flags host have signalled, 137 * - protected by goldfish_pipe_dev::lock 138 */ 139 unsigned long signalled_flags; 140 141 /* A pointer to command buffer */ 142 struct goldfish_pipe_command *command_buffer; 143 144 /* doubly linked list of signalled pipes, protected by 145 * goldfish_pipe_dev::lock 146 */ 147 struct goldfish_pipe *prev_signalled; 148 struct goldfish_pipe *next_signalled; 149 150 /* 151 * A pipe's own lock. Protects the following: 152 * - *command_buffer - makes sure a command can safely write its 153 * parameters to the host and read the results back. 154 */ 155 struct mutex lock; 156 157 /* A wake queue for sleeping until host signals an event */ 158 wait_queue_head_t wake_queue; 159 160 /* Pointer to the parent goldfish_pipe_dev instance */ 161 struct goldfish_pipe_dev *dev; 162 163 /* A buffer of pages, too large to fit into a stack frame */ 164 struct page *pages[MAX_BUFFERS_PER_COMMAND]; 165 }; 166 167 /* The global driver data. Holds a reference to the i/o page used to 168 * communicate with the emulator, and a wake queue for blocked tasks 169 * waiting to be awoken. 170 */ 171 struct goldfish_pipe_dev { 172 /* 173 * Global device spinlock. Protects the following members: 174 * - pipes, pipes_capacity 175 * - [*pipes, *pipes + pipes_capacity) - array data 176 * - first_signalled_pipe, 177 * goldfish_pipe::prev_signalled, 178 * goldfish_pipe::next_signalled, 179 * goldfish_pipe::signalled_flags - all singnalled-related fields, 180 * in all allocated pipes 181 * - open_command_params - PIPE_CMD_OPEN-related buffers 182 * 183 * It looks like a lot of different fields, but the trick is that 184 * the only operation that happens often is the signalled pipes array 185 * manipulation. That's why it's OK for now to keep the rest of the 186 * fields under the same lock. If we notice too much contention because 187 * of PIPE_CMD_OPEN, then we should add a separate lock there. 188 */ 189 spinlock_t lock; 190 191 /* 192 * Array of the pipes of |pipes_capacity| elements, 193 * indexed by goldfish_pipe::id 194 */ 195 struct goldfish_pipe **pipes; 196 u32 pipes_capacity; 197 198 /* Pointers to the buffers host uses for interaction with this driver */ 199 struct goldfish_pipe_dev_buffers *buffers; 200 201 /* Head of a doubly linked list of signalled pipes */ 202 struct goldfish_pipe *first_signalled_pipe; 203 204 /* ptr to platform device's device struct */ 205 struct device *pdev_dev; 206 207 /* Some device-specific data */ 208 int irq; 209 int version; 210 unsigned char __iomem *base; 211 212 /* an irq tasklet to run goldfish_interrupt_task */ 213 struct tasklet_struct irq_tasklet; 214 215 struct miscdevice miscdev; 216 }; 217 218 static struct goldfish_pipe_dev goldfish_pipe_dev; 219 220 static int goldfish_pipe_cmd_locked(struct goldfish_pipe *pipe, 221 enum PipeCmdCode cmd) 222 { 223 pipe->command_buffer->cmd = cmd; 224 /* failure by default */ 225 pipe->command_buffer->status = PIPE_ERROR_INVAL; 226 writel(pipe->id, pipe->dev->base + PIPE_REG_CMD); 227 return pipe->command_buffer->status; 228 } 229 230 static int goldfish_pipe_cmd(struct goldfish_pipe *pipe, enum PipeCmdCode cmd) 231 { 232 int status; 233 234 if (mutex_lock_interruptible(&pipe->lock)) 235 return PIPE_ERROR_IO; 236 status = goldfish_pipe_cmd_locked(pipe, cmd); 237 mutex_unlock(&pipe->lock); 238 return status; 239 } 240 241 /* 242 * This function converts an error code returned by the emulator through 243 * the PIPE_REG_STATUS i/o register into a valid negative errno value. 244 */ 245 static int goldfish_pipe_error_convert(int status) 246 { 247 switch (status) { 248 case PIPE_ERROR_AGAIN: 249 return -EAGAIN; 250 case PIPE_ERROR_NOMEM: 251 return -ENOMEM; 252 case PIPE_ERROR_IO: 253 return -EIO; 254 default: 255 return -EINVAL; 256 } 257 } 258 259 static int pin_user_pages(unsigned long first_page, 260 unsigned long last_page, 261 unsigned int last_page_size, 262 int is_write, 263 struct page *pages[MAX_BUFFERS_PER_COMMAND], 264 unsigned int *iter_last_page_size) 265 { 266 int ret; 267 int requested_pages = ((last_page - first_page) >> PAGE_SHIFT) + 1; 268 269 if (requested_pages > MAX_BUFFERS_PER_COMMAND) { 270 requested_pages = MAX_BUFFERS_PER_COMMAND; 271 *iter_last_page_size = PAGE_SIZE; 272 } else { 273 *iter_last_page_size = last_page_size; 274 } 275 276 ret = get_user_pages_fast(first_page, requested_pages, !is_write, 277 pages); 278 if (ret <= 0) 279 return -EFAULT; 280 if (ret < requested_pages) 281 *iter_last_page_size = PAGE_SIZE; 282 283 return ret; 284 } 285 286 static void release_user_pages(struct page **pages, int pages_count, 287 int is_write, s32 consumed_size) 288 { 289 int i; 290 291 for (i = 0; i < pages_count; i++) { 292 if (!is_write && consumed_size > 0) 293 set_page_dirty(pages[i]); 294 put_page(pages[i]); 295 } 296 } 297 298 /* Populate the call parameters, merging adjacent pages together */ 299 static void populate_rw_params(struct page **pages, 300 int pages_count, 301 unsigned long address, 302 unsigned long address_end, 303 unsigned long first_page, 304 unsigned long last_page, 305 unsigned int iter_last_page_size, 306 int is_write, 307 struct goldfish_pipe_command *command) 308 { 309 /* 310 * Process the first page separately - it's the only page that 311 * needs special handling for its start address. 312 */ 313 unsigned long xaddr = page_to_phys(pages[0]); 314 unsigned long xaddr_prev = xaddr; 315 int buffer_idx = 0; 316 int i = 1; 317 int size_on_page = first_page == last_page 318 ? (int)(address_end - address) 319 : (PAGE_SIZE - (address & ~PAGE_MASK)); 320 command->rw_params.ptrs[0] = (u64)(xaddr | (address & ~PAGE_MASK)); 321 command->rw_params.sizes[0] = size_on_page; 322 for (; i < pages_count; ++i) { 323 xaddr = page_to_phys(pages[i]); 324 size_on_page = (i == pages_count - 1) ? 325 iter_last_page_size : PAGE_SIZE; 326 if (xaddr == xaddr_prev + PAGE_SIZE) { 327 command->rw_params.sizes[buffer_idx] += size_on_page; 328 } else { 329 ++buffer_idx; 330 command->rw_params.ptrs[buffer_idx] = (u64)xaddr; 331 command->rw_params.sizes[buffer_idx] = size_on_page; 332 } 333 xaddr_prev = xaddr; 334 } 335 command->rw_params.buffers_count = buffer_idx + 1; 336 } 337 338 static int transfer_max_buffers(struct goldfish_pipe *pipe, 339 unsigned long address, 340 unsigned long address_end, 341 int is_write, 342 unsigned long last_page, 343 unsigned int last_page_size, 344 s32 *consumed_size, 345 int *status) 346 { 347 unsigned long first_page = address & PAGE_MASK; 348 unsigned int iter_last_page_size; 349 int pages_count; 350 351 /* Serialize access to the pipe command buffers */ 352 if (mutex_lock_interruptible(&pipe->lock)) 353 return -ERESTARTSYS; 354 355 pages_count = pin_user_pages(first_page, last_page, 356 last_page_size, is_write, 357 pipe->pages, &iter_last_page_size); 358 if (pages_count < 0) { 359 mutex_unlock(&pipe->lock); 360 return pages_count; 361 } 362 363 populate_rw_params(pipe->pages, pages_count, address, address_end, 364 first_page, last_page, iter_last_page_size, is_write, 365 pipe->command_buffer); 366 367 /* Transfer the data */ 368 *status = goldfish_pipe_cmd_locked(pipe, 369 is_write ? PIPE_CMD_WRITE : PIPE_CMD_READ); 370 371 *consumed_size = pipe->command_buffer->rw_params.consumed_size; 372 373 release_user_pages(pipe->pages, pages_count, is_write, *consumed_size); 374 375 mutex_unlock(&pipe->lock); 376 return 0; 377 } 378 379 static int wait_for_host_signal(struct goldfish_pipe *pipe, int is_write) 380 { 381 u32 wake_bit = is_write ? BIT_WAKE_ON_WRITE : BIT_WAKE_ON_READ; 382 383 set_bit(wake_bit, &pipe->flags); 384 385 /* Tell the emulator we're going to wait for a wake event */ 386 goldfish_pipe_cmd(pipe, 387 is_write ? PIPE_CMD_WAKE_ON_WRITE : PIPE_CMD_WAKE_ON_READ); 388 389 while (test_bit(wake_bit, &pipe->flags)) { 390 if (wait_event_interruptible(pipe->wake_queue, 391 !test_bit(wake_bit, &pipe->flags))) 392 return -ERESTARTSYS; 393 394 if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags)) 395 return -EIO; 396 } 397 398 return 0; 399 } 400 401 static ssize_t goldfish_pipe_read_write(struct file *filp, 402 char __user *buffer, 403 size_t bufflen, 404 int is_write) 405 { 406 struct goldfish_pipe *pipe = filp->private_data; 407 int count = 0, ret = -EINVAL; 408 unsigned long address, address_end, last_page; 409 unsigned int last_page_size; 410 411 /* If the emulator already closed the pipe, no need to go further */ 412 if (unlikely(test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))) 413 return -EIO; 414 /* Null reads or writes succeeds */ 415 if (unlikely(bufflen == 0)) 416 return 0; 417 /* Check the buffer range for access */ 418 if (unlikely(!access_ok(is_write ? VERIFY_WRITE : VERIFY_READ, 419 buffer, bufflen))) 420 return -EFAULT; 421 422 address = (unsigned long)buffer; 423 address_end = address + bufflen; 424 last_page = (address_end - 1) & PAGE_MASK; 425 last_page_size = ((address_end - 1) & ~PAGE_MASK) + 1; 426 427 while (address < address_end) { 428 s32 consumed_size; 429 int status; 430 431 ret = transfer_max_buffers(pipe, address, address_end, is_write, 432 last_page, last_page_size, 433 &consumed_size, &status); 434 if (ret < 0) 435 break; 436 437 if (consumed_size > 0) { 438 /* No matter what's the status, we've transferred 439 * something. 440 */ 441 count += consumed_size; 442 address += consumed_size; 443 } 444 if (status > 0) 445 continue; 446 if (status == 0) { 447 /* EOF */ 448 ret = 0; 449 break; 450 } 451 if (count > 0) { 452 /* 453 * An error occurred, but we already transferred 454 * something on one of the previous iterations. 455 * Just return what we already copied and log this 456 * err. 457 */ 458 if (status != PIPE_ERROR_AGAIN) 459 dev_err_ratelimited(pipe->dev->pdev_dev, 460 "backend error %d on %s\n", 461 status, is_write ? "write" : "read"); 462 break; 463 } 464 465 /* 466 * If the error is not PIPE_ERROR_AGAIN, or if we are in 467 * non-blocking mode, just return the error code. 468 */ 469 if (status != PIPE_ERROR_AGAIN || 470 (filp->f_flags & O_NONBLOCK) != 0) { 471 ret = goldfish_pipe_error_convert(status); 472 break; 473 } 474 475 status = wait_for_host_signal(pipe, is_write); 476 if (status < 0) 477 return status; 478 } 479 480 if (count > 0) 481 return count; 482 return ret; 483 } 484 485 static ssize_t goldfish_pipe_read(struct file *filp, char __user *buffer, 486 size_t bufflen, loff_t *ppos) 487 { 488 return goldfish_pipe_read_write(filp, buffer, bufflen, 489 /* is_write */ 0); 490 } 491 492 static ssize_t goldfish_pipe_write(struct file *filp, 493 const char __user *buffer, size_t bufflen, 494 loff_t *ppos) 495 { 496 /* cast away the const */ 497 char __user *no_const_buffer = (char __user *)buffer; 498 499 return goldfish_pipe_read_write(filp, no_const_buffer, bufflen, 500 /* is_write */ 1); 501 } 502 503 static __poll_t goldfish_pipe_poll(struct file *filp, poll_table *wait) 504 { 505 struct goldfish_pipe *pipe = filp->private_data; 506 __poll_t mask = 0; 507 int status; 508 509 poll_wait(filp, &pipe->wake_queue, wait); 510 511 status = goldfish_pipe_cmd(pipe, PIPE_CMD_POLL); 512 if (status < 0) 513 return -ERESTARTSYS; 514 515 if (status & PIPE_POLL_IN) 516 mask |= EPOLLIN | EPOLLRDNORM; 517 if (status & PIPE_POLL_OUT) 518 mask |= EPOLLOUT | EPOLLWRNORM; 519 if (status & PIPE_POLL_HUP) 520 mask |= EPOLLHUP; 521 if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags)) 522 mask |= EPOLLERR; 523 524 return mask; 525 } 526 527 static void signalled_pipes_add_locked(struct goldfish_pipe_dev *dev, 528 u32 id, u32 flags) 529 { 530 struct goldfish_pipe *pipe; 531 532 if (WARN_ON(id >= dev->pipes_capacity)) 533 return; 534 535 pipe = dev->pipes[id]; 536 if (!pipe) 537 return; 538 pipe->signalled_flags |= flags; 539 540 if (pipe->prev_signalled || pipe->next_signalled || 541 dev->first_signalled_pipe == pipe) 542 return; /* already in the list */ 543 pipe->next_signalled = dev->first_signalled_pipe; 544 if (dev->first_signalled_pipe) 545 dev->first_signalled_pipe->prev_signalled = pipe; 546 dev->first_signalled_pipe = pipe; 547 } 548 549 static void signalled_pipes_remove_locked(struct goldfish_pipe_dev *dev, 550 struct goldfish_pipe *pipe) 551 { 552 if (pipe->prev_signalled) 553 pipe->prev_signalled->next_signalled = pipe->next_signalled; 554 if (pipe->next_signalled) 555 pipe->next_signalled->prev_signalled = pipe->prev_signalled; 556 if (pipe == dev->first_signalled_pipe) 557 dev->first_signalled_pipe = pipe->next_signalled; 558 pipe->prev_signalled = NULL; 559 pipe->next_signalled = NULL; 560 } 561 562 static struct goldfish_pipe *signalled_pipes_pop_front( 563 struct goldfish_pipe_dev *dev, int *wakes) 564 { 565 struct goldfish_pipe *pipe; 566 unsigned long flags; 567 568 spin_lock_irqsave(&dev->lock, flags); 569 570 pipe = dev->first_signalled_pipe; 571 if (pipe) { 572 *wakes = pipe->signalled_flags; 573 pipe->signalled_flags = 0; 574 /* 575 * This is an optimized version of 576 * signalled_pipes_remove_locked() 577 * - We want to make it as fast as possible to 578 * wake the sleeping pipe operations faster. 579 */ 580 dev->first_signalled_pipe = pipe->next_signalled; 581 if (dev->first_signalled_pipe) 582 dev->first_signalled_pipe->prev_signalled = NULL; 583 pipe->next_signalled = NULL; 584 } 585 586 spin_unlock_irqrestore(&dev->lock, flags); 587 return pipe; 588 } 589 590 static void goldfish_interrupt_task(unsigned long dev_addr) 591 { 592 /* Iterate over the signalled pipes and wake them one by one */ 593 struct goldfish_pipe_dev *dev = (struct goldfish_pipe_dev *)dev_addr; 594 struct goldfish_pipe *pipe; 595 int wakes; 596 597 while ((pipe = signalled_pipes_pop_front(dev, &wakes)) != NULL) { 598 if (wakes & PIPE_WAKE_CLOSED) { 599 pipe->flags = 1 << BIT_CLOSED_ON_HOST; 600 } else { 601 if (wakes & PIPE_WAKE_READ) 602 clear_bit(BIT_WAKE_ON_READ, &pipe->flags); 603 if (wakes & PIPE_WAKE_WRITE) 604 clear_bit(BIT_WAKE_ON_WRITE, &pipe->flags); 605 } 606 /* 607 * wake_up_interruptible() implies a write barrier, so don't 608 * explicitly add another one here. 609 */ 610 wake_up_interruptible(&pipe->wake_queue); 611 } 612 } 613 614 /* 615 * The general idea of the interrupt handling: 616 * 617 * 1. device raises an interrupt if there's at least one signalled pipe 618 * 2. IRQ handler reads the signalled pipes and their count from the device 619 * 3. device writes them into a shared buffer and returns the count 620 * it only resets the IRQ if it has returned all signalled pipes, 621 * otherwise it leaves it raised, so IRQ handler will be called 622 * again for the next chunk 623 * 4. IRQ handler adds all returned pipes to the device's signalled pipes list 624 * 5. IRQ handler launches a tasklet to process the signalled pipes from the 625 * list in a separate context 626 */ 627 static irqreturn_t goldfish_pipe_interrupt(int irq, void *dev_id) 628 { 629 u32 count; 630 u32 i; 631 unsigned long flags; 632 struct goldfish_pipe_dev *dev = dev_id; 633 634 if (dev != &goldfish_pipe_dev) 635 return IRQ_NONE; 636 637 /* Request the signalled pipes from the device */ 638 spin_lock_irqsave(&dev->lock, flags); 639 640 count = readl(dev->base + PIPE_REG_GET_SIGNALLED); 641 if (count == 0) { 642 spin_unlock_irqrestore(&dev->lock, flags); 643 return IRQ_NONE; 644 } 645 if (count > MAX_SIGNALLED_PIPES) 646 count = MAX_SIGNALLED_PIPES; 647 648 for (i = 0; i < count; ++i) 649 signalled_pipes_add_locked(dev, 650 dev->buffers->signalled_pipe_buffers[i].id, 651 dev->buffers->signalled_pipe_buffers[i].flags); 652 653 spin_unlock_irqrestore(&dev->lock, flags); 654 655 tasklet_schedule(&dev->irq_tasklet); 656 return IRQ_HANDLED; 657 } 658 659 static int get_free_pipe_id_locked(struct goldfish_pipe_dev *dev) 660 { 661 int id; 662 663 for (id = 0; id < dev->pipes_capacity; ++id) 664 if (!dev->pipes[id]) 665 return id; 666 667 { 668 /* Reallocate the array. 669 * Since get_free_pipe_id_locked runs with interrupts disabled, 670 * we don't want to make calls that could lead to sleep. 671 */ 672 u32 new_capacity = 2 * dev->pipes_capacity; 673 struct goldfish_pipe **pipes = 674 kcalloc(new_capacity, sizeof(*pipes), GFP_ATOMIC); 675 if (!pipes) 676 return -ENOMEM; 677 memcpy(pipes, dev->pipes, sizeof(*pipes) * dev->pipes_capacity); 678 kfree(dev->pipes); 679 dev->pipes = pipes; 680 id = dev->pipes_capacity; 681 dev->pipes_capacity = new_capacity; 682 } 683 return id; 684 } 685 686 /** 687 * goldfish_pipe_open - open a channel to the AVD 688 * @inode: inode of device 689 * @file: file struct of opener 690 * 691 * Create a new pipe link between the emulator and the use application. 692 * Each new request produces a new pipe. 693 * 694 * Note: we use the pipe ID as a mux. All goldfish emulations are 32bit 695 * right now so this is fine. A move to 64bit will need this addressing 696 */ 697 static int goldfish_pipe_open(struct inode *inode, struct file *file) 698 { 699 struct goldfish_pipe_dev *dev = &goldfish_pipe_dev; 700 unsigned long flags; 701 int id; 702 int status; 703 704 /* Allocate new pipe kernel object */ 705 struct goldfish_pipe *pipe = kzalloc(sizeof(*pipe), GFP_KERNEL); 706 if (!pipe) 707 return -ENOMEM; 708 709 pipe->dev = dev; 710 mutex_init(&pipe->lock); 711 init_waitqueue_head(&pipe->wake_queue); 712 713 /* 714 * Command buffer needs to be allocated on its own page to make sure 715 * it is physically contiguous in host's address space. 716 */ 717 BUILD_BUG_ON(sizeof(struct goldfish_pipe_command) > PAGE_SIZE); 718 pipe->command_buffer = 719 (struct goldfish_pipe_command *)__get_free_page(GFP_KERNEL); 720 if (!pipe->command_buffer) { 721 status = -ENOMEM; 722 goto err_pipe; 723 } 724 725 spin_lock_irqsave(&dev->lock, flags); 726 727 id = get_free_pipe_id_locked(dev); 728 if (id < 0) { 729 status = id; 730 goto err_id_locked; 731 } 732 733 dev->pipes[id] = pipe; 734 pipe->id = id; 735 pipe->command_buffer->id = id; 736 737 /* Now tell the emulator we're opening a new pipe. */ 738 dev->buffers->open_command_params.rw_params_max_count = 739 MAX_BUFFERS_PER_COMMAND; 740 dev->buffers->open_command_params.command_buffer_ptr = 741 (u64)(unsigned long)__pa(pipe->command_buffer); 742 status = goldfish_pipe_cmd_locked(pipe, PIPE_CMD_OPEN); 743 spin_unlock_irqrestore(&dev->lock, flags); 744 if (status < 0) 745 goto err_cmd; 746 /* All is done, save the pipe into the file's private data field */ 747 file->private_data = pipe; 748 return 0; 749 750 err_cmd: 751 spin_lock_irqsave(&dev->lock, flags); 752 dev->pipes[id] = NULL; 753 err_id_locked: 754 spin_unlock_irqrestore(&dev->lock, flags); 755 free_page((unsigned long)pipe->command_buffer); 756 err_pipe: 757 kfree(pipe); 758 return status; 759 } 760 761 static int goldfish_pipe_release(struct inode *inode, struct file *filp) 762 { 763 unsigned long flags; 764 struct goldfish_pipe *pipe = filp->private_data; 765 struct goldfish_pipe_dev *dev = pipe->dev; 766 767 /* The guest is closing the channel, so tell the emulator right now */ 768 goldfish_pipe_cmd(pipe, PIPE_CMD_CLOSE); 769 770 spin_lock_irqsave(&dev->lock, flags); 771 dev->pipes[pipe->id] = NULL; 772 signalled_pipes_remove_locked(dev, pipe); 773 spin_unlock_irqrestore(&dev->lock, flags); 774 775 filp->private_data = NULL; 776 free_page((unsigned long)pipe->command_buffer); 777 kfree(pipe); 778 return 0; 779 } 780 781 static const struct file_operations goldfish_pipe_fops = { 782 .owner = THIS_MODULE, 783 .read = goldfish_pipe_read, 784 .write = goldfish_pipe_write, 785 .poll = goldfish_pipe_poll, 786 .open = goldfish_pipe_open, 787 .release = goldfish_pipe_release, 788 }; 789 790 static void init_miscdevice(struct miscdevice *miscdev) 791 { 792 memset(miscdev, 0, sizeof(*miscdev)); 793 794 miscdev->minor = MISC_DYNAMIC_MINOR; 795 miscdev->name = "goldfish_pipe"; 796 miscdev->fops = &goldfish_pipe_fops; 797 } 798 799 static void write_pa_addr(void *addr, void __iomem *portl, void __iomem *porth) 800 { 801 const unsigned long paddr = __pa(addr); 802 803 writel(upper_32_bits(paddr), porth); 804 writel(lower_32_bits(paddr), portl); 805 } 806 807 static int goldfish_pipe_device_init(struct platform_device *pdev) 808 { 809 struct goldfish_pipe_dev *dev = &goldfish_pipe_dev; 810 int err; 811 812 tasklet_init(&dev->irq_tasklet, &goldfish_interrupt_task, 813 (unsigned long)dev); 814 815 err = devm_request_irq(&pdev->dev, dev->irq, 816 goldfish_pipe_interrupt, 817 IRQF_SHARED, "goldfish_pipe", dev); 818 if (err) { 819 dev_err(&pdev->dev, "unable to allocate IRQ for v2\n"); 820 return err; 821 } 822 823 init_miscdevice(&dev->miscdev); 824 err = misc_register(&dev->miscdev); 825 if (err) { 826 dev_err(&pdev->dev, "unable to register v2 device\n"); 827 return err; 828 } 829 830 dev->pdev_dev = &pdev->dev; 831 dev->first_signalled_pipe = NULL; 832 dev->pipes_capacity = INITIAL_PIPES_CAPACITY; 833 dev->pipes = kcalloc(dev->pipes_capacity, sizeof(*dev->pipes), 834 GFP_KERNEL); 835 if (!dev->pipes) 836 return -ENOMEM; 837 838 /* 839 * We're going to pass two buffers, open_command_params and 840 * signalled_pipe_buffers, to the host. This means each of those buffers 841 * needs to be contained in a single physical page. The easiest choice 842 * is to just allocate a page and place the buffers in it. 843 */ 844 BUILD_BUG_ON(sizeof(struct goldfish_pipe_dev_buffers) > PAGE_SIZE); 845 dev->buffers = (struct goldfish_pipe_dev_buffers *) 846 __get_free_page(GFP_KERNEL); 847 if (!dev->buffers) { 848 kfree(dev->pipes); 849 return -ENOMEM; 850 } 851 852 /* Send the buffer addresses to the host */ 853 write_pa_addr(&dev->buffers->signalled_pipe_buffers, 854 dev->base + PIPE_REG_SIGNAL_BUFFER, 855 dev->base + PIPE_REG_SIGNAL_BUFFER_HIGH); 856 857 writel(MAX_SIGNALLED_PIPES, 858 dev->base + PIPE_REG_SIGNAL_BUFFER_COUNT); 859 860 write_pa_addr(&dev->buffers->open_command_params, 861 dev->base + PIPE_REG_OPEN_BUFFER, 862 dev->base + PIPE_REG_OPEN_BUFFER_HIGH); 863 864 return 0; 865 } 866 867 static void goldfish_pipe_device_deinit(struct platform_device *pdev) 868 { 869 misc_deregister(&goldfish_pipe_dev.miscdev); 870 tasklet_kill(&goldfish_pipe_dev.irq_tasklet); 871 kfree(goldfish_pipe_dev.pipes); 872 free_page((unsigned long)goldfish_pipe_dev.buffers); 873 } 874 875 static int goldfish_pipe_probe(struct platform_device *pdev) 876 { 877 int err; 878 struct resource *r; 879 struct goldfish_pipe_dev *dev = &goldfish_pipe_dev; 880 881 /* not thread safe, but this should not happen */ 882 WARN_ON(dev->base); 883 884 spin_lock_init(&dev->lock); 885 886 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 887 if (!r || resource_size(r) < PAGE_SIZE) { 888 dev_err(&pdev->dev, "can't allocate i/o page\n"); 889 return -EINVAL; 890 } 891 dev->base = devm_ioremap(&pdev->dev, r->start, PAGE_SIZE); 892 if (!dev->base) { 893 dev_err(&pdev->dev, "ioremap failed\n"); 894 return -EINVAL; 895 } 896 897 r = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 898 if (!r) { 899 err = -EINVAL; 900 goto error; 901 } 902 dev->irq = r->start; 903 904 /* 905 * Exchange the versions with the host device 906 * 907 * Note: v1 driver used to not report its version, so we write it before 908 * reading device version back: this allows the host implementation to 909 * detect the old driver (if there was no version write before read). 910 */ 911 writel((u32)PIPE_DRIVER_VERSION, dev->base + PIPE_REG_VERSION); 912 dev->version = readl(dev->base + PIPE_REG_VERSION); 913 if (WARN_ON(dev->version < PIPE_CURRENT_DEVICE_VERSION)) 914 return -EINVAL; 915 916 err = goldfish_pipe_device_init(pdev); 917 if (!err) 918 return 0; 919 920 error: 921 dev->base = NULL; 922 return err; 923 } 924 925 static int goldfish_pipe_remove(struct platform_device *pdev) 926 { 927 struct goldfish_pipe_dev *dev = &goldfish_pipe_dev; 928 goldfish_pipe_device_deinit(pdev); 929 dev->base = NULL; 930 return 0; 931 } 932 933 static const struct acpi_device_id goldfish_pipe_acpi_match[] = { 934 { "GFSH0003", 0 }, 935 { }, 936 }; 937 MODULE_DEVICE_TABLE(acpi, goldfish_pipe_acpi_match); 938 939 static const struct of_device_id goldfish_pipe_of_match[] = { 940 { .compatible = "google,android-pipe", }, 941 {}, 942 }; 943 MODULE_DEVICE_TABLE(of, goldfish_pipe_of_match); 944 945 static struct platform_driver goldfish_pipe_driver = { 946 .probe = goldfish_pipe_probe, 947 .remove = goldfish_pipe_remove, 948 .driver = { 949 .name = "goldfish_pipe", 950 .of_match_table = goldfish_pipe_of_match, 951 .acpi_match_table = ACPI_PTR(goldfish_pipe_acpi_match), 952 } 953 }; 954 955 module_platform_driver(goldfish_pipe_driver); 956 MODULE_AUTHOR("David Turner <digit@google.com>"); 957 MODULE_LICENSE("GPL v2"); 958