1 // SPDX-License-Identifier: GPL-2.0 2 // SPI interface for ChromeOS Embedded Controller 3 // 4 // Copyright (C) 2012 Google, Inc 5 6 #include <linux/delay.h> 7 #include <linux/kernel.h> 8 #include <linux/module.h> 9 #include <linux/of.h> 10 #include <linux/platform_data/cros_ec_commands.h> 11 #include <linux/platform_data/cros_ec_proto.h> 12 #include <linux/platform_device.h> 13 #include <linux/slab.h> 14 #include <linux/spi/spi.h> 15 #include <uapi/linux/sched/types.h> 16 17 #include "cros_ec.h" 18 19 /* The header byte, which follows the preamble */ 20 #define EC_MSG_HEADER 0xec 21 22 /* 23 * Number of EC preamble bytes we read at a time. Since it takes 24 * about 400-500us for the EC to respond there is not a lot of 25 * point in tuning this. If the EC could respond faster then 26 * we could increase this so that might expect the preamble and 27 * message to occur in a single transaction. However, the maximum 28 * SPI transfer size is 256 bytes, so at 5MHz we need a response 29 * time of perhaps <320us (200 bytes / 1600 bits). 30 */ 31 #define EC_MSG_PREAMBLE_COUNT 32 32 33 /* 34 * Allow for a long time for the EC to respond. We support i2c 35 * tunneling and support fairly long messages for the tunnel (249 36 * bytes long at the moment). If we're talking to a 100 kHz device 37 * on the other end and need to transfer ~256 bytes, then we need: 38 * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms 39 * 40 * We'll wait 8 times that to handle clock stretching and other 41 * paranoia. Note that some battery gas gauge ICs claim to have a 42 * clock stretch of 144ms in rare situations. That's incentive for 43 * not directly passing i2c through, but it's too late for that for 44 * existing hardware. 45 * 46 * It's pretty unlikely that we'll really see a 249 byte tunnel in 47 * anything other than testing. If this was more common we might 48 * consider having slow commands like this require a GET_STATUS 49 * wait loop. The 'flash write' command would be another candidate 50 * for this, clocking in at 2-3ms. 51 */ 52 #define EC_MSG_DEADLINE_MS 200 53 54 /* 55 * Time between raising the SPI chip select (for the end of a 56 * transaction) and dropping it again (for the next transaction). 57 * If we go too fast, the EC will miss the transaction. We know that we 58 * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be 59 * safe. 60 */ 61 #define EC_SPI_RECOVERY_TIME_NS (200 * 1000) 62 63 /** 64 * struct cros_ec_spi - information about a SPI-connected EC 65 * 66 * @spi: SPI device we are connected to 67 * @last_transfer_ns: time that we last finished a transfer. 68 * @start_of_msg_delay: used to set the delay_usecs on the spi_transfer that 69 * is sent when we want to turn on CS at the start of a transaction. 70 * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that 71 * is sent when we want to turn off CS at the end of a transaction. 72 * @high_pri_worker: Used to schedule high priority work. 73 */ 74 struct cros_ec_spi { 75 struct spi_device *spi; 76 s64 last_transfer_ns; 77 unsigned int start_of_msg_delay; 78 unsigned int end_of_msg_delay; 79 struct kthread_worker *high_pri_worker; 80 }; 81 82 typedef int (*cros_ec_xfer_fn_t) (struct cros_ec_device *ec_dev, 83 struct cros_ec_command *ec_msg); 84 85 /** 86 * struct cros_ec_xfer_work_params - params for our high priority workers 87 * 88 * @work: The work_struct needed to queue work 89 * @fn: The function to use to transfer 90 * @ec_dev: ChromeOS EC device 91 * @ec_msg: Message to transfer 92 * @ret: The return value of the function 93 */ 94 95 struct cros_ec_xfer_work_params { 96 struct kthread_work work; 97 cros_ec_xfer_fn_t fn; 98 struct cros_ec_device *ec_dev; 99 struct cros_ec_command *ec_msg; 100 int ret; 101 }; 102 103 static void debug_packet(struct device *dev, const char *name, u8 *ptr, 104 int len) 105 { 106 #ifdef DEBUG 107 dev_dbg(dev, "%s: %*ph\n", name, len, ptr); 108 #endif 109 } 110 111 static int terminate_request(struct cros_ec_device *ec_dev) 112 { 113 struct cros_ec_spi *ec_spi = ec_dev->priv; 114 struct spi_message msg; 115 struct spi_transfer trans; 116 int ret; 117 118 /* 119 * Turn off CS, possibly adding a delay to ensure the rising edge 120 * doesn't come too soon after the end of the data. 121 */ 122 spi_message_init(&msg); 123 memset(&trans, 0, sizeof(trans)); 124 trans.delay.value = ec_spi->end_of_msg_delay; 125 trans.delay.unit = SPI_DELAY_UNIT_USECS; 126 spi_message_add_tail(&trans, &msg); 127 128 ret = spi_sync_locked(ec_spi->spi, &msg); 129 130 /* Reset end-of-response timer */ 131 ec_spi->last_transfer_ns = ktime_get_ns(); 132 if (ret < 0) { 133 dev_err(ec_dev->dev, 134 "cs-deassert spi transfer failed: %d\n", 135 ret); 136 } 137 138 return ret; 139 } 140 141 /** 142 * receive_n_bytes - receive n bytes from the EC. 143 * 144 * Assumes buf is a pointer into the ec_dev->din buffer 145 * 146 * @ec_dev: ChromeOS EC device. 147 * @buf: Pointer to the buffer receiving the data. 148 * @n: Number of bytes received. 149 */ 150 static int receive_n_bytes(struct cros_ec_device *ec_dev, u8 *buf, int n) 151 { 152 struct cros_ec_spi *ec_spi = ec_dev->priv; 153 struct spi_transfer trans; 154 struct spi_message msg; 155 int ret; 156 157 if (buf - ec_dev->din + n > ec_dev->din_size) 158 return -EINVAL; 159 160 memset(&trans, 0, sizeof(trans)); 161 trans.cs_change = 1; 162 trans.rx_buf = buf; 163 trans.len = n; 164 165 spi_message_init(&msg); 166 spi_message_add_tail(&trans, &msg); 167 ret = spi_sync_locked(ec_spi->spi, &msg); 168 if (ret < 0) 169 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); 170 171 return ret; 172 } 173 174 /** 175 * cros_ec_spi_receive_packet - Receive a packet from the EC. 176 * 177 * This function has two phases: reading the preamble bytes (since if we read 178 * data from the EC before it is ready to send, we just get preamble) and 179 * reading the actual message. 180 * 181 * The received data is placed into ec_dev->din. 182 * 183 * @ec_dev: ChromeOS EC device 184 * @need_len: Number of message bytes we need to read 185 */ 186 static int cros_ec_spi_receive_packet(struct cros_ec_device *ec_dev, 187 int need_len) 188 { 189 struct ec_host_response *response; 190 u8 *ptr, *end; 191 int ret; 192 unsigned long deadline; 193 int todo; 194 195 if (ec_dev->din_size < EC_MSG_PREAMBLE_COUNT) 196 return -EINVAL; 197 198 /* Receive data until we see the header byte */ 199 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS); 200 while (true) { 201 unsigned long start_jiffies = jiffies; 202 203 ret = receive_n_bytes(ec_dev, 204 ec_dev->din, 205 EC_MSG_PREAMBLE_COUNT); 206 if (ret < 0) 207 return ret; 208 209 ptr = ec_dev->din; 210 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) { 211 if (*ptr == EC_SPI_FRAME_START) { 212 dev_dbg(ec_dev->dev, "msg found at %zd\n", 213 ptr - ec_dev->din); 214 break; 215 } 216 } 217 if (ptr != end) 218 break; 219 220 /* 221 * Use the time at the start of the loop as a timeout. This 222 * gives us one last shot at getting the transfer and is useful 223 * in case we got context switched out for a while. 224 */ 225 if (time_after(start_jiffies, deadline)) { 226 dev_warn(ec_dev->dev, "EC failed to respond in time\n"); 227 return -ETIMEDOUT; 228 } 229 } 230 231 /* 232 * ptr now points to the header byte. Copy any valid data to the 233 * start of our buffer 234 */ 235 todo = end - ++ptr; 236 todo = min(todo, need_len); 237 memmove(ec_dev->din, ptr, todo); 238 ptr = ec_dev->din + todo; 239 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n", 240 need_len, todo); 241 need_len -= todo; 242 243 /* If the entire response struct wasn't read, get the rest of it. */ 244 if (todo < sizeof(*response)) { 245 ret = receive_n_bytes(ec_dev, ptr, sizeof(*response) - todo); 246 if (ret < 0) 247 return -EBADMSG; 248 ptr += (sizeof(*response) - todo); 249 todo = sizeof(*response); 250 } 251 252 response = (struct ec_host_response *)ec_dev->din; 253 254 /* Abort if data_len is too large. */ 255 if (response->data_len > ec_dev->din_size) 256 return -EMSGSIZE; 257 258 /* Receive data until we have it all */ 259 while (need_len > 0) { 260 /* 261 * We can't support transfers larger than the SPI FIFO size 262 * unless we have DMA. We don't have DMA on the ISP SPI ports 263 * for Exynos. We need a way of asking SPI driver for 264 * maximum-supported transfer size. 265 */ 266 todo = min(need_len, 256); 267 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n", 268 todo, need_len, ptr - ec_dev->din); 269 270 ret = receive_n_bytes(ec_dev, ptr, todo); 271 if (ret < 0) 272 return ret; 273 274 ptr += todo; 275 need_len -= todo; 276 } 277 278 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din); 279 280 return 0; 281 } 282 283 /** 284 * cros_ec_spi_receive_response - Receive a response from the EC. 285 * 286 * This function has two phases: reading the preamble bytes (since if we read 287 * data from the EC before it is ready to send, we just get preamble) and 288 * reading the actual message. 289 * 290 * The received data is placed into ec_dev->din. 291 * 292 * @ec_dev: ChromeOS EC device 293 * @need_len: Number of message bytes we need to read 294 */ 295 static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev, 296 int need_len) 297 { 298 u8 *ptr, *end; 299 int ret; 300 unsigned long deadline; 301 int todo; 302 303 if (ec_dev->din_size < EC_MSG_PREAMBLE_COUNT) 304 return -EINVAL; 305 306 /* Receive data until we see the header byte */ 307 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS); 308 while (true) { 309 unsigned long start_jiffies = jiffies; 310 311 ret = receive_n_bytes(ec_dev, 312 ec_dev->din, 313 EC_MSG_PREAMBLE_COUNT); 314 if (ret < 0) 315 return ret; 316 317 ptr = ec_dev->din; 318 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) { 319 if (*ptr == EC_SPI_FRAME_START) { 320 dev_dbg(ec_dev->dev, "msg found at %zd\n", 321 ptr - ec_dev->din); 322 break; 323 } 324 } 325 if (ptr != end) 326 break; 327 328 /* 329 * Use the time at the start of the loop as a timeout. This 330 * gives us one last shot at getting the transfer and is useful 331 * in case we got context switched out for a while. 332 */ 333 if (time_after(start_jiffies, deadline)) { 334 dev_warn(ec_dev->dev, "EC failed to respond in time\n"); 335 return -ETIMEDOUT; 336 } 337 } 338 339 /* 340 * ptr now points to the header byte. Copy any valid data to the 341 * start of our buffer 342 */ 343 todo = end - ++ptr; 344 todo = min(todo, need_len); 345 memmove(ec_dev->din, ptr, todo); 346 ptr = ec_dev->din + todo; 347 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n", 348 need_len, todo); 349 need_len -= todo; 350 351 /* Receive data until we have it all */ 352 while (need_len > 0) { 353 /* 354 * We can't support transfers larger than the SPI FIFO size 355 * unless we have DMA. We don't have DMA on the ISP SPI ports 356 * for Exynos. We need a way of asking SPI driver for 357 * maximum-supported transfer size. 358 */ 359 todo = min(need_len, 256); 360 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n", 361 todo, need_len, ptr - ec_dev->din); 362 363 ret = receive_n_bytes(ec_dev, ptr, todo); 364 if (ret < 0) 365 return ret; 366 367 debug_packet(ec_dev->dev, "interim", ptr, todo); 368 ptr += todo; 369 need_len -= todo; 370 } 371 372 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din); 373 374 return 0; 375 } 376 377 /** 378 * do_cros_ec_pkt_xfer_spi - Transfer a packet over SPI and receive the reply 379 * 380 * @ec_dev: ChromeOS EC device 381 * @ec_msg: Message to transfer 382 */ 383 static int do_cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev, 384 struct cros_ec_command *ec_msg) 385 { 386 struct ec_host_response *response; 387 struct cros_ec_spi *ec_spi = ec_dev->priv; 388 struct spi_transfer trans, trans_delay; 389 struct spi_message msg; 390 int i, len; 391 u8 *ptr; 392 u8 *rx_buf; 393 u8 sum; 394 u8 rx_byte; 395 int ret = 0, final_ret; 396 unsigned long delay; 397 398 len = cros_ec_prepare_tx(ec_dev, ec_msg); 399 if (len < 0) 400 return len; 401 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len); 402 403 /* If it's too soon to do another transaction, wait */ 404 delay = ktime_get_ns() - ec_spi->last_transfer_ns; 405 if (delay < EC_SPI_RECOVERY_TIME_NS) 406 ndelay(EC_SPI_RECOVERY_TIME_NS - delay); 407 408 rx_buf = kzalloc(len, GFP_KERNEL); 409 if (!rx_buf) 410 return -ENOMEM; 411 412 spi_bus_lock(ec_spi->spi->controller); 413 414 /* 415 * Leave a gap between CS assertion and clocking of data to allow the 416 * EC time to wakeup. 417 */ 418 spi_message_init(&msg); 419 if (ec_spi->start_of_msg_delay) { 420 memset(&trans_delay, 0, sizeof(trans_delay)); 421 trans_delay.delay.value = ec_spi->start_of_msg_delay; 422 trans_delay.delay.unit = SPI_DELAY_UNIT_USECS; 423 spi_message_add_tail(&trans_delay, &msg); 424 } 425 426 /* Transmit phase - send our message */ 427 memset(&trans, 0, sizeof(trans)); 428 trans.tx_buf = ec_dev->dout; 429 trans.rx_buf = rx_buf; 430 trans.len = len; 431 trans.cs_change = 1; 432 spi_message_add_tail(&trans, &msg); 433 ret = spi_sync_locked(ec_spi->spi, &msg); 434 435 /* Get the response */ 436 if (!ret) { 437 /* Verify that EC can process command */ 438 for (i = 0; i < len; i++) { 439 rx_byte = rx_buf[i]; 440 /* 441 * Seeing the PAST_END, RX_BAD_DATA, or NOT_READY 442 * markers are all signs that the EC didn't fully 443 * receive our command. e.g., if the EC is flashing 444 * itself, it can't respond to any commands and instead 445 * clocks out EC_SPI_PAST_END from its SPI hardware 446 * buffer. Similar occurrences can happen if the AP is 447 * too slow to clock out data after asserting CS -- the 448 * EC will abort and fill its buffer with 449 * EC_SPI_RX_BAD_DATA. 450 * 451 * In all cases, these errors should be safe to retry. 452 * Report -EAGAIN and let the caller decide what to do 453 * about that. 454 */ 455 if (rx_byte == EC_SPI_PAST_END || 456 rx_byte == EC_SPI_RX_BAD_DATA || 457 rx_byte == EC_SPI_NOT_READY) { 458 ret = -EAGAIN; 459 break; 460 } 461 } 462 } 463 464 if (!ret) 465 ret = cros_ec_spi_receive_packet(ec_dev, 466 ec_msg->insize + sizeof(*response)); 467 else if (ret != -EAGAIN) 468 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); 469 470 final_ret = terminate_request(ec_dev); 471 472 spi_bus_unlock(ec_spi->spi->controller); 473 474 if (!ret) 475 ret = final_ret; 476 if (ret < 0) 477 goto exit; 478 479 ptr = ec_dev->din; 480 481 /* check response error code */ 482 response = (struct ec_host_response *)ptr; 483 ec_msg->result = response->result; 484 485 ret = cros_ec_check_result(ec_dev, ec_msg); 486 if (ret) 487 goto exit; 488 489 len = response->data_len; 490 sum = 0; 491 if (len > ec_msg->insize) { 492 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)", 493 len, ec_msg->insize); 494 ret = -EMSGSIZE; 495 goto exit; 496 } 497 498 for (i = 0; i < sizeof(*response); i++) 499 sum += ptr[i]; 500 501 /* copy response packet payload and compute checksum */ 502 memcpy(ec_msg->data, ptr + sizeof(*response), len); 503 for (i = 0; i < len; i++) 504 sum += ec_msg->data[i]; 505 506 if (sum) { 507 dev_err(ec_dev->dev, 508 "bad packet checksum, calculated %x\n", 509 sum); 510 ret = -EBADMSG; 511 goto exit; 512 } 513 514 ret = len; 515 exit: 516 kfree(rx_buf); 517 if (ec_msg->command == EC_CMD_REBOOT_EC) 518 msleep(EC_REBOOT_DELAY_MS); 519 520 return ret; 521 } 522 523 /** 524 * do_cros_ec_cmd_xfer_spi - Transfer a message over SPI and receive the reply 525 * 526 * @ec_dev: ChromeOS EC device 527 * @ec_msg: Message to transfer 528 */ 529 static int do_cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev, 530 struct cros_ec_command *ec_msg) 531 { 532 struct cros_ec_spi *ec_spi = ec_dev->priv; 533 struct spi_transfer trans; 534 struct spi_message msg; 535 int i, len; 536 u8 *ptr; 537 u8 *rx_buf; 538 u8 rx_byte; 539 int sum; 540 int ret = 0, final_ret; 541 unsigned long delay; 542 543 len = cros_ec_prepare_tx(ec_dev, ec_msg); 544 if (len < 0) 545 return len; 546 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len); 547 548 /* If it's too soon to do another transaction, wait */ 549 delay = ktime_get_ns() - ec_spi->last_transfer_ns; 550 if (delay < EC_SPI_RECOVERY_TIME_NS) 551 ndelay(EC_SPI_RECOVERY_TIME_NS - delay); 552 553 rx_buf = kzalloc(len, GFP_KERNEL); 554 if (!rx_buf) 555 return -ENOMEM; 556 557 spi_bus_lock(ec_spi->spi->controller); 558 559 /* Transmit phase - send our message */ 560 debug_packet(ec_dev->dev, "out", ec_dev->dout, len); 561 memset(&trans, 0, sizeof(trans)); 562 trans.tx_buf = ec_dev->dout; 563 trans.rx_buf = rx_buf; 564 trans.len = len; 565 trans.cs_change = 1; 566 spi_message_init(&msg); 567 spi_message_add_tail(&trans, &msg); 568 ret = spi_sync_locked(ec_spi->spi, &msg); 569 570 /* Get the response */ 571 if (!ret) { 572 /* Verify that EC can process command */ 573 for (i = 0; i < len; i++) { 574 rx_byte = rx_buf[i]; 575 /* See comments in cros_ec_pkt_xfer_spi() */ 576 if (rx_byte == EC_SPI_PAST_END || 577 rx_byte == EC_SPI_RX_BAD_DATA || 578 rx_byte == EC_SPI_NOT_READY) { 579 ret = -EAGAIN; 580 break; 581 } 582 } 583 } 584 585 if (!ret) 586 ret = cros_ec_spi_receive_response(ec_dev, 587 ec_msg->insize + EC_MSG_TX_PROTO_BYTES); 588 else if (ret != -EAGAIN) 589 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); 590 591 final_ret = terminate_request(ec_dev); 592 593 spi_bus_unlock(ec_spi->spi->controller); 594 595 if (!ret) 596 ret = final_ret; 597 if (ret < 0) 598 goto exit; 599 600 ptr = ec_dev->din; 601 602 /* check response error code */ 603 ec_msg->result = ptr[0]; 604 ret = cros_ec_check_result(ec_dev, ec_msg); 605 if (ret) 606 goto exit; 607 608 len = ptr[1]; 609 sum = ptr[0] + ptr[1]; 610 if (len > ec_msg->insize) { 611 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)", 612 len, ec_msg->insize); 613 ret = -ENOSPC; 614 goto exit; 615 } 616 617 /* copy response packet payload and compute checksum */ 618 for (i = 0; i < len; i++) { 619 sum += ptr[i + 2]; 620 if (ec_msg->insize) 621 ec_msg->data[i] = ptr[i + 2]; 622 } 623 sum &= 0xff; 624 625 debug_packet(ec_dev->dev, "in", ptr, len + 3); 626 627 if (sum != ptr[len + 2]) { 628 dev_err(ec_dev->dev, 629 "bad packet checksum, expected %02x, got %02x\n", 630 sum, ptr[len + 2]); 631 ret = -EBADMSG; 632 goto exit; 633 } 634 635 ret = len; 636 exit: 637 kfree(rx_buf); 638 if (ec_msg->command == EC_CMD_REBOOT_EC) 639 msleep(EC_REBOOT_DELAY_MS); 640 641 return ret; 642 } 643 644 static void cros_ec_xfer_high_pri_work(struct kthread_work *work) 645 { 646 struct cros_ec_xfer_work_params *params; 647 648 params = container_of(work, struct cros_ec_xfer_work_params, work); 649 params->ret = params->fn(params->ec_dev, params->ec_msg); 650 } 651 652 static int cros_ec_xfer_high_pri(struct cros_ec_device *ec_dev, 653 struct cros_ec_command *ec_msg, 654 cros_ec_xfer_fn_t fn) 655 { 656 struct cros_ec_spi *ec_spi = ec_dev->priv; 657 struct cros_ec_xfer_work_params params = { 658 .work = KTHREAD_WORK_INIT(params.work, 659 cros_ec_xfer_high_pri_work), 660 .ec_dev = ec_dev, 661 .ec_msg = ec_msg, 662 .fn = fn, 663 }; 664 665 /* 666 * This looks a bit ridiculous. Why do the work on a 667 * different thread if we're just going to block waiting for 668 * the thread to finish? The key here is that the thread is 669 * running at high priority but the calling context might not 670 * be. We need to be at high priority to avoid getting 671 * context switched out for too long and the EC giving up on 672 * the transfer. 673 */ 674 kthread_queue_work(ec_spi->high_pri_worker, ¶ms.work); 675 kthread_flush_work(¶ms.work); 676 677 return params.ret; 678 } 679 680 static int cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev, 681 struct cros_ec_command *ec_msg) 682 { 683 return cros_ec_xfer_high_pri(ec_dev, ec_msg, do_cros_ec_pkt_xfer_spi); 684 } 685 686 static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev, 687 struct cros_ec_command *ec_msg) 688 { 689 return cros_ec_xfer_high_pri(ec_dev, ec_msg, do_cros_ec_cmd_xfer_spi); 690 } 691 692 static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev) 693 { 694 struct device_node *np = dev->of_node; 695 u32 val; 696 int ret; 697 698 ret = of_property_read_u32(np, "google,cros-ec-spi-pre-delay", &val); 699 if (!ret) 700 ec_spi->start_of_msg_delay = val; 701 702 ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val); 703 if (!ret) 704 ec_spi->end_of_msg_delay = val; 705 } 706 707 static void cros_ec_spi_high_pri_release(void *worker) 708 { 709 kthread_destroy_worker(worker); 710 } 711 712 static int cros_ec_spi_devm_high_pri_alloc(struct device *dev, 713 struct cros_ec_spi *ec_spi) 714 { 715 int err; 716 717 ec_spi->high_pri_worker = 718 kthread_create_worker(0, "cros_ec_spi_high_pri"); 719 720 if (IS_ERR(ec_spi->high_pri_worker)) { 721 err = PTR_ERR(ec_spi->high_pri_worker); 722 dev_err(dev, "Can't create cros_ec high pri worker: %d\n", err); 723 return err; 724 } 725 726 err = devm_add_action_or_reset(dev, cros_ec_spi_high_pri_release, 727 ec_spi->high_pri_worker); 728 if (err) 729 return err; 730 731 sched_set_fifo(ec_spi->high_pri_worker->task); 732 733 return 0; 734 } 735 736 static int cros_ec_spi_probe(struct spi_device *spi) 737 { 738 struct device *dev = &spi->dev; 739 struct cros_ec_device *ec_dev; 740 struct cros_ec_spi *ec_spi; 741 int err; 742 743 spi->rt = true; 744 err = spi_setup(spi); 745 if (err < 0) 746 return err; 747 748 ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL); 749 if (ec_spi == NULL) 750 return -ENOMEM; 751 ec_spi->spi = spi; 752 ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL); 753 if (!ec_dev) 754 return -ENOMEM; 755 756 /* Check for any DT properties */ 757 cros_ec_spi_dt_probe(ec_spi, dev); 758 759 spi_set_drvdata(spi, ec_dev); 760 ec_dev->dev = dev; 761 ec_dev->priv = ec_spi; 762 ec_dev->irq = spi->irq; 763 ec_dev->cmd_xfer = cros_ec_cmd_xfer_spi; 764 ec_dev->pkt_xfer = cros_ec_pkt_xfer_spi; 765 ec_dev->phys_name = dev_name(&ec_spi->spi->dev); 766 ec_dev->din_size = EC_MSG_PREAMBLE_COUNT + 767 sizeof(struct ec_host_response) + 768 sizeof(struct ec_response_get_protocol_info); 769 ec_dev->dout_size = sizeof(struct ec_host_request); 770 771 ec_spi->last_transfer_ns = ktime_get_ns(); 772 773 err = cros_ec_spi_devm_high_pri_alloc(dev, ec_spi); 774 if (err) 775 return err; 776 777 err = cros_ec_register(ec_dev); 778 if (err) { 779 dev_err(dev, "cannot register EC\n"); 780 return err; 781 } 782 783 device_init_wakeup(&spi->dev, true); 784 785 return 0; 786 } 787 788 static void cros_ec_spi_remove(struct spi_device *spi) 789 { 790 struct cros_ec_device *ec_dev = spi_get_drvdata(spi); 791 792 cros_ec_unregister(ec_dev); 793 } 794 795 #ifdef CONFIG_PM_SLEEP 796 static int cros_ec_spi_suspend(struct device *dev) 797 { 798 struct cros_ec_device *ec_dev = dev_get_drvdata(dev); 799 800 return cros_ec_suspend(ec_dev); 801 } 802 803 static int cros_ec_spi_resume(struct device *dev) 804 { 805 struct cros_ec_device *ec_dev = dev_get_drvdata(dev); 806 807 return cros_ec_resume(ec_dev); 808 } 809 #endif 810 811 static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend, 812 cros_ec_spi_resume); 813 814 static const struct of_device_id cros_ec_spi_of_match[] = { 815 { .compatible = "google,cros-ec-spi", }, 816 { /* sentinel */ }, 817 }; 818 MODULE_DEVICE_TABLE(of, cros_ec_spi_of_match); 819 820 static const struct spi_device_id cros_ec_spi_id[] = { 821 { "cros-ec-spi", 0 }, 822 { } 823 }; 824 MODULE_DEVICE_TABLE(spi, cros_ec_spi_id); 825 826 static struct spi_driver cros_ec_driver_spi = { 827 .driver = { 828 .name = "cros-ec-spi", 829 .of_match_table = cros_ec_spi_of_match, 830 .pm = &cros_ec_spi_pm_ops, 831 .probe_type = PROBE_PREFER_ASYNCHRONOUS, 832 }, 833 .probe = cros_ec_spi_probe, 834 .remove = cros_ec_spi_remove, 835 .id_table = cros_ec_spi_id, 836 }; 837 838 module_spi_driver(cros_ec_driver_spi); 839 840 MODULE_LICENSE("GPL v2"); 841 MODULE_DESCRIPTION("SPI interface for ChromeOS Embedded Controller"); 842