xref: /linux/drivers/pinctrl/vt8500/pinctrl-wmt.c (revision e0bf6c5ca2d3281f231c5f0c9bf145e9513644de)
1 /*
2  * Pinctrl driver for the Wondermedia SoC's
3  *
4  * Copyright (c) 2013 Tony Prisk <linux@prisktech.co.nz>
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  */
15 
16 #include <linux/err.h>
17 #include <linux/gpio.h>
18 #include <linux/interrupt.h>
19 #include <linux/io.h>
20 #include <linux/irq.h>
21 #include <linux/module.h>
22 #include <linux/of.h>
23 #include <linux/of_irq.h>
24 #include <linux/pinctrl/consumer.h>
25 #include <linux/pinctrl/machine.h>
26 #include <linux/pinctrl/pinconf.h>
27 #include <linux/pinctrl/pinconf-generic.h>
28 #include <linux/pinctrl/pinctrl.h>
29 #include <linux/pinctrl/pinmux.h>
30 #include <linux/platform_device.h>
31 #include <linux/slab.h>
32 
33 #include "pinctrl-wmt.h"
34 
35 static inline void wmt_setbits(struct wmt_pinctrl_data *data, u32 reg,
36 				 u32 mask)
37 {
38 	u32 val;
39 
40 	val = readl_relaxed(data->base + reg);
41 	val |= mask;
42 	writel_relaxed(val, data->base + reg);
43 }
44 
45 static inline void wmt_clearbits(struct wmt_pinctrl_data *data, u32 reg,
46 				   u32 mask)
47 {
48 	u32 val;
49 
50 	val = readl_relaxed(data->base + reg);
51 	val &= ~mask;
52 	writel_relaxed(val, data->base + reg);
53 }
54 
55 enum wmt_func_sel {
56 	WMT_FSEL_GPIO_IN = 0,
57 	WMT_FSEL_GPIO_OUT = 1,
58 	WMT_FSEL_ALT = 2,
59 	WMT_FSEL_COUNT = 3,
60 };
61 
62 static const char * const wmt_functions[WMT_FSEL_COUNT] = {
63 	[WMT_FSEL_GPIO_IN] = "gpio_in",
64 	[WMT_FSEL_GPIO_OUT] = "gpio_out",
65 	[WMT_FSEL_ALT] = "alt",
66 };
67 
68 static int wmt_pmx_get_functions_count(struct pinctrl_dev *pctldev)
69 {
70 	return WMT_FSEL_COUNT;
71 }
72 
73 static const char *wmt_pmx_get_function_name(struct pinctrl_dev *pctldev,
74 					     unsigned selector)
75 {
76 	return wmt_functions[selector];
77 }
78 
79 static int wmt_pmx_get_function_groups(struct pinctrl_dev *pctldev,
80 				       unsigned selector,
81 				       const char * const **groups,
82 				       unsigned * const num_groups)
83 {
84 	struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
85 
86 	/* every pin does every function */
87 	*groups = data->groups;
88 	*num_groups = data->ngroups;
89 
90 	return 0;
91 }
92 
93 static int wmt_set_pinmux(struct wmt_pinctrl_data *data, unsigned func,
94 			  unsigned pin)
95 {
96 	u32 bank = WMT_BANK_FROM_PIN(pin);
97 	u32 bit = WMT_BIT_FROM_PIN(pin);
98 	u32 reg_en = data->banks[bank].reg_en;
99 	u32 reg_dir = data->banks[bank].reg_dir;
100 
101 	if (reg_dir == NO_REG) {
102 		dev_err(data->dev, "pin:%d no direction register defined\n",
103 			pin);
104 		return -EINVAL;
105 	}
106 
107 	/*
108 	 * If reg_en == NO_REG, we assume it is a dedicated GPIO and cannot be
109 	 * disabled (as on VT8500) and that no alternate function is available.
110 	 */
111 	switch (func) {
112 	case WMT_FSEL_GPIO_IN:
113 		if (reg_en != NO_REG)
114 			wmt_setbits(data, reg_en, BIT(bit));
115 		wmt_clearbits(data, reg_dir, BIT(bit));
116 		break;
117 	case WMT_FSEL_GPIO_OUT:
118 		if (reg_en != NO_REG)
119 			wmt_setbits(data, reg_en, BIT(bit));
120 		wmt_setbits(data, reg_dir, BIT(bit));
121 		break;
122 	case WMT_FSEL_ALT:
123 		if (reg_en == NO_REG) {
124 			dev_err(data->dev, "pin:%d no alt function available\n",
125 				pin);
126 			return -EINVAL;
127 		}
128 		wmt_clearbits(data, reg_en, BIT(bit));
129 	}
130 
131 	return 0;
132 }
133 
134 static int wmt_pmx_set_mux(struct pinctrl_dev *pctldev,
135 			   unsigned func_selector,
136 			   unsigned group_selector)
137 {
138 	struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
139 	u32 pinnum = data->pins[group_selector].number;
140 
141 	return wmt_set_pinmux(data, func_selector, pinnum);
142 }
143 
144 static void wmt_pmx_gpio_disable_free(struct pinctrl_dev *pctldev,
145 				      struct pinctrl_gpio_range *range,
146 				      unsigned offset)
147 {
148 	struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
149 
150 	/* disable by setting GPIO_IN */
151 	wmt_set_pinmux(data, WMT_FSEL_GPIO_IN, offset);
152 }
153 
154 static int wmt_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
155 				      struct pinctrl_gpio_range *range,
156 				      unsigned offset,
157 				      bool input)
158 {
159 	struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
160 
161 	wmt_set_pinmux(data, (input ? WMT_FSEL_GPIO_IN : WMT_FSEL_GPIO_OUT),
162 		       offset);
163 
164 	return 0;
165 }
166 
167 static struct pinmux_ops wmt_pinmux_ops = {
168 	.get_functions_count = wmt_pmx_get_functions_count,
169 	.get_function_name = wmt_pmx_get_function_name,
170 	.get_function_groups = wmt_pmx_get_function_groups,
171 	.set_mux = wmt_pmx_set_mux,
172 	.gpio_disable_free = wmt_pmx_gpio_disable_free,
173 	.gpio_set_direction = wmt_pmx_gpio_set_direction,
174 };
175 
176 static int wmt_get_groups_count(struct pinctrl_dev *pctldev)
177 {
178 	struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
179 
180 	return data->ngroups;
181 }
182 
183 static const char *wmt_get_group_name(struct pinctrl_dev *pctldev,
184 				      unsigned selector)
185 {
186 	struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
187 
188 	return data->groups[selector];
189 }
190 
191 static int wmt_get_group_pins(struct pinctrl_dev *pctldev,
192 			      unsigned selector,
193 			      const unsigned **pins,
194 			      unsigned *num_pins)
195 {
196 	struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
197 
198 	*pins = &data->pins[selector].number;
199 	*num_pins = 1;
200 
201 	return 0;
202 }
203 
204 static int wmt_pctl_find_group_by_pin(struct wmt_pinctrl_data *data, u32 pin)
205 {
206 	int i;
207 
208 	for (i = 0; i < data->npins; i++) {
209 		if (data->pins[i].number == pin)
210 			return i;
211 	}
212 
213 	return -EINVAL;
214 }
215 
216 static int wmt_pctl_dt_node_to_map_func(struct wmt_pinctrl_data *data,
217 					struct device_node *np,
218 					u32 pin, u32 fnum,
219 					struct pinctrl_map **maps)
220 {
221 	int group;
222 	struct pinctrl_map *map = *maps;
223 
224 	if (fnum >= ARRAY_SIZE(wmt_functions)) {
225 		dev_err(data->dev, "invalid wm,function %d\n", fnum);
226 		return -EINVAL;
227 	}
228 
229 	group = wmt_pctl_find_group_by_pin(data, pin);
230 	if (group < 0) {
231 		dev_err(data->dev, "unable to match pin %d to group\n", pin);
232 		return group;
233 	}
234 
235 	map->type = PIN_MAP_TYPE_MUX_GROUP;
236 	map->data.mux.group = data->groups[group];
237 	map->data.mux.function = wmt_functions[fnum];
238 	(*maps)++;
239 
240 	return 0;
241 }
242 
243 static int wmt_pctl_dt_node_to_map_pull(struct wmt_pinctrl_data *data,
244 					struct device_node *np,
245 					u32 pin, u32 pull,
246 					struct pinctrl_map **maps)
247 {
248 	int group;
249 	unsigned long *configs;
250 	struct pinctrl_map *map = *maps;
251 
252 	if (pull > 2) {
253 		dev_err(data->dev, "invalid wm,pull %d\n", pull);
254 		return -EINVAL;
255 	}
256 
257 	group = wmt_pctl_find_group_by_pin(data, pin);
258 	if (group < 0) {
259 		dev_err(data->dev, "unable to match pin %d to group\n", pin);
260 		return group;
261 	}
262 
263 	configs = kzalloc(sizeof(*configs), GFP_KERNEL);
264 	if (!configs)
265 		return -ENOMEM;
266 
267 	switch (pull) {
268 	case 0:
269 		configs[0] = PIN_CONFIG_BIAS_DISABLE;
270 		break;
271 	case 1:
272 		configs[0] = PIN_CONFIG_BIAS_PULL_DOWN;
273 		break;
274 	case 2:
275 		configs[0] = PIN_CONFIG_BIAS_PULL_UP;
276 		break;
277 	default:
278 		configs[0] = PIN_CONFIG_BIAS_DISABLE;
279 		dev_err(data->dev, "invalid pull state %d - disabling\n", pull);
280 	}
281 
282 	map->type = PIN_MAP_TYPE_CONFIGS_PIN;
283 	map->data.configs.group_or_pin = data->groups[group];
284 	map->data.configs.configs = configs;
285 	map->data.configs.num_configs = 1;
286 	(*maps)++;
287 
288 	return 0;
289 }
290 
291 static void wmt_pctl_dt_free_map(struct pinctrl_dev *pctldev,
292 				 struct pinctrl_map *maps,
293 				 unsigned num_maps)
294 {
295 	int i;
296 
297 	for (i = 0; i < num_maps; i++)
298 		if (maps[i].type == PIN_MAP_TYPE_CONFIGS_PIN)
299 			kfree(maps[i].data.configs.configs);
300 
301 	kfree(maps);
302 }
303 
304 static int wmt_pctl_dt_node_to_map(struct pinctrl_dev *pctldev,
305 				   struct device_node *np,
306 				   struct pinctrl_map **map,
307 				   unsigned *num_maps)
308 {
309 	struct pinctrl_map *maps, *cur_map;
310 	struct property *pins, *funcs, *pulls;
311 	u32 pin, func, pull;
312 	int num_pins, num_funcs, num_pulls, maps_per_pin;
313 	int i, err;
314 	struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
315 
316 	pins = of_find_property(np, "wm,pins", NULL);
317 	if (!pins) {
318 		dev_err(data->dev, "missing wmt,pins property\n");
319 		return -EINVAL;
320 	}
321 
322 	funcs = of_find_property(np, "wm,function", NULL);
323 	pulls = of_find_property(np, "wm,pull", NULL);
324 
325 	if (!funcs && !pulls) {
326 		dev_err(data->dev, "neither wm,function nor wm,pull specified\n");
327 		return -EINVAL;
328 	}
329 
330 	/*
331 	 * The following lines calculate how many values are defined for each
332 	 * of the properties.
333 	 */
334 	num_pins = pins->length / sizeof(u32);
335 	num_funcs = funcs ? (funcs->length / sizeof(u32)) : 0;
336 	num_pulls = pulls ? (pulls->length / sizeof(u32)) : 0;
337 
338 	if (num_funcs > 1 && num_funcs != num_pins) {
339 		dev_err(data->dev, "wm,function must have 1 or %d entries\n",
340 			num_pins);
341 		return -EINVAL;
342 	}
343 
344 	if (num_pulls > 1 && num_pulls != num_pins) {
345 		dev_err(data->dev, "wm,pull must have 1 or %d entries\n",
346 			num_pins);
347 		return -EINVAL;
348 	}
349 
350 	maps_per_pin = 0;
351 	if (num_funcs)
352 		maps_per_pin++;
353 	if (num_pulls)
354 		maps_per_pin++;
355 
356 	cur_map = maps = kzalloc(num_pins * maps_per_pin * sizeof(*maps),
357 				 GFP_KERNEL);
358 	if (!maps)
359 		return -ENOMEM;
360 
361 	for (i = 0; i < num_pins; i++) {
362 		err = of_property_read_u32_index(np, "wm,pins", i, &pin);
363 		if (err)
364 			goto fail;
365 
366 		if (pin >= (data->nbanks * 32)) {
367 			dev_err(data->dev, "invalid wm,pins value\n");
368 			err = -EINVAL;
369 			goto fail;
370 		}
371 
372 		if (num_funcs) {
373 			err = of_property_read_u32_index(np, "wm,function",
374 						(num_funcs > 1 ? i : 0), &func);
375 			if (err)
376 				goto fail;
377 
378 			err = wmt_pctl_dt_node_to_map_func(data, np, pin, func,
379 							   &cur_map);
380 			if (err)
381 				goto fail;
382 		}
383 
384 		if (num_pulls) {
385 			err = of_property_read_u32_index(np, "wm,pull",
386 						(num_pulls > 1 ? i : 0), &pull);
387 			if (err)
388 				goto fail;
389 
390 			err = wmt_pctl_dt_node_to_map_pull(data, np, pin, pull,
391 							   &cur_map);
392 			if (err)
393 				goto fail;
394 		}
395 	}
396 	*map = maps;
397 	*num_maps = num_pins * maps_per_pin;
398 	return 0;
399 
400 /*
401  * The fail path removes any maps that have been allocated. The fail path is
402  * only called from code after maps has been kzalloc'd. It is also safe to
403  * pass 'num_pins * maps_per_pin' as the map count even though we probably
404  * failed before all the mappings were read as all maps are allocated at once,
405  * and configs are only allocated for .type = PIN_MAP_TYPE_CONFIGS_PIN - there
406  * is no failpath where a config can be allocated without .type being set.
407  */
408 fail:
409 	wmt_pctl_dt_free_map(pctldev, maps, num_pins * maps_per_pin);
410 	return err;
411 }
412 
413 static struct pinctrl_ops wmt_pctl_ops = {
414 	.get_groups_count = wmt_get_groups_count,
415 	.get_group_name	= wmt_get_group_name,
416 	.get_group_pins	= wmt_get_group_pins,
417 	.dt_node_to_map = wmt_pctl_dt_node_to_map,
418 	.dt_free_map = wmt_pctl_dt_free_map,
419 };
420 
421 static int wmt_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
422 			   unsigned long *config)
423 {
424 	return -ENOTSUPP;
425 }
426 
427 static int wmt_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
428 			   unsigned long *configs, unsigned num_configs)
429 {
430 	struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
431 	enum pin_config_param param;
432 	u16 arg;
433 	u32 bank = WMT_BANK_FROM_PIN(pin);
434 	u32 bit = WMT_BIT_FROM_PIN(pin);
435 	u32 reg_pull_en = data->banks[bank].reg_pull_en;
436 	u32 reg_pull_cfg = data->banks[bank].reg_pull_cfg;
437 	int i;
438 
439 	if ((reg_pull_en == NO_REG) || (reg_pull_cfg == NO_REG)) {
440 		dev_err(data->dev, "bias functions not supported on pin %d\n",
441 			pin);
442 		return -EINVAL;
443 	}
444 
445 	for (i = 0; i < num_configs; i++) {
446 		param = pinconf_to_config_param(configs[i]);
447 		arg = pinconf_to_config_argument(configs[i]);
448 
449 		if ((param == PIN_CONFIG_BIAS_PULL_DOWN) ||
450 		    (param == PIN_CONFIG_BIAS_PULL_UP)) {
451 			if (arg == 0)
452 				param = PIN_CONFIG_BIAS_DISABLE;
453 		}
454 
455 		switch (param) {
456 		case PIN_CONFIG_BIAS_DISABLE:
457 			wmt_clearbits(data, reg_pull_en, BIT(bit));
458 			break;
459 		case PIN_CONFIG_BIAS_PULL_DOWN:
460 			wmt_clearbits(data, reg_pull_cfg, BIT(bit));
461 			wmt_setbits(data, reg_pull_en, BIT(bit));
462 			break;
463 		case PIN_CONFIG_BIAS_PULL_UP:
464 			wmt_setbits(data, reg_pull_cfg, BIT(bit));
465 			wmt_setbits(data, reg_pull_en, BIT(bit));
466 			break;
467 		default:
468 			dev_err(data->dev, "unknown pinconf param\n");
469 			return -EINVAL;
470 		}
471 	} /* for each config */
472 
473 	return 0;
474 }
475 
476 static struct pinconf_ops wmt_pinconf_ops = {
477 	.pin_config_get = wmt_pinconf_get,
478 	.pin_config_set = wmt_pinconf_set,
479 };
480 
481 static struct pinctrl_desc wmt_desc = {
482 	.owner = THIS_MODULE,
483 	.name = "pinctrl-wmt",
484 	.pctlops = &wmt_pctl_ops,
485 	.pmxops = &wmt_pinmux_ops,
486 	.confops = &wmt_pinconf_ops,
487 };
488 
489 static int wmt_gpio_request(struct gpio_chip *chip, unsigned offset)
490 {
491 	return pinctrl_request_gpio(chip->base + offset);
492 }
493 
494 static void wmt_gpio_free(struct gpio_chip *chip, unsigned offset)
495 {
496 	pinctrl_free_gpio(chip->base + offset);
497 }
498 
499 static int wmt_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
500 {
501 	struct wmt_pinctrl_data *data = dev_get_drvdata(chip->dev);
502 	u32 bank = WMT_BANK_FROM_PIN(offset);
503 	u32 bit = WMT_BIT_FROM_PIN(offset);
504 	u32 reg_dir = data->banks[bank].reg_dir;
505 	u32 val;
506 
507 	val = readl_relaxed(data->base + reg_dir);
508 	if (val & BIT(bit))
509 		return GPIOF_DIR_OUT;
510 	else
511 		return GPIOF_DIR_IN;
512 }
513 
514 static int wmt_gpio_get_value(struct gpio_chip *chip, unsigned offset)
515 {
516 	struct wmt_pinctrl_data *data = dev_get_drvdata(chip->dev);
517 	u32 bank = WMT_BANK_FROM_PIN(offset);
518 	u32 bit = WMT_BIT_FROM_PIN(offset);
519 	u32 reg_data_in = data->banks[bank].reg_data_in;
520 
521 	if (reg_data_in == NO_REG) {
522 		dev_err(data->dev, "no data in register defined\n");
523 		return -EINVAL;
524 	}
525 
526 	return !!(readl_relaxed(data->base + reg_data_in) & BIT(bit));
527 }
528 
529 static void wmt_gpio_set_value(struct gpio_chip *chip, unsigned offset,
530 			       int val)
531 {
532 	struct wmt_pinctrl_data *data = dev_get_drvdata(chip->dev);
533 	u32 bank = WMT_BANK_FROM_PIN(offset);
534 	u32 bit = WMT_BIT_FROM_PIN(offset);
535 	u32 reg_data_out = data->banks[bank].reg_data_out;
536 
537 	if (reg_data_out == NO_REG) {
538 		dev_err(data->dev, "no data out register defined\n");
539 		return;
540 	}
541 
542 	if (val)
543 		wmt_setbits(data, reg_data_out, BIT(bit));
544 	else
545 		wmt_clearbits(data, reg_data_out, BIT(bit));
546 }
547 
548 static int wmt_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
549 {
550 	return pinctrl_gpio_direction_input(chip->base + offset);
551 }
552 
553 static int wmt_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
554 				     int value)
555 {
556 	wmt_gpio_set_value(chip, offset, value);
557 	return pinctrl_gpio_direction_output(chip->base + offset);
558 }
559 
560 static struct gpio_chip wmt_gpio_chip = {
561 	.label = "gpio-wmt",
562 	.owner = THIS_MODULE,
563 	.request = wmt_gpio_request,
564 	.free = wmt_gpio_free,
565 	.get_direction = wmt_gpio_get_direction,
566 	.direction_input = wmt_gpio_direction_input,
567 	.direction_output = wmt_gpio_direction_output,
568 	.get = wmt_gpio_get_value,
569 	.set = wmt_gpio_set_value,
570 	.can_sleep = false,
571 };
572 
573 int wmt_pinctrl_probe(struct platform_device *pdev,
574 		      struct wmt_pinctrl_data *data)
575 {
576 	int err;
577 	struct resource *res;
578 
579 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
580 	data->base = devm_ioremap_resource(&pdev->dev, res);
581 	if (IS_ERR(data->base))
582 		return PTR_ERR(data->base);
583 
584 	wmt_desc.pins = data->pins;
585 	wmt_desc.npins = data->npins;
586 
587 	data->gpio_chip = wmt_gpio_chip;
588 	data->gpio_chip.dev = &pdev->dev;
589 	data->gpio_chip.of_node = pdev->dev.of_node;
590 	data->gpio_chip.ngpio = data->nbanks * 32;
591 
592 	platform_set_drvdata(pdev, data);
593 
594 	data->dev = &pdev->dev;
595 
596 	data->pctl_dev = pinctrl_register(&wmt_desc, &pdev->dev, data);
597 	if (!data->pctl_dev) {
598 		dev_err(&pdev->dev, "Failed to register pinctrl\n");
599 		return -EINVAL;
600 	}
601 
602 	err = gpiochip_add(&data->gpio_chip);
603 	if (err) {
604 		dev_err(&pdev->dev, "could not add GPIO chip\n");
605 		goto fail_gpio;
606 	}
607 
608 	err = gpiochip_add_pin_range(&data->gpio_chip, dev_name(data->dev),
609 				     0, 0, data->nbanks * 32);
610 	if (err)
611 		goto fail_range;
612 
613 	dev_info(&pdev->dev, "Pin controller initialized\n");
614 
615 	return 0;
616 
617 fail_range:
618 	gpiochip_remove(&data->gpio_chip);
619 fail_gpio:
620 	pinctrl_unregister(data->pctl_dev);
621 	return err;
622 }
623 
624 int wmt_pinctrl_remove(struct platform_device *pdev)
625 {
626 	struct wmt_pinctrl_data *data = platform_get_drvdata(pdev);
627 
628 	gpiochip_remove(&data->gpio_chip);
629 	pinctrl_unregister(data->pctl_dev);
630 
631 	return 0;
632 }
633