xref: /linux/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t-r.c (revision 2a6b6c9a226279b4f6668450ddb21ae655558087)
1 /*
2  * Allwinner A83T SoCs special pins pinctrl driver.
3  *
4  * Copyright (C) 2017 Chen-Yu Tsai
5  * Chen-Yu Tsai <wens@csie.org>
6  *
7  * Based on pinctrl-sun50i-a64-r.c
8  *
9  * Copyright (C) 2016 Icenowy Zheng
10  * Icenowy Zheng <icenowy@aosc.xyz>
11  *
12  * Copyright (C) 2014 Chen-Yu Tsai
13  * Chen-Yu Tsai <wens@csie.org>
14  *
15  * Copyright (C) 2014 Boris Brezillon
16  * Boris Brezillon <boris.brezillon@free-electrons.com>
17  *
18  * Copyright (C) 2014 Maxime Ripard
19  * Maxime Ripard <maxime.ripard@free-electrons.com>
20  *
21  * This file is licensed under the terms of the GNU General Public
22  * License version 2.  This program is licensed "as is" without any
23  * warranty of any kind, whether express or implied.
24  */
25 
26 #include <linux/of.h>
27 #include <linux/pinctrl/pinctrl.h>
28 #include <linux/platform_device.h>
29 
30 #include "pinctrl-sunxi.h"
31 
32 static const struct sunxi_desc_pin sun8i_a83t_r_pins[] = {
33 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
34 		  SUNXI_FUNCTION(0x0, "gpio_in"),
35 		  SUNXI_FUNCTION(0x1, "gpio_out"),
36 		  SUNXI_FUNCTION(0x2, "s_rsb"),		/* SCK */
37 		  SUNXI_FUNCTION(0x3, "s_i2c"),		/* SCK */
38 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),	/* PL_EINT0 */
39 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
40 		  SUNXI_FUNCTION(0x0, "gpio_in"),
41 		  SUNXI_FUNCTION(0x1, "gpio_out"),
42 		  SUNXI_FUNCTION(0x2, "s_rsb"),		/* SDA */
43 		  SUNXI_FUNCTION(0x3, "s_i2c"),		/* SDA */
44 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),	/* PL_EINT1 */
45 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
46 		  SUNXI_FUNCTION(0x0, "gpio_in"),
47 		  SUNXI_FUNCTION(0x1, "gpio_out"),
48 		  SUNXI_FUNCTION(0x2, "s_uart"),	/* TX */
49 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),	/* PL_EINT2 */
50 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
51 		  SUNXI_FUNCTION(0x0, "gpio_in"),
52 		  SUNXI_FUNCTION(0x1, "gpio_out"),
53 		  SUNXI_FUNCTION(0x2, "s_uart"),	/* RX */
54 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),	/* PL_EINT3 */
55 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
56 		  SUNXI_FUNCTION(0x0, "gpio_in"),
57 		  SUNXI_FUNCTION(0x1, "gpio_out"),
58 		  SUNXI_FUNCTION(0x2, "s_jtag"),	/* MS */
59 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),	/* PL_EINT4 */
60 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
61 		  SUNXI_FUNCTION(0x0, "gpio_in"),
62 		  SUNXI_FUNCTION(0x1, "gpio_out"),
63 		  SUNXI_FUNCTION(0x2, "s_jtag"),	/* CK */
64 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),	/* PL_EINT5 */
65 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
66 		  SUNXI_FUNCTION(0x0, "gpio_in"),
67 		  SUNXI_FUNCTION(0x1, "gpio_out"),
68 		  SUNXI_FUNCTION(0x2, "s_jtag"),	/* DO */
69 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),	/* PL_EINT6 */
70 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
71 		  SUNXI_FUNCTION(0x0, "gpio_in"),
72 		  SUNXI_FUNCTION(0x1, "gpio_out"),
73 		  SUNXI_FUNCTION(0x2, "s_jtag"),	/* DI */
74 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),	/* PL_EINT7 */
75 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
76 		  SUNXI_FUNCTION(0x0, "gpio_in"),
77 		  SUNXI_FUNCTION(0x1, "gpio_out"),
78 		  SUNXI_FUNCTION(0x2, "s_i2c"),		/* SCK */
79 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),	/* PL_EINT8 */
80 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
81 		  SUNXI_FUNCTION(0x0, "gpio_in"),
82 		  SUNXI_FUNCTION(0x1, "gpio_out"),
83 		  SUNXI_FUNCTION(0x2, "s_i2c"),		/* SDA */
84 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),	/* PL_EINT9 */
85 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10),
86 		  SUNXI_FUNCTION(0x0, "gpio_in"),
87 		  SUNXI_FUNCTION(0x1, "gpio_out"),
88 		  SUNXI_FUNCTION(0x2, "s_pwm"),
89 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)),	/* PL_EINT10 */
90 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11),
91 		  SUNXI_FUNCTION(0x0, "gpio_in"),
92 		  SUNXI_FUNCTION(0x1, "gpio_out"),
93 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)),	/* PL_EINT11 */
94 	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 12),
95 		  SUNXI_FUNCTION(0x0, "gpio_in"),
96 		  SUNXI_FUNCTION(0x1, "gpio_out"),
97 		  SUNXI_FUNCTION(0x2, "s_cir_rx"),
98 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)),	/* PL_EINT12 */
99 };
100 
101 static const struct sunxi_pinctrl_desc sun8i_a83t_r_pinctrl_data = {
102 	.pins = sun8i_a83t_r_pins,
103 	.npins = ARRAY_SIZE(sun8i_a83t_r_pins),
104 	.pin_base = PL_BASE,
105 	.irq_banks = 1,
106 };
107 
108 static int sun8i_a83t_r_pinctrl_probe(struct platform_device *pdev)
109 {
110 	return sunxi_pinctrl_init(pdev,
111 				  &sun8i_a83t_r_pinctrl_data);
112 }
113 
114 static const struct of_device_id sun8i_a83t_r_pinctrl_match[] = {
115 	{ .compatible = "allwinner,sun8i-a83t-r-pinctrl", },
116 	{}
117 };
118 
119 static struct platform_driver sun8i_a83t_r_pinctrl_driver = {
120 	.probe	= sun8i_a83t_r_pinctrl_probe,
121 	.driver	= {
122 		.name		= "sun8i-a83t-r-pinctrl",
123 		.of_match_table	= sun8i_a83t_r_pinctrl_match,
124 	},
125 };
126 builtin_platform_driver(sun8i_a83t_r_pinctrl_driver);
127