1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Allwinner H6 R_PIO pin controller driver 4 * 5 * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io> 6 * 7 * Based on pinctrl-sun6i-a31-r.c, which is: 8 * Copyright (C) 2014 Boris Brezillon 9 * Boris Brezillon <boris.brezillon@free-electrons.com> 10 * Copyright (C) 2014 Maxime Ripard 11 * Maxime Ripard <maxime.ripard@free-electrons.com> 12 */ 13 14 #include <linux/init.h> 15 #include <linux/platform_device.h> 16 #include <linux/of.h> 17 #include <linux/pinctrl/pinctrl.h> 18 19 #include "pinctrl-sunxi.h" 20 21 static const struct sunxi_desc_pin sun50i_h6_r_pins[] = { 22 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0), 23 SUNXI_FUNCTION(0x0, "gpio_in"), 24 SUNXI_FUNCTION(0x1, "gpio_out"), 25 SUNXI_FUNCTION(0x2, "s_rsb"), /* SCK */ 26 SUNXI_FUNCTION(0x3, "s_i2c"), /* SCK */ 27 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PL_EINT0 */ 28 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1), 29 SUNXI_FUNCTION(0x0, "gpio_in"), 30 SUNXI_FUNCTION(0x1, "gpio_out"), 31 SUNXI_FUNCTION(0x2, "s_rsb"), /* SDA */ 32 SUNXI_FUNCTION(0x3, "s_i2c"), /* SDA */ 33 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* PL_EINT1 */ 34 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2), 35 SUNXI_FUNCTION(0x0, "gpio_in"), 36 SUNXI_FUNCTION(0x1, "gpio_out"), 37 SUNXI_FUNCTION(0x2, "s_uart"), /* TX */ 38 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), /* PL_EINT2 */ 39 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3), 40 SUNXI_FUNCTION(0x0, "gpio_in"), 41 SUNXI_FUNCTION(0x1, "gpio_out"), 42 SUNXI_FUNCTION(0x2, "s_uart"), /* RX */ 43 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* PL_EINT3 */ 44 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4), 45 SUNXI_FUNCTION(0x0, "gpio_in"), 46 SUNXI_FUNCTION(0x1, "gpio_out"), 47 SUNXI_FUNCTION(0x2, "s_jtag"), /* MS */ 48 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* PL_EINT4 */ 49 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5), 50 SUNXI_FUNCTION(0x0, "gpio_in"), 51 SUNXI_FUNCTION(0x1, "gpio_out"), 52 SUNXI_FUNCTION(0x2, "s_jtag"), /* CK */ 53 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), /* PL_EINT5 */ 54 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6), 55 SUNXI_FUNCTION(0x0, "gpio_in"), 56 SUNXI_FUNCTION(0x1, "gpio_out"), 57 SUNXI_FUNCTION(0x2, "s_jtag"), /* DO */ 58 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), /* PL_EINT6 */ 59 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7), 60 SUNXI_FUNCTION(0x0, "gpio_in"), 61 SUNXI_FUNCTION(0x1, "gpio_out"), 62 SUNXI_FUNCTION(0x2, "s_jtag"), /* DI */ 63 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), /* PL_EINT7 */ 64 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8), 65 SUNXI_FUNCTION(0x0, "gpio_in"), 66 SUNXI_FUNCTION(0x1, "gpio_out"), 67 SUNXI_FUNCTION(0x2, "s_pwm"), 68 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), /* PL_EINT8 */ 69 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9), 70 SUNXI_FUNCTION(0x0, "gpio_in"), 71 SUNXI_FUNCTION(0x1, "gpio_out"), 72 SUNXI_FUNCTION(0x2, "s_cir_rx"), 73 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* PL_EINT9 */ 74 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10), 75 SUNXI_FUNCTION(0x0, "gpio_in"), 76 SUNXI_FUNCTION(0x1, "gpio_out"), 77 SUNXI_FUNCTION(0x2, "s_w1"), 78 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PL_EINT10 */ 79 /* Hole */ 80 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 0), 81 SUNXI_FUNCTION(0x0, "gpio_in"), 82 SUNXI_FUNCTION(0x1, "gpio_out"), 83 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)), /* PM_EINT0 */ 84 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 1), 85 SUNXI_FUNCTION(0x0, "gpio_in"), 86 SUNXI_FUNCTION(0x1, "gpio_out"), 87 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)), /* PM_EINT1 */ 88 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 2), 89 SUNXI_FUNCTION(0x0, "gpio_in"), 90 SUNXI_FUNCTION(0x1, "gpio_out"), 91 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2), /* PM_EINT2 */ 92 SUNXI_FUNCTION(0x3, "1wire")), 93 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 3), 94 SUNXI_FUNCTION(0x0, "gpio_in"), 95 SUNXI_FUNCTION(0x1, "gpio_out"), 96 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)), /* PM_EINT3 */ 97 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 4), 98 SUNXI_FUNCTION(0x0, "gpio_in"), 99 SUNXI_FUNCTION(0x1, "gpio_out"), 100 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)), /* PM_EINT4 */ 101 }; 102 103 static const struct sunxi_pinctrl_desc sun50i_h6_r_pinctrl_data = { 104 .pins = sun50i_h6_r_pins, 105 .npins = ARRAY_SIZE(sun50i_h6_r_pins), 106 .pin_base = PL_BASE, 107 .irq_banks = 2, 108 .io_bias_cfg_variant = BIAS_VOLTAGE_PIO_POW_MODE_SEL, 109 }; 110 111 static int sun50i_h6_r_pinctrl_probe(struct platform_device *pdev) 112 { 113 return sunxi_pinctrl_init(pdev, 114 &sun50i_h6_r_pinctrl_data); 115 } 116 117 static const struct of_device_id sun50i_h6_r_pinctrl_match[] = { 118 { .compatible = "allwinner,sun50i-h6-r-pinctrl", }, 119 {} 120 }; 121 122 static struct platform_driver sun50i_h6_r_pinctrl_driver = { 123 .probe = sun50i_h6_r_pinctrl_probe, 124 .driver = { 125 .name = "sun50i-h6-r-pinctrl", 126 .of_match_table = sun50i_h6_r_pinctrl_match, 127 }, 128 }; 129 builtin_platform_driver(sun50i_h6_r_pinctrl_driver); 130