1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Allwinner H6 R_PIO pin controller driver 4 * 5 * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io> 6 * 7 * Based on pinctrl-sun6i-a31-r.c, which is: 8 * Copyright (C) 2014 Boris Brezillon 9 * Boris Brezillon <boris.brezillon@free-electrons.com> 10 * Copyright (C) 2014 Maxime Ripard 11 * Maxime Ripard <maxime.ripard@free-electrons.com> 12 */ 13 14 #include <linux/init.h> 15 #include <linux/platform_device.h> 16 #include <linux/of.h> 17 #include <linux/of_device.h> 18 #include <linux/pinctrl/pinctrl.h> 19 #include <linux/reset.h> 20 21 #include "pinctrl-sunxi.h" 22 23 static const struct sunxi_desc_pin sun50i_h6_r_pins[] = { 24 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0), 25 SUNXI_FUNCTION(0x0, "gpio_in"), 26 SUNXI_FUNCTION(0x1, "gpio_out"), 27 SUNXI_FUNCTION(0x2, "s_rsb"), /* SCK */ 28 SUNXI_FUNCTION(0x3, "s_i2c"), /* SCK */ 29 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PL_EINT0 */ 30 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1), 31 SUNXI_FUNCTION(0x0, "gpio_in"), 32 SUNXI_FUNCTION(0x1, "gpio_out"), 33 SUNXI_FUNCTION(0x2, "s_rsb"), /* SDA */ 34 SUNXI_FUNCTION(0x3, "s_i2c"), /* SDA */ 35 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* PL_EINT1 */ 36 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2), 37 SUNXI_FUNCTION(0x0, "gpio_in"), 38 SUNXI_FUNCTION(0x1, "gpio_out"), 39 SUNXI_FUNCTION(0x2, "s_uart"), /* TX */ 40 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), /* PL_EINT2 */ 41 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3), 42 SUNXI_FUNCTION(0x0, "gpio_in"), 43 SUNXI_FUNCTION(0x1, "gpio_out"), 44 SUNXI_FUNCTION(0x2, "s_uart"), /* RX */ 45 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* PL_EINT3 */ 46 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4), 47 SUNXI_FUNCTION(0x0, "gpio_in"), 48 SUNXI_FUNCTION(0x1, "gpio_out"), 49 SUNXI_FUNCTION(0x2, "s_jtag"), /* MS */ 50 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* PL_EINT4 */ 51 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5), 52 SUNXI_FUNCTION(0x0, "gpio_in"), 53 SUNXI_FUNCTION(0x1, "gpio_out"), 54 SUNXI_FUNCTION(0x2, "s_jtag"), /* CK */ 55 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), /* PL_EINT5 */ 56 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6), 57 SUNXI_FUNCTION(0x0, "gpio_in"), 58 SUNXI_FUNCTION(0x1, "gpio_out"), 59 SUNXI_FUNCTION(0x2, "s_jtag"), /* DO */ 60 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), /* PL_EINT6 */ 61 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7), 62 SUNXI_FUNCTION(0x0, "gpio_in"), 63 SUNXI_FUNCTION(0x1, "gpio_out"), 64 SUNXI_FUNCTION(0x2, "s_jtag"), /* DI */ 65 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), /* PL_EINT7 */ 66 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8), 67 SUNXI_FUNCTION(0x0, "gpio_in"), 68 SUNXI_FUNCTION(0x1, "gpio_out"), 69 SUNXI_FUNCTION(0x2, "s_pwm"), 70 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), /* PL_EINT8 */ 71 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9), 72 SUNXI_FUNCTION(0x0, "gpio_in"), 73 SUNXI_FUNCTION(0x1, "gpio_out"), 74 SUNXI_FUNCTION(0x2, "s_cir_rx"), 75 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* PL_EINT9 */ 76 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10), 77 SUNXI_FUNCTION(0x0, "gpio_in"), 78 SUNXI_FUNCTION(0x1, "gpio_out"), 79 SUNXI_FUNCTION(0x2, "s_w1"), 80 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PL_EINT10 */ 81 /* Hole */ 82 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 0), 83 SUNXI_FUNCTION(0x0, "gpio_in"), 84 SUNXI_FUNCTION(0x1, "gpio_out"), 85 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)), /* PM_EINT0 */ 86 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 1), 87 SUNXI_FUNCTION(0x0, "gpio_in"), 88 SUNXI_FUNCTION(0x1, "gpio_out"), 89 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)), /* PM_EINT1 */ 90 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 2), 91 SUNXI_FUNCTION(0x0, "gpio_in"), 92 SUNXI_FUNCTION(0x1, "gpio_out"), 93 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2), /* PM_EINT2 */ 94 SUNXI_FUNCTION(0x3, "1wire")), 95 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 3), 96 SUNXI_FUNCTION(0x0, "gpio_in"), 97 SUNXI_FUNCTION(0x1, "gpio_out"), 98 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)), /* PM_EINT3 */ 99 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 4), 100 SUNXI_FUNCTION(0x0, "gpio_in"), 101 SUNXI_FUNCTION(0x1, "gpio_out"), 102 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)), /* PM_EINT4 */ 103 }; 104 105 static const struct sunxi_pinctrl_desc sun50i_h6_r_pinctrl_data = { 106 .pins = sun50i_h6_r_pins, 107 .npins = ARRAY_SIZE(sun50i_h6_r_pins), 108 .pin_base = PL_BASE, 109 .irq_banks = 2, 110 }; 111 112 static int sun50i_h6_r_pinctrl_probe(struct platform_device *pdev) 113 { 114 return sunxi_pinctrl_init(pdev, 115 &sun50i_h6_r_pinctrl_data); 116 } 117 118 static const struct of_device_id sun50i_h6_r_pinctrl_match[] = { 119 { .compatible = "allwinner,sun50i-h6-r-pinctrl", }, 120 {} 121 }; 122 123 static struct platform_driver sun50i_h6_r_pinctrl_driver = { 124 .probe = sun50i_h6_r_pinctrl_probe, 125 .driver = { 126 .name = "sun50i-h6-r-pinctrl", 127 .of_match_table = sun50i_h6_r_pinctrl_match, 128 }, 129 }; 130 builtin_platform_driver(sun50i_h6_r_pinctrl_driver); 131