1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Spreadtrum pin controller driver 4 * Copyright (C) 2017 Spreadtrum - http://www.spreadtrum.com 5 */ 6 7 #include <linux/debugfs.h> 8 #include <linux/err.h> 9 #include <linux/init.h> 10 #include <linux/io.h> 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/of.h> 14 #include <linux/platform_device.h> 15 #include <linux/seq_file.h> 16 #include <linux/slab.h> 17 18 #include <linux/pinctrl/consumer.h> 19 #include <linux/pinctrl/machine.h> 20 #include <linux/pinctrl/pinconf-generic.h> 21 #include <linux/pinctrl/pinconf.h> 22 #include <linux/pinctrl/pinctrl.h> 23 #include <linux/pinctrl/pinmux.h> 24 25 #include "../core.h" 26 #include "../pinmux.h" 27 #include "../pinconf.h" 28 #include "../pinctrl-utils.h" 29 #include "pinctrl-sprd.h" 30 31 #define PINCTRL_BIT_MASK(width) (~(~0UL << (width))) 32 #define PINCTRL_REG_OFFSET 0x20 33 #define PINCTRL_REG_MISC_OFFSET 0x4020 34 #define PINCTRL_REG_LEN 0x4 35 36 #define PIN_FUNC_MASK (BIT(4) | BIT(5)) 37 #define PIN_FUNC_SEL_1 ~PIN_FUNC_MASK 38 #define PIN_FUNC_SEL_2 BIT(4) 39 #define PIN_FUNC_SEL_3 BIT(5) 40 #define PIN_FUNC_SEL_4 PIN_FUNC_MASK 41 42 #define AP_SLEEP_MODE BIT(13) 43 #define PUBCP_SLEEP_MODE BIT(14) 44 #define TGLDSP_SLEEP_MODE BIT(15) 45 #define AGDSP_SLEEP_MODE BIT(16) 46 #define CM4_SLEEP_MODE BIT(17) 47 #define SLEEP_MODE_MASK GENMASK(5, 0) 48 #define SLEEP_MODE_SHIFT 13 49 50 #define SLEEP_INPUT BIT(1) 51 #define SLEEP_INPUT_MASK 0x1 52 #define SLEEP_INPUT_SHIFT 1 53 54 #define SLEEP_OUTPUT BIT(0) 55 #define SLEEP_OUTPUT_MASK 0x1 56 #define SLEEP_OUTPUT_SHIFT 0 57 58 #define DRIVE_STRENGTH_MASK GENMASK(3, 0) 59 #define DRIVE_STRENGTH_SHIFT 19 60 61 #define SLEEP_PULL_DOWN BIT(2) 62 #define SLEEP_PULL_DOWN_MASK 0x1 63 #define SLEEP_PULL_DOWN_SHIFT 2 64 65 #define PULL_DOWN BIT(6) 66 #define PULL_DOWN_MASK 0x1 67 #define PULL_DOWN_SHIFT 6 68 69 #define SLEEP_PULL_UP BIT(3) 70 #define SLEEP_PULL_UP_MASK 0x1 71 #define SLEEP_PULL_UP_SHIFT 3 72 73 #define PULL_UP_4_7K (BIT(12) | BIT(7)) 74 #define PULL_UP_20K BIT(7) 75 #define PULL_UP_MASK 0x21 76 #define PULL_UP_SHIFT 7 77 78 #define INPUT_SCHMITT BIT(11) 79 #define INPUT_SCHMITT_MASK 0x1 80 #define INPUT_SCHMITT_SHIFT 11 81 82 enum pin_sleep_mode { 83 AP_SLEEP = BIT(0), 84 PUBCP_SLEEP = BIT(1), 85 TGLDSP_SLEEP = BIT(2), 86 AGDSP_SLEEP = BIT(3), 87 CM4_SLEEP = BIT(4), 88 }; 89 90 enum pin_func_sel { 91 PIN_FUNC_1, 92 PIN_FUNC_2, 93 PIN_FUNC_3, 94 PIN_FUNC_4, 95 PIN_FUNC_MAX, 96 }; 97 98 /** 99 * struct sprd_pin: represent one pin's description 100 * @name: pin name 101 * @number: pin number 102 * @type: pin type, can be GLOBAL_CTRL_PIN/COMMON_PIN/MISC_PIN 103 * @reg: pin register address 104 * @bit_offset: bit offset in pin register 105 * @bit_width: bit width in pin register 106 */ 107 struct sprd_pin { 108 const char *name; 109 unsigned int number; 110 enum pin_type type; 111 unsigned long reg; 112 unsigned long bit_offset; 113 unsigned long bit_width; 114 }; 115 116 /** 117 * struct sprd_pin_group: represent one group's description 118 * @name: group name 119 * @npins: pin numbers of this group 120 * @pins: pointer to pins array 121 */ 122 struct sprd_pin_group { 123 const char *name; 124 unsigned int npins; 125 unsigned int *pins; 126 }; 127 128 /** 129 * struct sprd_pinctrl_soc_info: represent the SoC's pins description 130 * @groups: pointer to groups of pins 131 * @ngroups: group numbers of the whole SoC 132 * @pins: pointer to pins description 133 * @npins: pin numbers of the whole SoC 134 * @grp_names: pointer to group names array 135 */ 136 struct sprd_pinctrl_soc_info { 137 struct sprd_pin_group *groups; 138 unsigned int ngroups; 139 struct sprd_pin *pins; 140 unsigned int npins; 141 const char **grp_names; 142 }; 143 144 /** 145 * struct sprd_pinctrl: represent the pin controller device 146 * @dev: pointer to the device structure 147 * @pctl: pointer to the pinctrl handle 148 * @base: base address of the controller 149 * @info: pointer to SoC's pins description information 150 */ 151 struct sprd_pinctrl { 152 struct device *dev; 153 struct pinctrl_dev *pctl; 154 void __iomem *base; 155 struct sprd_pinctrl_soc_info *info; 156 }; 157 158 #define SPRD_PIN_CONFIG_CONTROL (PIN_CONFIG_END + 1) 159 #define SPRD_PIN_CONFIG_SLEEP_MODE (PIN_CONFIG_END + 2) 160 161 static int sprd_pinctrl_get_id_by_name(struct sprd_pinctrl *sprd_pctl, 162 const char *name) 163 { 164 struct sprd_pinctrl_soc_info *info = sprd_pctl->info; 165 int i; 166 167 for (i = 0; i < info->npins; i++) { 168 if (!strcmp(info->pins[i].name, name)) 169 return info->pins[i].number; 170 } 171 172 return -ENODEV; 173 } 174 175 static struct sprd_pin * 176 sprd_pinctrl_get_pin_by_id(struct sprd_pinctrl *sprd_pctl, unsigned int id) 177 { 178 struct sprd_pinctrl_soc_info *info = sprd_pctl->info; 179 struct sprd_pin *pin = NULL; 180 int i; 181 182 for (i = 0; i < info->npins; i++) { 183 if (info->pins[i].number == id) { 184 pin = &info->pins[i]; 185 break; 186 } 187 } 188 189 return pin; 190 } 191 192 static const struct sprd_pin_group * 193 sprd_pinctrl_find_group_by_name(struct sprd_pinctrl *sprd_pctl, 194 const char *name) 195 { 196 struct sprd_pinctrl_soc_info *info = sprd_pctl->info; 197 const struct sprd_pin_group *grp = NULL; 198 int i; 199 200 for (i = 0; i < info->ngroups; i++) { 201 if (!strcmp(info->groups[i].name, name)) { 202 grp = &info->groups[i]; 203 break; 204 } 205 } 206 207 return grp; 208 } 209 210 static int sprd_pctrl_group_count(struct pinctrl_dev *pctldev) 211 { 212 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 213 struct sprd_pinctrl_soc_info *info = pctl->info; 214 215 return info->ngroups; 216 } 217 218 static const char *sprd_pctrl_group_name(struct pinctrl_dev *pctldev, 219 unsigned int selector) 220 { 221 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 222 struct sprd_pinctrl_soc_info *info = pctl->info; 223 224 return info->groups[selector].name; 225 } 226 227 static int sprd_pctrl_group_pins(struct pinctrl_dev *pctldev, 228 unsigned int selector, 229 const unsigned int **pins, 230 unsigned int *npins) 231 { 232 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 233 struct sprd_pinctrl_soc_info *info = pctl->info; 234 235 if (selector >= info->ngroups) 236 return -EINVAL; 237 238 *pins = info->groups[selector].pins; 239 *npins = info->groups[selector].npins; 240 241 return 0; 242 } 243 244 static int sprd_dt_node_to_map(struct pinctrl_dev *pctldev, 245 struct device_node *np, 246 struct pinctrl_map **map, 247 unsigned int *num_maps) 248 { 249 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 250 const struct sprd_pin_group *grp; 251 unsigned long *configs = NULL; 252 unsigned int num_configs = 0; 253 unsigned int reserved_maps = 0; 254 unsigned int reserve = 0; 255 const char *function; 256 enum pinctrl_map_type type; 257 int ret; 258 259 grp = sprd_pinctrl_find_group_by_name(pctl, np->name); 260 if (!grp) { 261 dev_err(pctl->dev, "unable to find group for node %pOF\n", np); 262 return -EINVAL; 263 } 264 265 ret = of_property_count_strings(np, "pins"); 266 if (ret < 0) 267 return ret; 268 269 if (ret == 1) 270 type = PIN_MAP_TYPE_CONFIGS_PIN; 271 else 272 type = PIN_MAP_TYPE_CONFIGS_GROUP; 273 274 ret = of_property_read_string(np, "function", &function); 275 if (ret < 0) { 276 if (ret != -EINVAL) 277 dev_err(pctl->dev, 278 "%pOF: could not parse property function\n", np); 279 function = NULL; 280 } 281 282 ret = pinconf_generic_parse_dt_config(np, pctldev, &configs, 283 &num_configs); 284 if (ret < 0) { 285 dev_err(pctl->dev, "%pOF: could not parse node property\n", np); 286 return ret; 287 } 288 289 *map = NULL; 290 *num_maps = 0; 291 292 if (function != NULL) 293 reserve++; 294 if (num_configs) 295 reserve++; 296 297 ret = pinctrl_utils_reserve_map(pctldev, map, &reserved_maps, 298 num_maps, reserve); 299 if (ret < 0) 300 goto out; 301 302 if (function) { 303 ret = pinctrl_utils_add_map_mux(pctldev, map, 304 &reserved_maps, num_maps, 305 grp->name, function); 306 if (ret < 0) 307 goto out; 308 } 309 310 if (num_configs) { 311 const char *group_or_pin; 312 unsigned int pin_id; 313 314 if (type == PIN_MAP_TYPE_CONFIGS_PIN) { 315 pin_id = grp->pins[0]; 316 group_or_pin = pin_get_name(pctldev, pin_id); 317 } else { 318 group_or_pin = grp->name; 319 } 320 321 ret = pinctrl_utils_add_map_configs(pctldev, map, 322 &reserved_maps, num_maps, 323 group_or_pin, configs, 324 num_configs, type); 325 } 326 327 out: 328 kfree(configs); 329 return ret; 330 } 331 332 static void sprd_pctrl_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, 333 unsigned int offset) 334 { 335 seq_printf(s, "%s", dev_name(pctldev->dev)); 336 } 337 338 static const struct pinctrl_ops sprd_pctrl_ops = { 339 .get_groups_count = sprd_pctrl_group_count, 340 .get_group_name = sprd_pctrl_group_name, 341 .get_group_pins = sprd_pctrl_group_pins, 342 .pin_dbg_show = sprd_pctrl_dbg_show, 343 .dt_node_to_map = sprd_dt_node_to_map, 344 .dt_free_map = pinctrl_utils_free_map, 345 }; 346 347 static int sprd_pmx_get_function_count(struct pinctrl_dev *pctldev) 348 { 349 return PIN_FUNC_MAX; 350 } 351 352 static const char *sprd_pmx_get_function_name(struct pinctrl_dev *pctldev, 353 unsigned int selector) 354 { 355 switch (selector) { 356 case PIN_FUNC_1: 357 return "func1"; 358 case PIN_FUNC_2: 359 return "func2"; 360 case PIN_FUNC_3: 361 return "func3"; 362 case PIN_FUNC_4: 363 return "func4"; 364 default: 365 return "null"; 366 } 367 } 368 369 static int sprd_pmx_get_function_groups(struct pinctrl_dev *pctldev, 370 unsigned int selector, 371 const char * const **groups, 372 unsigned int * const num_groups) 373 { 374 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 375 struct sprd_pinctrl_soc_info *info = pctl->info; 376 377 *groups = info->grp_names; 378 *num_groups = info->ngroups; 379 380 return 0; 381 } 382 383 static int sprd_pmx_set_mux(struct pinctrl_dev *pctldev, 384 unsigned int func_selector, 385 unsigned int group_selector) 386 { 387 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 388 struct sprd_pinctrl_soc_info *info = pctl->info; 389 struct sprd_pin_group *grp = &info->groups[group_selector]; 390 unsigned int i, grp_pins = grp->npins; 391 unsigned long reg; 392 unsigned int val = 0; 393 394 if (group_selector >= info->ngroups) 395 return -EINVAL; 396 397 switch (func_selector) { 398 case PIN_FUNC_1: 399 val &= PIN_FUNC_SEL_1; 400 break; 401 case PIN_FUNC_2: 402 val |= PIN_FUNC_SEL_2; 403 break; 404 case PIN_FUNC_3: 405 val |= PIN_FUNC_SEL_3; 406 break; 407 case PIN_FUNC_4: 408 val |= PIN_FUNC_SEL_4; 409 break; 410 default: 411 break; 412 } 413 414 for (i = 0; i < grp_pins; i++) { 415 unsigned int pin_id = grp->pins[i]; 416 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id); 417 418 if (!pin || pin->type != COMMON_PIN) 419 continue; 420 421 reg = readl((void __iomem *)pin->reg); 422 reg &= ~PIN_FUNC_MASK; 423 reg |= val; 424 writel(reg, (void __iomem *)pin->reg); 425 } 426 427 return 0; 428 } 429 430 static const struct pinmux_ops sprd_pmx_ops = { 431 .get_functions_count = sprd_pmx_get_function_count, 432 .get_function_name = sprd_pmx_get_function_name, 433 .get_function_groups = sprd_pmx_get_function_groups, 434 .set_mux = sprd_pmx_set_mux, 435 }; 436 437 static int sprd_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin_id, 438 unsigned long *config) 439 { 440 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 441 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id); 442 unsigned int param = pinconf_to_config_param(*config); 443 unsigned int reg, arg; 444 445 if (!pin) 446 return -EINVAL; 447 448 if (pin->type == GLOBAL_CTRL_PIN) { 449 reg = (readl((void __iomem *)pin->reg) >> 450 pin->bit_offset) & PINCTRL_BIT_MASK(pin->bit_width); 451 } else { 452 reg = readl((void __iomem *)pin->reg); 453 } 454 455 if (pin->type == GLOBAL_CTRL_PIN && 456 param == SPRD_PIN_CONFIG_CONTROL) { 457 arg = reg; 458 } else if (pin->type == COMMON_PIN || pin->type == MISC_PIN) { 459 switch (param) { 460 case SPRD_PIN_CONFIG_SLEEP_MODE: 461 arg = (reg >> SLEEP_MODE_SHIFT) & SLEEP_MODE_MASK; 462 break; 463 case PIN_CONFIG_INPUT_ENABLE: 464 arg = (reg >> SLEEP_INPUT_SHIFT) & SLEEP_INPUT_MASK; 465 break; 466 case PIN_CONFIG_OUTPUT_ENABLE: 467 arg = reg & SLEEP_OUTPUT_MASK; 468 break; 469 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE: 470 if ((reg & SLEEP_OUTPUT) || (reg & SLEEP_INPUT)) 471 return -EINVAL; 472 473 arg = 1; 474 break; 475 case PIN_CONFIG_DRIVE_STRENGTH: 476 arg = (reg >> DRIVE_STRENGTH_SHIFT) & 477 DRIVE_STRENGTH_MASK; 478 break; 479 case PIN_CONFIG_BIAS_PULL_DOWN: 480 /* combine sleep pull down and pull down config */ 481 arg = ((reg >> SLEEP_PULL_DOWN_SHIFT) & 482 SLEEP_PULL_DOWN_MASK) << 16; 483 arg |= (reg >> PULL_DOWN_SHIFT) & PULL_DOWN_MASK; 484 break; 485 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 486 arg = (reg >> INPUT_SCHMITT_SHIFT) & INPUT_SCHMITT_MASK; 487 break; 488 case PIN_CONFIG_BIAS_PULL_UP: 489 /* combine sleep pull up and pull up config */ 490 arg = ((reg >> SLEEP_PULL_UP_SHIFT) & 491 SLEEP_PULL_UP_MASK) << 16; 492 arg |= (reg >> PULL_UP_SHIFT) & PULL_UP_MASK; 493 break; 494 case PIN_CONFIG_BIAS_DISABLE: 495 if ((reg & (SLEEP_PULL_DOWN | SLEEP_PULL_UP)) || 496 (reg & (PULL_DOWN | PULL_UP_4_7K | PULL_UP_20K))) 497 return -EINVAL; 498 499 arg = 1; 500 break; 501 case PIN_CONFIG_SLEEP_HARDWARE_STATE: 502 arg = 0; 503 break; 504 default: 505 return -ENOTSUPP; 506 } 507 } else { 508 return -ENOTSUPP; 509 } 510 511 *config = pinconf_to_config_packed(param, arg); 512 return 0; 513 } 514 515 static unsigned int sprd_pinconf_drive(unsigned int mA) 516 { 517 unsigned int val = 0; 518 519 switch (mA) { 520 case 2: 521 break; 522 case 4: 523 val |= BIT(19); 524 break; 525 case 6: 526 val |= BIT(20); 527 break; 528 case 8: 529 val |= BIT(19) | BIT(20); 530 break; 531 case 10: 532 val |= BIT(21); 533 break; 534 case 12: 535 val |= BIT(21) | BIT(19); 536 break; 537 case 14: 538 val |= BIT(21) | BIT(20); 539 break; 540 case 16: 541 val |= BIT(19) | BIT(20) | BIT(21); 542 break; 543 case 20: 544 val |= BIT(22); 545 break; 546 case 21: 547 val |= BIT(22) | BIT(19); 548 break; 549 case 24: 550 val |= BIT(22) | BIT(20); 551 break; 552 case 25: 553 val |= BIT(22) | BIT(20) | BIT(19); 554 break; 555 case 27: 556 val |= BIT(22) | BIT(21); 557 break; 558 case 29: 559 val |= BIT(22) | BIT(21) | BIT(19); 560 break; 561 case 31: 562 val |= BIT(22) | BIT(21) | BIT(20); 563 break; 564 case 33: 565 val |= BIT(22) | BIT(21) | BIT(20) | BIT(19); 566 break; 567 default: 568 break; 569 } 570 571 return val; 572 } 573 574 static bool sprd_pinctrl_check_sleep_config(unsigned long *configs, 575 unsigned int num_configs) 576 { 577 unsigned int param; 578 int i; 579 580 for (i = 0; i < num_configs; i++) { 581 param = pinconf_to_config_param(configs[i]); 582 if (param == PIN_CONFIG_SLEEP_HARDWARE_STATE) 583 return true; 584 } 585 586 return false; 587 } 588 589 static int sprd_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin_id, 590 unsigned long *configs, unsigned int num_configs) 591 { 592 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 593 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id); 594 bool is_sleep_config; 595 unsigned long reg; 596 int i; 597 598 if (!pin) 599 return -EINVAL; 600 601 is_sleep_config = sprd_pinctrl_check_sleep_config(configs, num_configs); 602 603 for (i = 0; i < num_configs; i++) { 604 unsigned int param, arg, shift, mask, val; 605 606 param = pinconf_to_config_param(configs[i]); 607 arg = pinconf_to_config_argument(configs[i]); 608 609 val = 0; 610 shift = 0; 611 mask = 0; 612 if (pin->type == GLOBAL_CTRL_PIN && 613 param == SPRD_PIN_CONFIG_CONTROL) { 614 val = arg; 615 } else if (pin->type == COMMON_PIN || pin->type == MISC_PIN) { 616 switch (param) { 617 case SPRD_PIN_CONFIG_SLEEP_MODE: 618 if (arg & AP_SLEEP) 619 val |= AP_SLEEP_MODE; 620 if (arg & PUBCP_SLEEP) 621 val |= PUBCP_SLEEP_MODE; 622 if (arg & TGLDSP_SLEEP) 623 val |= TGLDSP_SLEEP_MODE; 624 if (arg & AGDSP_SLEEP) 625 val |= AGDSP_SLEEP_MODE; 626 if (arg & CM4_SLEEP) 627 val |= CM4_SLEEP_MODE; 628 629 mask = SLEEP_MODE_MASK; 630 shift = SLEEP_MODE_SHIFT; 631 break; 632 case PIN_CONFIG_INPUT_ENABLE: 633 if (is_sleep_config == true) { 634 if (arg > 0) 635 val |= SLEEP_INPUT; 636 else 637 val &= ~SLEEP_INPUT; 638 639 mask = SLEEP_INPUT_MASK; 640 shift = SLEEP_INPUT_SHIFT; 641 } 642 break; 643 case PIN_CONFIG_OUTPUT_ENABLE: 644 if (is_sleep_config == true) { 645 if (arg > 0) 646 val |= SLEEP_OUTPUT; 647 else 648 val &= ~SLEEP_OUTPUT; 649 650 mask = SLEEP_OUTPUT_MASK; 651 shift = SLEEP_OUTPUT_SHIFT; 652 } 653 break; 654 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE: 655 if (is_sleep_config == true) { 656 val = shift = 0; 657 mask = SLEEP_OUTPUT | SLEEP_INPUT; 658 } 659 break; 660 case PIN_CONFIG_DRIVE_STRENGTH: 661 if (arg < 2 || arg > 60) 662 return -EINVAL; 663 664 val = sprd_pinconf_drive(arg); 665 mask = DRIVE_STRENGTH_MASK; 666 shift = DRIVE_STRENGTH_SHIFT; 667 break; 668 case PIN_CONFIG_BIAS_PULL_DOWN: 669 if (is_sleep_config == true) { 670 val |= SLEEP_PULL_DOWN; 671 mask = SLEEP_PULL_DOWN_MASK; 672 shift = SLEEP_PULL_DOWN_SHIFT; 673 } else { 674 val |= PULL_DOWN; 675 mask = PULL_DOWN_MASK; 676 shift = PULL_DOWN_SHIFT; 677 } 678 break; 679 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 680 if (arg > 0) 681 val |= INPUT_SCHMITT; 682 else 683 val &= ~INPUT_SCHMITT; 684 685 mask = INPUT_SCHMITT_MASK; 686 shift = INPUT_SCHMITT_SHIFT; 687 break; 688 case PIN_CONFIG_BIAS_PULL_UP: 689 if (is_sleep_config) { 690 val |= SLEEP_PULL_UP; 691 mask = SLEEP_PULL_UP_MASK; 692 shift = SLEEP_PULL_UP_SHIFT; 693 } else { 694 if (arg == 20000) 695 val |= PULL_UP_20K; 696 else if (arg == 4700) 697 val |= PULL_UP_4_7K; 698 699 mask = PULL_UP_MASK; 700 shift = PULL_UP_SHIFT; 701 } 702 break; 703 case PIN_CONFIG_BIAS_DISABLE: 704 if (is_sleep_config == true) { 705 val = shift = 0; 706 mask = SLEEP_PULL_DOWN | SLEEP_PULL_UP; 707 } else { 708 val = shift = 0; 709 mask = PULL_DOWN | PULL_UP_20K | 710 PULL_UP_4_7K; 711 } 712 break; 713 case PIN_CONFIG_SLEEP_HARDWARE_STATE: 714 continue; 715 default: 716 return -ENOTSUPP; 717 } 718 } else { 719 return -ENOTSUPP; 720 } 721 722 if (pin->type == GLOBAL_CTRL_PIN) { 723 reg = readl((void __iomem *)pin->reg); 724 reg &= ~(PINCTRL_BIT_MASK(pin->bit_width) 725 << pin->bit_offset); 726 reg |= (val & PINCTRL_BIT_MASK(pin->bit_width)) 727 << pin->bit_offset; 728 writel(reg, (void __iomem *)pin->reg); 729 } else { 730 reg = readl((void __iomem *)pin->reg); 731 reg &= ~(mask << shift); 732 reg |= val; 733 writel(reg, (void __iomem *)pin->reg); 734 } 735 } 736 737 return 0; 738 } 739 740 static int sprd_pinconf_group_get(struct pinctrl_dev *pctldev, 741 unsigned int selector, unsigned long *config) 742 { 743 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 744 struct sprd_pinctrl_soc_info *info = pctl->info; 745 struct sprd_pin_group *grp; 746 unsigned int pin_id; 747 748 if (selector >= info->ngroups) 749 return -EINVAL; 750 751 grp = &info->groups[selector]; 752 pin_id = grp->pins[0]; 753 754 return sprd_pinconf_get(pctldev, pin_id, config); 755 } 756 757 static int sprd_pinconf_group_set(struct pinctrl_dev *pctldev, 758 unsigned int selector, 759 unsigned long *configs, 760 unsigned int num_configs) 761 { 762 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 763 struct sprd_pinctrl_soc_info *info = pctl->info; 764 struct sprd_pin_group *grp; 765 int ret, i; 766 767 if (selector >= info->ngroups) 768 return -EINVAL; 769 770 grp = &info->groups[selector]; 771 772 for (i = 0; i < grp->npins; i++) { 773 unsigned int pin_id = grp->pins[i]; 774 775 ret = sprd_pinconf_set(pctldev, pin_id, configs, num_configs); 776 if (ret) 777 return ret; 778 } 779 780 return 0; 781 } 782 783 static int sprd_pinconf_get_config(struct pinctrl_dev *pctldev, 784 unsigned int pin_id, 785 unsigned long *config) 786 { 787 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 788 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id); 789 790 if (!pin) 791 return -EINVAL; 792 793 if (pin->type == GLOBAL_CTRL_PIN) { 794 *config = (readl((void __iomem *)pin->reg) >> 795 pin->bit_offset) & PINCTRL_BIT_MASK(pin->bit_width); 796 } else { 797 *config = readl((void __iomem *)pin->reg); 798 } 799 800 return 0; 801 } 802 803 static void sprd_pinconf_dbg_show(struct pinctrl_dev *pctldev, 804 struct seq_file *s, unsigned int pin_id) 805 { 806 unsigned long config; 807 int ret; 808 809 ret = sprd_pinconf_get_config(pctldev, pin_id, &config); 810 if (ret) 811 return; 812 813 seq_printf(s, "0x%lx", config); 814 } 815 816 static void sprd_pinconf_group_dbg_show(struct pinctrl_dev *pctldev, 817 struct seq_file *s, 818 unsigned int selector) 819 { 820 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 821 struct sprd_pinctrl_soc_info *info = pctl->info; 822 struct sprd_pin_group *grp; 823 unsigned long config; 824 const char *name; 825 int i, ret; 826 827 if (selector >= info->ngroups) 828 return; 829 830 grp = &info->groups[selector]; 831 832 seq_putc(s, '\n'); 833 for (i = 0; i < grp->npins; i++, config++) { 834 unsigned int pin_id = grp->pins[i]; 835 836 name = pin_get_name(pctldev, pin_id); 837 ret = sprd_pinconf_get_config(pctldev, pin_id, &config); 838 if (ret) 839 return; 840 841 seq_printf(s, "%s: 0x%lx ", name, config); 842 } 843 } 844 845 static const struct pinconf_ops sprd_pinconf_ops = { 846 .is_generic = true, 847 .pin_config_get = sprd_pinconf_get, 848 .pin_config_set = sprd_pinconf_set, 849 .pin_config_group_get = sprd_pinconf_group_get, 850 .pin_config_group_set = sprd_pinconf_group_set, 851 .pin_config_dbg_show = sprd_pinconf_dbg_show, 852 .pin_config_group_dbg_show = sprd_pinconf_group_dbg_show, 853 }; 854 855 static const struct pinconf_generic_params sprd_dt_params[] = { 856 {"sprd,control", SPRD_PIN_CONFIG_CONTROL, 0}, 857 {"sprd,sleep-mode", SPRD_PIN_CONFIG_SLEEP_MODE, 0}, 858 }; 859 860 #ifdef CONFIG_DEBUG_FS 861 static const struct pin_config_item sprd_conf_items[] = { 862 PCONFDUMP(SPRD_PIN_CONFIG_CONTROL, "global control", NULL, true), 863 PCONFDUMP(SPRD_PIN_CONFIG_SLEEP_MODE, "sleep mode", NULL, true), 864 }; 865 #endif 866 867 static struct pinctrl_desc sprd_pinctrl_desc = { 868 .pctlops = &sprd_pctrl_ops, 869 .pmxops = &sprd_pmx_ops, 870 .confops = &sprd_pinconf_ops, 871 .num_custom_params = ARRAY_SIZE(sprd_dt_params), 872 .custom_params = sprd_dt_params, 873 #ifdef CONFIG_DEBUG_FS 874 .custom_conf_items = sprd_conf_items, 875 #endif 876 .owner = THIS_MODULE, 877 }; 878 879 static int sprd_pinctrl_parse_groups(struct device_node *np, 880 struct sprd_pinctrl *sprd_pctl, 881 struct sprd_pin_group *grp) 882 { 883 struct property *prop; 884 const char *pin_name; 885 int ret, i = 0; 886 887 ret = of_property_count_strings(np, "pins"); 888 if (ret < 0) 889 return ret; 890 891 grp->name = np->name; 892 grp->npins = ret; 893 grp->pins = devm_kcalloc(sprd_pctl->dev, 894 grp->npins, sizeof(unsigned int), 895 GFP_KERNEL); 896 if (!grp->pins) 897 return -ENOMEM; 898 899 of_property_for_each_string(np, "pins", prop, pin_name) { 900 ret = sprd_pinctrl_get_id_by_name(sprd_pctl, pin_name); 901 if (ret >= 0) 902 grp->pins[i++] = ret; 903 } 904 905 for (i = 0; i < grp->npins; i++) { 906 dev_dbg(sprd_pctl->dev, 907 "Group[%s] contains [%d] pins: id = %d\n", 908 grp->name, grp->npins, grp->pins[i]); 909 } 910 911 return 0; 912 } 913 914 static unsigned int sprd_pinctrl_get_groups(struct device_node *np) 915 { 916 struct device_node *child; 917 unsigned int group_cnt, cnt; 918 919 group_cnt = of_get_child_count(np); 920 921 for_each_child_of_node(np, child) { 922 cnt = of_get_child_count(child); 923 if (cnt > 0) 924 group_cnt += cnt; 925 } 926 927 return group_cnt; 928 } 929 930 static int sprd_pinctrl_parse_dt(struct sprd_pinctrl *sprd_pctl) 931 { 932 struct sprd_pinctrl_soc_info *info = sprd_pctl->info; 933 struct device_node *np = sprd_pctl->dev->of_node; 934 struct sprd_pin_group *grp; 935 const char **temp; 936 int ret; 937 938 if (!np) 939 return -ENODEV; 940 941 info->ngroups = sprd_pinctrl_get_groups(np); 942 if (!info->ngroups) 943 return 0; 944 945 info->groups = devm_kcalloc(sprd_pctl->dev, 946 info->ngroups, 947 sizeof(struct sprd_pin_group), 948 GFP_KERNEL); 949 if (!info->groups) 950 return -ENOMEM; 951 952 info->grp_names = devm_kcalloc(sprd_pctl->dev, 953 info->ngroups, sizeof(char *), 954 GFP_KERNEL); 955 if (!info->grp_names) 956 return -ENOMEM; 957 958 temp = info->grp_names; 959 grp = info->groups; 960 961 for_each_child_of_node_scoped(np, child) { 962 ret = sprd_pinctrl_parse_groups(child, sprd_pctl, grp); 963 if (ret) 964 return ret; 965 966 *temp++ = grp->name; 967 grp++; 968 969 if (of_get_child_count(child) > 0) { 970 for_each_child_of_node_scoped(child, sub_child) { 971 ret = sprd_pinctrl_parse_groups(sub_child, 972 sprd_pctl, grp); 973 if (ret) 974 return ret; 975 976 *temp++ = grp->name; 977 grp++; 978 } 979 } 980 } 981 982 return 0; 983 } 984 985 static int sprd_pinctrl_add_pins(struct sprd_pinctrl *sprd_pctl, 986 struct sprd_pins_info *sprd_soc_pin_info, 987 int pins_cnt) 988 { 989 struct sprd_pinctrl_soc_info *info = sprd_pctl->info; 990 unsigned int ctrl_pin = 0, com_pin = 0; 991 struct sprd_pin *pin; 992 int i; 993 994 info->npins = pins_cnt; 995 info->pins = devm_kcalloc(sprd_pctl->dev, 996 info->npins, sizeof(struct sprd_pin), 997 GFP_KERNEL); 998 if (!info->pins) 999 return -ENOMEM; 1000 1001 for (i = 0, pin = info->pins; i < info->npins; i++, pin++) { 1002 unsigned int reg; 1003 1004 pin->name = sprd_soc_pin_info[i].name; 1005 pin->type = sprd_soc_pin_info[i].type; 1006 pin->number = sprd_soc_pin_info[i].num; 1007 reg = sprd_soc_pin_info[i].reg; 1008 if (pin->type == GLOBAL_CTRL_PIN) { 1009 pin->reg = (unsigned long)sprd_pctl->base + 1010 PINCTRL_REG_LEN * reg; 1011 pin->bit_offset = sprd_soc_pin_info[i].bit_offset; 1012 pin->bit_width = sprd_soc_pin_info[i].bit_width; 1013 ctrl_pin++; 1014 } else if (pin->type == COMMON_PIN) { 1015 pin->reg = (unsigned long)sprd_pctl->base + 1016 PINCTRL_REG_OFFSET + PINCTRL_REG_LEN * 1017 (i - ctrl_pin); 1018 com_pin++; 1019 } else if (pin->type == MISC_PIN) { 1020 pin->reg = (unsigned long)sprd_pctl->base + 1021 PINCTRL_REG_MISC_OFFSET + PINCTRL_REG_LEN * 1022 (i - ctrl_pin - com_pin); 1023 } 1024 } 1025 1026 for (i = 0, pin = info->pins; i < info->npins; pin++, i++) { 1027 dev_dbg(sprd_pctl->dev, "pin name[%s-%d], type = %d, " 1028 "bit offset = %ld, bit width = %ld, reg = 0x%lx\n", 1029 pin->name, pin->number, pin->type, 1030 pin->bit_offset, pin->bit_width, pin->reg); 1031 } 1032 1033 return 0; 1034 } 1035 1036 int sprd_pinctrl_core_probe(struct platform_device *pdev, 1037 struct sprd_pins_info *sprd_soc_pin_info, 1038 int pins_cnt) 1039 { 1040 struct sprd_pinctrl *sprd_pctl; 1041 struct sprd_pinctrl_soc_info *pinctrl_info; 1042 struct pinctrl_pin_desc *pin_desc; 1043 int ret, i; 1044 1045 sprd_pctl = devm_kzalloc(&pdev->dev, sizeof(struct sprd_pinctrl), 1046 GFP_KERNEL); 1047 if (!sprd_pctl) 1048 return -ENOMEM; 1049 1050 sprd_pctl->base = devm_platform_ioremap_resource(pdev, 0); 1051 if (IS_ERR(sprd_pctl->base)) 1052 return PTR_ERR(sprd_pctl->base); 1053 1054 pinctrl_info = devm_kzalloc(&pdev->dev, 1055 sizeof(struct sprd_pinctrl_soc_info), 1056 GFP_KERNEL); 1057 if (!pinctrl_info) 1058 return -ENOMEM; 1059 1060 sprd_pctl->info = pinctrl_info; 1061 sprd_pctl->dev = &pdev->dev; 1062 platform_set_drvdata(pdev, sprd_pctl); 1063 1064 ret = sprd_pinctrl_add_pins(sprd_pctl, sprd_soc_pin_info, pins_cnt); 1065 if (ret) { 1066 dev_err(&pdev->dev, "fail to add pins information\n"); 1067 return ret; 1068 } 1069 1070 ret = sprd_pinctrl_parse_dt(sprd_pctl); 1071 if (ret) { 1072 dev_err(&pdev->dev, "fail to parse dt properties\n"); 1073 return ret; 1074 } 1075 1076 pin_desc = devm_kcalloc(&pdev->dev, 1077 pinctrl_info->npins, 1078 sizeof(struct pinctrl_pin_desc), 1079 GFP_KERNEL); 1080 if (!pin_desc) 1081 return -ENOMEM; 1082 1083 for (i = 0; i < pinctrl_info->npins; i++) { 1084 pin_desc[i].number = pinctrl_info->pins[i].number; 1085 pin_desc[i].name = pinctrl_info->pins[i].name; 1086 pin_desc[i].drv_data = pinctrl_info; 1087 } 1088 1089 sprd_pinctrl_desc.pins = pin_desc; 1090 sprd_pinctrl_desc.name = dev_name(&pdev->dev); 1091 sprd_pinctrl_desc.npins = pinctrl_info->npins; 1092 1093 sprd_pctl->pctl = pinctrl_register(&sprd_pinctrl_desc, 1094 &pdev->dev, (void *)sprd_pctl); 1095 if (IS_ERR(sprd_pctl->pctl)) { 1096 dev_err(&pdev->dev, "could not register pinctrl driver\n"); 1097 return PTR_ERR(sprd_pctl->pctl); 1098 } 1099 1100 return 0; 1101 } 1102 EXPORT_SYMBOL_GPL(sprd_pinctrl_core_probe); 1103 1104 void sprd_pinctrl_remove(struct platform_device *pdev) 1105 { 1106 struct sprd_pinctrl *sprd_pctl = platform_get_drvdata(pdev); 1107 1108 pinctrl_unregister(sprd_pctl->pctl); 1109 } 1110 EXPORT_SYMBOL_GPL(sprd_pinctrl_remove); 1111 1112 void sprd_pinctrl_shutdown(struct platform_device *pdev) 1113 { 1114 struct pinctrl *pinctl; 1115 struct pinctrl_state *state; 1116 1117 pinctl = devm_pinctrl_get(&pdev->dev); 1118 if (IS_ERR(pinctl)) 1119 return; 1120 state = pinctrl_lookup_state(pinctl, "shutdown"); 1121 if (IS_ERR(state)) 1122 return; 1123 pinctrl_select_state(pinctl, state); 1124 } 1125 EXPORT_SYMBOL_GPL(sprd_pinctrl_shutdown); 1126 1127 MODULE_DESCRIPTION("SPREADTRUM Pin Controller Driver"); 1128 MODULE_AUTHOR("Baolin Wang <baolin.wang@spreadtrum.com>"); 1129 MODULE_LICENSE("GPL v2"); 1130