1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Spreadtrum pin controller driver 4 * Copyright (C) 2017 Spreadtrum - http://www.spreadtrum.com 5 */ 6 7 #include <linux/debugfs.h> 8 #include <linux/err.h> 9 #include <linux/init.h> 10 #include <linux/io.h> 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/of.h> 14 #include <linux/of_device.h> 15 #include <linux/platform_device.h> 16 #include <linux/pinctrl/machine.h> 17 #include <linux/pinctrl/pinconf.h> 18 #include <linux/pinctrl/pinconf-generic.h> 19 #include <linux/pinctrl/pinctrl.h> 20 #include <linux/pinctrl/pinmux.h> 21 #include <linux/slab.h> 22 23 #include "../core.h" 24 #include "../pinmux.h" 25 #include "../pinconf.h" 26 #include "../pinctrl-utils.h" 27 #include "pinctrl-sprd.h" 28 29 #define PINCTRL_BIT_MASK(width) (~(~0UL << (width))) 30 #define PINCTRL_REG_OFFSET 0x20 31 #define PINCTRL_REG_MISC_OFFSET 0x4020 32 #define PINCTRL_REG_LEN 0x4 33 34 #define PIN_FUNC_MASK (BIT(4) | BIT(5)) 35 #define PIN_FUNC_SEL_1 ~PIN_FUNC_MASK 36 #define PIN_FUNC_SEL_2 BIT(4) 37 #define PIN_FUNC_SEL_3 BIT(5) 38 #define PIN_FUNC_SEL_4 PIN_FUNC_MASK 39 40 #define AP_SLEEP_MODE BIT(13) 41 #define PUBCP_SLEEP_MODE BIT(14) 42 #define TGLDSP_SLEEP_MODE BIT(15) 43 #define AGDSP_SLEEP_MODE BIT(16) 44 #define SLEEP_MODE_MASK GENMASK(3, 0) 45 #define SLEEP_MODE_SHIFT 13 46 47 #define SLEEP_INPUT BIT(1) 48 #define SLEEP_INPUT_MASK 0x1 49 #define SLEEP_INPUT_SHIFT 1 50 51 #define SLEEP_OUTPUT BIT(0) 52 #define SLEEP_OUTPUT_MASK 0x1 53 #define SLEEP_OUTPUT_SHIFT 0 54 55 #define DRIVE_STRENGTH_MASK GENMASK(3, 0) 56 #define DRIVE_STRENGTH_SHIFT 19 57 58 #define SLEEP_PULL_DOWN BIT(2) 59 #define SLEEP_PULL_DOWN_MASK 0x1 60 #define SLEEP_PULL_DOWN_SHIFT 2 61 62 #define PULL_DOWN BIT(6) 63 #define PULL_DOWN_MASK 0x1 64 #define PULL_DOWN_SHIFT 6 65 66 #define SLEEP_PULL_UP BIT(3) 67 #define SLEEP_PULL_UP_MASK 0x1 68 #define SLEEP_PULL_UP_SHIFT 3 69 70 #define PULL_UP_20K (BIT(12) | BIT(7)) 71 #define PULL_UP_4_7K BIT(12) 72 #define PULL_UP_MASK 0x21 73 #define PULL_UP_SHIFT 7 74 75 #define INPUT_SCHMITT BIT(11) 76 #define INPUT_SCHMITT_MASK 0x1 77 #define INPUT_SCHMITT_SHIFT 11 78 79 enum pin_sleep_mode { 80 AP_SLEEP = BIT(0), 81 PUBCP_SLEEP = BIT(1), 82 TGLDSP_SLEEP = BIT(2), 83 AGDSP_SLEEP = BIT(3), 84 }; 85 86 enum pin_func_sel { 87 PIN_FUNC_1, 88 PIN_FUNC_2, 89 PIN_FUNC_3, 90 PIN_FUNC_4, 91 PIN_FUNC_MAX, 92 }; 93 94 /** 95 * struct sprd_pin: represent one pin's description 96 * @name: pin name 97 * @number: pin number 98 * @type: pin type, can be GLOBAL_CTRL_PIN/COMMON_PIN/MISC_PIN 99 * @reg: pin register address 100 * @bit_offset: bit offset in pin register 101 * @bit_width: bit width in pin register 102 */ 103 struct sprd_pin { 104 const char *name; 105 unsigned int number; 106 enum pin_type type; 107 unsigned long reg; 108 unsigned long bit_offset; 109 unsigned long bit_width; 110 }; 111 112 /** 113 * struct sprd_pin_group: represent one group's description 114 * @name: group name 115 * @npins: pin numbers of this group 116 * @pins: pointer to pins array 117 */ 118 struct sprd_pin_group { 119 const char *name; 120 unsigned int npins; 121 unsigned int *pins; 122 }; 123 124 /** 125 * struct sprd_pinctrl_soc_info: represent the SoC's pins description 126 * @groups: pointer to groups of pins 127 * @ngroups: group numbers of the whole SoC 128 * @pins: pointer to pins description 129 * @npins: pin numbers of the whole SoC 130 * @grp_names: pointer to group names array 131 */ 132 struct sprd_pinctrl_soc_info { 133 struct sprd_pin_group *groups; 134 unsigned int ngroups; 135 struct sprd_pin *pins; 136 unsigned int npins; 137 const char **grp_names; 138 }; 139 140 /** 141 * struct sprd_pinctrl: represent the pin controller device 142 * @dev: pointer to the device structure 143 * @pctl: pointer to the pinctrl handle 144 * @base: base address of the controller 145 * @info: pointer to SoC's pins description information 146 */ 147 struct sprd_pinctrl { 148 struct device *dev; 149 struct pinctrl_dev *pctl; 150 void __iomem *base; 151 struct sprd_pinctrl_soc_info *info; 152 }; 153 154 #define SPRD_PIN_CONFIG_CONTROL (PIN_CONFIG_END + 1) 155 #define SPRD_PIN_CONFIG_SLEEP_MODE (PIN_CONFIG_END + 2) 156 157 static int sprd_pinctrl_get_id_by_name(struct sprd_pinctrl *sprd_pctl, 158 const char *name) 159 { 160 struct sprd_pinctrl_soc_info *info = sprd_pctl->info; 161 int i; 162 163 for (i = 0; i < info->npins; i++) { 164 if (!strcmp(info->pins[i].name, name)) 165 return info->pins[i].number; 166 } 167 168 return -ENODEV; 169 } 170 171 static struct sprd_pin * 172 sprd_pinctrl_get_pin_by_id(struct sprd_pinctrl *sprd_pctl, unsigned int id) 173 { 174 struct sprd_pinctrl_soc_info *info = sprd_pctl->info; 175 struct sprd_pin *pin = NULL; 176 int i; 177 178 for (i = 0; i < info->npins; i++) { 179 if (info->pins[i].number == id) { 180 pin = &info->pins[i]; 181 break; 182 } 183 } 184 185 return pin; 186 } 187 188 static const struct sprd_pin_group * 189 sprd_pinctrl_find_group_by_name(struct sprd_pinctrl *sprd_pctl, 190 const char *name) 191 { 192 struct sprd_pinctrl_soc_info *info = sprd_pctl->info; 193 const struct sprd_pin_group *grp = NULL; 194 int i; 195 196 for (i = 0; i < info->ngroups; i++) { 197 if (!strcmp(info->groups[i].name, name)) { 198 grp = &info->groups[i]; 199 break; 200 } 201 } 202 203 return grp; 204 } 205 206 static int sprd_pctrl_group_count(struct pinctrl_dev *pctldev) 207 { 208 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 209 struct sprd_pinctrl_soc_info *info = pctl->info; 210 211 return info->ngroups; 212 } 213 214 static const char *sprd_pctrl_group_name(struct pinctrl_dev *pctldev, 215 unsigned int selector) 216 { 217 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 218 struct sprd_pinctrl_soc_info *info = pctl->info; 219 220 return info->groups[selector].name; 221 } 222 223 static int sprd_pctrl_group_pins(struct pinctrl_dev *pctldev, 224 unsigned int selector, 225 const unsigned int **pins, 226 unsigned int *npins) 227 { 228 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 229 struct sprd_pinctrl_soc_info *info = pctl->info; 230 231 if (selector >= info->ngroups) 232 return -EINVAL; 233 234 *pins = info->groups[selector].pins; 235 *npins = info->groups[selector].npins; 236 237 return 0; 238 } 239 240 static int sprd_dt_node_to_map(struct pinctrl_dev *pctldev, 241 struct device_node *np, 242 struct pinctrl_map **map, 243 unsigned int *num_maps) 244 { 245 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 246 const struct sprd_pin_group *grp; 247 unsigned long *configs = NULL; 248 unsigned int num_configs = 0; 249 unsigned int reserved_maps = 0; 250 unsigned int reserve = 0; 251 const char *function; 252 enum pinctrl_map_type type; 253 int ret; 254 255 grp = sprd_pinctrl_find_group_by_name(pctl, np->name); 256 if (!grp) { 257 dev_err(pctl->dev, "unable to find group for node %s\n", 258 of_node_full_name(np)); 259 return -EINVAL; 260 } 261 262 ret = of_property_count_strings(np, "pins"); 263 if (ret < 0) 264 return ret; 265 266 if (ret == 1) 267 type = PIN_MAP_TYPE_CONFIGS_PIN; 268 else 269 type = PIN_MAP_TYPE_CONFIGS_GROUP; 270 271 ret = of_property_read_string(np, "function", &function); 272 if (ret < 0) { 273 if (ret != -EINVAL) 274 dev_err(pctl->dev, 275 "%s: could not parse property function\n", 276 of_node_full_name(np)); 277 function = NULL; 278 } 279 280 ret = pinconf_generic_parse_dt_config(np, pctldev, &configs, 281 &num_configs); 282 if (ret < 0) { 283 dev_err(pctl->dev, "%s: could not parse node property\n", 284 of_node_full_name(np)); 285 return ret; 286 } 287 288 *map = NULL; 289 *num_maps = 0; 290 291 if (function != NULL) 292 reserve++; 293 if (num_configs) 294 reserve++; 295 296 ret = pinctrl_utils_reserve_map(pctldev, map, &reserved_maps, 297 num_maps, reserve); 298 if (ret < 0) 299 goto out; 300 301 if (function) { 302 ret = pinctrl_utils_add_map_mux(pctldev, map, 303 &reserved_maps, num_maps, 304 grp->name, function); 305 if (ret < 0) 306 goto out; 307 } 308 309 if (num_configs) { 310 const char *group_or_pin; 311 unsigned int pin_id; 312 313 if (type == PIN_MAP_TYPE_CONFIGS_PIN) { 314 pin_id = grp->pins[0]; 315 group_or_pin = pin_get_name(pctldev, pin_id); 316 } else { 317 group_or_pin = grp->name; 318 } 319 320 ret = pinctrl_utils_add_map_configs(pctldev, map, 321 &reserved_maps, num_maps, 322 group_or_pin, configs, 323 num_configs, type); 324 } 325 326 out: 327 kfree(configs); 328 return ret; 329 } 330 331 static void sprd_pctrl_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, 332 unsigned int offset) 333 { 334 seq_printf(s, "%s", dev_name(pctldev->dev)); 335 } 336 337 static const struct pinctrl_ops sprd_pctrl_ops = { 338 .get_groups_count = sprd_pctrl_group_count, 339 .get_group_name = sprd_pctrl_group_name, 340 .get_group_pins = sprd_pctrl_group_pins, 341 .pin_dbg_show = sprd_pctrl_dbg_show, 342 .dt_node_to_map = sprd_dt_node_to_map, 343 .dt_free_map = pinctrl_utils_free_map, 344 }; 345 346 static int sprd_pmx_get_function_count(struct pinctrl_dev *pctldev) 347 { 348 return PIN_FUNC_MAX; 349 } 350 351 static const char *sprd_pmx_get_function_name(struct pinctrl_dev *pctldev, 352 unsigned int selector) 353 { 354 switch (selector) { 355 case PIN_FUNC_1: 356 return "func1"; 357 case PIN_FUNC_2: 358 return "func2"; 359 case PIN_FUNC_3: 360 return "func3"; 361 case PIN_FUNC_4: 362 return "func4"; 363 default: 364 return "null"; 365 } 366 } 367 368 static int sprd_pmx_get_function_groups(struct pinctrl_dev *pctldev, 369 unsigned int selector, 370 const char * const **groups, 371 unsigned int * const num_groups) 372 { 373 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 374 struct sprd_pinctrl_soc_info *info = pctl->info; 375 376 *groups = info->grp_names; 377 *num_groups = info->ngroups; 378 379 return 0; 380 } 381 382 static int sprd_pmx_set_mux(struct pinctrl_dev *pctldev, 383 unsigned int func_selector, 384 unsigned int group_selector) 385 { 386 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 387 struct sprd_pinctrl_soc_info *info = pctl->info; 388 struct sprd_pin_group *grp = &info->groups[group_selector]; 389 unsigned int i, grp_pins = grp->npins; 390 unsigned long reg; 391 unsigned int val = 0; 392 393 if (group_selector >= info->ngroups) 394 return -EINVAL; 395 396 switch (func_selector) { 397 case PIN_FUNC_1: 398 val &= PIN_FUNC_SEL_1; 399 break; 400 case PIN_FUNC_2: 401 val |= PIN_FUNC_SEL_2; 402 break; 403 case PIN_FUNC_3: 404 val |= PIN_FUNC_SEL_3; 405 break; 406 case PIN_FUNC_4: 407 val |= PIN_FUNC_SEL_4; 408 break; 409 default: 410 break; 411 } 412 413 for (i = 0; i < grp_pins; i++) { 414 unsigned int pin_id = grp->pins[i]; 415 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id); 416 417 if (!pin || pin->type != COMMON_PIN) 418 continue; 419 420 reg = readl((void __iomem *)pin->reg); 421 reg &= ~PIN_FUNC_MASK; 422 reg |= val; 423 writel(reg, (void __iomem *)pin->reg); 424 } 425 426 return 0; 427 } 428 429 static const struct pinmux_ops sprd_pmx_ops = { 430 .get_functions_count = sprd_pmx_get_function_count, 431 .get_function_name = sprd_pmx_get_function_name, 432 .get_function_groups = sprd_pmx_get_function_groups, 433 .set_mux = sprd_pmx_set_mux, 434 }; 435 436 static int sprd_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin_id, 437 unsigned long *config) 438 { 439 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 440 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id); 441 unsigned int param = pinconf_to_config_param(*config); 442 unsigned int reg, arg; 443 444 if (!pin) 445 return -EINVAL; 446 447 if (pin->type == GLOBAL_CTRL_PIN) { 448 reg = (readl((void __iomem *)pin->reg) >> 449 pin->bit_offset) & PINCTRL_BIT_MASK(pin->bit_width); 450 } else { 451 reg = readl((void __iomem *)pin->reg); 452 } 453 454 if (pin->type == GLOBAL_CTRL_PIN && 455 param == SPRD_PIN_CONFIG_CONTROL) { 456 arg = reg; 457 } else if (pin->type == COMMON_PIN || pin->type == MISC_PIN) { 458 switch (param) { 459 case SPRD_PIN_CONFIG_SLEEP_MODE: 460 arg = (reg >> SLEEP_MODE_SHIFT) & SLEEP_MODE_MASK; 461 break; 462 case PIN_CONFIG_INPUT_ENABLE: 463 arg = (reg >> SLEEP_INPUT_SHIFT) & SLEEP_INPUT_MASK; 464 break; 465 case PIN_CONFIG_OUTPUT: 466 arg = reg & SLEEP_OUTPUT_MASK; 467 break; 468 case PIN_CONFIG_DRIVE_STRENGTH: 469 arg = (reg >> DRIVE_STRENGTH_SHIFT) & 470 DRIVE_STRENGTH_MASK; 471 break; 472 case PIN_CONFIG_BIAS_PULL_DOWN: 473 /* combine sleep pull down and pull down config */ 474 arg = ((reg >> SLEEP_PULL_DOWN_SHIFT) & 475 SLEEP_PULL_DOWN_MASK) << 16; 476 arg |= (reg >> PULL_DOWN_SHIFT) & PULL_DOWN_MASK; 477 break; 478 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 479 arg = (reg >> INPUT_SCHMITT_SHIFT) & INPUT_SCHMITT_MASK; 480 break; 481 case PIN_CONFIG_BIAS_PULL_UP: 482 /* combine sleep pull up and pull up config */ 483 arg = ((reg >> SLEEP_PULL_UP_SHIFT) & 484 SLEEP_PULL_UP_MASK) << 16; 485 arg |= (reg >> PULL_UP_SHIFT) & PULL_UP_MASK; 486 break; 487 case PIN_CONFIG_SLEEP_HARDWARE_STATE: 488 arg = 0; 489 break; 490 default: 491 return -ENOTSUPP; 492 } 493 } else { 494 return -ENOTSUPP; 495 } 496 497 *config = pinconf_to_config_packed(param, arg); 498 return 0; 499 } 500 501 static unsigned int sprd_pinconf_drive(unsigned int mA) 502 { 503 unsigned int val = 0; 504 505 switch (mA) { 506 case 2: 507 break; 508 case 4: 509 val |= BIT(19); 510 break; 511 case 6: 512 val |= BIT(20); 513 break; 514 case 8: 515 val |= BIT(19) | BIT(20); 516 break; 517 case 10: 518 val |= BIT(21); 519 break; 520 case 12: 521 val |= BIT(21) | BIT(19); 522 break; 523 case 14: 524 val |= BIT(21) | BIT(20); 525 break; 526 case 16: 527 val |= BIT(19) | BIT(20) | BIT(21); 528 break; 529 case 20: 530 val |= BIT(22); 531 break; 532 case 21: 533 val |= BIT(22) | BIT(19); 534 break; 535 case 24: 536 val |= BIT(22) | BIT(20); 537 break; 538 case 25: 539 val |= BIT(22) | BIT(20) | BIT(19); 540 break; 541 case 27: 542 val |= BIT(22) | BIT(21); 543 break; 544 case 29: 545 val |= BIT(22) | BIT(21) | BIT(19); 546 break; 547 case 31: 548 val |= BIT(22) | BIT(21) | BIT(20); 549 break; 550 case 33: 551 val |= BIT(22) | BIT(21) | BIT(20) | BIT(19); 552 break; 553 default: 554 break; 555 } 556 557 return val; 558 } 559 560 static bool sprd_pinctrl_check_sleep_config(unsigned long *configs, 561 unsigned int num_configs) 562 { 563 unsigned int param; 564 int i; 565 566 for (i = 0; i < num_configs; i++) { 567 param = pinconf_to_config_param(configs[i]); 568 if (param == PIN_CONFIG_SLEEP_HARDWARE_STATE) 569 return true; 570 } 571 572 return false; 573 } 574 575 static int sprd_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin_id, 576 unsigned long *configs, unsigned int num_configs) 577 { 578 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 579 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id); 580 bool is_sleep_config; 581 unsigned long reg; 582 int i; 583 584 if (!pin) 585 return -EINVAL; 586 587 is_sleep_config = sprd_pinctrl_check_sleep_config(configs, num_configs); 588 589 for (i = 0; i < num_configs; i++) { 590 unsigned int param, arg, shift, mask, val; 591 592 param = pinconf_to_config_param(configs[i]); 593 arg = pinconf_to_config_argument(configs[i]); 594 595 val = 0; 596 shift = 0; 597 mask = 0; 598 if (pin->type == GLOBAL_CTRL_PIN && 599 param == SPRD_PIN_CONFIG_CONTROL) { 600 val = arg; 601 } else if (pin->type == COMMON_PIN || pin->type == MISC_PIN) { 602 switch (param) { 603 case SPRD_PIN_CONFIG_SLEEP_MODE: 604 if (arg & AP_SLEEP) 605 val |= AP_SLEEP_MODE; 606 if (arg & PUBCP_SLEEP) 607 val |= PUBCP_SLEEP_MODE; 608 if (arg & TGLDSP_SLEEP) 609 val |= TGLDSP_SLEEP_MODE; 610 if (arg & AGDSP_SLEEP) 611 val |= AGDSP_SLEEP_MODE; 612 613 mask = SLEEP_MODE_MASK; 614 shift = SLEEP_MODE_SHIFT; 615 break; 616 case PIN_CONFIG_INPUT_ENABLE: 617 if (is_sleep_config == true) { 618 if (arg > 0) 619 val |= SLEEP_INPUT; 620 else 621 val &= ~SLEEP_INPUT; 622 623 mask = SLEEP_INPUT_MASK; 624 shift = SLEEP_INPUT_SHIFT; 625 } 626 break; 627 case PIN_CONFIG_OUTPUT: 628 if (is_sleep_config == true) { 629 val |= SLEEP_OUTPUT; 630 mask = SLEEP_OUTPUT_MASK; 631 shift = SLEEP_OUTPUT_SHIFT; 632 } 633 break; 634 case PIN_CONFIG_DRIVE_STRENGTH: 635 if (arg < 2 || arg > 60) 636 return -EINVAL; 637 638 val = sprd_pinconf_drive(arg); 639 mask = DRIVE_STRENGTH_MASK; 640 shift = DRIVE_STRENGTH_SHIFT; 641 break; 642 case PIN_CONFIG_BIAS_PULL_DOWN: 643 if (is_sleep_config == true) { 644 val |= SLEEP_PULL_DOWN; 645 mask = SLEEP_PULL_DOWN_MASK; 646 shift = SLEEP_PULL_DOWN_SHIFT; 647 } else { 648 val |= PULL_DOWN; 649 mask = PULL_DOWN_MASK; 650 shift = PULL_DOWN_SHIFT; 651 } 652 break; 653 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 654 if (arg > 0) 655 val |= INPUT_SCHMITT; 656 else 657 val &= ~INPUT_SCHMITT; 658 659 mask = INPUT_SCHMITT_MASK; 660 shift = INPUT_SCHMITT_SHIFT; 661 break; 662 case PIN_CONFIG_BIAS_PULL_UP: 663 if (is_sleep_config == true) { 664 val |= SLEEP_PULL_UP; 665 mask = SLEEP_PULL_UP_MASK; 666 shift = SLEEP_PULL_UP_SHIFT; 667 } else { 668 if (arg == 20000) 669 val |= PULL_UP_20K; 670 else if (arg == 4700) 671 val |= PULL_UP_4_7K; 672 673 mask = PULL_UP_MASK; 674 shift = PULL_UP_SHIFT; 675 } 676 break; 677 case PIN_CONFIG_SLEEP_HARDWARE_STATE: 678 continue; 679 default: 680 return -ENOTSUPP; 681 } 682 } else { 683 return -ENOTSUPP; 684 } 685 686 if (pin->type == GLOBAL_CTRL_PIN) { 687 reg = readl((void __iomem *)pin->reg); 688 reg &= ~(PINCTRL_BIT_MASK(pin->bit_width) 689 << pin->bit_offset); 690 reg |= (val & PINCTRL_BIT_MASK(pin->bit_width)) 691 << pin->bit_offset; 692 writel(reg, (void __iomem *)pin->reg); 693 } else { 694 reg = readl((void __iomem *)pin->reg); 695 reg &= ~(mask << shift); 696 reg |= val; 697 writel(reg, (void __iomem *)pin->reg); 698 } 699 } 700 701 return 0; 702 } 703 704 static int sprd_pinconf_group_get(struct pinctrl_dev *pctldev, 705 unsigned int selector, unsigned long *config) 706 { 707 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 708 struct sprd_pinctrl_soc_info *info = pctl->info; 709 struct sprd_pin_group *grp; 710 unsigned int pin_id; 711 712 if (selector >= info->ngroups) 713 return -EINVAL; 714 715 grp = &info->groups[selector]; 716 pin_id = grp->pins[0]; 717 718 return sprd_pinconf_get(pctldev, pin_id, config); 719 } 720 721 static int sprd_pinconf_group_set(struct pinctrl_dev *pctldev, 722 unsigned int selector, 723 unsigned long *configs, 724 unsigned int num_configs) 725 { 726 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 727 struct sprd_pinctrl_soc_info *info = pctl->info; 728 struct sprd_pin_group *grp; 729 int ret, i; 730 731 if (selector >= info->ngroups) 732 return -EINVAL; 733 734 grp = &info->groups[selector]; 735 736 for (i = 0; i < grp->npins; i++) { 737 unsigned int pin_id = grp->pins[i]; 738 739 ret = sprd_pinconf_set(pctldev, pin_id, configs, num_configs); 740 if (ret) 741 return ret; 742 } 743 744 return 0; 745 } 746 747 static int sprd_pinconf_get_config(struct pinctrl_dev *pctldev, 748 unsigned int pin_id, 749 unsigned long *config) 750 { 751 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 752 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id); 753 754 if (!pin) 755 return -EINVAL; 756 757 if (pin->type == GLOBAL_CTRL_PIN) { 758 *config = (readl((void __iomem *)pin->reg) >> 759 pin->bit_offset) & PINCTRL_BIT_MASK(pin->bit_width); 760 } else { 761 *config = readl((void __iomem *)pin->reg); 762 } 763 764 return 0; 765 } 766 767 static void sprd_pinconf_dbg_show(struct pinctrl_dev *pctldev, 768 struct seq_file *s, unsigned int pin_id) 769 { 770 unsigned long config; 771 int ret; 772 773 ret = sprd_pinconf_get_config(pctldev, pin_id, &config); 774 if (ret) 775 return; 776 777 seq_printf(s, "0x%lx", config); 778 } 779 780 static void sprd_pinconf_group_dbg_show(struct pinctrl_dev *pctldev, 781 struct seq_file *s, 782 unsigned int selector) 783 { 784 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 785 struct sprd_pinctrl_soc_info *info = pctl->info; 786 struct sprd_pin_group *grp; 787 unsigned long config; 788 const char *name; 789 int i, ret; 790 791 if (selector >= info->ngroups) 792 return; 793 794 grp = &info->groups[selector]; 795 796 seq_putc(s, '\n'); 797 for (i = 0; i < grp->npins; i++, config++) { 798 unsigned int pin_id = grp->pins[i]; 799 800 name = pin_get_name(pctldev, pin_id); 801 ret = sprd_pinconf_get_config(pctldev, pin_id, &config); 802 if (ret) 803 return; 804 805 seq_printf(s, "%s: 0x%lx ", name, config); 806 } 807 } 808 809 static const struct pinconf_ops sprd_pinconf_ops = { 810 .is_generic = true, 811 .pin_config_get = sprd_pinconf_get, 812 .pin_config_set = sprd_pinconf_set, 813 .pin_config_group_get = sprd_pinconf_group_get, 814 .pin_config_group_set = sprd_pinconf_group_set, 815 .pin_config_dbg_show = sprd_pinconf_dbg_show, 816 .pin_config_group_dbg_show = sprd_pinconf_group_dbg_show, 817 }; 818 819 static const struct pinconf_generic_params sprd_dt_params[] = { 820 {"sprd,control", SPRD_PIN_CONFIG_CONTROL, 0}, 821 {"sprd,sleep-mode", SPRD_PIN_CONFIG_SLEEP_MODE, 0}, 822 }; 823 824 #ifdef CONFIG_DEBUG_FS 825 static const struct pin_config_item sprd_conf_items[] = { 826 PCONFDUMP(SPRD_PIN_CONFIG_CONTROL, "global control", NULL, true), 827 PCONFDUMP(SPRD_PIN_CONFIG_SLEEP_MODE, "sleep mode", NULL, true), 828 }; 829 #endif 830 831 static struct pinctrl_desc sprd_pinctrl_desc = { 832 .pctlops = &sprd_pctrl_ops, 833 .pmxops = &sprd_pmx_ops, 834 .confops = &sprd_pinconf_ops, 835 .num_custom_params = ARRAY_SIZE(sprd_dt_params), 836 .custom_params = sprd_dt_params, 837 #ifdef CONFIG_DEBUG_FS 838 .custom_conf_items = sprd_conf_items, 839 #endif 840 .owner = THIS_MODULE, 841 }; 842 843 static int sprd_pinctrl_parse_groups(struct device_node *np, 844 struct sprd_pinctrl *sprd_pctl, 845 struct sprd_pin_group *grp) 846 { 847 struct property *prop; 848 const char *pin_name; 849 int ret, i = 0; 850 851 ret = of_property_count_strings(np, "pins"); 852 if (ret < 0) 853 return ret; 854 855 grp->name = np->name; 856 grp->npins = ret; 857 grp->pins = devm_kcalloc(sprd_pctl->dev, 858 grp->npins, sizeof(unsigned int), 859 GFP_KERNEL); 860 if (!grp->pins) 861 return -ENOMEM; 862 863 of_property_for_each_string(np, "pins", prop, pin_name) { 864 ret = sprd_pinctrl_get_id_by_name(sprd_pctl, pin_name); 865 if (ret >= 0) 866 grp->pins[i++] = ret; 867 } 868 869 for (i = 0; i < grp->npins; i++) { 870 dev_dbg(sprd_pctl->dev, 871 "Group[%s] contains [%d] pins: id = %d\n", 872 grp->name, grp->npins, grp->pins[i]); 873 } 874 875 return 0; 876 } 877 878 static unsigned int sprd_pinctrl_get_groups(struct device_node *np) 879 { 880 struct device_node *child; 881 unsigned int group_cnt, cnt; 882 883 group_cnt = of_get_child_count(np); 884 885 for_each_child_of_node(np, child) { 886 cnt = of_get_child_count(child); 887 if (cnt > 0) 888 group_cnt += cnt; 889 } 890 891 return group_cnt; 892 } 893 894 static int sprd_pinctrl_parse_dt(struct sprd_pinctrl *sprd_pctl) 895 { 896 struct sprd_pinctrl_soc_info *info = sprd_pctl->info; 897 struct device_node *np = sprd_pctl->dev->of_node; 898 struct device_node *child, *sub_child; 899 struct sprd_pin_group *grp; 900 const char **temp; 901 int ret; 902 903 if (!np) 904 return -ENODEV; 905 906 info->ngroups = sprd_pinctrl_get_groups(np); 907 if (!info->ngroups) 908 return 0; 909 910 info->groups = devm_kcalloc(sprd_pctl->dev, 911 info->ngroups, 912 sizeof(struct sprd_pin_group), 913 GFP_KERNEL); 914 if (!info->groups) 915 return -ENOMEM; 916 917 info->grp_names = devm_kcalloc(sprd_pctl->dev, 918 info->ngroups, sizeof(char *), 919 GFP_KERNEL); 920 if (!info->grp_names) 921 return -ENOMEM; 922 923 temp = info->grp_names; 924 grp = info->groups; 925 926 for_each_child_of_node(np, child) { 927 ret = sprd_pinctrl_parse_groups(child, sprd_pctl, grp); 928 if (ret) { 929 of_node_put(child); 930 return ret; 931 } 932 933 *temp++ = grp->name; 934 grp++; 935 936 if (of_get_child_count(child) > 0) { 937 for_each_child_of_node(child, sub_child) { 938 ret = sprd_pinctrl_parse_groups(sub_child, 939 sprd_pctl, grp); 940 if (ret) { 941 of_node_put(sub_child); 942 of_node_put(child); 943 return ret; 944 } 945 946 *temp++ = grp->name; 947 grp++; 948 } 949 } 950 } 951 952 return 0; 953 } 954 955 static int sprd_pinctrl_add_pins(struct sprd_pinctrl *sprd_pctl, 956 struct sprd_pins_info *sprd_soc_pin_info, 957 int pins_cnt) 958 { 959 struct sprd_pinctrl_soc_info *info = sprd_pctl->info; 960 unsigned int ctrl_pin = 0, com_pin = 0; 961 struct sprd_pin *pin; 962 int i; 963 964 info->npins = pins_cnt; 965 info->pins = devm_kcalloc(sprd_pctl->dev, 966 info->npins, sizeof(struct sprd_pin), 967 GFP_KERNEL); 968 if (!info->pins) 969 return -ENOMEM; 970 971 for (i = 0, pin = info->pins; i < info->npins; i++, pin++) { 972 unsigned int reg; 973 974 pin->name = sprd_soc_pin_info[i].name; 975 pin->type = sprd_soc_pin_info[i].type; 976 pin->number = sprd_soc_pin_info[i].num; 977 reg = sprd_soc_pin_info[i].reg; 978 if (pin->type == GLOBAL_CTRL_PIN) { 979 pin->reg = (unsigned long)sprd_pctl->base + 980 PINCTRL_REG_LEN * reg; 981 pin->bit_offset = sprd_soc_pin_info[i].bit_offset; 982 pin->bit_width = sprd_soc_pin_info[i].bit_width; 983 ctrl_pin++; 984 } else if (pin->type == COMMON_PIN) { 985 pin->reg = (unsigned long)sprd_pctl->base + 986 PINCTRL_REG_OFFSET + PINCTRL_REG_LEN * 987 (i - ctrl_pin); 988 com_pin++; 989 } else if (pin->type == MISC_PIN) { 990 pin->reg = (unsigned long)sprd_pctl->base + 991 PINCTRL_REG_MISC_OFFSET + PINCTRL_REG_LEN * 992 (i - ctrl_pin - com_pin); 993 } 994 } 995 996 for (i = 0, pin = info->pins; i < info->npins; pin++, i++) { 997 dev_dbg(sprd_pctl->dev, "pin name[%s-%d], type = %d, " 998 "bit offset = %ld, bit width = %ld, reg = 0x%lx\n", 999 pin->name, pin->number, pin->type, 1000 pin->bit_offset, pin->bit_width, pin->reg); 1001 } 1002 1003 return 0; 1004 } 1005 1006 int sprd_pinctrl_core_probe(struct platform_device *pdev, 1007 struct sprd_pins_info *sprd_soc_pin_info, 1008 int pins_cnt) 1009 { 1010 struct sprd_pinctrl *sprd_pctl; 1011 struct sprd_pinctrl_soc_info *pinctrl_info; 1012 struct pinctrl_pin_desc *pin_desc; 1013 int ret, i; 1014 1015 sprd_pctl = devm_kzalloc(&pdev->dev, sizeof(struct sprd_pinctrl), 1016 GFP_KERNEL); 1017 if (!sprd_pctl) 1018 return -ENOMEM; 1019 1020 sprd_pctl->base = devm_platform_ioremap_resource(pdev, 0); 1021 if (IS_ERR(sprd_pctl->base)) 1022 return PTR_ERR(sprd_pctl->base); 1023 1024 pinctrl_info = devm_kzalloc(&pdev->dev, 1025 sizeof(struct sprd_pinctrl_soc_info), 1026 GFP_KERNEL); 1027 if (!pinctrl_info) 1028 return -ENOMEM; 1029 1030 sprd_pctl->info = pinctrl_info; 1031 sprd_pctl->dev = &pdev->dev; 1032 platform_set_drvdata(pdev, sprd_pctl); 1033 1034 ret = sprd_pinctrl_add_pins(sprd_pctl, sprd_soc_pin_info, pins_cnt); 1035 if (ret) { 1036 dev_err(&pdev->dev, "fail to add pins information\n"); 1037 return ret; 1038 } 1039 1040 ret = sprd_pinctrl_parse_dt(sprd_pctl); 1041 if (ret) { 1042 dev_err(&pdev->dev, "fail to parse dt properties\n"); 1043 return ret; 1044 } 1045 1046 pin_desc = devm_kcalloc(&pdev->dev, 1047 pinctrl_info->npins, 1048 sizeof(struct pinctrl_pin_desc), 1049 GFP_KERNEL); 1050 if (!pin_desc) 1051 return -ENOMEM; 1052 1053 for (i = 0; i < pinctrl_info->npins; i++) { 1054 pin_desc[i].number = pinctrl_info->pins[i].number; 1055 pin_desc[i].name = pinctrl_info->pins[i].name; 1056 pin_desc[i].drv_data = pinctrl_info; 1057 } 1058 1059 sprd_pinctrl_desc.pins = pin_desc; 1060 sprd_pinctrl_desc.name = dev_name(&pdev->dev); 1061 sprd_pinctrl_desc.npins = pinctrl_info->npins; 1062 1063 sprd_pctl->pctl = pinctrl_register(&sprd_pinctrl_desc, 1064 &pdev->dev, (void *)sprd_pctl); 1065 if (IS_ERR(sprd_pctl->pctl)) { 1066 dev_err(&pdev->dev, "could not register pinctrl driver\n"); 1067 return PTR_ERR(sprd_pctl->pctl); 1068 } 1069 1070 return 0; 1071 } 1072 1073 int sprd_pinctrl_remove(struct platform_device *pdev) 1074 { 1075 struct sprd_pinctrl *sprd_pctl = platform_get_drvdata(pdev); 1076 1077 pinctrl_unregister(sprd_pctl->pctl); 1078 return 0; 1079 } 1080 1081 void sprd_pinctrl_shutdown(struct platform_device *pdev) 1082 { 1083 struct pinctrl *pinctl; 1084 struct pinctrl_state *state; 1085 1086 pinctl = devm_pinctrl_get(&pdev->dev); 1087 if (IS_ERR(pinctl)) 1088 return; 1089 state = pinctrl_lookup_state(pinctl, "shutdown"); 1090 if (IS_ERR(state)) 1091 return; 1092 pinctrl_select_state(pinctl, state); 1093 } 1094 1095 MODULE_DESCRIPTION("SPREADTRUM Pin Controller Driver"); 1096 MODULE_AUTHOR("Baolin Wang <baolin.wang@spreadtrum.com>"); 1097 MODULE_LICENSE("GPL v2"); 1098