1 /* 2 * Driver header file for the ST Microelectronics SPEAr pinmux 3 * 4 * Copyright (C) 2012 ST Microelectronics 5 * Viresh Kumar <viresh.linux@gmail.com> 6 * 7 * This file is licensed under the terms of the GNU General Public 8 * License version 2. This program is licensed "as is" without any 9 * warranty of any kind, whether express or implied. 10 */ 11 12 #ifndef __PINMUX_SPEAR_H__ 13 #define __PINMUX_SPEAR_H__ 14 15 #include <linux/pinctrl/pinctrl.h> 16 #include <linux/types.h> 17 18 struct platform_device; 19 struct device; 20 21 /** 22 * struct spear_pmx_mode - SPEAr pmx mode 23 * @name: name of pmx mode 24 * @mode: mode id 25 * @reg: register for configuring this mode 26 * @mask: mask of this mode in reg 27 * @val: val to be configured at reg after doing (val & mask) 28 */ 29 struct spear_pmx_mode { 30 const char *const name; 31 u16 mode; 32 u16 reg; 33 u16 mask; 34 u32 val; 35 }; 36 37 /** 38 * struct spear_muxreg - SPEAr mux reg configuration 39 * @reg: register offset 40 * @mask: mask bits 41 * @val: val to be written on mask bits 42 */ 43 struct spear_muxreg { 44 u16 reg; 45 u32 mask; 46 u32 val; 47 }; 48 49 /** 50 * struct spear_modemux - SPEAr mode mux configuration 51 * @modes: mode ids supported by this group of muxregs 52 * @nmuxregs: number of muxreg configurations to be done for modes 53 * @muxregs: array of muxreg configurations to be done for modes 54 */ 55 struct spear_modemux { 56 u16 modes; 57 u8 nmuxregs; 58 struct spear_muxreg *muxregs; 59 }; 60 61 /** 62 * struct spear_pingroup - SPEAr pin group configurations 63 * @name: name of pin group 64 * @pins: array containing pin numbers 65 * @npins: size of pins array 66 * @modemuxs: array of modemux configurations for this pin group 67 * @nmodemuxs: size of array modemuxs 68 * 69 * A representation of a group of pins in the SPEAr pin controller. Each group 70 * allows some parameter or parameters to be configured. 71 */ 72 struct spear_pingroup { 73 const char *name; 74 const unsigned *pins; 75 unsigned npins; 76 struct spear_modemux *modemuxs; 77 unsigned nmodemuxs; 78 }; 79 80 /** 81 * struct spear_function - SPEAr pinctrl mux function 82 * @name: The name of the function, exported to pinctrl core. 83 * @groups: An array of pin groups that may select this function. 84 * @ngroups: The number of entries in @groups. 85 */ 86 struct spear_function { 87 const char *name; 88 const char *const *groups; 89 unsigned ngroups; 90 }; 91 92 /** 93 * struct spear_pinctrl_machdata - SPEAr pin controller machine driver 94 * configuration 95 * @pins: An array describing all pins the pin controller affects. 96 * All pins which are also GPIOs must be listed first within the *array, 97 * and be numbered identically to the GPIO controller's *numbering. 98 * @npins: The numbmer of entries in @pins. 99 * @functions: An array describing all mux functions the SoC supports. 100 * @nfunctions: The numbmer of entries in @functions. 101 * @groups: An array describing all pin groups the pin SoC supports. 102 * @ngroups: The numbmer of entries in @groups. 103 * 104 * @modes_supported: Does SoC support modes 105 * @mode: mode configured from probe 106 * @pmx_modes: array of modes supported by SoC 107 * @npmx_modes: number of entries in pmx_modes. 108 */ 109 struct spear_pinctrl_machdata { 110 const struct pinctrl_pin_desc *pins; 111 unsigned npins; 112 struct spear_function **functions; 113 unsigned nfunctions; 114 struct spear_pingroup **groups; 115 unsigned ngroups; 116 117 bool modes_supported; 118 u16 mode; 119 struct spear_pmx_mode **pmx_modes; 120 unsigned npmx_modes; 121 }; 122 123 /** 124 * struct spear_pmx - SPEAr pinctrl mux 125 * @dev: pointer to struct dev of platform_device registered 126 * @pctl: pointer to struct pinctrl_dev 127 * @machdata: pointer to SoC or machine specific structure 128 * @vbase: virtual base address of pinmux controller 129 */ 130 struct spear_pmx { 131 struct device *dev; 132 struct pinctrl_dev *pctl; 133 struct spear_pinctrl_machdata *machdata; 134 void __iomem *vbase; 135 }; 136 137 /* exported routines */ 138 void __devinit pmx_init_addr(struct spear_pinctrl_machdata *machdata, u16 reg); 139 int __devinit spear_pinctrl_probe(struct platform_device *pdev, 140 struct spear_pinctrl_machdata *machdata); 141 int __devexit spear_pinctrl_remove(struct platform_device *pdev); 142 143 #define SPEAR_PIN_0_TO_101 \ 144 PINCTRL_PIN(0, "PLGPIO0"), \ 145 PINCTRL_PIN(1, "PLGPIO1"), \ 146 PINCTRL_PIN(2, "PLGPIO2"), \ 147 PINCTRL_PIN(3, "PLGPIO3"), \ 148 PINCTRL_PIN(4, "PLGPIO4"), \ 149 PINCTRL_PIN(5, "PLGPIO5"), \ 150 PINCTRL_PIN(6, "PLGPIO6"), \ 151 PINCTRL_PIN(7, "PLGPIO7"), \ 152 PINCTRL_PIN(8, "PLGPIO8"), \ 153 PINCTRL_PIN(9, "PLGPIO9"), \ 154 PINCTRL_PIN(10, "PLGPIO10"), \ 155 PINCTRL_PIN(11, "PLGPIO11"), \ 156 PINCTRL_PIN(12, "PLGPIO12"), \ 157 PINCTRL_PIN(13, "PLGPIO13"), \ 158 PINCTRL_PIN(14, "PLGPIO14"), \ 159 PINCTRL_PIN(15, "PLGPIO15"), \ 160 PINCTRL_PIN(16, "PLGPIO16"), \ 161 PINCTRL_PIN(17, "PLGPIO17"), \ 162 PINCTRL_PIN(18, "PLGPIO18"), \ 163 PINCTRL_PIN(19, "PLGPIO19"), \ 164 PINCTRL_PIN(20, "PLGPIO20"), \ 165 PINCTRL_PIN(21, "PLGPIO21"), \ 166 PINCTRL_PIN(22, "PLGPIO22"), \ 167 PINCTRL_PIN(23, "PLGPIO23"), \ 168 PINCTRL_PIN(24, "PLGPIO24"), \ 169 PINCTRL_PIN(25, "PLGPIO25"), \ 170 PINCTRL_PIN(26, "PLGPIO26"), \ 171 PINCTRL_PIN(27, "PLGPIO27"), \ 172 PINCTRL_PIN(28, "PLGPIO28"), \ 173 PINCTRL_PIN(29, "PLGPIO29"), \ 174 PINCTRL_PIN(30, "PLGPIO30"), \ 175 PINCTRL_PIN(31, "PLGPIO31"), \ 176 PINCTRL_PIN(32, "PLGPIO32"), \ 177 PINCTRL_PIN(33, "PLGPIO33"), \ 178 PINCTRL_PIN(34, "PLGPIO34"), \ 179 PINCTRL_PIN(35, "PLGPIO35"), \ 180 PINCTRL_PIN(36, "PLGPIO36"), \ 181 PINCTRL_PIN(37, "PLGPIO37"), \ 182 PINCTRL_PIN(38, "PLGPIO38"), \ 183 PINCTRL_PIN(39, "PLGPIO39"), \ 184 PINCTRL_PIN(40, "PLGPIO40"), \ 185 PINCTRL_PIN(41, "PLGPIO41"), \ 186 PINCTRL_PIN(42, "PLGPIO42"), \ 187 PINCTRL_PIN(43, "PLGPIO43"), \ 188 PINCTRL_PIN(44, "PLGPIO44"), \ 189 PINCTRL_PIN(45, "PLGPIO45"), \ 190 PINCTRL_PIN(46, "PLGPIO46"), \ 191 PINCTRL_PIN(47, "PLGPIO47"), \ 192 PINCTRL_PIN(48, "PLGPIO48"), \ 193 PINCTRL_PIN(49, "PLGPIO49"), \ 194 PINCTRL_PIN(50, "PLGPIO50"), \ 195 PINCTRL_PIN(51, "PLGPIO51"), \ 196 PINCTRL_PIN(52, "PLGPIO52"), \ 197 PINCTRL_PIN(53, "PLGPIO53"), \ 198 PINCTRL_PIN(54, "PLGPIO54"), \ 199 PINCTRL_PIN(55, "PLGPIO55"), \ 200 PINCTRL_PIN(56, "PLGPIO56"), \ 201 PINCTRL_PIN(57, "PLGPIO57"), \ 202 PINCTRL_PIN(58, "PLGPIO58"), \ 203 PINCTRL_PIN(59, "PLGPIO59"), \ 204 PINCTRL_PIN(60, "PLGPIO60"), \ 205 PINCTRL_PIN(61, "PLGPIO61"), \ 206 PINCTRL_PIN(62, "PLGPIO62"), \ 207 PINCTRL_PIN(63, "PLGPIO63"), \ 208 PINCTRL_PIN(64, "PLGPIO64"), \ 209 PINCTRL_PIN(65, "PLGPIO65"), \ 210 PINCTRL_PIN(66, "PLGPIO66"), \ 211 PINCTRL_PIN(67, "PLGPIO67"), \ 212 PINCTRL_PIN(68, "PLGPIO68"), \ 213 PINCTRL_PIN(69, "PLGPIO69"), \ 214 PINCTRL_PIN(70, "PLGPIO70"), \ 215 PINCTRL_PIN(71, "PLGPIO71"), \ 216 PINCTRL_PIN(72, "PLGPIO72"), \ 217 PINCTRL_PIN(73, "PLGPIO73"), \ 218 PINCTRL_PIN(74, "PLGPIO74"), \ 219 PINCTRL_PIN(75, "PLGPIO75"), \ 220 PINCTRL_PIN(76, "PLGPIO76"), \ 221 PINCTRL_PIN(77, "PLGPIO77"), \ 222 PINCTRL_PIN(78, "PLGPIO78"), \ 223 PINCTRL_PIN(79, "PLGPIO79"), \ 224 PINCTRL_PIN(80, "PLGPIO80"), \ 225 PINCTRL_PIN(81, "PLGPIO81"), \ 226 PINCTRL_PIN(82, "PLGPIO82"), \ 227 PINCTRL_PIN(83, "PLGPIO83"), \ 228 PINCTRL_PIN(84, "PLGPIO84"), \ 229 PINCTRL_PIN(85, "PLGPIO85"), \ 230 PINCTRL_PIN(86, "PLGPIO86"), \ 231 PINCTRL_PIN(87, "PLGPIO87"), \ 232 PINCTRL_PIN(88, "PLGPIO88"), \ 233 PINCTRL_PIN(89, "PLGPIO89"), \ 234 PINCTRL_PIN(90, "PLGPIO90"), \ 235 PINCTRL_PIN(91, "PLGPIO91"), \ 236 PINCTRL_PIN(92, "PLGPIO92"), \ 237 PINCTRL_PIN(93, "PLGPIO93"), \ 238 PINCTRL_PIN(94, "PLGPIO94"), \ 239 PINCTRL_PIN(95, "PLGPIO95"), \ 240 PINCTRL_PIN(96, "PLGPIO96"), \ 241 PINCTRL_PIN(97, "PLGPIO97"), \ 242 PINCTRL_PIN(98, "PLGPIO98"), \ 243 PINCTRL_PIN(99, "PLGPIO99"), \ 244 PINCTRL_PIN(100, "PLGPIO100"), \ 245 PINCTRL_PIN(101, "PLGPIO101") 246 247 #define SPEAR_PIN_102_TO_245 \ 248 PINCTRL_PIN(102, "PLGPIO102"), \ 249 PINCTRL_PIN(103, "PLGPIO103"), \ 250 PINCTRL_PIN(104, "PLGPIO104"), \ 251 PINCTRL_PIN(105, "PLGPIO105"), \ 252 PINCTRL_PIN(106, "PLGPIO106"), \ 253 PINCTRL_PIN(107, "PLGPIO107"), \ 254 PINCTRL_PIN(108, "PLGPIO108"), \ 255 PINCTRL_PIN(109, "PLGPIO109"), \ 256 PINCTRL_PIN(110, "PLGPIO110"), \ 257 PINCTRL_PIN(111, "PLGPIO111"), \ 258 PINCTRL_PIN(112, "PLGPIO112"), \ 259 PINCTRL_PIN(113, "PLGPIO113"), \ 260 PINCTRL_PIN(114, "PLGPIO114"), \ 261 PINCTRL_PIN(115, "PLGPIO115"), \ 262 PINCTRL_PIN(116, "PLGPIO116"), \ 263 PINCTRL_PIN(117, "PLGPIO117"), \ 264 PINCTRL_PIN(118, "PLGPIO118"), \ 265 PINCTRL_PIN(119, "PLGPIO119"), \ 266 PINCTRL_PIN(120, "PLGPIO120"), \ 267 PINCTRL_PIN(121, "PLGPIO121"), \ 268 PINCTRL_PIN(122, "PLGPIO122"), \ 269 PINCTRL_PIN(123, "PLGPIO123"), \ 270 PINCTRL_PIN(124, "PLGPIO124"), \ 271 PINCTRL_PIN(125, "PLGPIO125"), \ 272 PINCTRL_PIN(126, "PLGPIO126"), \ 273 PINCTRL_PIN(127, "PLGPIO127"), \ 274 PINCTRL_PIN(128, "PLGPIO128"), \ 275 PINCTRL_PIN(129, "PLGPIO129"), \ 276 PINCTRL_PIN(130, "PLGPIO130"), \ 277 PINCTRL_PIN(131, "PLGPIO131"), \ 278 PINCTRL_PIN(132, "PLGPIO132"), \ 279 PINCTRL_PIN(133, "PLGPIO133"), \ 280 PINCTRL_PIN(134, "PLGPIO134"), \ 281 PINCTRL_PIN(135, "PLGPIO135"), \ 282 PINCTRL_PIN(136, "PLGPIO136"), \ 283 PINCTRL_PIN(137, "PLGPIO137"), \ 284 PINCTRL_PIN(138, "PLGPIO138"), \ 285 PINCTRL_PIN(139, "PLGPIO139"), \ 286 PINCTRL_PIN(140, "PLGPIO140"), \ 287 PINCTRL_PIN(141, "PLGPIO141"), \ 288 PINCTRL_PIN(142, "PLGPIO142"), \ 289 PINCTRL_PIN(143, "PLGPIO143"), \ 290 PINCTRL_PIN(144, "PLGPIO144"), \ 291 PINCTRL_PIN(145, "PLGPIO145"), \ 292 PINCTRL_PIN(146, "PLGPIO146"), \ 293 PINCTRL_PIN(147, "PLGPIO147"), \ 294 PINCTRL_PIN(148, "PLGPIO148"), \ 295 PINCTRL_PIN(149, "PLGPIO149"), \ 296 PINCTRL_PIN(150, "PLGPIO150"), \ 297 PINCTRL_PIN(151, "PLGPIO151"), \ 298 PINCTRL_PIN(152, "PLGPIO152"), \ 299 PINCTRL_PIN(153, "PLGPIO153"), \ 300 PINCTRL_PIN(154, "PLGPIO154"), \ 301 PINCTRL_PIN(155, "PLGPIO155"), \ 302 PINCTRL_PIN(156, "PLGPIO156"), \ 303 PINCTRL_PIN(157, "PLGPIO157"), \ 304 PINCTRL_PIN(158, "PLGPIO158"), \ 305 PINCTRL_PIN(159, "PLGPIO159"), \ 306 PINCTRL_PIN(160, "PLGPIO160"), \ 307 PINCTRL_PIN(161, "PLGPIO161"), \ 308 PINCTRL_PIN(162, "PLGPIO162"), \ 309 PINCTRL_PIN(163, "PLGPIO163"), \ 310 PINCTRL_PIN(164, "PLGPIO164"), \ 311 PINCTRL_PIN(165, "PLGPIO165"), \ 312 PINCTRL_PIN(166, "PLGPIO166"), \ 313 PINCTRL_PIN(167, "PLGPIO167"), \ 314 PINCTRL_PIN(168, "PLGPIO168"), \ 315 PINCTRL_PIN(169, "PLGPIO169"), \ 316 PINCTRL_PIN(170, "PLGPIO170"), \ 317 PINCTRL_PIN(171, "PLGPIO171"), \ 318 PINCTRL_PIN(172, "PLGPIO172"), \ 319 PINCTRL_PIN(173, "PLGPIO173"), \ 320 PINCTRL_PIN(174, "PLGPIO174"), \ 321 PINCTRL_PIN(175, "PLGPIO175"), \ 322 PINCTRL_PIN(176, "PLGPIO176"), \ 323 PINCTRL_PIN(177, "PLGPIO177"), \ 324 PINCTRL_PIN(178, "PLGPIO178"), \ 325 PINCTRL_PIN(179, "PLGPIO179"), \ 326 PINCTRL_PIN(180, "PLGPIO180"), \ 327 PINCTRL_PIN(181, "PLGPIO181"), \ 328 PINCTRL_PIN(182, "PLGPIO182"), \ 329 PINCTRL_PIN(183, "PLGPIO183"), \ 330 PINCTRL_PIN(184, "PLGPIO184"), \ 331 PINCTRL_PIN(185, "PLGPIO185"), \ 332 PINCTRL_PIN(186, "PLGPIO186"), \ 333 PINCTRL_PIN(187, "PLGPIO187"), \ 334 PINCTRL_PIN(188, "PLGPIO188"), \ 335 PINCTRL_PIN(189, "PLGPIO189"), \ 336 PINCTRL_PIN(190, "PLGPIO190"), \ 337 PINCTRL_PIN(191, "PLGPIO191"), \ 338 PINCTRL_PIN(192, "PLGPIO192"), \ 339 PINCTRL_PIN(193, "PLGPIO193"), \ 340 PINCTRL_PIN(194, "PLGPIO194"), \ 341 PINCTRL_PIN(195, "PLGPIO195"), \ 342 PINCTRL_PIN(196, "PLGPIO196"), \ 343 PINCTRL_PIN(197, "PLGPIO197"), \ 344 PINCTRL_PIN(198, "PLGPIO198"), \ 345 PINCTRL_PIN(199, "PLGPIO199"), \ 346 PINCTRL_PIN(200, "PLGPIO200"), \ 347 PINCTRL_PIN(201, "PLGPIO201"), \ 348 PINCTRL_PIN(202, "PLGPIO202"), \ 349 PINCTRL_PIN(203, "PLGPIO203"), \ 350 PINCTRL_PIN(204, "PLGPIO204"), \ 351 PINCTRL_PIN(205, "PLGPIO205"), \ 352 PINCTRL_PIN(206, "PLGPIO206"), \ 353 PINCTRL_PIN(207, "PLGPIO207"), \ 354 PINCTRL_PIN(208, "PLGPIO208"), \ 355 PINCTRL_PIN(209, "PLGPIO209"), \ 356 PINCTRL_PIN(210, "PLGPIO210"), \ 357 PINCTRL_PIN(211, "PLGPIO211"), \ 358 PINCTRL_PIN(212, "PLGPIO212"), \ 359 PINCTRL_PIN(213, "PLGPIO213"), \ 360 PINCTRL_PIN(214, "PLGPIO214"), \ 361 PINCTRL_PIN(215, "PLGPIO215"), \ 362 PINCTRL_PIN(216, "PLGPIO216"), \ 363 PINCTRL_PIN(217, "PLGPIO217"), \ 364 PINCTRL_PIN(218, "PLGPIO218"), \ 365 PINCTRL_PIN(219, "PLGPIO219"), \ 366 PINCTRL_PIN(220, "PLGPIO220"), \ 367 PINCTRL_PIN(221, "PLGPIO221"), \ 368 PINCTRL_PIN(222, "PLGPIO222"), \ 369 PINCTRL_PIN(223, "PLGPIO223"), \ 370 PINCTRL_PIN(224, "PLGPIO224"), \ 371 PINCTRL_PIN(225, "PLGPIO225"), \ 372 PINCTRL_PIN(226, "PLGPIO226"), \ 373 PINCTRL_PIN(227, "PLGPIO227"), \ 374 PINCTRL_PIN(228, "PLGPIO228"), \ 375 PINCTRL_PIN(229, "PLGPIO229"), \ 376 PINCTRL_PIN(230, "PLGPIO230"), \ 377 PINCTRL_PIN(231, "PLGPIO231"), \ 378 PINCTRL_PIN(232, "PLGPIO232"), \ 379 PINCTRL_PIN(233, "PLGPIO233"), \ 380 PINCTRL_PIN(234, "PLGPIO234"), \ 381 PINCTRL_PIN(235, "PLGPIO235"), \ 382 PINCTRL_PIN(236, "PLGPIO236"), \ 383 PINCTRL_PIN(237, "PLGPIO237"), \ 384 PINCTRL_PIN(238, "PLGPIO238"), \ 385 PINCTRL_PIN(239, "PLGPIO239"), \ 386 PINCTRL_PIN(240, "PLGPIO240"), \ 387 PINCTRL_PIN(241, "PLGPIO241"), \ 388 PINCTRL_PIN(242, "PLGPIO242"), \ 389 PINCTRL_PIN(243, "PLGPIO243"), \ 390 PINCTRL_PIN(244, "PLGPIO244"), \ 391 PINCTRL_PIN(245, "PLGPIO245") 392 393 #endif /* __PINMUX_SPEAR_H__ */ 394