1e096d3adSInochi Amaoto /* SPDX-License-Identifier: GPL-2.0 */ 2e096d3adSInochi Amaoto /* 3e096d3adSInochi Amaoto * Copyright (C) 2024 Inochi Amaoto <inochiama@outlook.com> 4e096d3adSInochi Amaoto */ 5e096d3adSInochi Amaoto 6e096d3adSInochi Amaoto #ifndef _PINCTRL_SOPHGO_H 7e096d3adSInochi Amaoto #define _PINCTRL_SOPHGO_H 8e096d3adSInochi Amaoto 9e096d3adSInochi Amaoto #include <linux/device.h> 10e096d3adSInochi Amaoto #include <linux/mutex.h> 11e096d3adSInochi Amaoto #include <linux/pinctrl/pinctrl.h> 1296406fa9SInochi Amaoto #include <linux/platform_device.h> 13e096d3adSInochi Amaoto #include <linux/spinlock.h> 14e096d3adSInochi Amaoto 15e096d3adSInochi Amaoto #include "../core.h" 16e096d3adSInochi Amaoto 1796406fa9SInochi Amaoto struct sophgo_pinctrl; 1896406fa9SInochi Amaoto 19e096d3adSInochi Amaoto struct sophgo_pin { 20e096d3adSInochi Amaoto u16 id; 21e096d3adSInochi Amaoto u16 flags; 22e096d3adSInochi Amaoto }; 23e096d3adSInochi Amaoto 24e096d3adSInochi Amaoto struct sophgo_pin_mux_config { 25e096d3adSInochi Amaoto const struct sophgo_pin *pin; 26e096d3adSInochi Amaoto u32 config; 27e096d3adSInochi Amaoto }; 28e096d3adSInochi Amaoto 29e096d3adSInochi Amaoto /** 3096406fa9SInochi Amaoto * struct sophgo_cfg_ops - pin configuration operations 3196406fa9SInochi Amaoto * 32*2a85188cSInochi Amaoto * @pctrl_init: soc specific init callback 3396406fa9SInochi Amaoto * @verify_pinmux_config: verify the pinmux config for a pin 3496406fa9SInochi Amaoto * @verify_pin_group: verify the whole pinmux group 3596406fa9SInochi Amaoto * @dt_node_to_map_post: post init for the pinmux config map 3696406fa9SInochi Amaoto * @compute_pinconf_config: compute pinconf config 3796406fa9SInochi Amaoto * @set_pinconf_config: set pinconf config (the caller holds lock) 3896406fa9SInochi Amaoto * @set_pinmux_config: set mux config (the caller holds lock) 3996406fa9SInochi Amaoto */ 4096406fa9SInochi Amaoto struct sophgo_cfg_ops { 41*2a85188cSInochi Amaoto int (*pctrl_init)(struct platform_device *pdev, 42*2a85188cSInochi Amaoto struct sophgo_pinctrl *pctrl); 4396406fa9SInochi Amaoto int (*verify_pinmux_config)(const struct sophgo_pin_mux_config *config); 4496406fa9SInochi Amaoto int (*verify_pin_group)(const struct sophgo_pin_mux_config *pinmuxs, 4596406fa9SInochi Amaoto unsigned int npins); 4696406fa9SInochi Amaoto int (*dt_node_to_map_post)(struct device_node *cur, 4796406fa9SInochi Amaoto struct sophgo_pinctrl *pctrl, 4896406fa9SInochi Amaoto struct sophgo_pin_mux_config *pinmuxs, 4996406fa9SInochi Amaoto unsigned int npins); 5096406fa9SInochi Amaoto int (*compute_pinconf_config)(struct sophgo_pinctrl *pctrl, 5196406fa9SInochi Amaoto const struct sophgo_pin *sp, 5296406fa9SInochi Amaoto unsigned long *configs, 5396406fa9SInochi Amaoto unsigned int num_configs, 5496406fa9SInochi Amaoto u32 *value, u32 *mask); 5596406fa9SInochi Amaoto int (*set_pinconf_config)(struct sophgo_pinctrl *pctrl, 5696406fa9SInochi Amaoto const struct sophgo_pin *sp, 5796406fa9SInochi Amaoto u32 value, u32 mask); 5896406fa9SInochi Amaoto void (*set_pinmux_config)(struct sophgo_pinctrl *pctrl, 5996406fa9SInochi Amaoto const struct sophgo_pin *sp, u32 config); 6096406fa9SInochi Amaoto }; 6196406fa9SInochi Amaoto 6296406fa9SInochi Amaoto /** 63e096d3adSInochi Amaoto * struct sophgo_vddio_cfg_ops - pin vddio operations 64e096d3adSInochi Amaoto * 65e096d3adSInochi Amaoto * @get_pull_up: get resistor for pull up; 66e096d3adSInochi Amaoto * @get_pull_down: get resistor for pull down. 67e096d3adSInochi Amaoto * @get_oc_map: get mapping for typical low level output current value to 68e096d3adSInochi Amaoto * register value map. 69e096d3adSInochi Amaoto * @get_schmitt_map: get mapping for register value to typical schmitt 70e096d3adSInochi Amaoto * threshold. 71e096d3adSInochi Amaoto */ 72e096d3adSInochi Amaoto struct sophgo_vddio_cfg_ops { 73e096d3adSInochi Amaoto int (*get_pull_up)(const struct sophgo_pin *pin, const u32 *psmap); 74e096d3adSInochi Amaoto int (*get_pull_down)(const struct sophgo_pin *pin, const u32 *psmap); 75e096d3adSInochi Amaoto int (*get_oc_map)(const struct sophgo_pin *pin, const u32 *psmap, 76e096d3adSInochi Amaoto const u32 **map); 77e096d3adSInochi Amaoto int (*get_schmitt_map)(const struct sophgo_pin *pin, const u32 *psmap, 78e096d3adSInochi Amaoto const u32 **map); 79e096d3adSInochi Amaoto }; 80e096d3adSInochi Amaoto 81e096d3adSInochi Amaoto struct sophgo_pinctrl_data { 82e096d3adSInochi Amaoto const struct pinctrl_pin_desc *pins; 83e096d3adSInochi Amaoto const void *pindata; 84e096d3adSInochi Amaoto const char * const *pdnames; 85e096d3adSInochi Amaoto const struct sophgo_vddio_cfg_ops *vddio_ops; 8696406fa9SInochi Amaoto const struct sophgo_cfg_ops *cfg_ops; 87*2a85188cSInochi Amaoto const struct pinctrl_ops *pctl_ops; 88*2a85188cSInochi Amaoto const struct pinmux_ops *pmx_ops; 89*2a85188cSInochi Amaoto const struct pinconf_ops *pconf_ops; 90e096d3adSInochi Amaoto u16 npins; 91e096d3adSInochi Amaoto u16 npds; 92e096d3adSInochi Amaoto u16 pinsize; 93e096d3adSInochi Amaoto }; 94e096d3adSInochi Amaoto 95e096d3adSInochi Amaoto struct sophgo_pinctrl { 96e096d3adSInochi Amaoto struct device *dev; 97e096d3adSInochi Amaoto struct pinctrl_dev *pctrl_dev; 98e096d3adSInochi Amaoto const struct sophgo_pinctrl_data *data; 99e096d3adSInochi Amaoto struct pinctrl_desc pdesc; 100e096d3adSInochi Amaoto 101e096d3adSInochi Amaoto struct mutex mutex; 102e096d3adSInochi Amaoto raw_spinlock_t lock; 103e096d3adSInochi Amaoto void *priv_ctrl; 104e096d3adSInochi Amaoto }; 105e096d3adSInochi Amaoto 10696406fa9SInochi Amaoto const struct sophgo_pin *sophgo_get_pin(struct sophgo_pinctrl *pctrl, 10796406fa9SInochi Amaoto unsigned long pin_id); 10896406fa9SInochi Amaoto int sophgo_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev, struct device_node *np, 10996406fa9SInochi Amaoto struct pinctrl_map **maps, unsigned int *num_maps); 11096406fa9SInochi Amaoto int sophgo_pmx_set_mux(struct pinctrl_dev *pctldev, 11196406fa9SInochi Amaoto unsigned int fsel, unsigned int gsel); 11296406fa9SInochi Amaoto int sophgo_pconf_set(struct pinctrl_dev *pctldev, unsigned int pin_id, 11396406fa9SInochi Amaoto unsigned long *configs, unsigned int num_configs); 11496406fa9SInochi Amaoto int sophgo_pconf_group_set(struct pinctrl_dev *pctldev, unsigned int gsel, 11596406fa9SInochi Amaoto unsigned long *configs, unsigned int num_configs); 11696406fa9SInochi Amaoto u32 sophgo_pinctrl_typical_pull_down(struct sophgo_pinctrl *pctrl, 11796406fa9SInochi Amaoto const struct sophgo_pin *pin, 11896406fa9SInochi Amaoto const u32 *power_cfg); 11996406fa9SInochi Amaoto u32 sophgo_pinctrl_typical_pull_up(struct sophgo_pinctrl *pctrl, 12096406fa9SInochi Amaoto const struct sophgo_pin *pin, 12196406fa9SInochi Amaoto const u32 *power_cfg); 12296406fa9SInochi Amaoto int sophgo_pinctrl_oc2reg(struct sophgo_pinctrl *pctrl, 12396406fa9SInochi Amaoto const struct sophgo_pin *pin, 12496406fa9SInochi Amaoto const u32 *power_cfg, u32 target); 12596406fa9SInochi Amaoto int sophgo_pinctrl_reg2oc(struct sophgo_pinctrl *pctrl, 12696406fa9SInochi Amaoto const struct sophgo_pin *pin, 12796406fa9SInochi Amaoto const u32 *power_cfg, u32 reg); 12896406fa9SInochi Amaoto int sophgo_pinctrl_schmitt2reg(struct sophgo_pinctrl *pctrl, 12996406fa9SInochi Amaoto const struct sophgo_pin *pin, 13096406fa9SInochi Amaoto const u32 *power_cfg, u32 target); 13196406fa9SInochi Amaoto int sophgo_pinctrl_reg2schmitt(struct sophgo_pinctrl *pctrl, 13296406fa9SInochi Amaoto const struct sophgo_pin *pin, 13396406fa9SInochi Amaoto const u32 *power_cfg, u32 reg); 134*2a85188cSInochi Amaoto int sophgo_pinctrl_probe(struct platform_device *pdev); 13596406fa9SInochi Amaoto 136e096d3adSInochi Amaoto #endif /* _PINCTRL_SOPHGO_H */ 137