1*a29d8e93SInochi Amaoto // SPDX-License-Identifier: GPL-2.0
2*a29d8e93SInochi Amaoto /*
3*a29d8e93SInochi Amaoto * Sophgo CV1800B SoC pinctrl driver.
4*a29d8e93SInochi Amaoto *
5*a29d8e93SInochi Amaoto * Copyright (C) 2024 Inochi Amaoto <inochiama@outlook.com>
6*a29d8e93SInochi Amaoto *
7*a29d8e93SInochi Amaoto * This file is generated from vendor pinout definition.
8*a29d8e93SInochi Amaoto */
9*a29d8e93SInochi Amaoto
10*a29d8e93SInochi Amaoto #include <linux/module.h>
11*a29d8e93SInochi Amaoto #include <linux/platform_device.h>
12*a29d8e93SInochi Amaoto #include <linux/of.h>
13*a29d8e93SInochi Amaoto
14*a29d8e93SInochi Amaoto #include <linux/pinctrl/pinctrl.h>
15*a29d8e93SInochi Amaoto #include <linux/pinctrl/pinmux.h>
16*a29d8e93SInochi Amaoto
17*a29d8e93SInochi Amaoto #include <dt-bindings/pinctrl/pinctrl-cv1800b.h>
18*a29d8e93SInochi Amaoto
19*a29d8e93SInochi Amaoto #include "pinctrl-cv18xx.h"
20*a29d8e93SInochi Amaoto
21*a29d8e93SInochi Amaoto enum CV1800B_POWER_DOMAIN {
22*a29d8e93SInochi Amaoto VDD18A_AUD = 0,
23*a29d8e93SInochi Amaoto VDD18A_USB_PLL_ETH_CSI = 1,
24*a29d8e93SInochi Amaoto VDD33A_ETH_USB_SD1 = 2,
25*a29d8e93SInochi Amaoto VDDIO_RTC = 3,
26*a29d8e93SInochi Amaoto VDDIO_SD0_SPI = 4
27*a29d8e93SInochi Amaoto };
28*a29d8e93SInochi Amaoto
29*a29d8e93SInochi Amaoto static const char *const cv1800b_power_domain_desc[] = {
30*a29d8e93SInochi Amaoto [VDD18A_AUD] = "VDD18A_AUD",
31*a29d8e93SInochi Amaoto [VDD18A_USB_PLL_ETH_CSI] = "VDD18A_USB_PLL_ETH_CSI",
32*a29d8e93SInochi Amaoto [VDD33A_ETH_USB_SD1] = "VDD33A_ETH_USB_SD1",
33*a29d8e93SInochi Amaoto [VDDIO_RTC] = "VDDIO_RTC",
34*a29d8e93SInochi Amaoto [VDDIO_SD0_SPI] = "VDDIO_SD0_SPI",
35*a29d8e93SInochi Amaoto };
36*a29d8e93SInochi Amaoto
cv1800b_get_pull_up(struct cv1800_pin * pin,const u32 * psmap)37*a29d8e93SInochi Amaoto static int cv1800b_get_pull_up(struct cv1800_pin *pin, const u32 *psmap)
38*a29d8e93SInochi Amaoto {
39*a29d8e93SInochi Amaoto u32 pstate = psmap[pin->power_domain];
40*a29d8e93SInochi Amaoto enum cv1800_pin_io_type type = cv1800_pin_io_type(pin);
41*a29d8e93SInochi Amaoto
42*a29d8e93SInochi Amaoto if (type == IO_TYPE_1V8_ONLY)
43*a29d8e93SInochi Amaoto return 79000;
44*a29d8e93SInochi Amaoto
45*a29d8e93SInochi Amaoto if (type == IO_TYPE_1V8_OR_3V3) {
46*a29d8e93SInochi Amaoto if (pstate == PIN_POWER_STATE_1V8)
47*a29d8e93SInochi Amaoto return 60000;
48*a29d8e93SInochi Amaoto if (pstate == PIN_POWER_STATE_3V3)
49*a29d8e93SInochi Amaoto return 60000;
50*a29d8e93SInochi Amaoto
51*a29d8e93SInochi Amaoto return -EINVAL;
52*a29d8e93SInochi Amaoto }
53*a29d8e93SInochi Amaoto
54*a29d8e93SInochi Amaoto return -ENOTSUPP;
55*a29d8e93SInochi Amaoto }
56*a29d8e93SInochi Amaoto
cv1800b_get_pull_down(struct cv1800_pin * pin,const u32 * psmap)57*a29d8e93SInochi Amaoto static int cv1800b_get_pull_down(struct cv1800_pin *pin, const u32 *psmap)
58*a29d8e93SInochi Amaoto {
59*a29d8e93SInochi Amaoto u32 pstate = psmap[pin->power_domain];
60*a29d8e93SInochi Amaoto enum cv1800_pin_io_type type = cv1800_pin_io_type(pin);
61*a29d8e93SInochi Amaoto
62*a29d8e93SInochi Amaoto if (type == IO_TYPE_1V8_ONLY)
63*a29d8e93SInochi Amaoto return 87000;
64*a29d8e93SInochi Amaoto
65*a29d8e93SInochi Amaoto if (type == IO_TYPE_1V8_OR_3V3) {
66*a29d8e93SInochi Amaoto if (pstate == PIN_POWER_STATE_1V8)
67*a29d8e93SInochi Amaoto return 61000;
68*a29d8e93SInochi Amaoto if (pstate == PIN_POWER_STATE_3V3)
69*a29d8e93SInochi Amaoto return 62000;
70*a29d8e93SInochi Amaoto
71*a29d8e93SInochi Amaoto return -EINVAL;
72*a29d8e93SInochi Amaoto }
73*a29d8e93SInochi Amaoto
74*a29d8e93SInochi Amaoto return -ENOTSUPP;
75*a29d8e93SInochi Amaoto }
76*a29d8e93SInochi Amaoto
77*a29d8e93SInochi Amaoto static const u32 cv1800b_1v8_oc_map[] = {
78*a29d8e93SInochi Amaoto 12800,
79*a29d8e93SInochi Amaoto 25300,
80*a29d8e93SInochi Amaoto 37400,
81*a29d8e93SInochi Amaoto 49000
82*a29d8e93SInochi Amaoto };
83*a29d8e93SInochi Amaoto
84*a29d8e93SInochi Amaoto static const u32 cv1800b_18od33_1v8_oc_map[] = {
85*a29d8e93SInochi Amaoto 7800,
86*a29d8e93SInochi Amaoto 11700,
87*a29d8e93SInochi Amaoto 15500,
88*a29d8e93SInochi Amaoto 19200,
89*a29d8e93SInochi Amaoto 23000,
90*a29d8e93SInochi Amaoto 26600,
91*a29d8e93SInochi Amaoto 30200,
92*a29d8e93SInochi Amaoto 33700
93*a29d8e93SInochi Amaoto };
94*a29d8e93SInochi Amaoto
95*a29d8e93SInochi Amaoto static const u32 cv1800b_18od33_3v3_oc_map[] = {
96*a29d8e93SInochi Amaoto 5500,
97*a29d8e93SInochi Amaoto 8200,
98*a29d8e93SInochi Amaoto 10800,
99*a29d8e93SInochi Amaoto 13400,
100*a29d8e93SInochi Amaoto 16100,
101*a29d8e93SInochi Amaoto 18700,
102*a29d8e93SInochi Amaoto 21200,
103*a29d8e93SInochi Amaoto 23700
104*a29d8e93SInochi Amaoto };
105*a29d8e93SInochi Amaoto
106*a29d8e93SInochi Amaoto static const u32 cv1800b_eth_oc_map[] = {
107*a29d8e93SInochi Amaoto 15700,
108*a29d8e93SInochi Amaoto 17800
109*a29d8e93SInochi Amaoto };
110*a29d8e93SInochi Amaoto
cv1800b_get_oc_map(struct cv1800_pin * pin,const u32 * psmap,const u32 ** map)111*a29d8e93SInochi Amaoto static int cv1800b_get_oc_map(struct cv1800_pin *pin, const u32 *psmap,
112*a29d8e93SInochi Amaoto const u32 **map)
113*a29d8e93SInochi Amaoto {
114*a29d8e93SInochi Amaoto enum cv1800_pin_io_type type = cv1800_pin_io_type(pin);
115*a29d8e93SInochi Amaoto u32 pstate = psmap[pin->power_domain];
116*a29d8e93SInochi Amaoto
117*a29d8e93SInochi Amaoto if (type == IO_TYPE_1V8_ONLY) {
118*a29d8e93SInochi Amaoto *map = cv1800b_1v8_oc_map;
119*a29d8e93SInochi Amaoto return ARRAY_SIZE(cv1800b_1v8_oc_map);
120*a29d8e93SInochi Amaoto }
121*a29d8e93SInochi Amaoto
122*a29d8e93SInochi Amaoto if (type == IO_TYPE_1V8_OR_3V3) {
123*a29d8e93SInochi Amaoto if (pstate == PIN_POWER_STATE_1V8) {
124*a29d8e93SInochi Amaoto *map = cv1800b_18od33_1v8_oc_map;
125*a29d8e93SInochi Amaoto return ARRAY_SIZE(cv1800b_18od33_1v8_oc_map);
126*a29d8e93SInochi Amaoto } else if (pstate == PIN_POWER_STATE_3V3) {
127*a29d8e93SInochi Amaoto *map = cv1800b_18od33_3v3_oc_map;
128*a29d8e93SInochi Amaoto return ARRAY_SIZE(cv1800b_18od33_3v3_oc_map);
129*a29d8e93SInochi Amaoto }
130*a29d8e93SInochi Amaoto }
131*a29d8e93SInochi Amaoto
132*a29d8e93SInochi Amaoto if (type == IO_TYPE_ETH) {
133*a29d8e93SInochi Amaoto *map = cv1800b_eth_oc_map;
134*a29d8e93SInochi Amaoto return ARRAY_SIZE(cv1800b_eth_oc_map);
135*a29d8e93SInochi Amaoto }
136*a29d8e93SInochi Amaoto
137*a29d8e93SInochi Amaoto return -ENOTSUPP;
138*a29d8e93SInochi Amaoto }
139*a29d8e93SInochi Amaoto
140*a29d8e93SInochi Amaoto static const u32 cv1800b_1v8_schmitt_map[] = {
141*a29d8e93SInochi Amaoto 0,
142*a29d8e93SInochi Amaoto 970000,
143*a29d8e93SInochi Amaoto 1040000
144*a29d8e93SInochi Amaoto };
145*a29d8e93SInochi Amaoto
146*a29d8e93SInochi Amaoto static const u32 cv1800b_18od33_1v8_schmitt_map[] = {
147*a29d8e93SInochi Amaoto 0,
148*a29d8e93SInochi Amaoto 1070000
149*a29d8e93SInochi Amaoto };
150*a29d8e93SInochi Amaoto
151*a29d8e93SInochi Amaoto static const u32 cv1800b_18od33_3v3_schmitt_map[] = {
152*a29d8e93SInochi Amaoto 0,
153*a29d8e93SInochi Amaoto 1100000
154*a29d8e93SInochi Amaoto };
155*a29d8e93SInochi Amaoto
cv1800b_get_schmitt_map(struct cv1800_pin * pin,const u32 * psmap,const u32 ** map)156*a29d8e93SInochi Amaoto static int cv1800b_get_schmitt_map(struct cv1800_pin *pin, const u32 *psmap,
157*a29d8e93SInochi Amaoto const u32 **map)
158*a29d8e93SInochi Amaoto {
159*a29d8e93SInochi Amaoto enum cv1800_pin_io_type type = cv1800_pin_io_type(pin);
160*a29d8e93SInochi Amaoto u32 pstate = psmap[pin->power_domain];
161*a29d8e93SInochi Amaoto
162*a29d8e93SInochi Amaoto if (type == IO_TYPE_1V8_ONLY) {
163*a29d8e93SInochi Amaoto *map = cv1800b_1v8_schmitt_map;
164*a29d8e93SInochi Amaoto return ARRAY_SIZE(cv1800b_1v8_schmitt_map);
165*a29d8e93SInochi Amaoto }
166*a29d8e93SInochi Amaoto
167*a29d8e93SInochi Amaoto if (type == IO_TYPE_1V8_OR_3V3) {
168*a29d8e93SInochi Amaoto if (pstate == PIN_POWER_STATE_1V8) {
169*a29d8e93SInochi Amaoto *map = cv1800b_18od33_1v8_schmitt_map;
170*a29d8e93SInochi Amaoto return ARRAY_SIZE(cv1800b_18od33_1v8_schmitt_map);
171*a29d8e93SInochi Amaoto } else if (pstate == PIN_POWER_STATE_3V3) {
172*a29d8e93SInochi Amaoto *map = cv1800b_18od33_3v3_schmitt_map;
173*a29d8e93SInochi Amaoto return ARRAY_SIZE(cv1800b_18od33_3v3_schmitt_map);
174*a29d8e93SInochi Amaoto }
175*a29d8e93SInochi Amaoto }
176*a29d8e93SInochi Amaoto
177*a29d8e93SInochi Amaoto return -ENOTSUPP;
178*a29d8e93SInochi Amaoto }
179*a29d8e93SInochi Amaoto
180*a29d8e93SInochi Amaoto static const struct cv1800_vddio_cfg_ops cv1800b_vddio_cfg_ops = {
181*a29d8e93SInochi Amaoto .get_pull_up = cv1800b_get_pull_up,
182*a29d8e93SInochi Amaoto .get_pull_down = cv1800b_get_pull_down,
183*a29d8e93SInochi Amaoto .get_oc_map = cv1800b_get_oc_map,
184*a29d8e93SInochi Amaoto .get_schmitt_map = cv1800b_get_schmitt_map,
185*a29d8e93SInochi Amaoto };
186*a29d8e93SInochi Amaoto
187*a29d8e93SInochi Amaoto static const struct pinctrl_pin_desc cv1800b_pins[] = {
188*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_AUD_AOUTR, "AUD_AOUTR"),
189*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SD0_CLK, "SD0_CLK"),
190*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SD0_CMD, "SD0_CMD"),
191*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SD0_D0, "SD0_D0"),
192*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SD0_D1, "SD0_D1"),
193*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SD0_D2, "SD0_D2"),
194*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SD0_D3, "SD0_D3"),
195*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SD0_CD, "SD0_CD"),
196*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SD0_PWR_EN, "SD0_PWR_EN"),
197*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SPK_EN, "SPK_EN"),
198*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_UART0_TX, "UART0_TX"),
199*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_UART0_RX, "UART0_RX"),
200*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SPINOR_HOLD_X, "SPINOR_HOLD_X"),
201*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SPINOR_SCK, "SPINOR_SCK"),
202*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SPINOR_MOSI, "SPINOR_MOSI"),
203*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SPINOR_WP_X, "SPINOR_WP_X"),
204*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SPINOR_MISO, "SPINOR_MISO"),
205*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SPINOR_CS_X, "SPINOR_CS_X"),
206*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_IIC0_SCL, "IIC0_SCL"),
207*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_IIC0_SDA, "IIC0_SDA"),
208*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_AUX0, "AUX0"),
209*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_PWR_VBAT_DET, "PWR_VBAT_DET"),
210*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_PWR_SEQ2, "PWR_SEQ2"),
211*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_XTAL_XIN, "XTAL_XIN"),
212*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SD1_GPIO0, "SD1_GPIO0"),
213*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SD1_GPIO1, "SD1_GPIO1"),
214*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SD1_D3, "SD1_D3"),
215*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SD1_D2, "SD1_D2"),
216*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SD1_D1, "SD1_D1"),
217*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SD1_D0, "SD1_D0"),
218*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SD1_CMD, "SD1_CMD"),
219*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_SD1_CLK, "SD1_CLK"),
220*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_ADC1, "ADC1"),
221*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_USB_VBUS_DET, "USB_VBUS_DET"),
222*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_ETH_TXP, "ETH_TXP"),
223*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_ETH_TXM, "ETH_TXM"),
224*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_ETH_RXP, "ETH_RXP"),
225*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_ETH_RXM, "ETH_RXM"),
226*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_MIPIRX4N, "MIPIRX4N"),
227*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_MIPIRX4P, "MIPIRX4P"),
228*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_MIPIRX3N, "MIPIRX3N"),
229*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_MIPIRX3P, "MIPIRX3P"),
230*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_MIPIRX2N, "MIPIRX2N"),
231*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_MIPIRX2P, "MIPIRX2P"),
232*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_MIPIRX1N, "MIPIRX1N"),
233*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_MIPIRX1P, "MIPIRX1P"),
234*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_MIPIRX0N, "MIPIRX0N"),
235*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_MIPIRX0P, "MIPIRX0P"),
236*a29d8e93SInochi Amaoto PINCTRL_PIN(PIN_AUD_AINL_MIC, "AUD_AINL_MIC"),
237*a29d8e93SInochi Amaoto };
238*a29d8e93SInochi Amaoto
239*a29d8e93SInochi Amaoto static const struct cv1800_pin cv1800b_pin_data[ARRAY_SIZE(cv1800b_pins)] = {
240*a29d8e93SInochi Amaoto CV1800_FUNC_PIN(PIN_AUD_AOUTR, VDD18A_AUD,
241*a29d8e93SInochi Amaoto IO_TYPE_AUDIO,
242*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x12c, 6),
243*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SD0_CLK, VDDIO_SD0_SPI,
244*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
245*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x000, 7,
246*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0xa00),
247*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SD0_CMD, VDDIO_SD0_SPI,
248*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
249*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x004, 7,
250*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0xa04),
251*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SD0_D0, VDDIO_SD0_SPI,
252*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
253*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x008, 7,
254*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0xa08),
255*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SD0_D1, VDDIO_SD0_SPI,
256*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
257*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x00c, 7,
258*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0xa0c),
259*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SD0_D2, VDDIO_SD0_SPI,
260*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
261*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x010, 7,
262*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0xa10),
263*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SD0_D3, VDDIO_SD0_SPI,
264*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
265*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x014, 7,
266*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0xa14),
267*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SD0_CD, VDDIO_SD0_SPI,
268*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
269*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x018, 3,
270*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x900),
271*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SD0_PWR_EN, VDDIO_SD0_SPI,
272*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
273*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x01c, 3,
274*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x904),
275*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SPK_EN, VDDIO_SD0_SPI,
276*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
277*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x020, 3,
278*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x908),
279*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_UART0_TX, VDDIO_SD0_SPI,
280*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
281*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x024, 7,
282*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x90c),
283*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_UART0_RX, VDDIO_SD0_SPI,
284*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
285*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x028, 7,
286*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x910),
287*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SPINOR_HOLD_X, VDDIO_SD0_SPI,
288*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
289*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x02c, 3,
290*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x914),
291*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SPINOR_SCK, VDDIO_SD0_SPI,
292*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
293*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x030, 3,
294*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x918),
295*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SPINOR_MOSI, VDDIO_SD0_SPI,
296*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
297*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x034, 3,
298*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x91c),
299*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SPINOR_WP_X, VDDIO_SD0_SPI,
300*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
301*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x038, 3,
302*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x920),
303*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SPINOR_MISO, VDDIO_SD0_SPI,
304*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
305*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x03c, 3,
306*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x924),
307*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SPINOR_CS_X, VDDIO_SD0_SPI,
308*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
309*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x040, 3,
310*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x928),
311*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_IIC0_SCL, VDDIO_SD0_SPI,
312*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
313*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x04c, 7,
314*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x934),
315*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_IIC0_SDA, VDDIO_SD0_SPI,
316*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
317*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x050, 7,
318*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x938),
319*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_AUX0, VDDIO_SD0_SPI,
320*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
321*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x054, 7,
322*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x93c),
323*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_PWR_VBAT_DET, VDDIO_RTC,
324*a29d8e93SInochi Amaoto IO_TYPE_1V8_ONLY,
325*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x05c, 0,
326*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_RTC, 0x004),
327*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_PWR_SEQ2, VDDIO_RTC,
328*a29d8e93SInochi Amaoto IO_TYPE_1V8_ONLY,
329*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x068, 3,
330*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_RTC, 0x010),
331*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_XTAL_XIN, VDDIO_RTC,
332*a29d8e93SInochi Amaoto IO_TYPE_1V8_ONLY,
333*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x074, 0,
334*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_RTC, 0x020),
335*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SD1_GPIO0, VDD33A_ETH_USB_SD1,
336*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
337*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x088, 7,
338*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_RTC, 0x034),
339*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SD1_GPIO1, VDD33A_ETH_USB_SD1,
340*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
341*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x084, 7,
342*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_RTC, 0x030),
343*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SD1_D3, VDD33A_ETH_USB_SD1,
344*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
345*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x08c, 7,
346*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_RTC, 0x038),
347*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SD1_D2, VDD33A_ETH_USB_SD1,
348*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
349*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x090, 7,
350*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_RTC, 0x03c),
351*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SD1_D1, VDD33A_ETH_USB_SD1,
352*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
353*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x094, 7,
354*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_RTC, 0x040),
355*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SD1_D0, VDD33A_ETH_USB_SD1,
356*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
357*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x098, 7,
358*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_RTC, 0x044),
359*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SD1_CMD, VDD33A_ETH_USB_SD1,
360*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
361*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x09c, 7,
362*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_RTC, 0x048),
363*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_SD1_CLK, VDD33A_ETH_USB_SD1,
364*a29d8e93SInochi Amaoto IO_TYPE_1V8_OR_3V3,
365*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x0a0, 7,
366*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_RTC, 0x04c),
367*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_ADC1, VDD18A_USB_PLL_ETH_CSI,
368*a29d8e93SInochi Amaoto IO_TYPE_1V8_ONLY,
369*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x0a8, 6,
370*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x804),
371*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_USB_VBUS_DET, VDD18A_USB_PLL_ETH_CSI,
372*a29d8e93SInochi Amaoto IO_TYPE_1V8_ONLY,
373*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x0ac, 6,
374*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x808),
375*a29d8e93SInochi Amaoto CV1800_FUNC_PIN(PIN_ETH_TXP, VDD18A_USB_PLL_ETH_CSI,
376*a29d8e93SInochi Amaoto IO_TYPE_ETH,
377*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x0c0, 7),
378*a29d8e93SInochi Amaoto CV1800_FUNC_PIN(PIN_ETH_TXM, VDD18A_USB_PLL_ETH_CSI,
379*a29d8e93SInochi Amaoto IO_TYPE_ETH,
380*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x0c4, 7),
381*a29d8e93SInochi Amaoto CV1800_FUNC_PIN(PIN_ETH_RXP, VDD18A_USB_PLL_ETH_CSI,
382*a29d8e93SInochi Amaoto IO_TYPE_ETH,
383*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x0c8, 7),
384*a29d8e93SInochi Amaoto CV1800_FUNC_PIN(PIN_ETH_RXM, VDD18A_USB_PLL_ETH_CSI,
385*a29d8e93SInochi Amaoto IO_TYPE_ETH,
386*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x0cc, 7),
387*a29d8e93SInochi Amaoto CV1800_GENERATE_PIN_MUX2(PIN_MIPIRX4N, VDD18A_USB_PLL_ETH_CSI,
388*a29d8e93SInochi Amaoto IO_TYPE_1V8_ONLY,
389*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x0d4, 7,
390*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x0bc, 7,
391*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0xc04),
392*a29d8e93SInochi Amaoto CV1800_GENERATE_PIN_MUX2(PIN_MIPIRX4P, VDD18A_USB_PLL_ETH_CSI,
393*a29d8e93SInochi Amaoto IO_TYPE_1V8_ONLY,
394*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x0d8, 7,
395*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x0b8, 7,
396*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0xc08),
397*a29d8e93SInochi Amaoto CV1800_GENERATE_PIN_MUX2(PIN_MIPIRX3N, VDD18A_USB_PLL_ETH_CSI,
398*a29d8e93SInochi Amaoto IO_TYPE_1V8_ONLY,
399*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x0dc, 7,
400*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x0b0, 7,
401*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0xc0c),
402*a29d8e93SInochi Amaoto CV1800_GENERATE_PIN_MUX2(PIN_MIPIRX3P, VDD18A_USB_PLL_ETH_CSI,
403*a29d8e93SInochi Amaoto IO_TYPE_1V8_ONLY,
404*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x0e0, 7,
405*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x0b4, 7,
406*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0xc10),
407*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_MIPIRX2N, VDD18A_USB_PLL_ETH_CSI,
408*a29d8e93SInochi Amaoto IO_TYPE_1V8_ONLY,
409*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x0e4, 7,
410*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0xc14),
411*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_MIPIRX2P, VDD18A_USB_PLL_ETH_CSI,
412*a29d8e93SInochi Amaoto IO_TYPE_1V8_ONLY,
413*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x0e8, 7,
414*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0xc18),
415*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_MIPIRX1N, VDD18A_USB_PLL_ETH_CSI,
416*a29d8e93SInochi Amaoto IO_TYPE_1V8_ONLY,
417*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x0ec, 7,
418*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0xc1c),
419*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_MIPIRX1P, VDD18A_USB_PLL_ETH_CSI,
420*a29d8e93SInochi Amaoto IO_TYPE_1V8_ONLY,
421*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x0f0, 7,
422*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0xc20),
423*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_MIPIRX0N, VDD18A_USB_PLL_ETH_CSI,
424*a29d8e93SInochi Amaoto IO_TYPE_1V8_ONLY,
425*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x0f4, 7,
426*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0xc24),
427*a29d8e93SInochi Amaoto CV1800_GENERAL_PIN(PIN_MIPIRX0P, VDD18A_USB_PLL_ETH_CSI,
428*a29d8e93SInochi Amaoto IO_TYPE_1V8_ONLY,
429*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x0f8, 7,
430*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0xc28),
431*a29d8e93SInochi Amaoto CV1800_FUNC_PIN(PIN_AUD_AINL_MIC, VDD18A_AUD,
432*a29d8e93SInochi Amaoto IO_TYPE_AUDIO,
433*a29d8e93SInochi Amaoto CV1800_PINCONF_AREA_SYS, 0x120, 5),
434*a29d8e93SInochi Amaoto };
435*a29d8e93SInochi Amaoto
436*a29d8e93SInochi Amaoto static const struct cv1800_pinctrl_data cv1800b_pindata = {
437*a29d8e93SInochi Amaoto .pins = cv1800b_pins,
438*a29d8e93SInochi Amaoto .pindata = cv1800b_pin_data,
439*a29d8e93SInochi Amaoto .pdnames = cv1800b_power_domain_desc,
440*a29d8e93SInochi Amaoto .vddio_ops = &cv1800b_vddio_cfg_ops,
441*a29d8e93SInochi Amaoto .npins = ARRAY_SIZE(cv1800b_pins),
442*a29d8e93SInochi Amaoto .npd = ARRAY_SIZE(cv1800b_power_domain_desc),
443*a29d8e93SInochi Amaoto };
444*a29d8e93SInochi Amaoto
445*a29d8e93SInochi Amaoto static const struct of_device_id cv1800b_pinctrl_ids[] = {
446*a29d8e93SInochi Amaoto { .compatible = "sophgo,cv1800b-pinctrl", .data = &cv1800b_pindata },
447*a29d8e93SInochi Amaoto { }
448*a29d8e93SInochi Amaoto };
449*a29d8e93SInochi Amaoto MODULE_DEVICE_TABLE(of, cv1800b_pinctrl_ids);
450*a29d8e93SInochi Amaoto
451*a29d8e93SInochi Amaoto static struct platform_driver cv1800b_pinctrl_driver = {
452*a29d8e93SInochi Amaoto .probe = cv1800_pinctrl_probe,
453*a29d8e93SInochi Amaoto .driver = {
454*a29d8e93SInochi Amaoto .name = "cv1800b-pinctrl",
455*a29d8e93SInochi Amaoto .suppress_bind_attrs = true,
456*a29d8e93SInochi Amaoto .of_match_table = cv1800b_pinctrl_ids,
457*a29d8e93SInochi Amaoto },
458*a29d8e93SInochi Amaoto };
459*a29d8e93SInochi Amaoto module_platform_driver(cv1800b_pinctrl_driver);
460*a29d8e93SInochi Amaoto
461*a29d8e93SInochi Amaoto MODULE_DESCRIPTION("Pinctrl driver for the CV1800B series SoC");
462*a29d8e93SInochi Amaoto MODULE_LICENSE("GPL");
463