1 // SPDX-License-Identifier: GPL-2.0+ 2 // 3 // pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's. 4 // 5 // Copyright (c) 2012 Samsung Electronics Co., Ltd. 6 // http://www.samsung.com 7 // Copyright (c) 2012 Linaro Ltd 8 // http://www.linaro.org 9 // 10 // Author: Thomas Abraham <thomas.ab@samsung.com> 11 // 12 // This driver implements the Samsung pinctrl driver. It supports setting up of 13 // pinmux and pinconf configurations. The gpiolib interface is also included. 14 // External interrupt (gpio and wakeup) support are not included in this driver 15 // but provides extensions to which platform specific implementation of the gpio 16 // and wakeup interrupts can be hooked to. 17 18 #include <linux/clk.h> 19 #include <linux/err.h> 20 #include <linux/gpio/driver.h> 21 #include <linux/init.h> 22 #include <linux/io.h> 23 #include <linux/irqdomain.h> 24 #include <linux/of.h> 25 #include <linux/platform_device.h> 26 #include <linux/property.h> 27 #include <linux/seq_file.h> 28 #include <linux/slab.h> 29 #include <linux/spinlock.h> 30 31 #include "../core.h" 32 #include "pinctrl-samsung.h" 33 34 /* maximum number of the memory resources */ 35 #define SAMSUNG_PINCTRL_NUM_RESOURCES 2 36 37 /* list of all possible config options supported */ 38 static struct pin_config { 39 const char *property; 40 enum pincfg_type param; 41 } cfg_params[] = { 42 { "samsung,pin-pud", PINCFG_TYPE_PUD }, 43 { "samsung,pin-drv", PINCFG_TYPE_DRV }, 44 { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN }, 45 { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN }, 46 { "samsung,pin-val", PINCFG_TYPE_DAT }, 47 }; 48 49 static int samsung_get_group_count(struct pinctrl_dev *pctldev) 50 { 51 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); 52 53 return pmx->nr_groups; 54 } 55 56 static const char *samsung_get_group_name(struct pinctrl_dev *pctldev, 57 unsigned group) 58 { 59 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); 60 61 return pmx->pin_groups[group].name; 62 } 63 64 static int samsung_get_group_pins(struct pinctrl_dev *pctldev, 65 unsigned group, 66 const unsigned **pins, 67 unsigned *num_pins) 68 { 69 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); 70 71 *pins = pmx->pin_groups[group].pins; 72 *num_pins = pmx->pin_groups[group].num_pins; 73 74 return 0; 75 } 76 77 static int reserve_map(struct device *dev, struct pinctrl_map **map, 78 unsigned *reserved_maps, unsigned *num_maps, 79 unsigned reserve) 80 { 81 unsigned old_num = *reserved_maps; 82 unsigned new_num = *num_maps + reserve; 83 struct pinctrl_map *new_map; 84 85 if (old_num >= new_num) 86 return 0; 87 88 new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL); 89 if (!new_map) 90 return -ENOMEM; 91 92 memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map)); 93 94 *map = new_map; 95 *reserved_maps = new_num; 96 97 return 0; 98 } 99 100 static int add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps, 101 unsigned *num_maps, const char *group, 102 const char *function) 103 { 104 if (WARN_ON(*num_maps == *reserved_maps)) 105 return -ENOSPC; 106 107 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP; 108 (*map)[*num_maps].data.mux.group = group; 109 (*map)[*num_maps].data.mux.function = function; 110 (*num_maps)++; 111 112 return 0; 113 } 114 115 static int add_map_configs(struct device *dev, struct pinctrl_map **map, 116 unsigned *reserved_maps, unsigned *num_maps, 117 const char *group, unsigned long *configs, 118 unsigned num_configs) 119 { 120 unsigned long *dup_configs; 121 122 if (WARN_ON(*num_maps == *reserved_maps)) 123 return -ENOSPC; 124 125 dup_configs = kmemdup_array(configs, num_configs, sizeof(*dup_configs), 126 GFP_KERNEL); 127 if (!dup_configs) 128 return -ENOMEM; 129 130 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_GROUP; 131 (*map)[*num_maps].data.configs.group_or_pin = group; 132 (*map)[*num_maps].data.configs.configs = dup_configs; 133 (*map)[*num_maps].data.configs.num_configs = num_configs; 134 (*num_maps)++; 135 136 return 0; 137 } 138 139 static int add_config(struct device *dev, unsigned long **configs, 140 unsigned *num_configs, unsigned long config) 141 { 142 unsigned old_num = *num_configs; 143 unsigned new_num = old_num + 1; 144 unsigned long *new_configs; 145 146 new_configs = krealloc(*configs, sizeof(*new_configs) * new_num, 147 GFP_KERNEL); 148 if (!new_configs) 149 return -ENOMEM; 150 151 new_configs[old_num] = config; 152 153 *configs = new_configs; 154 *num_configs = new_num; 155 156 return 0; 157 } 158 159 static void samsung_dt_free_map(struct pinctrl_dev *pctldev, 160 struct pinctrl_map *map, 161 unsigned num_maps) 162 { 163 int i; 164 165 for (i = 0; i < num_maps; i++) 166 if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP) 167 kfree(map[i].data.configs.configs); 168 169 kfree(map); 170 } 171 172 static int samsung_dt_subnode_to_map(struct samsung_pinctrl_drv_data *drvdata, 173 struct device *dev, 174 struct device_node *np, 175 struct pinctrl_map **map, 176 unsigned *reserved_maps, 177 unsigned *num_maps) 178 { 179 int ret, i; 180 u32 val; 181 unsigned long config; 182 unsigned long *configs = NULL; 183 unsigned num_configs = 0; 184 unsigned reserve; 185 struct property *prop; 186 const char *group; 187 bool has_func = false; 188 189 ret = of_property_read_u32(np, "samsung,pin-function", &val); 190 if (!ret) 191 has_func = true; 192 193 for (i = 0; i < ARRAY_SIZE(cfg_params); i++) { 194 ret = of_property_read_u32(np, cfg_params[i].property, &val); 195 if (!ret) { 196 config = PINCFG_PACK(cfg_params[i].param, val); 197 ret = add_config(dev, &configs, &num_configs, config); 198 if (ret < 0) 199 goto exit; 200 /* EINVAL=missing, which is fine since it's optional */ 201 } else if (ret != -EINVAL) { 202 dev_err(dev, "could not parse property %s\n", 203 cfg_params[i].property); 204 } 205 } 206 207 reserve = 0; 208 if (has_func) 209 reserve++; 210 if (num_configs) 211 reserve++; 212 ret = of_property_count_strings(np, "samsung,pins"); 213 if (ret < 0) { 214 dev_err(dev, "could not parse property samsung,pins\n"); 215 goto exit; 216 } 217 reserve *= ret; 218 219 ret = reserve_map(dev, map, reserved_maps, num_maps, reserve); 220 if (ret < 0) 221 goto exit; 222 223 of_property_for_each_string(np, "samsung,pins", prop, group) { 224 if (has_func) { 225 ret = add_map_mux(map, reserved_maps, 226 num_maps, group, np->full_name); 227 if (ret < 0) 228 goto exit; 229 } 230 231 if (num_configs) { 232 ret = add_map_configs(dev, map, reserved_maps, 233 num_maps, group, configs, 234 num_configs); 235 if (ret < 0) 236 goto exit; 237 } 238 } 239 240 ret = 0; 241 242 exit: 243 kfree(configs); 244 return ret; 245 } 246 247 static int samsung_dt_node_to_map(struct pinctrl_dev *pctldev, 248 struct device_node *np_config, 249 struct pinctrl_map **map, 250 unsigned *num_maps) 251 { 252 struct samsung_pinctrl_drv_data *drvdata; 253 unsigned reserved_maps; 254 int ret; 255 256 drvdata = pinctrl_dev_get_drvdata(pctldev); 257 258 reserved_maps = 0; 259 *map = NULL; 260 *num_maps = 0; 261 262 if (!of_get_child_count(np_config)) 263 return samsung_dt_subnode_to_map(drvdata, pctldev->dev, 264 np_config, map, 265 &reserved_maps, 266 num_maps); 267 268 for_each_child_of_node_scoped(np_config, np) { 269 ret = samsung_dt_subnode_to_map(drvdata, pctldev->dev, np, map, 270 &reserved_maps, num_maps); 271 if (ret < 0) { 272 samsung_dt_free_map(pctldev, *map, *num_maps); 273 return ret; 274 } 275 } 276 277 return 0; 278 } 279 280 #ifdef CONFIG_DEBUG_FS 281 /* Forward declaration which can be used by samsung_pin_dbg_show */ 282 static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, 283 unsigned long *config); 284 static const char * const reg_names[] = {"CON", "DAT", "PUD", "DRV", "CON_PDN", 285 "PUD_PDN"}; 286 287 static void samsung_pin_dbg_show(struct pinctrl_dev *pctldev, 288 struct seq_file *s, unsigned int pin) 289 { 290 enum pincfg_type cfg_type; 291 unsigned long config; 292 int ret; 293 294 for (cfg_type = 0; cfg_type < PINCFG_TYPE_NUM; cfg_type++) { 295 config = PINCFG_PACK(cfg_type, 0); 296 ret = samsung_pinconf_get(pctldev, pin, &config); 297 if (ret < 0) 298 continue; 299 300 seq_printf(s, " %s(0x%lx)", reg_names[cfg_type], 301 PINCFG_UNPACK_VALUE(config)); 302 } 303 } 304 #endif 305 306 /* list of pinctrl callbacks for the pinctrl core */ 307 static const struct pinctrl_ops samsung_pctrl_ops = { 308 .get_groups_count = samsung_get_group_count, 309 .get_group_name = samsung_get_group_name, 310 .get_group_pins = samsung_get_group_pins, 311 .dt_node_to_map = samsung_dt_node_to_map, 312 .dt_free_map = samsung_dt_free_map, 313 #ifdef CONFIG_DEBUG_FS 314 .pin_dbg_show = samsung_pin_dbg_show, 315 #endif 316 }; 317 318 /* check if the selector is a valid pin function selector */ 319 static int samsung_get_functions_count(struct pinctrl_dev *pctldev) 320 { 321 struct samsung_pinctrl_drv_data *drvdata; 322 323 drvdata = pinctrl_dev_get_drvdata(pctldev); 324 return drvdata->nr_functions; 325 } 326 327 /* return the name of the pin function specified */ 328 static const char *samsung_pinmux_get_fname(struct pinctrl_dev *pctldev, 329 unsigned selector) 330 { 331 struct samsung_pinctrl_drv_data *drvdata; 332 333 drvdata = pinctrl_dev_get_drvdata(pctldev); 334 return drvdata->pmx_functions[selector].name; 335 } 336 337 /* return the groups associated for the specified function selector */ 338 static int samsung_pinmux_get_groups(struct pinctrl_dev *pctldev, 339 unsigned selector, const char * const **groups, 340 unsigned * const num_groups) 341 { 342 struct samsung_pinctrl_drv_data *drvdata; 343 344 drvdata = pinctrl_dev_get_drvdata(pctldev); 345 *groups = drvdata->pmx_functions[selector].groups; 346 *num_groups = drvdata->pmx_functions[selector].num_groups; 347 return 0; 348 } 349 350 /* 351 * given a pin number that is local to a pin controller, find out the pin bank 352 * and the register base of the pin bank. 353 */ 354 static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata, 355 unsigned pin, void __iomem **reg, u32 *offset, 356 struct samsung_pin_bank **bank) 357 { 358 struct samsung_pin_bank *b; 359 360 b = drvdata->pin_banks; 361 362 while ((pin >= b->pin_base) && 363 ((b->pin_base + b->nr_pins - 1) < pin)) 364 b++; 365 366 *reg = b->pctl_base + b->pctl_offset; 367 *offset = pin - b->pin_base; 368 if (bank) 369 *bank = b; 370 } 371 372 /* enable or disable a pinmux function */ 373 static int samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector, 374 unsigned group) 375 { 376 struct samsung_pinctrl_drv_data *drvdata; 377 const struct samsung_pin_bank_type *type; 378 struct samsung_pin_bank *bank; 379 void __iomem *reg; 380 u32 mask, shift, data, pin_offset; 381 unsigned long flags; 382 const struct samsung_pmx_func *func; 383 const struct samsung_pin_group *grp; 384 int ret; 385 386 drvdata = pinctrl_dev_get_drvdata(pctldev); 387 func = &drvdata->pmx_functions[selector]; 388 grp = &drvdata->pin_groups[group]; 389 390 pin_to_reg_bank(drvdata, grp->pins[0], ®, &pin_offset, &bank); 391 type = bank->type; 392 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1; 393 shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC]; 394 if (shift >= 32) { 395 /* Some banks have two config registers */ 396 shift -= 32; 397 reg += 4; 398 } 399 400 ret = clk_enable(drvdata->pclk); 401 if (ret) { 402 dev_err(pctldev->dev, "failed to enable clock for setup\n"); 403 return ret; 404 } 405 406 raw_spin_lock_irqsave(&bank->slock, flags); 407 408 data = readl(reg + type->reg_offset[PINCFG_TYPE_FUNC]); 409 data &= ~(mask << shift); 410 data |= func->val << shift; 411 writel(data, reg + type->reg_offset[PINCFG_TYPE_FUNC]); 412 413 raw_spin_unlock_irqrestore(&bank->slock, flags); 414 415 clk_disable(drvdata->pclk); 416 417 return 0; 418 } 419 420 /* enable a specified pinmux by writing to registers */ 421 static int samsung_pinmux_set_mux(struct pinctrl_dev *pctldev, 422 unsigned selector, 423 unsigned group) 424 { 425 return samsung_pinmux_setup(pctldev, selector, group); 426 } 427 428 /* list of pinmux callbacks for the pinmux vertical in pinctrl core */ 429 static const struct pinmux_ops samsung_pinmux_ops = { 430 .get_functions_count = samsung_get_functions_count, 431 .get_function_name = samsung_pinmux_get_fname, 432 .get_function_groups = samsung_pinmux_get_groups, 433 .set_mux = samsung_pinmux_set_mux, 434 }; 435 436 /* set or get the pin config settings for a specified pin */ 437 static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin, 438 unsigned long *config, bool set) 439 { 440 struct samsung_pinctrl_drv_data *drvdata; 441 const struct samsung_pin_bank_type *type; 442 struct samsung_pin_bank *bank; 443 void __iomem *reg_base; 444 enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config); 445 u32 data, width, pin_offset, mask, shift; 446 u32 cfg_value, cfg_reg; 447 unsigned long flags; 448 int ret; 449 450 drvdata = pinctrl_dev_get_drvdata(pctldev); 451 pin_to_reg_bank(drvdata, pin, ®_base, &pin_offset, &bank); 452 type = bank->type; 453 454 if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type]) 455 return -EINVAL; 456 457 width = type->fld_width[cfg_type]; 458 cfg_reg = type->reg_offset[cfg_type]; 459 460 ret = clk_enable(drvdata->pclk); 461 if (ret) { 462 dev_err(drvdata->dev, "failed to enable clock\n"); 463 return ret; 464 } 465 466 raw_spin_lock_irqsave(&bank->slock, flags); 467 468 mask = (1 << width) - 1; 469 shift = pin_offset * width; 470 data = readl(reg_base + cfg_reg); 471 472 if (set) { 473 cfg_value = PINCFG_UNPACK_VALUE(*config); 474 data &= ~(mask << shift); 475 data |= (cfg_value << shift); 476 writel(data, reg_base + cfg_reg); 477 } else { 478 data >>= shift; 479 data &= mask; 480 *config = PINCFG_PACK(cfg_type, data); 481 } 482 483 raw_spin_unlock_irqrestore(&bank->slock, flags); 484 485 clk_disable(drvdata->pclk); 486 487 return 0; 488 } 489 490 /* set the pin config settings for a specified pin */ 491 static int samsung_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, 492 unsigned long *configs, unsigned num_configs) 493 { 494 int i, ret; 495 496 for (i = 0; i < num_configs; i++) { 497 ret = samsung_pinconf_rw(pctldev, pin, &configs[i], true); 498 if (ret < 0) 499 return ret; 500 } /* for each config */ 501 502 return 0; 503 } 504 505 /* get the pin config settings for a specified pin */ 506 static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, 507 unsigned long *config) 508 { 509 return samsung_pinconf_rw(pctldev, pin, config, false); 510 } 511 512 /* set the pin config settings for a specified pin group */ 513 static int samsung_pinconf_group_set(struct pinctrl_dev *pctldev, 514 unsigned group, unsigned long *configs, 515 unsigned num_configs) 516 { 517 struct samsung_pinctrl_drv_data *drvdata; 518 const unsigned int *pins; 519 unsigned int cnt; 520 521 drvdata = pinctrl_dev_get_drvdata(pctldev); 522 pins = drvdata->pin_groups[group].pins; 523 524 for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++) 525 samsung_pinconf_set(pctldev, pins[cnt], configs, num_configs); 526 527 return 0; 528 } 529 530 /* get the pin config settings for a specified pin group */ 531 static int samsung_pinconf_group_get(struct pinctrl_dev *pctldev, 532 unsigned int group, unsigned long *config) 533 { 534 struct samsung_pinctrl_drv_data *drvdata; 535 const unsigned int *pins; 536 537 drvdata = pinctrl_dev_get_drvdata(pctldev); 538 pins = drvdata->pin_groups[group].pins; 539 samsung_pinconf_get(pctldev, pins[0], config); 540 return 0; 541 } 542 543 /* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */ 544 static const struct pinconf_ops samsung_pinconf_ops = { 545 .pin_config_get = samsung_pinconf_get, 546 .pin_config_set = samsung_pinconf_set, 547 .pin_config_group_get = samsung_pinconf_group_get, 548 .pin_config_group_set = samsung_pinconf_group_set, 549 }; 550 551 /* 552 * The samsung_gpio_set_vlaue() should be called with "bank->slock" held 553 * to avoid race condition. 554 */ 555 static void samsung_gpio_set_value(struct gpio_chip *gc, 556 unsigned offset, int value) 557 { 558 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 559 const struct samsung_pin_bank_type *type = bank->type; 560 void __iomem *reg; 561 u32 data; 562 563 reg = bank->pctl_base + bank->pctl_offset; 564 565 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]); 566 data &= ~(1 << offset); 567 if (value) 568 data |= 1 << offset; 569 writel(data, reg + type->reg_offset[PINCFG_TYPE_DAT]); 570 } 571 572 /* gpiolib gpio_set callback function */ 573 static int samsung_gpio_set(struct gpio_chip *gc, unsigned int offset, 574 int value) 575 { 576 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 577 struct samsung_pinctrl_drv_data *drvdata = bank->drvdata; 578 unsigned long flags; 579 int ret; 580 581 ret = clk_enable(drvdata->pclk); 582 if (ret) { 583 dev_err(drvdata->dev, "failed to enable clock\n"); 584 return ret; 585 } 586 587 raw_spin_lock_irqsave(&bank->slock, flags); 588 samsung_gpio_set_value(gc, offset, value); 589 raw_spin_unlock_irqrestore(&bank->slock, flags); 590 591 clk_disable(drvdata->pclk); 592 593 return 0; 594 } 595 596 /* gpiolib gpio_get callback function */ 597 static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset) 598 { 599 const void __iomem *reg; 600 u32 data; 601 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 602 const struct samsung_pin_bank_type *type = bank->type; 603 struct samsung_pinctrl_drv_data *drvdata = bank->drvdata; 604 int ret; 605 606 reg = bank->pctl_base + bank->pctl_offset; 607 608 ret = clk_enable(drvdata->pclk); 609 if (ret) { 610 dev_err(drvdata->dev, "failed to enable clock\n"); 611 return ret; 612 } 613 614 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]); 615 data >>= offset; 616 data &= 1; 617 618 clk_disable(drvdata->pclk); 619 620 return data; 621 } 622 623 /* 624 * The samsung_gpio_set_direction() should be called with "bank->slock" held 625 * to avoid race condition. 626 * The calls to gpio_direction_output() and gpio_direction_input() 627 * leads to this function call. 628 */ 629 static int samsung_gpio_set_direction(struct gpio_chip *gc, 630 unsigned offset, bool input) 631 { 632 const struct samsung_pin_bank_type *type; 633 struct samsung_pin_bank *bank; 634 void __iomem *reg; 635 u32 data, mask, shift; 636 637 bank = gpiochip_get_data(gc); 638 type = bank->type; 639 640 reg = bank->pctl_base + bank->pctl_offset 641 + type->reg_offset[PINCFG_TYPE_FUNC]; 642 643 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1; 644 shift = offset * type->fld_width[PINCFG_TYPE_FUNC]; 645 if (shift >= 32) { 646 /* Some banks have two config registers */ 647 shift -= 32; 648 reg += 4; 649 } 650 651 data = readl(reg); 652 data &= ~(mask << shift); 653 if (!input) 654 data |= PIN_CON_FUNC_OUTPUT << shift; 655 writel(data, reg); 656 657 return 0; 658 } 659 660 /* gpiolib gpio_direction_input callback function. */ 661 static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset) 662 { 663 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 664 struct samsung_pinctrl_drv_data *drvdata = bank->drvdata; 665 unsigned long flags; 666 int ret; 667 668 ret = clk_enable(drvdata->pclk); 669 if (ret) { 670 dev_err(drvdata->dev, "failed to enable clock\n"); 671 return ret; 672 } 673 674 raw_spin_lock_irqsave(&bank->slock, flags); 675 ret = samsung_gpio_set_direction(gc, offset, true); 676 raw_spin_unlock_irqrestore(&bank->slock, flags); 677 678 clk_disable(drvdata->pclk); 679 680 return ret; 681 } 682 683 /* gpiolib gpio_direction_output callback function. */ 684 static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset, 685 int value) 686 { 687 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 688 struct samsung_pinctrl_drv_data *drvdata = bank->drvdata; 689 unsigned long flags; 690 int ret; 691 692 ret = clk_enable(drvdata->pclk); 693 if (ret) { 694 dev_err(drvdata->dev, "failed to enable clock\n"); 695 return ret; 696 } 697 698 raw_spin_lock_irqsave(&bank->slock, flags); 699 samsung_gpio_set_value(gc, offset, value); 700 ret = samsung_gpio_set_direction(gc, offset, false); 701 raw_spin_unlock_irqrestore(&bank->slock, flags); 702 703 clk_disable(drvdata->pclk); 704 705 return ret; 706 } 707 708 /* 709 * gpiod_to_irq() callback function. Creates a mapping between a GPIO pin 710 * and a virtual IRQ, if not already present. 711 */ 712 static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset) 713 { 714 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 715 unsigned int virq; 716 717 if (!bank->irq_domain) 718 return -ENXIO; 719 720 virq = irq_create_mapping(bank->irq_domain, offset); 721 722 return (virq) ? : -ENXIO; 723 } 724 725 static int samsung_add_pin_ranges(struct gpio_chip *gc) 726 { 727 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 728 729 bank->grange.name = bank->name; 730 bank->grange.id = bank->id; 731 bank->grange.pin_base = bank->pin_base; 732 bank->grange.base = gc->base; 733 bank->grange.npins = bank->nr_pins; 734 bank->grange.gc = &bank->gpio_chip; 735 pinctrl_add_gpio_range(bank->drvdata->pctl_dev, &bank->grange); 736 737 return 0; 738 } 739 740 static struct samsung_pin_group *samsung_pinctrl_create_groups( 741 struct device *dev, 742 struct samsung_pinctrl_drv_data *drvdata, 743 unsigned int *cnt) 744 { 745 struct pinctrl_desc *ctrldesc = &drvdata->pctl; 746 struct samsung_pin_group *groups, *grp; 747 const struct pinctrl_pin_desc *pdesc; 748 int i; 749 750 groups = devm_kcalloc(dev, ctrldesc->npins, sizeof(*groups), 751 GFP_KERNEL); 752 if (!groups) 753 return ERR_PTR(-EINVAL); 754 grp = groups; 755 756 pdesc = ctrldesc->pins; 757 for (i = 0; i < ctrldesc->npins; ++i, ++pdesc, ++grp) { 758 grp->name = pdesc->name; 759 grp->pins = &pdesc->number; 760 grp->num_pins = 1; 761 } 762 763 *cnt = ctrldesc->npins; 764 return groups; 765 } 766 767 static int samsung_pinctrl_create_function(struct device *dev, 768 struct samsung_pinctrl_drv_data *drvdata, 769 struct device_node *func_np, 770 struct samsung_pmx_func *func) 771 { 772 int npins; 773 int ret; 774 int i; 775 776 if (of_property_read_u32(func_np, "samsung,pin-function", &func->val)) 777 return 0; 778 779 npins = of_property_count_strings(func_np, "samsung,pins"); 780 if (npins < 1) { 781 dev_err(dev, "invalid pin list in %pOFn node", func_np); 782 return -EINVAL; 783 } 784 785 func->name = func_np->full_name; 786 787 func->groups = devm_kcalloc(dev, npins, sizeof(char *), GFP_KERNEL); 788 if (!func->groups) 789 return -ENOMEM; 790 791 for (i = 0; i < npins; ++i) { 792 const char *gname; 793 794 ret = of_property_read_string_index(func_np, "samsung,pins", 795 i, &gname); 796 if (ret) { 797 dev_err(dev, 798 "failed to read pin name %d from %pOFn node\n", 799 i, func_np); 800 return ret; 801 } 802 803 func->groups[i] = gname; 804 } 805 806 func->num_groups = npins; 807 return 1; 808 } 809 810 static struct samsung_pmx_func *samsung_pinctrl_create_functions( 811 struct device *dev, 812 struct samsung_pinctrl_drv_data *drvdata, 813 unsigned int *cnt) 814 { 815 struct samsung_pmx_func *functions, *func; 816 struct device_node *dev_np = dev->of_node; 817 struct device_node *cfg_np; 818 unsigned int func_cnt = 0; 819 int ret; 820 821 /* 822 * Iterate over all the child nodes of the pin controller node 823 * and create pin groups and pin function lists. 824 */ 825 for_each_child_of_node(dev_np, cfg_np) { 826 struct device_node *func_np; 827 828 if (!of_get_child_count(cfg_np)) { 829 if (!of_property_present(cfg_np, 830 "samsung,pin-function")) 831 continue; 832 ++func_cnt; 833 continue; 834 } 835 836 for_each_child_of_node(cfg_np, func_np) { 837 if (!of_property_present(func_np, 838 "samsung,pin-function")) 839 continue; 840 ++func_cnt; 841 } 842 } 843 844 functions = devm_kcalloc(dev, func_cnt, sizeof(*functions), 845 GFP_KERNEL); 846 if (!functions) 847 return ERR_PTR(-ENOMEM); 848 func = functions; 849 850 /* 851 * Iterate over all the child nodes of the pin controller node 852 * and create pin groups and pin function lists. 853 */ 854 func_cnt = 0; 855 for_each_child_of_node_scoped(dev_np, cfg_np) { 856 if (!of_get_child_count(cfg_np)) { 857 ret = samsung_pinctrl_create_function(dev, drvdata, 858 cfg_np, func); 859 if (ret < 0) 860 return ERR_PTR(ret); 861 if (ret > 0) { 862 ++func; 863 ++func_cnt; 864 } 865 continue; 866 } 867 868 for_each_child_of_node_scoped(cfg_np, func_np) { 869 ret = samsung_pinctrl_create_function(dev, drvdata, 870 func_np, func); 871 if (ret < 0) 872 return ERR_PTR(ret); 873 if (ret > 0) { 874 ++func; 875 ++func_cnt; 876 } 877 } 878 } 879 880 *cnt = func_cnt; 881 return functions; 882 } 883 884 /* 885 * Parse the information about all the available pin groups and pin functions 886 * from device node of the pin-controller. A pin group is formed with all 887 * the pins listed in the "samsung,pins" property. 888 */ 889 890 static int samsung_pinctrl_parse_dt(struct platform_device *pdev, 891 struct samsung_pinctrl_drv_data *drvdata) 892 { 893 struct device *dev = &pdev->dev; 894 struct samsung_pin_group *groups; 895 struct samsung_pmx_func *functions; 896 unsigned int grp_cnt = 0, func_cnt = 0; 897 898 groups = samsung_pinctrl_create_groups(dev, drvdata, &grp_cnt); 899 if (IS_ERR(groups)) { 900 dev_err(dev, "failed to parse pin groups\n"); 901 return PTR_ERR(groups); 902 } 903 904 functions = samsung_pinctrl_create_functions(dev, drvdata, &func_cnt); 905 if (IS_ERR(functions)) { 906 dev_err(dev, "failed to parse pin functions\n"); 907 return PTR_ERR(functions); 908 } 909 910 drvdata->pin_groups = groups; 911 drvdata->nr_groups = grp_cnt; 912 drvdata->pmx_functions = functions; 913 drvdata->nr_functions = func_cnt; 914 915 return 0; 916 } 917 918 /* register the pinctrl interface with the pinctrl subsystem */ 919 static int samsung_pinctrl_register(struct platform_device *pdev, 920 struct samsung_pinctrl_drv_data *drvdata) 921 { 922 struct pinctrl_desc *ctrldesc = &drvdata->pctl; 923 struct pinctrl_pin_desc *pindesc, *pdesc; 924 struct samsung_pin_bank *pin_bank; 925 char *pin_names; 926 int pin, bank, ret; 927 928 ctrldesc->name = "samsung-pinctrl"; 929 ctrldesc->owner = THIS_MODULE; 930 ctrldesc->pctlops = &samsung_pctrl_ops; 931 ctrldesc->pmxops = &samsung_pinmux_ops; 932 ctrldesc->confops = &samsung_pinconf_ops; 933 934 pindesc = devm_kcalloc(&pdev->dev, 935 drvdata->nr_pins, sizeof(*pindesc), 936 GFP_KERNEL); 937 if (!pindesc) 938 return -ENOMEM; 939 ctrldesc->pins = pindesc; 940 ctrldesc->npins = drvdata->nr_pins; 941 942 /* dynamically populate the pin number and pin name for pindesc */ 943 for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++) 944 pdesc->number = pin; 945 946 /* 947 * allocate space for storing the dynamically generated names for all 948 * the pins which belong to this pin-controller. 949 */ 950 pin_names = devm_kzalloc(&pdev->dev, 951 array3_size(sizeof(char), PIN_NAME_LENGTH, 952 drvdata->nr_pins), 953 GFP_KERNEL); 954 if (!pin_names) 955 return -ENOMEM; 956 957 /* for each pin, the name of the pin is pin-bank name + pin number */ 958 for (bank = 0; bank < drvdata->nr_banks; bank++) { 959 pin_bank = &drvdata->pin_banks[bank]; 960 pin_bank->id = bank; 961 for (pin = 0; pin < pin_bank->nr_pins; pin++) { 962 sprintf(pin_names, "%s-%d", pin_bank->name, pin); 963 pdesc = pindesc + pin_bank->pin_base + pin; 964 pdesc->name = pin_names; 965 pin_names += PIN_NAME_LENGTH; 966 } 967 } 968 969 ret = samsung_pinctrl_parse_dt(pdev, drvdata); 970 if (ret) 971 return ret; 972 973 ret = devm_pinctrl_register_and_init(&pdev->dev, ctrldesc, drvdata, 974 &drvdata->pctl_dev); 975 if (ret) { 976 dev_err(&pdev->dev, "could not register pinctrl driver\n"); 977 return ret; 978 } 979 980 return 0; 981 } 982 983 /* unregister the pinctrl interface with the pinctrl subsystem */ 984 static int samsung_pinctrl_unregister(struct platform_device *pdev, 985 struct samsung_pinctrl_drv_data *drvdata) 986 { 987 struct samsung_pin_bank *bank = drvdata->pin_banks; 988 int i; 989 990 for (i = 0; i < drvdata->nr_banks; ++i, ++bank) 991 pinctrl_remove_gpio_range(drvdata->pctl_dev, &bank->grange); 992 993 return 0; 994 } 995 996 static void samsung_pud_value_init(struct samsung_pinctrl_drv_data *drvdata) 997 { 998 unsigned int *pud_val = drvdata->pud_val; 999 1000 pud_val[PUD_PULL_DISABLE] = EXYNOS_PIN_PUD_PULL_DISABLE; 1001 pud_val[PUD_PULL_DOWN] = EXYNOS_PIN_PID_PULL_DOWN; 1002 pud_val[PUD_PULL_UP] = EXYNOS_PIN_PID_PULL_UP; 1003 } 1004 1005 /* 1006 * Enable or Disable the pull-down and pull-up for the gpio pins in the 1007 * PUD register. 1008 */ 1009 static void samsung_gpio_set_pud(struct gpio_chip *gc, unsigned int offset, 1010 unsigned int value) 1011 { 1012 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 1013 const struct samsung_pin_bank_type *type = bank->type; 1014 void __iomem *reg; 1015 unsigned int data, mask; 1016 1017 reg = bank->pctl_base + bank->pctl_offset; 1018 data = readl(reg + type->reg_offset[PINCFG_TYPE_PUD]); 1019 mask = (1 << type->fld_width[PINCFG_TYPE_PUD]) - 1; 1020 data &= ~(mask << (offset * type->fld_width[PINCFG_TYPE_PUD])); 1021 data |= value << (offset * type->fld_width[PINCFG_TYPE_PUD]); 1022 writel(data, reg + type->reg_offset[PINCFG_TYPE_PUD]); 1023 } 1024 1025 /* 1026 * Identify the type of PUD config based on the gpiolib request to enable 1027 * or disable the PUD config. 1028 */ 1029 static int samsung_gpio_set_config(struct gpio_chip *gc, unsigned int offset, 1030 unsigned long config) 1031 { 1032 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 1033 struct samsung_pinctrl_drv_data *drvdata = bank->drvdata; 1034 unsigned int value; 1035 int ret = 0; 1036 unsigned long flags; 1037 1038 switch (pinconf_to_config_param(config)) { 1039 case PIN_CONFIG_BIAS_DISABLE: 1040 value = drvdata->pud_val[PUD_PULL_DISABLE]; 1041 break; 1042 case PIN_CONFIG_BIAS_PULL_DOWN: 1043 value = drvdata->pud_val[PUD_PULL_DOWN]; 1044 break; 1045 case PIN_CONFIG_BIAS_PULL_UP: 1046 value = drvdata->pud_val[PUD_PULL_UP]; 1047 break; 1048 default: 1049 return -ENOTSUPP; 1050 } 1051 1052 ret = clk_enable(drvdata->pclk); 1053 if (ret) { 1054 dev_err(drvdata->dev, "failed to enable clock\n"); 1055 return ret; 1056 } 1057 1058 raw_spin_lock_irqsave(&bank->slock, flags); 1059 samsung_gpio_set_pud(gc, offset, value); 1060 raw_spin_unlock_irqrestore(&bank->slock, flags); 1061 1062 clk_disable(drvdata->pclk); 1063 1064 return ret; 1065 } 1066 1067 static const struct gpio_chip samsung_gpiolib_chip = { 1068 .request = gpiochip_generic_request, 1069 .free = gpiochip_generic_free, 1070 .set_rv = samsung_gpio_set, 1071 .get = samsung_gpio_get, 1072 .direction_input = samsung_gpio_direction_input, 1073 .direction_output = samsung_gpio_direction_output, 1074 .to_irq = samsung_gpio_to_irq, 1075 .add_pin_ranges = samsung_add_pin_ranges, 1076 .set_config = samsung_gpio_set_config, 1077 .owner = THIS_MODULE, 1078 }; 1079 1080 /* register the gpiolib interface with the gpiolib subsystem */ 1081 static int samsung_gpiolib_register(struct platform_device *pdev, 1082 struct samsung_pinctrl_drv_data *drvdata) 1083 { 1084 struct samsung_pin_bank *bank = drvdata->pin_banks; 1085 struct gpio_chip *gc; 1086 int ret; 1087 int i; 1088 1089 for (i = 0; i < drvdata->nr_banks; ++i, ++bank) { 1090 bank->gpio_chip = samsung_gpiolib_chip; 1091 1092 gc = &bank->gpio_chip; 1093 gc->base = -1; /* Dynamic allocation */ 1094 gc->ngpio = bank->nr_pins; 1095 gc->parent = &pdev->dev; 1096 gc->fwnode = bank->fwnode; 1097 gc->label = bank->name; 1098 1099 ret = devm_gpiochip_add_data(&pdev->dev, gc, bank); 1100 if (ret) { 1101 dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n", 1102 gc->label, ret); 1103 return ret; 1104 } 1105 } 1106 1107 return 0; 1108 } 1109 1110 static const struct samsung_pin_ctrl * 1111 samsung_pinctrl_get_soc_data_for_of_alias(struct platform_device *pdev) 1112 { 1113 struct device_node *node = pdev->dev.of_node; 1114 const struct samsung_pinctrl_of_match_data *of_data; 1115 int id; 1116 1117 id = of_alias_get_id(node, "pinctrl"); 1118 if (id < 0) { 1119 dev_err(&pdev->dev, "failed to get alias id\n"); 1120 return NULL; 1121 } 1122 1123 of_data = of_device_get_match_data(&pdev->dev); 1124 if (id >= of_data->num_ctrl) { 1125 dev_err(&pdev->dev, "invalid alias id %d\n", id); 1126 return NULL; 1127 } 1128 1129 return &(of_data->ctrl[id]); 1130 } 1131 1132 static void samsung_banks_node_put(struct samsung_pinctrl_drv_data *d) 1133 { 1134 struct samsung_pin_bank *bank; 1135 unsigned int i; 1136 1137 bank = d->pin_banks; 1138 for (i = 0; i < d->nr_banks; ++i, ++bank) 1139 fwnode_handle_put(bank->fwnode); 1140 } 1141 1142 /* 1143 * Iterate over all driver pin banks to find one matching the name of node, 1144 * skipping optional "-gpio" node suffix. When found, assign node to the bank. 1145 */ 1146 static void samsung_banks_node_get(struct device *dev, struct samsung_pinctrl_drv_data *d) 1147 { 1148 const char *suffix = "-gpio-bank"; 1149 struct samsung_pin_bank *bank; 1150 struct fwnode_handle *child; 1151 /* Pin bank names are up to 4 characters */ 1152 char node_name[20]; 1153 unsigned int i; 1154 size_t len; 1155 1156 bank = d->pin_banks; 1157 for (i = 0; i < d->nr_banks; ++i, ++bank) { 1158 strscpy(node_name, bank->name, sizeof(node_name)); 1159 len = strlcat(node_name, suffix, sizeof(node_name)); 1160 if (len >= sizeof(node_name)) { 1161 dev_err(dev, "Too long pin bank name '%s', ignoring\n", 1162 bank->name); 1163 continue; 1164 } 1165 1166 for_each_gpiochip_node(dev, child) { 1167 struct device_node *np = to_of_node(child); 1168 1169 if (of_node_name_eq(np, node_name)) 1170 break; 1171 if (of_node_name_eq(np, bank->name)) 1172 break; 1173 } 1174 1175 if (child) 1176 bank->fwnode = child; 1177 else 1178 dev_warn(dev, "Missing node for bank %s - invalid DTB\n", 1179 bank->name); 1180 /* child reference dropped in samsung_banks_node_put() */ 1181 } 1182 } 1183 1184 /* retrieve the soc specific data */ 1185 static const struct samsung_pin_ctrl * 1186 samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d, 1187 struct platform_device *pdev) 1188 { 1189 const struct samsung_pin_bank_data *bdata; 1190 const struct samsung_pin_ctrl *ctrl; 1191 struct samsung_pin_bank *bank; 1192 struct resource *res; 1193 void __iomem *virt_base[SAMSUNG_PINCTRL_NUM_RESOURCES]; 1194 unsigned int i; 1195 1196 ctrl = samsung_pinctrl_get_soc_data_for_of_alias(pdev); 1197 if (!ctrl) 1198 return ERR_PTR(-ENOENT); 1199 1200 d->suspend = ctrl->suspend; 1201 d->resume = ctrl->resume; 1202 d->nr_banks = ctrl->nr_banks; 1203 d->pin_banks = devm_kcalloc(&pdev->dev, d->nr_banks, 1204 sizeof(*d->pin_banks), GFP_KERNEL); 1205 if (!d->pin_banks) 1206 return ERR_PTR(-ENOMEM); 1207 1208 if (ctrl->nr_ext_resources + 1 > SAMSUNG_PINCTRL_NUM_RESOURCES) 1209 return ERR_PTR(-EINVAL); 1210 1211 for (i = 0; i < ctrl->nr_ext_resources + 1; i++) { 1212 res = platform_get_resource(pdev, IORESOURCE_MEM, i); 1213 if (!res) { 1214 dev_err(&pdev->dev, "failed to get mem%d resource\n", i); 1215 return ERR_PTR(-EINVAL); 1216 } 1217 virt_base[i] = devm_ioremap(&pdev->dev, res->start, 1218 resource_size(res)); 1219 if (!virt_base[i]) { 1220 dev_err(&pdev->dev, "failed to ioremap %pR\n", res); 1221 return ERR_PTR(-EIO); 1222 } 1223 } 1224 1225 bank = d->pin_banks; 1226 bdata = ctrl->pin_banks; 1227 for (i = 0; i < ctrl->nr_banks; ++i, ++bdata, ++bank) { 1228 bank->type = bdata->type; 1229 bank->pctl_offset = bdata->pctl_offset; 1230 bank->nr_pins = bdata->nr_pins; 1231 bank->eint_func = bdata->eint_func; 1232 bank->eint_type = bdata->eint_type; 1233 bank->eint_mask = bdata->eint_mask; 1234 bank->eint_offset = bdata->eint_offset; 1235 bank->eint_con_offset = bdata->eint_con_offset; 1236 bank->eint_mask_offset = bdata->eint_mask_offset; 1237 bank->eint_pend_offset = bdata->eint_pend_offset; 1238 bank->eint_fltcon_offset = bdata->eint_fltcon_offset; 1239 bank->name = bdata->name; 1240 1241 raw_spin_lock_init(&bank->slock); 1242 bank->drvdata = d; 1243 bank->pin_base = d->nr_pins; 1244 d->nr_pins += bank->nr_pins; 1245 1246 bank->eint_base = virt_base[0]; 1247 bank->pctl_base = virt_base[bdata->pctl_res_idx]; 1248 } 1249 /* 1250 * Legacy platforms should provide only one resource with IO memory. 1251 * Store it as virt_base because legacy driver needs to access it 1252 * through samsung_pinctrl_drv_data. 1253 */ 1254 d->virt_base = virt_base[0]; 1255 1256 samsung_banks_node_get(&pdev->dev, d); 1257 1258 return ctrl; 1259 } 1260 1261 static int samsung_pinctrl_probe(struct platform_device *pdev) 1262 { 1263 struct samsung_pinctrl_drv_data *drvdata; 1264 const struct samsung_pin_ctrl *ctrl; 1265 struct device *dev = &pdev->dev; 1266 int ret; 1267 1268 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); 1269 if (!drvdata) 1270 return -ENOMEM; 1271 1272 ctrl = samsung_pinctrl_get_soc_data(drvdata, pdev); 1273 if (IS_ERR(ctrl)) { 1274 dev_err(&pdev->dev, "driver data not available\n"); 1275 return PTR_ERR(ctrl); 1276 } 1277 drvdata->dev = dev; 1278 1279 ret = platform_get_irq_optional(pdev, 0); 1280 if (ret < 0 && ret != -ENXIO) 1281 goto err_put_banks; 1282 if (ret > 0) 1283 drvdata->irq = ret; 1284 1285 if (ctrl->retention_data) { 1286 drvdata->retention_ctrl = ctrl->retention_data->init(drvdata, 1287 ctrl->retention_data); 1288 if (IS_ERR(drvdata->retention_ctrl)) { 1289 ret = PTR_ERR(drvdata->retention_ctrl); 1290 goto err_put_banks; 1291 } 1292 } 1293 1294 drvdata->pclk = devm_clk_get_optional_prepared(dev, "pclk"); 1295 if (IS_ERR(drvdata->pclk)) { 1296 ret = PTR_ERR(drvdata->pclk); 1297 goto err_put_banks; 1298 } 1299 1300 ret = samsung_pinctrl_register(pdev, drvdata); 1301 if (ret) 1302 goto err_put_banks; 1303 1304 if (ctrl->eint_gpio_init) 1305 ctrl->eint_gpio_init(drvdata); 1306 if (ctrl->eint_wkup_init) 1307 ctrl->eint_wkup_init(drvdata); 1308 1309 if (ctrl->pud_value_init) 1310 ctrl->pud_value_init(drvdata); 1311 else 1312 samsung_pud_value_init(drvdata); 1313 1314 ret = samsung_gpiolib_register(pdev, drvdata); 1315 if (ret) 1316 goto err_unregister; 1317 1318 ret = pinctrl_enable(drvdata->pctl_dev); 1319 if (ret) 1320 goto err_unregister; 1321 1322 platform_set_drvdata(pdev, drvdata); 1323 1324 return 0; 1325 1326 err_unregister: 1327 samsung_pinctrl_unregister(pdev, drvdata); 1328 err_put_banks: 1329 samsung_banks_node_put(drvdata); 1330 return ret; 1331 } 1332 1333 /* 1334 * samsung_pinctrl_suspend - save pinctrl state for suspend 1335 * 1336 * Save data for all banks handled by this device. 1337 */ 1338 static int __maybe_unused samsung_pinctrl_suspend(struct device *dev) 1339 { 1340 struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev); 1341 struct samsung_pin_bank *bank; 1342 int i; 1343 1344 i = clk_enable(drvdata->pclk); 1345 if (i) { 1346 dev_err(drvdata->dev, 1347 "failed to enable clock for saving state\n"); 1348 return i; 1349 } 1350 1351 for (i = 0; i < drvdata->nr_banks; i++) { 1352 bank = &drvdata->pin_banks[i]; 1353 const void __iomem *reg = bank->pctl_base + bank->pctl_offset; 1354 const u8 *offs = bank->type->reg_offset; 1355 const u8 *widths = bank->type->fld_width; 1356 enum pincfg_type type; 1357 1358 /* Registers without a powerdown config aren't lost */ 1359 if (!widths[PINCFG_TYPE_CON_PDN]) 1360 continue; 1361 1362 for (type = 0; type < PINCFG_TYPE_NUM; type++) 1363 if (widths[type]) 1364 bank->pm_save[type] = readl(reg + offs[type]); 1365 1366 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) { 1367 /* Some banks have two config registers */ 1368 bank->pm_save[PINCFG_TYPE_NUM] = 1369 readl(reg + offs[PINCFG_TYPE_FUNC] + 4); 1370 pr_debug("Save %s @ %p (con %#010x %08x)\n", 1371 bank->name, reg, 1372 bank->pm_save[PINCFG_TYPE_FUNC], 1373 bank->pm_save[PINCFG_TYPE_NUM]); 1374 } else { 1375 pr_debug("Save %s @ %p (con %#010x)\n", bank->name, 1376 reg, bank->pm_save[PINCFG_TYPE_FUNC]); 1377 } 1378 } 1379 1380 for (i = 0; i < drvdata->nr_banks; i++) { 1381 bank = &drvdata->pin_banks[i]; 1382 if (drvdata->suspend) 1383 drvdata->suspend(bank); 1384 } 1385 1386 clk_disable(drvdata->pclk); 1387 1388 if (drvdata->retention_ctrl && drvdata->retention_ctrl->enable) 1389 drvdata->retention_ctrl->enable(drvdata); 1390 1391 return 0; 1392 } 1393 1394 /* 1395 * samsung_pinctrl_resume - restore pinctrl state from suspend 1396 * 1397 * Restore one of the banks that was saved during suspend. 1398 * 1399 * We don't bother doing anything complicated to avoid glitching lines since 1400 * we're called before pad retention is turned off. 1401 */ 1402 static int __maybe_unused samsung_pinctrl_resume(struct device *dev) 1403 { 1404 struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev); 1405 struct samsung_pin_bank *bank; 1406 int ret; 1407 int i; 1408 1409 /* 1410 * enable clock before the callback, as we don't want to have to deal 1411 * with callback cleanup on clock failures. 1412 */ 1413 ret = clk_enable(drvdata->pclk); 1414 if (ret) { 1415 dev_err(drvdata->dev, 1416 "failed to enable clock for restoring state\n"); 1417 return ret; 1418 } 1419 1420 for (i = 0; i < drvdata->nr_banks; i++) { 1421 bank = &drvdata->pin_banks[i]; 1422 if (drvdata->resume) 1423 drvdata->resume(bank); 1424 } 1425 1426 for (i = 0; i < drvdata->nr_banks; i++) { 1427 bank = &drvdata->pin_banks[i]; 1428 void __iomem *reg = bank->pctl_base + bank->pctl_offset; 1429 const u8 *offs = bank->type->reg_offset; 1430 const u8 *widths = bank->type->fld_width; 1431 enum pincfg_type type; 1432 1433 /* Registers without a powerdown config aren't lost */ 1434 if (!widths[PINCFG_TYPE_CON_PDN]) 1435 continue; 1436 1437 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) { 1438 /* Some banks have two config registers */ 1439 pr_debug("%s @ %p (con %#010x %08x => %#010x %08x)\n", 1440 bank->name, reg, 1441 readl(reg + offs[PINCFG_TYPE_FUNC]), 1442 readl(reg + offs[PINCFG_TYPE_FUNC] + 4), 1443 bank->pm_save[PINCFG_TYPE_FUNC], 1444 bank->pm_save[PINCFG_TYPE_NUM]); 1445 writel(bank->pm_save[PINCFG_TYPE_NUM], 1446 reg + offs[PINCFG_TYPE_FUNC] + 4); 1447 } else { 1448 pr_debug("%s @ %p (con %#010x => %#010x)\n", bank->name, 1449 reg, readl(reg + offs[PINCFG_TYPE_FUNC]), 1450 bank->pm_save[PINCFG_TYPE_FUNC]); 1451 } 1452 for (type = 0; type < PINCFG_TYPE_NUM; type++) 1453 if (widths[type]) 1454 writel(bank->pm_save[type], reg + offs[type]); 1455 } 1456 1457 clk_disable(drvdata->pclk); 1458 1459 if (drvdata->retention_ctrl && drvdata->retention_ctrl->disable) 1460 drvdata->retention_ctrl->disable(drvdata); 1461 1462 return 0; 1463 } 1464 1465 static const struct of_device_id samsung_pinctrl_dt_match[] = { 1466 #ifdef CONFIG_PINCTRL_EXYNOS_ARM 1467 { .compatible = "samsung,exynos3250-pinctrl", 1468 .data = &exynos3250_of_data }, 1469 { .compatible = "samsung,exynos4210-pinctrl", 1470 .data = &exynos4210_of_data }, 1471 { .compatible = "samsung,exynos4x12-pinctrl", 1472 .data = &exynos4x12_of_data }, 1473 { .compatible = "samsung,exynos5250-pinctrl", 1474 .data = &exynos5250_of_data }, 1475 { .compatible = "samsung,exynos5260-pinctrl", 1476 .data = &exynos5260_of_data }, 1477 { .compatible = "samsung,exynos5410-pinctrl", 1478 .data = &exynos5410_of_data }, 1479 { .compatible = "samsung,exynos5420-pinctrl", 1480 .data = &exynos5420_of_data }, 1481 { .compatible = "samsung,s5pv210-pinctrl", 1482 .data = &s5pv210_of_data }, 1483 #endif 1484 #ifdef CONFIG_PINCTRL_EXYNOS_ARM64 1485 { .compatible = "google,gs101-pinctrl", 1486 .data = &gs101_of_data }, 1487 { .compatible = "samsung,exynos2200-pinctrl", 1488 .data = &exynos2200_of_data }, 1489 { .compatible = "samsung,exynos5433-pinctrl", 1490 .data = &exynos5433_of_data }, 1491 { .compatible = "samsung,exynos7-pinctrl", 1492 .data = &exynos7_of_data }, 1493 { .compatible = "samsung,exynos7870-pinctrl", 1494 .data = &exynos7870_of_data }, 1495 { .compatible = "samsung,exynos7885-pinctrl", 1496 .data = &exynos7885_of_data }, 1497 { .compatible = "samsung,exynos850-pinctrl", 1498 .data = &exynos850_of_data }, 1499 { .compatible = "samsung,exynos8895-pinctrl", 1500 .data = &exynos8895_of_data }, 1501 { .compatible = "samsung,exynos9810-pinctrl", 1502 .data = &exynos9810_of_data }, 1503 { .compatible = "samsung,exynos990-pinctrl", 1504 .data = &exynos990_of_data }, 1505 { .compatible = "samsung,exynosautov9-pinctrl", 1506 .data = &exynosautov9_of_data }, 1507 { .compatible = "samsung,exynosautov920-pinctrl", 1508 .data = &exynosautov920_of_data }, 1509 { .compatible = "tesla,fsd-pinctrl", 1510 .data = &fsd_of_data }, 1511 #endif 1512 #ifdef CONFIG_PINCTRL_S3C64XX 1513 { .compatible = "samsung,s3c64xx-pinctrl", 1514 .data = &s3c64xx_of_data }, 1515 #endif 1516 {}, 1517 }; 1518 1519 static const struct dev_pm_ops samsung_pinctrl_pm_ops = { 1520 SET_LATE_SYSTEM_SLEEP_PM_OPS(samsung_pinctrl_suspend, 1521 samsung_pinctrl_resume) 1522 }; 1523 1524 static struct platform_driver samsung_pinctrl_driver = { 1525 .probe = samsung_pinctrl_probe, 1526 .driver = { 1527 .name = "samsung-pinctrl", 1528 .of_match_table = samsung_pinctrl_dt_match, 1529 .suppress_bind_attrs = true, 1530 .pm = &samsung_pinctrl_pm_ops, 1531 }, 1532 }; 1533 1534 static int __init samsung_pinctrl_drv_register(void) 1535 { 1536 return platform_driver_register(&samsung_pinctrl_driver); 1537 } 1538 postcore_initcall(samsung_pinctrl_drv_register); 1539