1 // SPDX-License-Identifier: GPL-2.0+ 2 // 3 // pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's. 4 // 5 // Copyright (c) 2012 Samsung Electronics Co., Ltd. 6 // http://www.samsung.com 7 // Copyright (c) 2012 Linaro Ltd 8 // http://www.linaro.org 9 // 10 // Author: Thomas Abraham <thomas.ab@samsung.com> 11 // 12 // This driver implements the Samsung pinctrl driver. It supports setting up of 13 // pinmux and pinconf configurations. The gpiolib interface is also included. 14 // External interrupt (gpio and wakeup) support are not included in this driver 15 // but provides extensions to which platform specific implementation of the gpio 16 // and wakeup interrupts can be hooked to. 17 18 #include <linux/init.h> 19 #include <linux/platform_device.h> 20 #include <linux/io.h> 21 #include <linux/property.h> 22 #include <linux/slab.h> 23 #include <linux/err.h> 24 #include <linux/gpio/driver.h> 25 #include <linux/irqdomain.h> 26 #include <linux/of_device.h> 27 #include <linux/spinlock.h> 28 29 #include <dt-bindings/pinctrl/samsung.h> 30 31 #include "../core.h" 32 #include "pinctrl-samsung.h" 33 34 /* maximum number of the memory resources */ 35 #define SAMSUNG_PINCTRL_NUM_RESOURCES 2 36 37 /* list of all possible config options supported */ 38 static struct pin_config { 39 const char *property; 40 enum pincfg_type param; 41 } cfg_params[] = { 42 { "samsung,pin-pud", PINCFG_TYPE_PUD }, 43 { "samsung,pin-drv", PINCFG_TYPE_DRV }, 44 { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN }, 45 { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN }, 46 { "samsung,pin-val", PINCFG_TYPE_DAT }, 47 }; 48 49 static unsigned int pin_base; 50 51 static int samsung_get_group_count(struct pinctrl_dev *pctldev) 52 { 53 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); 54 55 return pmx->nr_groups; 56 } 57 58 static const char *samsung_get_group_name(struct pinctrl_dev *pctldev, 59 unsigned group) 60 { 61 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); 62 63 return pmx->pin_groups[group].name; 64 } 65 66 static int samsung_get_group_pins(struct pinctrl_dev *pctldev, 67 unsigned group, 68 const unsigned **pins, 69 unsigned *num_pins) 70 { 71 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); 72 73 *pins = pmx->pin_groups[group].pins; 74 *num_pins = pmx->pin_groups[group].num_pins; 75 76 return 0; 77 } 78 79 static int reserve_map(struct device *dev, struct pinctrl_map **map, 80 unsigned *reserved_maps, unsigned *num_maps, 81 unsigned reserve) 82 { 83 unsigned old_num = *reserved_maps; 84 unsigned new_num = *num_maps + reserve; 85 struct pinctrl_map *new_map; 86 87 if (old_num >= new_num) 88 return 0; 89 90 new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL); 91 if (!new_map) 92 return -ENOMEM; 93 94 memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map)); 95 96 *map = new_map; 97 *reserved_maps = new_num; 98 99 return 0; 100 } 101 102 static int add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps, 103 unsigned *num_maps, const char *group, 104 const char *function) 105 { 106 if (WARN_ON(*num_maps == *reserved_maps)) 107 return -ENOSPC; 108 109 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP; 110 (*map)[*num_maps].data.mux.group = group; 111 (*map)[*num_maps].data.mux.function = function; 112 (*num_maps)++; 113 114 return 0; 115 } 116 117 static int add_map_configs(struct device *dev, struct pinctrl_map **map, 118 unsigned *reserved_maps, unsigned *num_maps, 119 const char *group, unsigned long *configs, 120 unsigned num_configs) 121 { 122 unsigned long *dup_configs; 123 124 if (WARN_ON(*num_maps == *reserved_maps)) 125 return -ENOSPC; 126 127 dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs), 128 GFP_KERNEL); 129 if (!dup_configs) 130 return -ENOMEM; 131 132 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_GROUP; 133 (*map)[*num_maps].data.configs.group_or_pin = group; 134 (*map)[*num_maps].data.configs.configs = dup_configs; 135 (*map)[*num_maps].data.configs.num_configs = num_configs; 136 (*num_maps)++; 137 138 return 0; 139 } 140 141 static int add_config(struct device *dev, unsigned long **configs, 142 unsigned *num_configs, unsigned long config) 143 { 144 unsigned old_num = *num_configs; 145 unsigned new_num = old_num + 1; 146 unsigned long *new_configs; 147 148 new_configs = krealloc(*configs, sizeof(*new_configs) * new_num, 149 GFP_KERNEL); 150 if (!new_configs) 151 return -ENOMEM; 152 153 new_configs[old_num] = config; 154 155 *configs = new_configs; 156 *num_configs = new_num; 157 158 return 0; 159 } 160 161 static void samsung_dt_free_map(struct pinctrl_dev *pctldev, 162 struct pinctrl_map *map, 163 unsigned num_maps) 164 { 165 int i; 166 167 for (i = 0; i < num_maps; i++) 168 if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP) 169 kfree(map[i].data.configs.configs); 170 171 kfree(map); 172 } 173 174 static int samsung_dt_subnode_to_map(struct samsung_pinctrl_drv_data *drvdata, 175 struct device *dev, 176 struct device_node *np, 177 struct pinctrl_map **map, 178 unsigned *reserved_maps, 179 unsigned *num_maps) 180 { 181 int ret, i; 182 u32 val; 183 unsigned long config; 184 unsigned long *configs = NULL; 185 unsigned num_configs = 0; 186 unsigned reserve; 187 struct property *prop; 188 const char *group; 189 bool has_func = false; 190 191 ret = of_property_read_u32(np, "samsung,pin-function", &val); 192 if (!ret) 193 has_func = true; 194 195 for (i = 0; i < ARRAY_SIZE(cfg_params); i++) { 196 ret = of_property_read_u32(np, cfg_params[i].property, &val); 197 if (!ret) { 198 config = PINCFG_PACK(cfg_params[i].param, val); 199 ret = add_config(dev, &configs, &num_configs, config); 200 if (ret < 0) 201 goto exit; 202 /* EINVAL=missing, which is fine since it's optional */ 203 } else if (ret != -EINVAL) { 204 dev_err(dev, "could not parse property %s\n", 205 cfg_params[i].property); 206 } 207 } 208 209 reserve = 0; 210 if (has_func) 211 reserve++; 212 if (num_configs) 213 reserve++; 214 ret = of_property_count_strings(np, "samsung,pins"); 215 if (ret < 0) { 216 dev_err(dev, "could not parse property samsung,pins\n"); 217 goto exit; 218 } 219 reserve *= ret; 220 221 ret = reserve_map(dev, map, reserved_maps, num_maps, reserve); 222 if (ret < 0) 223 goto exit; 224 225 of_property_for_each_string(np, "samsung,pins", prop, group) { 226 if (has_func) { 227 ret = add_map_mux(map, reserved_maps, 228 num_maps, group, np->full_name); 229 if (ret < 0) 230 goto exit; 231 } 232 233 if (num_configs) { 234 ret = add_map_configs(dev, map, reserved_maps, 235 num_maps, group, configs, 236 num_configs); 237 if (ret < 0) 238 goto exit; 239 } 240 } 241 242 ret = 0; 243 244 exit: 245 kfree(configs); 246 return ret; 247 } 248 249 static int samsung_dt_node_to_map(struct pinctrl_dev *pctldev, 250 struct device_node *np_config, 251 struct pinctrl_map **map, 252 unsigned *num_maps) 253 { 254 struct samsung_pinctrl_drv_data *drvdata; 255 unsigned reserved_maps; 256 struct device_node *np; 257 int ret; 258 259 drvdata = pinctrl_dev_get_drvdata(pctldev); 260 261 reserved_maps = 0; 262 *map = NULL; 263 *num_maps = 0; 264 265 if (!of_get_child_count(np_config)) 266 return samsung_dt_subnode_to_map(drvdata, pctldev->dev, 267 np_config, map, 268 &reserved_maps, 269 num_maps); 270 271 for_each_child_of_node(np_config, np) { 272 ret = samsung_dt_subnode_to_map(drvdata, pctldev->dev, np, map, 273 &reserved_maps, num_maps); 274 if (ret < 0) { 275 samsung_dt_free_map(pctldev, *map, *num_maps); 276 of_node_put(np); 277 return ret; 278 } 279 } 280 281 return 0; 282 } 283 284 #ifdef CONFIG_DEBUG_FS 285 /* Forward declaration which can be used by samsung_pin_dbg_show */ 286 static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, 287 unsigned long *config); 288 static const char * const reg_names[] = {"CON", "DAT", "PUD", "DRV", "CON_PDN", 289 "PUD_PDN"}; 290 291 static void samsung_pin_dbg_show(struct pinctrl_dev *pctldev, 292 struct seq_file *s, unsigned int pin) 293 { 294 enum pincfg_type cfg_type; 295 unsigned long config; 296 int ret; 297 298 for (cfg_type = 0; cfg_type < PINCFG_TYPE_NUM; cfg_type++) { 299 config = PINCFG_PACK(cfg_type, 0); 300 ret = samsung_pinconf_get(pctldev, pin, &config); 301 if (ret < 0) 302 continue; 303 304 seq_printf(s, " %s(0x%lx)", reg_names[cfg_type], 305 PINCFG_UNPACK_VALUE(config)); 306 } 307 } 308 #endif 309 310 /* list of pinctrl callbacks for the pinctrl core */ 311 static const struct pinctrl_ops samsung_pctrl_ops = { 312 .get_groups_count = samsung_get_group_count, 313 .get_group_name = samsung_get_group_name, 314 .get_group_pins = samsung_get_group_pins, 315 .dt_node_to_map = samsung_dt_node_to_map, 316 .dt_free_map = samsung_dt_free_map, 317 #ifdef CONFIG_DEBUG_FS 318 .pin_dbg_show = samsung_pin_dbg_show, 319 #endif 320 }; 321 322 /* check if the selector is a valid pin function selector */ 323 static int samsung_get_functions_count(struct pinctrl_dev *pctldev) 324 { 325 struct samsung_pinctrl_drv_data *drvdata; 326 327 drvdata = pinctrl_dev_get_drvdata(pctldev); 328 return drvdata->nr_functions; 329 } 330 331 /* return the name of the pin function specified */ 332 static const char *samsung_pinmux_get_fname(struct pinctrl_dev *pctldev, 333 unsigned selector) 334 { 335 struct samsung_pinctrl_drv_data *drvdata; 336 337 drvdata = pinctrl_dev_get_drvdata(pctldev); 338 return drvdata->pmx_functions[selector].name; 339 } 340 341 /* return the groups associated for the specified function selector */ 342 static int samsung_pinmux_get_groups(struct pinctrl_dev *pctldev, 343 unsigned selector, const char * const **groups, 344 unsigned * const num_groups) 345 { 346 struct samsung_pinctrl_drv_data *drvdata; 347 348 drvdata = pinctrl_dev_get_drvdata(pctldev); 349 *groups = drvdata->pmx_functions[selector].groups; 350 *num_groups = drvdata->pmx_functions[selector].num_groups; 351 return 0; 352 } 353 354 /* 355 * given a pin number that is local to a pin controller, find out the pin bank 356 * and the register base of the pin bank. 357 */ 358 static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata, 359 unsigned pin, void __iomem **reg, u32 *offset, 360 struct samsung_pin_bank **bank) 361 { 362 struct samsung_pin_bank *b; 363 364 b = drvdata->pin_banks; 365 366 while ((pin >= b->pin_base) && 367 ((b->pin_base + b->nr_pins - 1) < pin)) 368 b++; 369 370 *reg = b->pctl_base + b->pctl_offset; 371 *offset = pin - b->pin_base; 372 if (bank) 373 *bank = b; 374 } 375 376 /* enable or disable a pinmux function */ 377 static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector, 378 unsigned group) 379 { 380 struct samsung_pinctrl_drv_data *drvdata; 381 const struct samsung_pin_bank_type *type; 382 struct samsung_pin_bank *bank; 383 void __iomem *reg; 384 u32 mask, shift, data, pin_offset; 385 unsigned long flags; 386 const struct samsung_pmx_func *func; 387 const struct samsung_pin_group *grp; 388 389 drvdata = pinctrl_dev_get_drvdata(pctldev); 390 func = &drvdata->pmx_functions[selector]; 391 grp = &drvdata->pin_groups[group]; 392 393 pin_to_reg_bank(drvdata, grp->pins[0] - drvdata->pin_base, 394 ®, &pin_offset, &bank); 395 type = bank->type; 396 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1; 397 shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC]; 398 if (shift >= 32) { 399 /* Some banks have two config registers */ 400 shift -= 32; 401 reg += 4; 402 } 403 404 raw_spin_lock_irqsave(&bank->slock, flags); 405 406 data = readl(reg + type->reg_offset[PINCFG_TYPE_FUNC]); 407 data &= ~(mask << shift); 408 data |= func->val << shift; 409 writel(data, reg + type->reg_offset[PINCFG_TYPE_FUNC]); 410 411 raw_spin_unlock_irqrestore(&bank->slock, flags); 412 } 413 414 /* enable a specified pinmux by writing to registers */ 415 static int samsung_pinmux_set_mux(struct pinctrl_dev *pctldev, 416 unsigned selector, 417 unsigned group) 418 { 419 samsung_pinmux_setup(pctldev, selector, group); 420 return 0; 421 } 422 423 /* list of pinmux callbacks for the pinmux vertical in pinctrl core */ 424 static const struct pinmux_ops samsung_pinmux_ops = { 425 .get_functions_count = samsung_get_functions_count, 426 .get_function_name = samsung_pinmux_get_fname, 427 .get_function_groups = samsung_pinmux_get_groups, 428 .set_mux = samsung_pinmux_set_mux, 429 }; 430 431 /* set or get the pin config settings for a specified pin */ 432 static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin, 433 unsigned long *config, bool set) 434 { 435 struct samsung_pinctrl_drv_data *drvdata; 436 const struct samsung_pin_bank_type *type; 437 struct samsung_pin_bank *bank; 438 void __iomem *reg_base; 439 enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config); 440 u32 data, width, pin_offset, mask, shift; 441 u32 cfg_value, cfg_reg; 442 unsigned long flags; 443 444 drvdata = pinctrl_dev_get_drvdata(pctldev); 445 pin_to_reg_bank(drvdata, pin - drvdata->pin_base, ®_base, 446 &pin_offset, &bank); 447 type = bank->type; 448 449 if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type]) 450 return -EINVAL; 451 452 width = type->fld_width[cfg_type]; 453 cfg_reg = type->reg_offset[cfg_type]; 454 455 raw_spin_lock_irqsave(&bank->slock, flags); 456 457 mask = (1 << width) - 1; 458 shift = pin_offset * width; 459 data = readl(reg_base + cfg_reg); 460 461 if (set) { 462 cfg_value = PINCFG_UNPACK_VALUE(*config); 463 data &= ~(mask << shift); 464 data |= (cfg_value << shift); 465 writel(data, reg_base + cfg_reg); 466 } else { 467 data >>= shift; 468 data &= mask; 469 *config = PINCFG_PACK(cfg_type, data); 470 } 471 472 raw_spin_unlock_irqrestore(&bank->slock, flags); 473 474 return 0; 475 } 476 477 /* set the pin config settings for a specified pin */ 478 static int samsung_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, 479 unsigned long *configs, unsigned num_configs) 480 { 481 int i, ret; 482 483 for (i = 0; i < num_configs; i++) { 484 ret = samsung_pinconf_rw(pctldev, pin, &configs[i], true); 485 if (ret < 0) 486 return ret; 487 } /* for each config */ 488 489 return 0; 490 } 491 492 /* get the pin config settings for a specified pin */ 493 static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, 494 unsigned long *config) 495 { 496 return samsung_pinconf_rw(pctldev, pin, config, false); 497 } 498 499 /* set the pin config settings for a specified pin group */ 500 static int samsung_pinconf_group_set(struct pinctrl_dev *pctldev, 501 unsigned group, unsigned long *configs, 502 unsigned num_configs) 503 { 504 struct samsung_pinctrl_drv_data *drvdata; 505 const unsigned int *pins; 506 unsigned int cnt; 507 508 drvdata = pinctrl_dev_get_drvdata(pctldev); 509 pins = drvdata->pin_groups[group].pins; 510 511 for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++) 512 samsung_pinconf_set(pctldev, pins[cnt], configs, num_configs); 513 514 return 0; 515 } 516 517 /* get the pin config settings for a specified pin group */ 518 static int samsung_pinconf_group_get(struct pinctrl_dev *pctldev, 519 unsigned int group, unsigned long *config) 520 { 521 struct samsung_pinctrl_drv_data *drvdata; 522 const unsigned int *pins; 523 524 drvdata = pinctrl_dev_get_drvdata(pctldev); 525 pins = drvdata->pin_groups[group].pins; 526 samsung_pinconf_get(pctldev, pins[0], config); 527 return 0; 528 } 529 530 /* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */ 531 static const struct pinconf_ops samsung_pinconf_ops = { 532 .pin_config_get = samsung_pinconf_get, 533 .pin_config_set = samsung_pinconf_set, 534 .pin_config_group_get = samsung_pinconf_group_get, 535 .pin_config_group_set = samsung_pinconf_group_set, 536 }; 537 538 /* 539 * The samsung_gpio_set_vlaue() should be called with "bank->slock" held 540 * to avoid race condition. 541 */ 542 static void samsung_gpio_set_value(struct gpio_chip *gc, 543 unsigned offset, int value) 544 { 545 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 546 const struct samsung_pin_bank_type *type = bank->type; 547 void __iomem *reg; 548 u32 data; 549 550 reg = bank->pctl_base + bank->pctl_offset; 551 552 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]); 553 data &= ~(1 << offset); 554 if (value) 555 data |= 1 << offset; 556 writel(data, reg + type->reg_offset[PINCFG_TYPE_DAT]); 557 } 558 559 /* gpiolib gpio_set callback function */ 560 static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value) 561 { 562 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 563 unsigned long flags; 564 565 raw_spin_lock_irqsave(&bank->slock, flags); 566 samsung_gpio_set_value(gc, offset, value); 567 raw_spin_unlock_irqrestore(&bank->slock, flags); 568 } 569 570 /* gpiolib gpio_get callback function */ 571 static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset) 572 { 573 void __iomem *reg; 574 u32 data; 575 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 576 const struct samsung_pin_bank_type *type = bank->type; 577 578 reg = bank->pctl_base + bank->pctl_offset; 579 580 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]); 581 data >>= offset; 582 data &= 1; 583 return data; 584 } 585 586 /* 587 * The samsung_gpio_set_direction() should be called with "bank->slock" held 588 * to avoid race condition. 589 * The calls to gpio_direction_output() and gpio_direction_input() 590 * leads to this function call. 591 */ 592 static int samsung_gpio_set_direction(struct gpio_chip *gc, 593 unsigned offset, bool input) 594 { 595 const struct samsung_pin_bank_type *type; 596 struct samsung_pin_bank *bank; 597 void __iomem *reg; 598 u32 data, mask, shift; 599 600 bank = gpiochip_get_data(gc); 601 type = bank->type; 602 603 reg = bank->pctl_base + bank->pctl_offset 604 + type->reg_offset[PINCFG_TYPE_FUNC]; 605 606 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1; 607 shift = offset * type->fld_width[PINCFG_TYPE_FUNC]; 608 if (shift >= 32) { 609 /* Some banks have two config registers */ 610 shift -= 32; 611 reg += 4; 612 } 613 614 data = readl(reg); 615 data &= ~(mask << shift); 616 if (!input) 617 data |= EXYNOS_PIN_FUNC_OUTPUT << shift; 618 writel(data, reg); 619 620 return 0; 621 } 622 623 /* gpiolib gpio_direction_input callback function. */ 624 static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset) 625 { 626 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 627 unsigned long flags; 628 int ret; 629 630 raw_spin_lock_irqsave(&bank->slock, flags); 631 ret = samsung_gpio_set_direction(gc, offset, true); 632 raw_spin_unlock_irqrestore(&bank->slock, flags); 633 return ret; 634 } 635 636 /* gpiolib gpio_direction_output callback function. */ 637 static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset, 638 int value) 639 { 640 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 641 unsigned long flags; 642 int ret; 643 644 raw_spin_lock_irqsave(&bank->slock, flags); 645 samsung_gpio_set_value(gc, offset, value); 646 ret = samsung_gpio_set_direction(gc, offset, false); 647 raw_spin_unlock_irqrestore(&bank->slock, flags); 648 649 return ret; 650 } 651 652 /* 653 * gpiolib gpio_to_irq callback function. Creates a mapping between a GPIO pin 654 * and a virtual IRQ, if not already present. 655 */ 656 static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset) 657 { 658 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 659 unsigned int virq; 660 661 if (!bank->irq_domain) 662 return -ENXIO; 663 664 virq = irq_create_mapping(bank->irq_domain, offset); 665 666 return (virq) ? : -ENXIO; 667 } 668 669 static struct samsung_pin_group *samsung_pinctrl_create_groups( 670 struct device *dev, 671 struct samsung_pinctrl_drv_data *drvdata, 672 unsigned int *cnt) 673 { 674 struct pinctrl_desc *ctrldesc = &drvdata->pctl; 675 struct samsung_pin_group *groups, *grp; 676 const struct pinctrl_pin_desc *pdesc; 677 int i; 678 679 groups = devm_kcalloc(dev, ctrldesc->npins, sizeof(*groups), 680 GFP_KERNEL); 681 if (!groups) 682 return ERR_PTR(-EINVAL); 683 grp = groups; 684 685 pdesc = ctrldesc->pins; 686 for (i = 0; i < ctrldesc->npins; ++i, ++pdesc, ++grp) { 687 grp->name = pdesc->name; 688 grp->pins = &pdesc->number; 689 grp->num_pins = 1; 690 } 691 692 *cnt = ctrldesc->npins; 693 return groups; 694 } 695 696 static int samsung_pinctrl_create_function(struct device *dev, 697 struct samsung_pinctrl_drv_data *drvdata, 698 struct device_node *func_np, 699 struct samsung_pmx_func *func) 700 { 701 int npins; 702 int ret; 703 int i; 704 705 if (of_property_read_u32(func_np, "samsung,pin-function", &func->val)) 706 return 0; 707 708 npins = of_property_count_strings(func_np, "samsung,pins"); 709 if (npins < 1) { 710 dev_err(dev, "invalid pin list in %pOFn node", func_np); 711 return -EINVAL; 712 } 713 714 func->name = func_np->full_name; 715 716 func->groups = devm_kcalloc(dev, npins, sizeof(char *), GFP_KERNEL); 717 if (!func->groups) 718 return -ENOMEM; 719 720 for (i = 0; i < npins; ++i) { 721 const char *gname; 722 723 ret = of_property_read_string_index(func_np, "samsung,pins", 724 i, &gname); 725 if (ret) { 726 dev_err(dev, 727 "failed to read pin name %d from %pOFn node\n", 728 i, func_np); 729 return ret; 730 } 731 732 func->groups[i] = gname; 733 } 734 735 func->num_groups = npins; 736 return 1; 737 } 738 739 static struct samsung_pmx_func *samsung_pinctrl_create_functions( 740 struct device *dev, 741 struct samsung_pinctrl_drv_data *drvdata, 742 unsigned int *cnt) 743 { 744 struct samsung_pmx_func *functions, *func; 745 struct device_node *dev_np = dev->of_node; 746 struct device_node *cfg_np; 747 unsigned int func_cnt = 0; 748 int ret; 749 750 /* 751 * Iterate over all the child nodes of the pin controller node 752 * and create pin groups and pin function lists. 753 */ 754 for_each_child_of_node(dev_np, cfg_np) { 755 struct device_node *func_np; 756 757 if (!of_get_child_count(cfg_np)) { 758 if (!of_find_property(cfg_np, 759 "samsung,pin-function", NULL)) 760 continue; 761 ++func_cnt; 762 continue; 763 } 764 765 for_each_child_of_node(cfg_np, func_np) { 766 if (!of_find_property(func_np, 767 "samsung,pin-function", NULL)) 768 continue; 769 ++func_cnt; 770 } 771 } 772 773 functions = devm_kcalloc(dev, func_cnt, sizeof(*functions), 774 GFP_KERNEL); 775 if (!functions) 776 return ERR_PTR(-ENOMEM); 777 func = functions; 778 779 /* 780 * Iterate over all the child nodes of the pin controller node 781 * and create pin groups and pin function lists. 782 */ 783 func_cnt = 0; 784 for_each_child_of_node(dev_np, cfg_np) { 785 struct device_node *func_np; 786 787 if (!of_get_child_count(cfg_np)) { 788 ret = samsung_pinctrl_create_function(dev, drvdata, 789 cfg_np, func); 790 if (ret < 0) { 791 of_node_put(cfg_np); 792 return ERR_PTR(ret); 793 } 794 if (ret > 0) { 795 ++func; 796 ++func_cnt; 797 } 798 continue; 799 } 800 801 for_each_child_of_node(cfg_np, func_np) { 802 ret = samsung_pinctrl_create_function(dev, drvdata, 803 func_np, func); 804 if (ret < 0) { 805 of_node_put(func_np); 806 of_node_put(cfg_np); 807 return ERR_PTR(ret); 808 } 809 if (ret > 0) { 810 ++func; 811 ++func_cnt; 812 } 813 } 814 } 815 816 *cnt = func_cnt; 817 return functions; 818 } 819 820 /* 821 * Parse the information about all the available pin groups and pin functions 822 * from device node of the pin-controller. A pin group is formed with all 823 * the pins listed in the "samsung,pins" property. 824 */ 825 826 static int samsung_pinctrl_parse_dt(struct platform_device *pdev, 827 struct samsung_pinctrl_drv_data *drvdata) 828 { 829 struct device *dev = &pdev->dev; 830 struct samsung_pin_group *groups; 831 struct samsung_pmx_func *functions; 832 unsigned int grp_cnt = 0, func_cnt = 0; 833 834 groups = samsung_pinctrl_create_groups(dev, drvdata, &grp_cnt); 835 if (IS_ERR(groups)) { 836 dev_err(dev, "failed to parse pin groups\n"); 837 return PTR_ERR(groups); 838 } 839 840 functions = samsung_pinctrl_create_functions(dev, drvdata, &func_cnt); 841 if (IS_ERR(functions)) { 842 dev_err(dev, "failed to parse pin functions\n"); 843 return PTR_ERR(functions); 844 } 845 846 drvdata->pin_groups = groups; 847 drvdata->nr_groups = grp_cnt; 848 drvdata->pmx_functions = functions; 849 drvdata->nr_functions = func_cnt; 850 851 return 0; 852 } 853 854 /* register the pinctrl interface with the pinctrl subsystem */ 855 static int samsung_pinctrl_register(struct platform_device *pdev, 856 struct samsung_pinctrl_drv_data *drvdata) 857 { 858 struct pinctrl_desc *ctrldesc = &drvdata->pctl; 859 struct pinctrl_pin_desc *pindesc, *pdesc; 860 struct samsung_pin_bank *pin_bank; 861 char *pin_names; 862 int pin, bank, ret; 863 864 ctrldesc->name = "samsung-pinctrl"; 865 ctrldesc->owner = THIS_MODULE; 866 ctrldesc->pctlops = &samsung_pctrl_ops; 867 ctrldesc->pmxops = &samsung_pinmux_ops; 868 ctrldesc->confops = &samsung_pinconf_ops; 869 870 pindesc = devm_kcalloc(&pdev->dev, 871 drvdata->nr_pins, sizeof(*pindesc), 872 GFP_KERNEL); 873 if (!pindesc) 874 return -ENOMEM; 875 ctrldesc->pins = pindesc; 876 ctrldesc->npins = drvdata->nr_pins; 877 878 /* dynamically populate the pin number and pin name for pindesc */ 879 for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++) 880 pdesc->number = pin + drvdata->pin_base; 881 882 /* 883 * allocate space for storing the dynamically generated names for all 884 * the pins which belong to this pin-controller. 885 */ 886 pin_names = devm_kzalloc(&pdev->dev, 887 array3_size(sizeof(char), PIN_NAME_LENGTH, 888 drvdata->nr_pins), 889 GFP_KERNEL); 890 if (!pin_names) 891 return -ENOMEM; 892 893 /* for each pin, the name of the pin is pin-bank name + pin number */ 894 for (bank = 0; bank < drvdata->nr_banks; bank++) { 895 pin_bank = &drvdata->pin_banks[bank]; 896 for (pin = 0; pin < pin_bank->nr_pins; pin++) { 897 sprintf(pin_names, "%s-%d", pin_bank->name, pin); 898 pdesc = pindesc + pin_bank->pin_base + pin; 899 pdesc->name = pin_names; 900 pin_names += PIN_NAME_LENGTH; 901 } 902 } 903 904 ret = samsung_pinctrl_parse_dt(pdev, drvdata); 905 if (ret) 906 return ret; 907 908 drvdata->pctl_dev = devm_pinctrl_register(&pdev->dev, ctrldesc, 909 drvdata); 910 if (IS_ERR(drvdata->pctl_dev)) { 911 dev_err(&pdev->dev, "could not register pinctrl driver\n"); 912 return PTR_ERR(drvdata->pctl_dev); 913 } 914 915 for (bank = 0; bank < drvdata->nr_banks; ++bank) { 916 pin_bank = &drvdata->pin_banks[bank]; 917 pin_bank->grange.name = pin_bank->name; 918 pin_bank->grange.id = bank; 919 pin_bank->grange.pin_base = drvdata->pin_base 920 + pin_bank->pin_base; 921 pin_bank->grange.base = pin_bank->grange.pin_base; 922 pin_bank->grange.npins = pin_bank->nr_pins; 923 pin_bank->grange.gc = &pin_bank->gpio_chip; 924 pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange); 925 } 926 927 return 0; 928 } 929 930 /* unregister the pinctrl interface with the pinctrl subsystem */ 931 static int samsung_pinctrl_unregister(struct platform_device *pdev, 932 struct samsung_pinctrl_drv_data *drvdata) 933 { 934 struct samsung_pin_bank *bank = drvdata->pin_banks; 935 int i; 936 937 for (i = 0; i < drvdata->nr_banks; ++i, ++bank) 938 pinctrl_remove_gpio_range(drvdata->pctl_dev, &bank->grange); 939 940 return 0; 941 } 942 943 static const struct gpio_chip samsung_gpiolib_chip = { 944 .request = gpiochip_generic_request, 945 .free = gpiochip_generic_free, 946 .set = samsung_gpio_set, 947 .get = samsung_gpio_get, 948 .direction_input = samsung_gpio_direction_input, 949 .direction_output = samsung_gpio_direction_output, 950 .to_irq = samsung_gpio_to_irq, 951 .owner = THIS_MODULE, 952 }; 953 954 /* register the gpiolib interface with the gpiolib subsystem */ 955 static int samsung_gpiolib_register(struct platform_device *pdev, 956 struct samsung_pinctrl_drv_data *drvdata) 957 { 958 struct samsung_pin_bank *bank = drvdata->pin_banks; 959 struct gpio_chip *gc; 960 int ret; 961 int i; 962 963 for (i = 0; i < drvdata->nr_banks; ++i, ++bank) { 964 bank->gpio_chip = samsung_gpiolib_chip; 965 966 gc = &bank->gpio_chip; 967 gc->base = bank->grange.base; 968 gc->ngpio = bank->nr_pins; 969 gc->parent = &pdev->dev; 970 gc->fwnode = bank->fwnode; 971 gc->label = bank->name; 972 973 ret = devm_gpiochip_add_data(&pdev->dev, gc, bank); 974 if (ret) { 975 dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n", 976 gc->label, ret); 977 return ret; 978 } 979 } 980 981 return 0; 982 } 983 984 static const struct samsung_pin_ctrl * 985 samsung_pinctrl_get_soc_data_for_of_alias(struct platform_device *pdev) 986 { 987 struct device_node *node = pdev->dev.of_node; 988 const struct samsung_pinctrl_of_match_data *of_data; 989 int id; 990 991 id = of_alias_get_id(node, "pinctrl"); 992 if (id < 0) { 993 dev_err(&pdev->dev, "failed to get alias id\n"); 994 return NULL; 995 } 996 997 of_data = of_device_get_match_data(&pdev->dev); 998 if (id >= of_data->num_ctrl) { 999 dev_err(&pdev->dev, "invalid alias id %d\n", id); 1000 return NULL; 1001 } 1002 1003 return &(of_data->ctrl[id]); 1004 } 1005 1006 static void samsung_banks_node_put(struct samsung_pinctrl_drv_data *d) 1007 { 1008 struct samsung_pin_bank *bank; 1009 unsigned int i; 1010 1011 bank = d->pin_banks; 1012 for (i = 0; i < d->nr_banks; ++i, ++bank) 1013 fwnode_handle_put(bank->fwnode); 1014 } 1015 1016 /* 1017 * Iterate over all driver pin banks to find one matching the name of node, 1018 * skipping optional "-gpio" node suffix. When found, assign node to the bank. 1019 */ 1020 static void samsung_banks_node_get(struct device *dev, struct samsung_pinctrl_drv_data *d) 1021 { 1022 const char *suffix = "-gpio-bank"; 1023 struct samsung_pin_bank *bank; 1024 struct fwnode_handle *child; 1025 /* Pin bank names are up to 4 characters */ 1026 char node_name[20]; 1027 unsigned int i; 1028 size_t len; 1029 1030 bank = d->pin_banks; 1031 for (i = 0; i < d->nr_banks; ++i, ++bank) { 1032 strscpy(node_name, bank->name, sizeof(node_name)); 1033 len = strlcat(node_name, suffix, sizeof(node_name)); 1034 if (len >= sizeof(node_name)) { 1035 dev_err(dev, "Too long pin bank name '%s', ignoring\n", 1036 bank->name); 1037 continue; 1038 } 1039 1040 for_each_gpiochip_node(dev, child) { 1041 struct device_node *np = to_of_node(child); 1042 1043 if (of_node_name_eq(np, node_name)) 1044 break; 1045 if (of_node_name_eq(np, bank->name)) 1046 break; 1047 } 1048 1049 if (child) 1050 bank->fwnode = child; 1051 else 1052 dev_warn(dev, "Missing node for bank %s - invalid DTB\n", 1053 bank->name); 1054 /* child reference dropped in samsung_drop_banks_of_node() */ 1055 } 1056 } 1057 1058 /* retrieve the soc specific data */ 1059 static const struct samsung_pin_ctrl * 1060 samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d, 1061 struct platform_device *pdev) 1062 { 1063 const struct samsung_pin_bank_data *bdata; 1064 const struct samsung_pin_ctrl *ctrl; 1065 struct samsung_pin_bank *bank; 1066 struct resource *res; 1067 void __iomem *virt_base[SAMSUNG_PINCTRL_NUM_RESOURCES]; 1068 unsigned int i; 1069 1070 ctrl = samsung_pinctrl_get_soc_data_for_of_alias(pdev); 1071 if (!ctrl) 1072 return ERR_PTR(-ENOENT); 1073 1074 d->suspend = ctrl->suspend; 1075 d->resume = ctrl->resume; 1076 d->nr_banks = ctrl->nr_banks; 1077 d->pin_banks = devm_kcalloc(&pdev->dev, d->nr_banks, 1078 sizeof(*d->pin_banks), GFP_KERNEL); 1079 if (!d->pin_banks) 1080 return ERR_PTR(-ENOMEM); 1081 1082 if (ctrl->nr_ext_resources + 1 > SAMSUNG_PINCTRL_NUM_RESOURCES) 1083 return ERR_PTR(-EINVAL); 1084 1085 for (i = 0; i < ctrl->nr_ext_resources + 1; i++) { 1086 res = platform_get_resource(pdev, IORESOURCE_MEM, i); 1087 if (!res) { 1088 dev_err(&pdev->dev, "failed to get mem%d resource\n", i); 1089 return ERR_PTR(-EINVAL); 1090 } 1091 virt_base[i] = devm_ioremap(&pdev->dev, res->start, 1092 resource_size(res)); 1093 if (!virt_base[i]) { 1094 dev_err(&pdev->dev, "failed to ioremap %pR\n", res); 1095 return ERR_PTR(-EIO); 1096 } 1097 } 1098 1099 bank = d->pin_banks; 1100 bdata = ctrl->pin_banks; 1101 for (i = 0; i < ctrl->nr_banks; ++i, ++bdata, ++bank) { 1102 bank->type = bdata->type; 1103 bank->pctl_offset = bdata->pctl_offset; 1104 bank->nr_pins = bdata->nr_pins; 1105 bank->eint_func = bdata->eint_func; 1106 bank->eint_type = bdata->eint_type; 1107 bank->eint_mask = bdata->eint_mask; 1108 bank->eint_offset = bdata->eint_offset; 1109 bank->name = bdata->name; 1110 1111 raw_spin_lock_init(&bank->slock); 1112 bank->drvdata = d; 1113 bank->pin_base = d->nr_pins; 1114 d->nr_pins += bank->nr_pins; 1115 1116 bank->eint_base = virt_base[0]; 1117 bank->pctl_base = virt_base[bdata->pctl_res_idx]; 1118 } 1119 /* 1120 * Legacy platforms should provide only one resource with IO memory. 1121 * Store it as virt_base because legacy driver needs to access it 1122 * through samsung_pinctrl_drv_data. 1123 */ 1124 d->virt_base = virt_base[0]; 1125 1126 samsung_banks_node_get(&pdev->dev, d); 1127 1128 d->pin_base = pin_base; 1129 pin_base += d->nr_pins; 1130 1131 return ctrl; 1132 } 1133 1134 static int samsung_pinctrl_probe(struct platform_device *pdev) 1135 { 1136 struct samsung_pinctrl_drv_data *drvdata; 1137 const struct samsung_pin_ctrl *ctrl; 1138 struct device *dev = &pdev->dev; 1139 int ret; 1140 1141 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); 1142 if (!drvdata) 1143 return -ENOMEM; 1144 1145 ctrl = samsung_pinctrl_get_soc_data(drvdata, pdev); 1146 if (IS_ERR(ctrl)) { 1147 dev_err(&pdev->dev, "driver data not available\n"); 1148 return PTR_ERR(ctrl); 1149 } 1150 drvdata->dev = dev; 1151 1152 ret = platform_get_irq_optional(pdev, 0); 1153 if (ret < 0 && ret != -ENXIO) 1154 return ret; 1155 if (ret > 0) 1156 drvdata->irq = ret; 1157 1158 if (ctrl->retention_data) { 1159 drvdata->retention_ctrl = ctrl->retention_data->init(drvdata, 1160 ctrl->retention_data); 1161 if (IS_ERR(drvdata->retention_ctrl)) { 1162 ret = PTR_ERR(drvdata->retention_ctrl); 1163 goto err_put_banks; 1164 } 1165 } 1166 1167 ret = samsung_pinctrl_register(pdev, drvdata); 1168 if (ret) 1169 goto err_put_banks; 1170 1171 ret = samsung_gpiolib_register(pdev, drvdata); 1172 if (ret) 1173 goto err_unregister; 1174 1175 if (ctrl->eint_gpio_init) 1176 ctrl->eint_gpio_init(drvdata); 1177 if (ctrl->eint_wkup_init) 1178 ctrl->eint_wkup_init(drvdata); 1179 1180 platform_set_drvdata(pdev, drvdata); 1181 1182 return 0; 1183 1184 err_unregister: 1185 samsung_pinctrl_unregister(pdev, drvdata); 1186 err_put_banks: 1187 samsung_banks_node_put(drvdata); 1188 return ret; 1189 } 1190 1191 /* 1192 * samsung_pinctrl_suspend - save pinctrl state for suspend 1193 * 1194 * Save data for all banks handled by this device. 1195 */ 1196 static int __maybe_unused samsung_pinctrl_suspend(struct device *dev) 1197 { 1198 struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev); 1199 int i; 1200 1201 for (i = 0; i < drvdata->nr_banks; i++) { 1202 struct samsung_pin_bank *bank = &drvdata->pin_banks[i]; 1203 void __iomem *reg = bank->pctl_base + bank->pctl_offset; 1204 const u8 *offs = bank->type->reg_offset; 1205 const u8 *widths = bank->type->fld_width; 1206 enum pincfg_type type; 1207 1208 /* Registers without a powerdown config aren't lost */ 1209 if (!widths[PINCFG_TYPE_CON_PDN]) 1210 continue; 1211 1212 for (type = 0; type < PINCFG_TYPE_NUM; type++) 1213 if (widths[type]) 1214 bank->pm_save[type] = readl(reg + offs[type]); 1215 1216 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) { 1217 /* Some banks have two config registers */ 1218 bank->pm_save[PINCFG_TYPE_NUM] = 1219 readl(reg + offs[PINCFG_TYPE_FUNC] + 4); 1220 pr_debug("Save %s @ %p (con %#010x %08x)\n", 1221 bank->name, reg, 1222 bank->pm_save[PINCFG_TYPE_FUNC], 1223 bank->pm_save[PINCFG_TYPE_NUM]); 1224 } else { 1225 pr_debug("Save %s @ %p (con %#010x)\n", bank->name, 1226 reg, bank->pm_save[PINCFG_TYPE_FUNC]); 1227 } 1228 } 1229 1230 if (drvdata->suspend) 1231 drvdata->suspend(drvdata); 1232 if (drvdata->retention_ctrl && drvdata->retention_ctrl->enable) 1233 drvdata->retention_ctrl->enable(drvdata); 1234 1235 return 0; 1236 } 1237 1238 /* 1239 * samsung_pinctrl_resume - restore pinctrl state from suspend 1240 * 1241 * Restore one of the banks that was saved during suspend. 1242 * 1243 * We don't bother doing anything complicated to avoid glitching lines since 1244 * we're called before pad retention is turned off. 1245 */ 1246 static int __maybe_unused samsung_pinctrl_resume(struct device *dev) 1247 { 1248 struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev); 1249 int i; 1250 1251 if (drvdata->resume) 1252 drvdata->resume(drvdata); 1253 1254 for (i = 0; i < drvdata->nr_banks; i++) { 1255 struct samsung_pin_bank *bank = &drvdata->pin_banks[i]; 1256 void __iomem *reg = bank->pctl_base + bank->pctl_offset; 1257 const u8 *offs = bank->type->reg_offset; 1258 const u8 *widths = bank->type->fld_width; 1259 enum pincfg_type type; 1260 1261 /* Registers without a powerdown config aren't lost */ 1262 if (!widths[PINCFG_TYPE_CON_PDN]) 1263 continue; 1264 1265 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) { 1266 /* Some banks have two config registers */ 1267 pr_debug("%s @ %p (con %#010x %08x => %#010x %08x)\n", 1268 bank->name, reg, 1269 readl(reg + offs[PINCFG_TYPE_FUNC]), 1270 readl(reg + offs[PINCFG_TYPE_FUNC] + 4), 1271 bank->pm_save[PINCFG_TYPE_FUNC], 1272 bank->pm_save[PINCFG_TYPE_NUM]); 1273 writel(bank->pm_save[PINCFG_TYPE_NUM], 1274 reg + offs[PINCFG_TYPE_FUNC] + 4); 1275 } else { 1276 pr_debug("%s @ %p (con %#010x => %#010x)\n", bank->name, 1277 reg, readl(reg + offs[PINCFG_TYPE_FUNC]), 1278 bank->pm_save[PINCFG_TYPE_FUNC]); 1279 } 1280 for (type = 0; type < PINCFG_TYPE_NUM; type++) 1281 if (widths[type]) 1282 writel(bank->pm_save[type], reg + offs[type]); 1283 } 1284 1285 if (drvdata->retention_ctrl && drvdata->retention_ctrl->disable) 1286 drvdata->retention_ctrl->disable(drvdata); 1287 1288 return 0; 1289 } 1290 1291 static const struct of_device_id samsung_pinctrl_dt_match[] = { 1292 #ifdef CONFIG_PINCTRL_EXYNOS_ARM 1293 { .compatible = "samsung,exynos3250-pinctrl", 1294 .data = &exynos3250_of_data }, 1295 { .compatible = "samsung,exynos4210-pinctrl", 1296 .data = &exynos4210_of_data }, 1297 { .compatible = "samsung,exynos4x12-pinctrl", 1298 .data = &exynos4x12_of_data }, 1299 { .compatible = "samsung,exynos5250-pinctrl", 1300 .data = &exynos5250_of_data }, 1301 { .compatible = "samsung,exynos5260-pinctrl", 1302 .data = &exynos5260_of_data }, 1303 { .compatible = "samsung,exynos5410-pinctrl", 1304 .data = &exynos5410_of_data }, 1305 { .compatible = "samsung,exynos5420-pinctrl", 1306 .data = &exynos5420_of_data }, 1307 { .compatible = "samsung,s5pv210-pinctrl", 1308 .data = &s5pv210_of_data }, 1309 #endif 1310 #ifdef CONFIG_PINCTRL_EXYNOS_ARM64 1311 { .compatible = "samsung,exynos5433-pinctrl", 1312 .data = &exynos5433_of_data }, 1313 { .compatible = "samsung,exynos7-pinctrl", 1314 .data = &exynos7_of_data }, 1315 { .compatible = "samsung,exynos7885-pinctrl", 1316 .data = &exynos7885_of_data }, 1317 { .compatible = "samsung,exynos850-pinctrl", 1318 .data = &exynos850_of_data }, 1319 { .compatible = "samsung,exynosautov9-pinctrl", 1320 .data = &exynosautov9_of_data }, 1321 { .compatible = "tesla,fsd-pinctrl", 1322 .data = &fsd_of_data }, 1323 #endif 1324 #ifdef CONFIG_PINCTRL_S3C64XX 1325 { .compatible = "samsung,s3c64xx-pinctrl", 1326 .data = &s3c64xx_of_data }, 1327 #endif 1328 #ifdef CONFIG_PINCTRL_S3C24XX 1329 { .compatible = "samsung,s3c2412-pinctrl", 1330 .data = &s3c2412_of_data }, 1331 { .compatible = "samsung,s3c2416-pinctrl", 1332 .data = &s3c2416_of_data }, 1333 { .compatible = "samsung,s3c2440-pinctrl", 1334 .data = &s3c2440_of_data }, 1335 { .compatible = "samsung,s3c2450-pinctrl", 1336 .data = &s3c2450_of_data }, 1337 #endif 1338 {}, 1339 }; 1340 1341 static const struct dev_pm_ops samsung_pinctrl_pm_ops = { 1342 SET_LATE_SYSTEM_SLEEP_PM_OPS(samsung_pinctrl_suspend, 1343 samsung_pinctrl_resume) 1344 }; 1345 1346 static struct platform_driver samsung_pinctrl_driver = { 1347 .probe = samsung_pinctrl_probe, 1348 .driver = { 1349 .name = "samsung-pinctrl", 1350 .of_match_table = samsung_pinctrl_dt_match, 1351 .suppress_bind_attrs = true, 1352 .pm = &samsung_pinctrl_pm_ops, 1353 }, 1354 }; 1355 1356 static int __init samsung_pinctrl_drv_register(void) 1357 { 1358 return platform_driver_register(&samsung_pinctrl_driver); 1359 } 1360 postcore_initcall(samsung_pinctrl_drv_register); 1361