1077365a9SGeert Uytterhoeven // SPDX-License-Identifier: GPL-2.0 2077365a9SGeert Uytterhoeven /* 3077365a9SGeert Uytterhoeven * R8A7790 processor support 4077365a9SGeert Uytterhoeven * 5077365a9SGeert Uytterhoeven * Copyright (C) 2013 Renesas Electronics Corporation 6077365a9SGeert Uytterhoeven * Copyright (C) 2013 Magnus Damm 7077365a9SGeert Uytterhoeven * Copyright (C) 2012 Renesas Solutions Corp. 8077365a9SGeert Uytterhoeven * Copyright (C) 2012 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 9077365a9SGeert Uytterhoeven */ 10077365a9SGeert Uytterhoeven 11077365a9SGeert Uytterhoeven #include <linux/errno.h> 12077365a9SGeert Uytterhoeven #include <linux/io.h> 13077365a9SGeert Uytterhoeven #include <linux/kernel.h> 14077365a9SGeert Uytterhoeven #include <linux/sys_soc.h> 15077365a9SGeert Uytterhoeven 16077365a9SGeert Uytterhoeven #include "core.h" 17077365a9SGeert Uytterhoeven #include "sh_pfc.h" 18077365a9SGeert Uytterhoeven 19077365a9SGeert Uytterhoeven /* 20077365a9SGeert Uytterhoeven * All pins assigned to GPIO bank 3 can be used for SD interfaces in 21077365a9SGeert Uytterhoeven * which case they support both 3.3V and 1.8V signalling. 22077365a9SGeert Uytterhoeven */ 23077365a9SGeert Uytterhoeven #define CPU_ALL_GP(fn, sfx) \ 242be3d602SGeert Uytterhoeven PORT_GP_CFG_32(0, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 252be3d602SGeert Uytterhoeven PORT_GP_CFG_30(1, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 262be3d602SGeert Uytterhoeven PORT_GP_CFG_30(2, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 272be3d602SGeert Uytterhoeven PORT_GP_CFG_32(3, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE | SH_PFC_PIN_CFG_PULL_UP), \ 282be3d602SGeert Uytterhoeven PORT_GP_CFG_32(4, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \ 292be3d602SGeert Uytterhoeven PORT_GP_CFG_32(5, fn, sfx, SH_PFC_PIN_CFG_PULL_UP) 30077365a9SGeert Uytterhoeven 31077365a9SGeert Uytterhoeven #define CPU_ALL_NOGP(fn) \ 322be3d602SGeert Uytterhoeven PIN_NOGP_CFG(ASEBRK_N_ACK, "ASEBRK#/ACK", fn, SH_PFC_PIN_CFG_PULL_DOWN), \ 33077365a9SGeert Uytterhoeven PIN_NOGP(IIC0_SDA, "AF15", fn), \ 34077365a9SGeert Uytterhoeven PIN_NOGP(IIC0_SCL, "AG15", fn), \ 35077365a9SGeert Uytterhoeven PIN_NOGP(IIC3_SDA, "AH15", fn), \ 362be3d602SGeert Uytterhoeven PIN_NOGP(IIC3_SCL, "AJ15", fn), \ 372be3d602SGeert Uytterhoeven PIN_NOGP_CFG(TCK, "TCK", fn, SH_PFC_PIN_CFG_PULL_UP), \ 382be3d602SGeert Uytterhoeven PIN_NOGP_CFG(TDI, "TDI", fn, SH_PFC_PIN_CFG_PULL_UP), \ 392be3d602SGeert Uytterhoeven PIN_NOGP_CFG(TMS, "TMS", fn, SH_PFC_PIN_CFG_PULL_UP), \ 402be3d602SGeert Uytterhoeven PIN_NOGP_CFG(TRST_N, "TRST#", fn, SH_PFC_PIN_CFG_PULL_UP) 41077365a9SGeert Uytterhoeven 42077365a9SGeert Uytterhoeven enum { 43077365a9SGeert Uytterhoeven PINMUX_RESERVED = 0, 44077365a9SGeert Uytterhoeven 45077365a9SGeert Uytterhoeven PINMUX_DATA_BEGIN, 46077365a9SGeert Uytterhoeven GP_ALL(DATA), 47077365a9SGeert Uytterhoeven PINMUX_DATA_END, 48077365a9SGeert Uytterhoeven 49077365a9SGeert Uytterhoeven PINMUX_FUNCTION_BEGIN, 50077365a9SGeert Uytterhoeven GP_ALL(FN), 51077365a9SGeert Uytterhoeven 52077365a9SGeert Uytterhoeven /* GPSR0 */ 53077365a9SGeert Uytterhoeven FN_IP0_2_0, FN_IP0_5_3, FN_IP0_8_6, FN_IP0_11_9, FN_IP0_15_12, 54077365a9SGeert Uytterhoeven FN_IP0_19_16, FN_IP0_22_20, FN_IP0_26_23, FN_IP0_30_27, 55077365a9SGeert Uytterhoeven FN_IP1_3_0, FN_IP1_7_4, FN_IP1_11_8, FN_IP1_14_12, 56077365a9SGeert Uytterhoeven FN_IP1_17_15, FN_IP1_21_18, FN_IP1_25_22, FN_IP1_27_26, 57077365a9SGeert Uytterhoeven FN_IP1_29_28, FN_IP2_2_0, FN_IP2_5_3, FN_IP2_8_6, FN_IP2_11_9, 58077365a9SGeert Uytterhoeven FN_IP2_14_12, FN_IP2_17_15, FN_IP2_21_18, FN_IP2_25_22, 59077365a9SGeert Uytterhoeven FN_IP2_28_26, FN_IP3_3_0, FN_IP3_7_4, FN_IP3_11_8, 60077365a9SGeert Uytterhoeven FN_IP3_14_12, FN_IP3_17_15, 61077365a9SGeert Uytterhoeven 62077365a9SGeert Uytterhoeven /* GPSR1 */ 63077365a9SGeert Uytterhoeven FN_IP3_19_18, FN_IP3_22_20, FN_IP3_25_23, FN_IP3_28_26, 64077365a9SGeert Uytterhoeven FN_IP3_31_29, FN_IP4_2_0, FN_IP4_5_3, FN_IP4_8_6, FN_IP4_11_9, 65077365a9SGeert Uytterhoeven FN_IP4_14_12, FN_IP4_17_15, FN_IP4_20_18, FN_IP4_23_21, 66077365a9SGeert Uytterhoeven FN_IP4_26_24, FN_IP4_29_27, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_9_6, 67077365a9SGeert Uytterhoeven FN_IP5_12_10, FN_IP5_14_13, FN_IP5_17_15, FN_IP5_20_18, 68077365a9SGeert Uytterhoeven FN_IP5_23_21, FN_IP5_26_24, FN_IP5_29_27, FN_IP6_2_0, 69077365a9SGeert Uytterhoeven FN_IP6_5_3, FN_IP6_8_6, FN_IP6_10_9, FN_IP6_13_11, 70077365a9SGeert Uytterhoeven 71077365a9SGeert Uytterhoeven /* GPSR2 */ 72077365a9SGeert Uytterhoeven FN_IP7_28_27, FN_IP7_30_29, FN_IP8_1_0, FN_IP8_3_2, FN_IP8_5_4, 73077365a9SGeert Uytterhoeven FN_IP8_7_6, FN_IP8_9_8, FN_IP8_11_10, FN_IP8_13_12, FN_IP8_15_14, 74077365a9SGeert Uytterhoeven FN_IP8_17_16, FN_IP8_19_18, FN_IP8_21_20, FN_IP8_23_22, 75077365a9SGeert Uytterhoeven FN_IP8_25_24, FN_IP8_26, FN_IP8_27, FN_VI1_DATA7_VI1_B7, 76077365a9SGeert Uytterhoeven FN_IP6_16_14, FN_IP6_19_17, FN_IP6_22_20, FN_IP6_25_23, 77077365a9SGeert Uytterhoeven FN_IP6_28_26, FN_IP6_31_29, FN_IP7_2_0, FN_IP7_5_3, FN_IP7_7_6, 78077365a9SGeert Uytterhoeven FN_IP7_9_8, FN_IP7_12_10, FN_IP7_15_13, 79077365a9SGeert Uytterhoeven 80077365a9SGeert Uytterhoeven /* GPSR3 */ 81077365a9SGeert Uytterhoeven FN_IP8_28, FN_IP8_30_29, FN_IP9_1_0, FN_IP9_3_2, FN_IP9_5_4, 82077365a9SGeert Uytterhoeven FN_IP9_7_6, FN_IP9_11_8, FN_IP9_15_12, FN_IP9_17_16, FN_IP9_19_18, 83077365a9SGeert Uytterhoeven FN_IP9_21_20, FN_IP9_23_22, FN_IP9_25_24, FN_IP9_27_26, 84077365a9SGeert Uytterhoeven FN_IP9_31_28, FN_IP10_3_0, FN_IP10_6_4, FN_IP10_10_7, FN_IP10_14_11, 85077365a9SGeert Uytterhoeven FN_IP10_18_15, FN_IP10_22_19, FN_IP10_25_23, FN_IP10_29_26, 86077365a9SGeert Uytterhoeven FN_IP11_3_0, FN_IP11_4, FN_IP11_6_5, FN_IP11_8_7, FN_IP11_10_9, 87077365a9SGeert Uytterhoeven FN_IP11_12_11, FN_IP11_14_13, FN_IP11_17_15, FN_IP11_21_18, 88077365a9SGeert Uytterhoeven 89077365a9SGeert Uytterhoeven /* GPSR4 */ 90077365a9SGeert Uytterhoeven FN_IP11_23_22, FN_IP11_26_24, FN_IP11_29_27, FN_IP11_31_30, 91077365a9SGeert Uytterhoeven FN_IP12_1_0, FN_IP12_3_2, FN_IP12_5_4, FN_IP12_7_6, FN_IP12_10_8, 92077365a9SGeert Uytterhoeven FN_IP12_13_11, FN_IP12_16_14, FN_IP12_19_17, FN_IP12_22_20, 93077365a9SGeert Uytterhoeven FN_IP12_24_23, FN_IP12_27_25, FN_IP12_30_28, FN_IP13_2_0, 94077365a9SGeert Uytterhoeven FN_IP13_6_3, FN_IP13_9_7, FN_IP13_12_10, FN_IP13_15_13, 95077365a9SGeert Uytterhoeven FN_IP13_18_16, FN_IP13_22_19, FN_IP13_25_23, FN_IP13_28_26, 96077365a9SGeert Uytterhoeven FN_IP13_30_29, FN_IP14_2_0, FN_IP14_5_3, FN_IP14_8_6, FN_IP14_11_9, 97077365a9SGeert Uytterhoeven FN_IP14_15_12, FN_IP14_18_16, 98077365a9SGeert Uytterhoeven 99077365a9SGeert Uytterhoeven /* GPSR5 */ 100077365a9SGeert Uytterhoeven FN_IP14_21_19, FN_IP14_24_22, FN_IP14_27_25, FN_IP14_30_28, 101077365a9SGeert Uytterhoeven FN_IP15_2_0, FN_IP15_5_3, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_13_12, 102077365a9SGeert Uytterhoeven FN_IP15_15_14, FN_IP15_17_16, FN_IP15_19_18, FN_IP15_22_20, 103077365a9SGeert Uytterhoeven FN_IP15_25_23, FN_IP15_27_26, FN_IP15_29_28, FN_IP16_2_0, 104077365a9SGeert Uytterhoeven FN_IP16_5_3, FN_USB0_PWEN, FN_USB0_OVC_VBUS, FN_IP16_6, FN_IP16_7, 105077365a9SGeert Uytterhoeven FN_USB2_PWEN, FN_USB2_OVC, FN_AVS1, FN_AVS2, FN_DU_DOTCLKIN0, 106077365a9SGeert Uytterhoeven FN_IP7_26_25, FN_DU_DOTCLKIN2, FN_IP7_18_16, FN_IP7_21_19, FN_IP7_24_22, 107077365a9SGeert Uytterhoeven 108077365a9SGeert Uytterhoeven /* IPSR0 */ 109077365a9SGeert Uytterhoeven FN_D0, FN_MSIOF3_SCK_B, FN_VI3_DATA0, FN_VI0_G4, FN_VI0_G4_B, 110077365a9SGeert Uytterhoeven FN_D1, FN_MSIOF3_SYNC_B, FN_VI3_DATA1, FN_VI0_G5, 111077365a9SGeert Uytterhoeven FN_VI0_G5_B, FN_D2, FN_MSIOF3_RXD_B, FN_VI3_DATA2, 112077365a9SGeert Uytterhoeven FN_VI0_G6, FN_VI0_G6_B, FN_D3, FN_MSIOF3_TXD_B, 113077365a9SGeert Uytterhoeven FN_VI3_DATA3, FN_VI0_G7, FN_VI0_G7_B, FN_D4, 114077365a9SGeert Uytterhoeven FN_SCIFB1_RXD_F, FN_SCIFB0_RXD_C, FN_VI3_DATA4, 115077365a9SGeert Uytterhoeven FN_VI0_R0, FN_VI0_R0_B, FN_RX0_B, FN_D5, 116077365a9SGeert Uytterhoeven FN_SCIFB1_TXD_F, FN_SCIFB0_TXD_C, FN_VI3_DATA5, 117077365a9SGeert Uytterhoeven FN_VI0_R1, FN_VI0_R1_B, FN_TX0_B, FN_D6, 118077365a9SGeert Uytterhoeven FN_IIC2_SCL_C, FN_VI3_DATA6, FN_VI0_R2, FN_VI0_R2_B, 119077365a9SGeert Uytterhoeven FN_I2C2_SCL_C, FN_D7, FN_AD_DI_B, FN_IIC2_SDA_C, 120077365a9SGeert Uytterhoeven FN_VI3_DATA7, FN_VI0_R3, FN_VI0_R3_B, FN_I2C2_SDA_C, FN_TCLK1, 121077365a9SGeert Uytterhoeven FN_D8, FN_SCIFA1_SCK_C, FN_AVB_TXD0, 122077365a9SGeert Uytterhoeven FN_VI0_G0, FN_VI0_G0_B, FN_VI2_DATA0_VI2_B0, 123077365a9SGeert Uytterhoeven 124077365a9SGeert Uytterhoeven /* IPSR1 */ 125077365a9SGeert Uytterhoeven FN_D9, FN_SCIFA1_RXD_C, FN_AVB_TXD1, 126077365a9SGeert Uytterhoeven FN_VI0_G1, FN_VI0_G1_B, FN_VI2_DATA1_VI2_B1, FN_D10, 127077365a9SGeert Uytterhoeven FN_SCIFA1_TXD_C, FN_AVB_TXD2, 128077365a9SGeert Uytterhoeven FN_VI0_G2, FN_VI0_G2_B, FN_VI2_DATA2_VI2_B2, FN_D11, 129077365a9SGeert Uytterhoeven FN_SCIFA1_CTS_N_C, FN_AVB_TXD3, 130077365a9SGeert Uytterhoeven FN_VI0_G3, FN_VI0_G3_B, FN_VI2_DATA3_VI2_B3, 131077365a9SGeert Uytterhoeven FN_D12, FN_SCIFA1_RTS_N_C, FN_AVB_TXD4, 132077365a9SGeert Uytterhoeven FN_VI0_HSYNC_N, FN_VI0_HSYNC_N_B, FN_VI2_DATA4_VI2_B4, 133077365a9SGeert Uytterhoeven FN_D13, FN_AVB_TXD5, FN_VI0_VSYNC_N, 134077365a9SGeert Uytterhoeven FN_VI0_VSYNC_N_B, FN_VI2_DATA5_VI2_B5, FN_D14, 135077365a9SGeert Uytterhoeven FN_SCIFB1_RXD_C, FN_AVB_TXD6, FN_RX1_B, 136077365a9SGeert Uytterhoeven FN_VI0_CLKENB, FN_VI0_CLKENB_B, FN_VI2_DATA6_VI2_B6, 137077365a9SGeert Uytterhoeven FN_D15, FN_SCIFB1_TXD_C, FN_AVB_TXD7, FN_TX1_B, 138077365a9SGeert Uytterhoeven FN_VI0_FIELD, FN_VI0_FIELD_B, FN_VI2_DATA7_VI2_B7, 139077365a9SGeert Uytterhoeven FN_A0, FN_PWM3, FN_A1, FN_PWM4, 140077365a9SGeert Uytterhoeven 141077365a9SGeert Uytterhoeven /* IPSR2 */ 142077365a9SGeert Uytterhoeven FN_A2, FN_PWM5, FN_MSIOF1_SS1_B, FN_A3, 143077365a9SGeert Uytterhoeven FN_PWM6, FN_MSIOF1_SS2_B, FN_A4, FN_MSIOF1_TXD_B, 144077365a9SGeert Uytterhoeven FN_TPU0TO0, FN_A5, FN_SCIFA1_TXD_B, FN_TPU0TO1, 145077365a9SGeert Uytterhoeven FN_A6, FN_SCIFA1_RTS_N_B, FN_TPU0TO2, FN_A7, 146077365a9SGeert Uytterhoeven FN_SCIFA1_SCK_B, FN_AUDIO_CLKOUT_B, FN_TPU0TO3, 147077365a9SGeert Uytterhoeven FN_A8, FN_SCIFA1_RXD_B, FN_SSI_SCK5_B, FN_VI0_R4, 148077365a9SGeert Uytterhoeven FN_VI0_R4_B, FN_SCIFB2_RXD_C, FN_RX2_B, FN_VI2_DATA0_VI2_B0_B, 149077365a9SGeert Uytterhoeven FN_A9, FN_SCIFA1_CTS_N_B, FN_SSI_WS5_B, FN_VI0_R5, 150077365a9SGeert Uytterhoeven FN_VI0_R5_B, FN_SCIFB2_TXD_C, FN_TX2_B, FN_VI2_DATA1_VI2_B1_B, 151077365a9SGeert Uytterhoeven FN_A10, FN_SSI_SDATA5_B, FN_MSIOF2_SYNC, FN_VI0_R6, 152077365a9SGeert Uytterhoeven FN_VI0_R6_B, FN_VI2_DATA2_VI2_B2_B, 153077365a9SGeert Uytterhoeven 154077365a9SGeert Uytterhoeven /* IPSR3 */ 155077365a9SGeert Uytterhoeven FN_A11, FN_SCIFB2_CTS_N_B, FN_MSIOF2_SCK, FN_VI1_R0, 156077365a9SGeert Uytterhoeven FN_VI1_R0_B, FN_VI2_G0, FN_VI2_DATA3_VI2_B3_B, 157077365a9SGeert Uytterhoeven FN_A12, FN_SCIFB2_RXD_B, FN_MSIOF2_TXD, FN_VI1_R1, 158077365a9SGeert Uytterhoeven FN_VI1_R1_B, FN_VI2_G1, FN_VI2_DATA4_VI2_B4_B, 159077365a9SGeert Uytterhoeven FN_A13, FN_SCIFB2_RTS_N_B, FN_EX_WAIT2, 160077365a9SGeert Uytterhoeven FN_MSIOF2_RXD, FN_VI1_R2, FN_VI1_R2_B, FN_VI2_G2, 161077365a9SGeert Uytterhoeven FN_VI2_DATA5_VI2_B5_B, FN_A14, FN_SCIFB2_TXD_B, 162077365a9SGeert Uytterhoeven FN_ATACS11_N, FN_MSIOF2_SS1, FN_A15, FN_SCIFB2_SCK_B, 163077365a9SGeert Uytterhoeven FN_ATARD1_N, FN_MSIOF2_SS2, FN_A16, FN_ATAWR1_N, 164077365a9SGeert Uytterhoeven FN_A17, FN_AD_DO_B, FN_ATADIR1_N, FN_A18, 165077365a9SGeert Uytterhoeven FN_AD_CLK_B, FN_ATAG1_N, FN_A19, FN_AD_NCS_N_B, 166077365a9SGeert Uytterhoeven FN_ATACS01_N, FN_EX_WAIT0_B, FN_A20, FN_SPCLK, 167077365a9SGeert Uytterhoeven FN_VI1_R3, FN_VI1_R3_B, FN_VI2_G4, 168077365a9SGeert Uytterhoeven 169077365a9SGeert Uytterhoeven /* IPSR4 */ 170077365a9SGeert Uytterhoeven FN_A21, FN_MOSI_IO0, FN_VI1_R4, FN_VI1_R4_B, FN_VI2_G5, 171077365a9SGeert Uytterhoeven FN_A22, FN_MISO_IO1, FN_VI1_R5, FN_VI1_R5_B, 172077365a9SGeert Uytterhoeven FN_VI2_G6, FN_A23, FN_IO2, FN_VI1_G7, 173077365a9SGeert Uytterhoeven FN_VI1_G7_B, FN_VI2_G7, FN_A24, FN_IO3, 174077365a9SGeert Uytterhoeven FN_VI1_R7, FN_VI1_R7_B, FN_VI2_CLKENB, 175077365a9SGeert Uytterhoeven FN_VI2_CLKENB_B, FN_A25, FN_SSL, FN_VI1_G6, 176077365a9SGeert Uytterhoeven FN_VI1_G6_B, FN_VI2_FIELD, FN_VI2_FIELD_B, FN_CS0_N, 177077365a9SGeert Uytterhoeven FN_VI1_R6, FN_VI1_R6_B, FN_VI2_G3, FN_MSIOF0_SS2_B, 178077365a9SGeert Uytterhoeven FN_CS1_N_A26, FN_SPEEDIN, FN_VI0_R7, FN_VI0_R7_B, 179077365a9SGeert Uytterhoeven FN_VI2_CLK, FN_VI2_CLK_B, FN_EX_CS0_N, FN_HRX1_B, 180077365a9SGeert Uytterhoeven FN_VI1_G5, FN_VI1_G5_B, FN_VI2_R0, FN_HTX0_B, 181077365a9SGeert Uytterhoeven FN_MSIOF0_SS1_B, FN_EX_CS1_N, FN_GPS_CLK, 182077365a9SGeert Uytterhoeven FN_HCTS1_N_B, FN_VI1_FIELD, FN_VI1_FIELD_B, 183077365a9SGeert Uytterhoeven FN_VI2_R1, FN_EX_CS2_N, FN_GPS_SIGN, FN_HRTS1_N_B, 184077365a9SGeert Uytterhoeven FN_VI3_CLKENB, FN_VI1_G0, FN_VI1_G0_B, FN_VI2_R2, 185077365a9SGeert Uytterhoeven 186077365a9SGeert Uytterhoeven /* IPSR5 */ 187077365a9SGeert Uytterhoeven FN_EX_CS3_N, FN_GPS_MAG, FN_VI3_FIELD, FN_VI1_G1, FN_VI1_G1_B, 188077365a9SGeert Uytterhoeven FN_VI2_R3, FN_EX_CS4_N, FN_MSIOF1_SCK_B, FN_VI3_HSYNC_N, 189077365a9SGeert Uytterhoeven FN_VI2_HSYNC_N, FN_IIC1_SCL, FN_VI2_HSYNC_N_B, 190077365a9SGeert Uytterhoeven FN_INTC_EN0_N, FN_I2C1_SCL, FN_EX_CS5_N, FN_CAN0_RX, 191077365a9SGeert Uytterhoeven FN_MSIOF1_RXD_B, FN_VI3_VSYNC_N, FN_VI1_G2, 192077365a9SGeert Uytterhoeven FN_VI1_G2_B, FN_VI2_R4, FN_IIC1_SDA, FN_INTC_EN1_N, 193077365a9SGeert Uytterhoeven FN_I2C1_SDA, FN_BS_N, FN_IETX, FN_HTX1_B, 194077365a9SGeert Uytterhoeven FN_CAN1_TX, FN_DRACK0, FN_IETX_C, FN_RD_N, 195077365a9SGeert Uytterhoeven FN_CAN0_TX, FN_SCIFA0_SCK_B, FN_RD_WR_N, FN_VI1_G3, 196077365a9SGeert Uytterhoeven FN_VI1_G3_B, FN_VI2_R5, FN_SCIFA0_RXD_B, 197*c038a988SGeert Uytterhoeven FN_WE0_N, FN_IECLK, FN_CAN_CLK, 198077365a9SGeert Uytterhoeven FN_VI2_VSYNC_N, FN_SCIFA0_TXD_B, FN_VI2_VSYNC_N_B, 199077365a9SGeert Uytterhoeven FN_WE1_N, FN_IERX, FN_CAN1_RX, FN_VI1_G4, 200077365a9SGeert Uytterhoeven FN_VI1_G4_B, FN_VI2_R6, FN_SCIFA0_CTS_N_B, 201*c038a988SGeert Uytterhoeven FN_IERX_C, FN_EX_WAIT0, FN_IRQ3, 202077365a9SGeert Uytterhoeven FN_VI3_CLK, FN_SCIFA0_RTS_N_B, FN_HRX0_B, 203077365a9SGeert Uytterhoeven FN_MSIOF0_SCK_B, FN_DREQ0_N, FN_VI1_HSYNC_N, 204077365a9SGeert Uytterhoeven FN_VI1_HSYNC_N_B, FN_VI2_R7, FN_SSI_SCK78_C, 205077365a9SGeert Uytterhoeven FN_SSI_WS78_B, 206077365a9SGeert Uytterhoeven 207077365a9SGeert Uytterhoeven /* IPSR6 */ 208*c038a988SGeert Uytterhoeven FN_DACK0, FN_IRQ0, FN_SSI_SCK6_B, 209077365a9SGeert Uytterhoeven FN_VI1_VSYNC_N, FN_VI1_VSYNC_N_B, FN_SSI_WS78_C, 210077365a9SGeert Uytterhoeven FN_DREQ1_N, FN_VI1_CLKENB, FN_VI1_CLKENB_B, 211077365a9SGeert Uytterhoeven FN_SSI_SDATA7_C, FN_SSI_SCK78_B, FN_DACK1, FN_IRQ1, 212*c038a988SGeert Uytterhoeven FN_SSI_WS6_B, FN_SSI_SDATA8_C, 213077365a9SGeert Uytterhoeven FN_DREQ2_N, FN_HSCK1_B, FN_HCTS0_N_B, 214*c038a988SGeert Uytterhoeven FN_MSIOF0_TXD_B, FN_DACK2, FN_IRQ2, 215077365a9SGeert Uytterhoeven FN_SSI_SDATA6_B, FN_HRTS0_N_B, FN_MSIOF0_RXD_B, 216077365a9SGeert Uytterhoeven FN_ETH_CRS_DV, FN_STP_ISCLK_0_B, 217077365a9SGeert Uytterhoeven FN_TS_SDEN0_D, FN_GLO_Q0_C, FN_IIC2_SCL_E, 218077365a9SGeert Uytterhoeven FN_I2C2_SCL_E, FN_ETH_RX_ER, 219077365a9SGeert Uytterhoeven FN_STP_ISD_0_B, FN_TS_SPSYNC0_D, FN_GLO_Q1_C, 220077365a9SGeert Uytterhoeven FN_IIC2_SDA_E, FN_I2C2_SDA_E, FN_ETH_RXD0, 221077365a9SGeert Uytterhoeven FN_STP_ISEN_0_B, FN_TS_SDAT0_D, FN_GLO_I0_C, 222077365a9SGeert Uytterhoeven FN_SCIFB1_SCK_G, FN_SCK1_E, FN_ETH_RXD1, 223077365a9SGeert Uytterhoeven FN_HRX0_E, FN_STP_ISSYNC_0_B, 224077365a9SGeert Uytterhoeven FN_TS_SCK0_D, FN_GLO_I1_C, FN_SCIFB1_RXD_G, 225077365a9SGeert Uytterhoeven FN_RX1_E, FN_ETH_LINK, FN_HTX0_E, 226077365a9SGeert Uytterhoeven FN_STP_IVCXO27_0_B, FN_SCIFB1_TXD_G, FN_TX1_E, 227077365a9SGeert Uytterhoeven FN_ETH_REF_CLK, FN_HCTS0_N_E, 228077365a9SGeert Uytterhoeven FN_STP_IVCXO27_1_B, FN_HRX0_F, 229077365a9SGeert Uytterhoeven 230077365a9SGeert Uytterhoeven /* IPSR7 */ 231077365a9SGeert Uytterhoeven FN_ETH_MDIO, FN_HRTS0_N_E, 232077365a9SGeert Uytterhoeven FN_SIM0_D_C, FN_HCTS0_N_F, FN_ETH_TXD1, 233077365a9SGeert Uytterhoeven FN_HTX0_F, FN_BPFCLK_G, 234077365a9SGeert Uytterhoeven FN_ETH_TX_EN, FN_SIM0_CLK_C, 235077365a9SGeert Uytterhoeven FN_HRTS0_N_F, FN_ETH_MAGIC, 236077365a9SGeert Uytterhoeven FN_SIM0_RST_C, FN_ETH_TXD0, 237077365a9SGeert Uytterhoeven FN_STP_ISCLK_1_B, FN_TS_SDEN1_C, FN_GLO_SCLK_C, 238077365a9SGeert Uytterhoeven FN_ETH_MDC, FN_STP_ISD_1_B, 239077365a9SGeert Uytterhoeven FN_TS_SPSYNC1_C, FN_GLO_SDATA_C, FN_PWM0, 240077365a9SGeert Uytterhoeven FN_SCIFA2_SCK_C, FN_STP_ISEN_1_B, FN_TS_SDAT1_C, 241077365a9SGeert Uytterhoeven FN_GLO_SS_C, FN_PWM1, FN_SCIFA2_TXD_C, 242077365a9SGeert Uytterhoeven FN_STP_ISSYNC_1_B, FN_TS_SCK1_C, FN_GLO_RFON_C, 243077365a9SGeert Uytterhoeven FN_PCMOE_N, FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C, 244077365a9SGeert Uytterhoeven FN_PCMWE_N, FN_IECLK_C, FN_DU_DOTCLKIN1, 245077365a9SGeert Uytterhoeven FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, FN_VI0_CLK, 246077365a9SGeert Uytterhoeven FN_ATACS00_N, FN_AVB_RXD1, 247077365a9SGeert Uytterhoeven FN_VI0_DATA0_VI0_B0, FN_ATACS10_N, FN_AVB_RXD2, 248077365a9SGeert Uytterhoeven 249077365a9SGeert Uytterhoeven /* IPSR8 */ 250077365a9SGeert Uytterhoeven FN_VI0_DATA1_VI0_B1, FN_ATARD0_N, FN_AVB_RXD3, 251077365a9SGeert Uytterhoeven FN_VI0_DATA2_VI0_B2, FN_ATAWR0_N, 252077365a9SGeert Uytterhoeven FN_AVB_RXD4, FN_VI0_DATA3_VI0_B3, FN_ATADIR0_N, 253077365a9SGeert Uytterhoeven FN_AVB_RXD5, FN_VI0_DATA4_VI0_B4, FN_ATAG0_N, 254077365a9SGeert Uytterhoeven FN_AVB_RXD6, FN_VI0_DATA5_VI0_B5, FN_EX_WAIT1, 255077365a9SGeert Uytterhoeven FN_AVB_RXD7, FN_VI0_DATA6_VI0_B6, FN_AVB_RX_ER, 256077365a9SGeert Uytterhoeven FN_VI0_DATA7_VI0_B7, FN_AVB_RX_CLK, 257077365a9SGeert Uytterhoeven FN_VI1_CLK, FN_AVB_RX_DV, 258077365a9SGeert Uytterhoeven FN_VI1_DATA0_VI1_B0, FN_SCIFA1_SCK_D, 259077365a9SGeert Uytterhoeven FN_AVB_CRS, FN_VI1_DATA1_VI1_B1, 260077365a9SGeert Uytterhoeven FN_SCIFA1_RXD_D, FN_AVB_MDC, 261077365a9SGeert Uytterhoeven FN_VI1_DATA2_VI1_B2, FN_SCIFA1_TXD_D, FN_AVB_MDIO, 262077365a9SGeert Uytterhoeven FN_VI1_DATA3_VI1_B3, FN_SCIFA1_CTS_N_D, 263077365a9SGeert Uytterhoeven FN_AVB_GTX_CLK, FN_VI1_DATA4_VI1_B4, FN_SCIFA1_RTS_N_D, 264077365a9SGeert Uytterhoeven FN_AVB_MAGIC, FN_VI1_DATA5_VI1_B5, 265077365a9SGeert Uytterhoeven FN_AVB_PHY_INT, FN_VI1_DATA6_VI1_B6, FN_AVB_GTXREFCLK, 266077365a9SGeert Uytterhoeven FN_SD0_CLK, FN_VI1_DATA0_VI1_B0_B, FN_SD0_CMD, 267077365a9SGeert Uytterhoeven FN_SCIFB1_SCK_B, FN_VI1_DATA1_VI1_B1_B, 268077365a9SGeert Uytterhoeven 269077365a9SGeert Uytterhoeven /* IPSR9 */ 270077365a9SGeert Uytterhoeven FN_SD0_DAT0, FN_SCIFB1_RXD_B, FN_VI1_DATA2_VI1_B2_B, 271077365a9SGeert Uytterhoeven FN_SD0_DAT1, FN_SCIFB1_TXD_B, FN_VI1_DATA3_VI1_B3_B, 272077365a9SGeert Uytterhoeven FN_SD0_DAT2, FN_SCIFB1_CTS_N_B, FN_VI1_DATA4_VI1_B4_B, 273077365a9SGeert Uytterhoeven FN_SD0_DAT3, FN_SCIFB1_RTS_N_B, FN_VI1_DATA5_VI1_B5_B, 274077365a9SGeert Uytterhoeven FN_SD0_CD, FN_MMC0_D6, FN_TS_SDEN0_B, FN_USB0_EXTP, 275077365a9SGeert Uytterhoeven FN_GLO_SCLK, FN_VI1_DATA6_VI1_B6_B, FN_IIC1_SCL_B, 276077365a9SGeert Uytterhoeven FN_I2C1_SCL_B, FN_VI2_DATA6_VI2_B6_B, FN_SD0_WP, 277077365a9SGeert Uytterhoeven FN_MMC0_D7, FN_TS_SPSYNC0_B, FN_USB0_IDIN, 278077365a9SGeert Uytterhoeven FN_GLO_SDATA, FN_VI1_DATA7_VI1_B7_B, FN_IIC1_SDA_B, 279077365a9SGeert Uytterhoeven FN_I2C1_SDA_B, FN_VI2_DATA7_VI2_B7_B, FN_SD1_CLK, 280077365a9SGeert Uytterhoeven FN_AVB_TX_EN, FN_SD1_CMD, 281077365a9SGeert Uytterhoeven FN_AVB_TX_ER, FN_SCIFB0_SCK_B, 282077365a9SGeert Uytterhoeven FN_SD1_DAT0, FN_AVB_TX_CLK, 283077365a9SGeert Uytterhoeven FN_SCIFB0_RXD_B, FN_SD1_DAT1, FN_AVB_LINK, 284077365a9SGeert Uytterhoeven FN_SCIFB0_TXD_B, FN_SD1_DAT2, 285077365a9SGeert Uytterhoeven FN_AVB_COL, FN_SCIFB0_CTS_N_B, 286077365a9SGeert Uytterhoeven FN_SD1_DAT3, FN_AVB_RXD0, 287077365a9SGeert Uytterhoeven FN_SCIFB0_RTS_N_B, FN_SD1_CD, FN_MMC1_D6, 288077365a9SGeert Uytterhoeven FN_TS_SDEN1, FN_USB1_EXTP, FN_GLO_SS, FN_VI0_CLK_B, 289077365a9SGeert Uytterhoeven FN_IIC2_SCL_D, FN_I2C2_SCL_D, FN_SIM0_CLK_B, 290077365a9SGeert Uytterhoeven FN_VI3_CLK_B, 291077365a9SGeert Uytterhoeven 292077365a9SGeert Uytterhoeven /* IPSR10 */ 293077365a9SGeert Uytterhoeven FN_SD1_WP, FN_MMC1_D7, FN_TS_SPSYNC1, FN_USB1_IDIN, 294077365a9SGeert Uytterhoeven FN_GLO_RFON, FN_VI1_CLK_B, FN_IIC2_SDA_D, FN_I2C2_SDA_D, 295077365a9SGeert Uytterhoeven FN_SIM0_D_B, FN_SD2_CLK, FN_MMC0_CLK, FN_SIM0_CLK, 296077365a9SGeert Uytterhoeven FN_VI0_DATA0_VI0_B0_B, FN_TS_SDEN0_C, FN_GLO_SCLK_B, 297077365a9SGeert Uytterhoeven FN_VI3_DATA0_B, FN_SD2_CMD, FN_MMC0_CMD, FN_SIM0_D, 298077365a9SGeert Uytterhoeven FN_VI0_DATA1_VI0_B1_B, FN_SCIFB1_SCK_E, FN_SCK1_D, 299077365a9SGeert Uytterhoeven FN_TS_SPSYNC0_C, FN_GLO_SDATA_B, FN_VI3_DATA1_B, 300077365a9SGeert Uytterhoeven FN_SD2_DAT0, FN_MMC0_D0, FN_FMCLK_B, 301077365a9SGeert Uytterhoeven FN_VI0_DATA2_VI0_B2_B, FN_SCIFB1_RXD_E, FN_RX1_D, 302077365a9SGeert Uytterhoeven FN_TS_SDAT0_C, FN_GLO_SS_B, FN_VI3_DATA2_B, 303077365a9SGeert Uytterhoeven FN_SD2_DAT1, FN_MMC0_D1, FN_FMIN_B, 304077365a9SGeert Uytterhoeven FN_VI0_DATA3_VI0_B3_B, FN_SCIFB1_TXD_E, FN_TX1_D, 305077365a9SGeert Uytterhoeven FN_TS_SCK0_C, FN_GLO_RFON_B, FN_VI3_DATA3_B, 306077365a9SGeert Uytterhoeven FN_SD2_DAT2, FN_MMC0_D2, FN_BPFCLK_B, 307077365a9SGeert Uytterhoeven FN_VI0_DATA4_VI0_B4_B, FN_HRX0_D, FN_TS_SDEN1_B, 308077365a9SGeert Uytterhoeven FN_GLO_Q0_B, FN_VI3_DATA4_B, FN_SD2_DAT3, 309077365a9SGeert Uytterhoeven FN_MMC0_D3, FN_SIM0_RST, FN_VI0_DATA5_VI0_B5_B, 310077365a9SGeert Uytterhoeven FN_HTX0_D, FN_TS_SPSYNC1_B, FN_GLO_Q1_B, 311077365a9SGeert Uytterhoeven FN_VI3_DATA5_B, FN_SD2_CD, FN_MMC0_D4, 312077365a9SGeert Uytterhoeven FN_TS_SDAT0_B, FN_USB2_EXTP, FN_GLO_I0, 313077365a9SGeert Uytterhoeven FN_VI0_DATA6_VI0_B6_B, FN_HCTS0_N_D, FN_TS_SDAT1_B, 314077365a9SGeert Uytterhoeven FN_GLO_I0_B, FN_VI3_DATA6_B, 315077365a9SGeert Uytterhoeven 316077365a9SGeert Uytterhoeven /* IPSR11 */ 317077365a9SGeert Uytterhoeven FN_SD2_WP, FN_MMC0_D5, FN_TS_SCK0_B, FN_USB2_IDIN, 318077365a9SGeert Uytterhoeven FN_GLO_I1, FN_VI0_DATA7_VI0_B7_B, FN_HRTS0_N_D, 319077365a9SGeert Uytterhoeven FN_TS_SCK1_B, FN_GLO_I1_B, FN_VI3_DATA7_B, 320077365a9SGeert Uytterhoeven FN_SD3_CLK, FN_MMC1_CLK, FN_SD3_CMD, FN_MMC1_CMD, 321077365a9SGeert Uytterhoeven FN_MTS_N, FN_SD3_DAT0, FN_MMC1_D0, FN_STM_N, 322077365a9SGeert Uytterhoeven FN_SD3_DAT1, FN_MMC1_D1, FN_MDATA, FN_SD3_DAT2, 323077365a9SGeert Uytterhoeven FN_MMC1_D2, FN_SDATA, FN_SD3_DAT3, FN_MMC1_D3, 324077365a9SGeert Uytterhoeven FN_SCKZ, FN_SD3_CD, FN_MMC1_D4, FN_TS_SDAT1, 325077365a9SGeert Uytterhoeven FN_VSP, FN_GLO_Q0, FN_SIM0_RST_B, FN_SD3_WP, 326077365a9SGeert Uytterhoeven FN_MMC1_D5, FN_TS_SCK1, FN_GLO_Q1, FN_FMIN_C, 327077365a9SGeert Uytterhoeven FN_FMIN_E, FN_FMIN_F, 328077365a9SGeert Uytterhoeven FN_MLB_CLK, FN_IIC2_SCL_B, FN_I2C2_SCL_B, 329077365a9SGeert Uytterhoeven FN_MLB_SIG, FN_SCIFB1_RXD_D, FN_RX1_C, FN_IIC2_SDA_B, 330077365a9SGeert Uytterhoeven FN_I2C2_SDA_B, FN_MLB_DAT, 331077365a9SGeert Uytterhoeven FN_SCIFB1_TXD_D, FN_TX1_C, FN_BPFCLK_C, 332077365a9SGeert Uytterhoeven FN_SSI_SCK0129, FN_CAN_CLK_B, 333077365a9SGeert Uytterhoeven FN_MOUT0, 334077365a9SGeert Uytterhoeven 335077365a9SGeert Uytterhoeven /* IPSR12 */ 336077365a9SGeert Uytterhoeven FN_SSI_WS0129, FN_CAN0_TX_B, FN_MOUT1, 337077365a9SGeert Uytterhoeven FN_SSI_SDATA0, FN_CAN0_RX_B, FN_MOUT2, 338077365a9SGeert Uytterhoeven FN_SSI_SDATA1, FN_CAN1_TX_B, FN_MOUT5, 339077365a9SGeert Uytterhoeven FN_SSI_SDATA2, FN_CAN1_RX_B, FN_SSI_SCK1, FN_MOUT6, 340077365a9SGeert Uytterhoeven FN_SSI_SCK34, FN_STP_OPWM_0, FN_SCIFB0_SCK, 341077365a9SGeert Uytterhoeven FN_MSIOF1_SCK, FN_CAN_DEBUG_HW_TRIGGER, FN_SSI_WS34, 342077365a9SGeert Uytterhoeven FN_STP_IVCXO27_0, FN_SCIFB0_RXD, FN_MSIOF1_SYNC, 343077365a9SGeert Uytterhoeven FN_CAN_STEP0, FN_SSI_SDATA3, FN_STP_ISCLK_0, 344077365a9SGeert Uytterhoeven FN_SCIFB0_TXD, FN_MSIOF1_SS1, FN_CAN_TXCLK, 345077365a9SGeert Uytterhoeven FN_SSI_SCK4, FN_STP_ISD_0, FN_SCIFB0_CTS_N, 346077365a9SGeert Uytterhoeven FN_MSIOF1_SS2, FN_SSI_SCK5_C, FN_CAN_DEBUGOUT0, 347077365a9SGeert Uytterhoeven FN_SSI_WS4, FN_STP_ISEN_0, FN_SCIFB0_RTS_N, 348077365a9SGeert Uytterhoeven FN_MSIOF1_TXD, FN_SSI_WS5_C, FN_CAN_DEBUGOUT1, 349077365a9SGeert Uytterhoeven FN_SSI_SDATA4, FN_STP_ISSYNC_0, FN_MSIOF1_RXD, 350077365a9SGeert Uytterhoeven FN_CAN_DEBUGOUT2, FN_SSI_SCK5, FN_SCIFB1_SCK, 351077365a9SGeert Uytterhoeven FN_IERX_B, FN_DU2_EXHSYNC_DU2_HSYNC, FN_QSTH_QHS, 352077365a9SGeert Uytterhoeven FN_CAN_DEBUGOUT3, FN_SSI_WS5, FN_SCIFB1_RXD, 353077365a9SGeert Uytterhoeven FN_IECLK_B, FN_DU2_EXVSYNC_DU2_VSYNC, FN_QSTB_QHE, 354077365a9SGeert Uytterhoeven FN_CAN_DEBUGOUT4, 355077365a9SGeert Uytterhoeven 356077365a9SGeert Uytterhoeven /* IPSR13 */ 357077365a9SGeert Uytterhoeven FN_SSI_SDATA5, FN_SCIFB1_TXD, FN_IETX_B, FN_DU2_DR2, 358077365a9SGeert Uytterhoeven FN_LCDOUT2, FN_CAN_DEBUGOUT5, FN_SSI_SCK6, 359077365a9SGeert Uytterhoeven FN_SCIFB1_CTS_N, FN_BPFCLK_D, 360077365a9SGeert Uytterhoeven FN_DU2_DR3, FN_LCDOUT3, FN_CAN_DEBUGOUT6, 361077365a9SGeert Uytterhoeven FN_BPFCLK_F, FN_SSI_WS6, 362077365a9SGeert Uytterhoeven FN_SCIFB1_RTS_N, FN_CAN0_TX_D, FN_DU2_DR4, 363077365a9SGeert Uytterhoeven FN_LCDOUT4, FN_CAN_DEBUGOUT7, FN_SSI_SDATA6, 364077365a9SGeert Uytterhoeven FN_FMIN_D, FN_DU2_DR5, FN_LCDOUT5, 365077365a9SGeert Uytterhoeven FN_CAN_DEBUGOUT8, FN_SSI_SCK78, FN_STP_IVCXO27_1, 366077365a9SGeert Uytterhoeven FN_SCK1, FN_SCIFA1_SCK, FN_DU2_DR6, FN_LCDOUT6, 367077365a9SGeert Uytterhoeven FN_CAN_DEBUGOUT9, FN_SSI_WS78, FN_STP_ISCLK_1, 368077365a9SGeert Uytterhoeven FN_SCIFB2_SCK, FN_SCIFA2_CTS_N, FN_DU2_DR7, 369077365a9SGeert Uytterhoeven FN_LCDOUT7, FN_CAN_DEBUGOUT10, FN_SSI_SDATA7, 370077365a9SGeert Uytterhoeven FN_STP_ISD_1, FN_SCIFB2_RXD, FN_SCIFA2_RTS_N, 371077365a9SGeert Uytterhoeven FN_TCLK2, FN_QSTVA_QVS, FN_CAN_DEBUGOUT11, 372077365a9SGeert Uytterhoeven FN_BPFCLK_E, FN_SSI_SDATA7_B, 373077365a9SGeert Uytterhoeven FN_FMIN_G, FN_SSI_SDATA8, 374077365a9SGeert Uytterhoeven FN_STP_ISEN_1, FN_SCIFB2_TXD, FN_CAN0_TX_C, 375077365a9SGeert Uytterhoeven FN_CAN_DEBUGOUT12, FN_SSI_SDATA8_B, FN_SSI_SDATA9, 376077365a9SGeert Uytterhoeven FN_STP_ISSYNC_1, FN_SCIFB2_CTS_N, FN_SSI_WS1, 377077365a9SGeert Uytterhoeven FN_SSI_SDATA5_C, FN_CAN_DEBUGOUT13, FN_AUDIO_CLKA, 378077365a9SGeert Uytterhoeven FN_SCIFB2_RTS_N, FN_CAN_DEBUGOUT14, 379077365a9SGeert Uytterhoeven 380077365a9SGeert Uytterhoeven /* IPSR14 */ 381077365a9SGeert Uytterhoeven FN_AUDIO_CLKB, FN_SCIF_CLK, FN_CAN0_RX_D, 382077365a9SGeert Uytterhoeven FN_DVC_MUTE, FN_CAN0_RX_C, FN_CAN_DEBUGOUT15, 383077365a9SGeert Uytterhoeven FN_REMOCON, FN_SCIFA0_SCK, FN_HSCK1, FN_SCK0, 384077365a9SGeert Uytterhoeven FN_MSIOF3_SS2, FN_DU2_DG2, FN_LCDOUT10, FN_IIC1_SDA_C, 385077365a9SGeert Uytterhoeven FN_I2C1_SDA_C, FN_SCIFA0_RXD, FN_HRX1, FN_RX0, 386077365a9SGeert Uytterhoeven FN_DU2_DR0, FN_LCDOUT0, FN_SCIFA0_TXD, FN_HTX1, 387077365a9SGeert Uytterhoeven FN_TX0, FN_DU2_DR1, FN_LCDOUT1, FN_SCIFA0_CTS_N, 388077365a9SGeert Uytterhoeven FN_HCTS1_N, FN_CTS0_N, FN_MSIOF3_SYNC, FN_DU2_DG3, 389077365a9SGeert Uytterhoeven FN_LCDOUT11, FN_PWM0_B, FN_IIC1_SCL_C, FN_I2C1_SCL_C, 390077365a9SGeert Uytterhoeven FN_SCIFA0_RTS_N, FN_HRTS1_N, FN_RTS0_N, 391077365a9SGeert Uytterhoeven FN_MSIOF3_SS1, FN_DU2_DG0, FN_LCDOUT8, FN_PWM1_B, 392077365a9SGeert Uytterhoeven FN_SCIFA1_RXD, FN_AD_DI, FN_RX1, 393077365a9SGeert Uytterhoeven FN_DU2_EXODDF_DU2_ODDF_DISP_CDE, FN_QCPV_QDE, 394077365a9SGeert Uytterhoeven FN_SCIFA1_TXD, FN_AD_DO, FN_TX1, FN_DU2_DG1, 395077365a9SGeert Uytterhoeven FN_LCDOUT9, FN_SCIFA1_CTS_N, FN_AD_CLK, 396077365a9SGeert Uytterhoeven FN_CTS1_N, FN_MSIOF3_RXD, FN_DU0_DOTCLKOUT, FN_QCLK, 397077365a9SGeert Uytterhoeven FN_SCIFA1_RTS_N, FN_AD_NCS_N, FN_RTS1_N, 398077365a9SGeert Uytterhoeven FN_MSIOF3_TXD, FN_DU1_DOTCLKOUT, FN_QSTVB_QVE, 399077365a9SGeert Uytterhoeven FN_HRTS0_N_C, 400077365a9SGeert Uytterhoeven 401077365a9SGeert Uytterhoeven /* IPSR15 */ 402077365a9SGeert Uytterhoeven FN_SCIFA2_SCK, FN_FMCLK, FN_SCK2, FN_MSIOF3_SCK, FN_DU2_DG7, 403077365a9SGeert Uytterhoeven FN_LCDOUT15, FN_SCIF_CLK_B, FN_SCIFA2_RXD, FN_FMIN, 404077365a9SGeert Uytterhoeven FN_TX2, FN_DU2_DB0, FN_LCDOUT16, FN_IIC2_SCL, FN_I2C2_SCL, 405077365a9SGeert Uytterhoeven FN_SCIFA2_TXD, FN_BPFCLK, FN_RX2, FN_DU2_DB1, FN_LCDOUT17, 406077365a9SGeert Uytterhoeven FN_IIC2_SDA, FN_I2C2_SDA, FN_HSCK0, FN_TS_SDEN0, 407077365a9SGeert Uytterhoeven FN_DU2_DG4, FN_LCDOUT12, FN_HCTS0_N_C, FN_HRX0, 408077365a9SGeert Uytterhoeven FN_DU2_DB2, FN_LCDOUT18, FN_HTX0, FN_DU2_DB3, 409077365a9SGeert Uytterhoeven FN_LCDOUT19, FN_HCTS0_N, FN_SSI_SCK9, FN_DU2_DB4, 410077365a9SGeert Uytterhoeven FN_LCDOUT20, FN_HRTS0_N, FN_SSI_WS9, FN_DU2_DB5, 411077365a9SGeert Uytterhoeven FN_LCDOUT21, FN_MSIOF0_SCK, FN_TS_SDAT0, FN_ADICLK, 412077365a9SGeert Uytterhoeven FN_DU2_DB6, FN_LCDOUT22, FN_MSIOF0_SYNC, FN_TS_SCK0, 413077365a9SGeert Uytterhoeven FN_SSI_SCK2, FN_ADIDATA, FN_DU2_DB7, FN_LCDOUT23, 414077365a9SGeert Uytterhoeven FN_HRX0_C, FN_MSIOF0_SS1, FN_ADICHS0, 415077365a9SGeert Uytterhoeven FN_DU2_DG5, FN_LCDOUT13, FN_MSIOF0_TXD, FN_ADICHS1, 416077365a9SGeert Uytterhoeven FN_DU2_DG6, FN_LCDOUT14, 417077365a9SGeert Uytterhoeven 418077365a9SGeert Uytterhoeven /* IPSR16 */ 419077365a9SGeert Uytterhoeven FN_MSIOF0_SS2, FN_AUDIO_CLKOUT, FN_ADICHS2, 420077365a9SGeert Uytterhoeven FN_DU2_DISP, FN_QPOLA, FN_HTX0_C, FN_SCIFA2_TXD_B, 421077365a9SGeert Uytterhoeven FN_MSIOF0_RXD, FN_TS_SPSYNC0, FN_SSI_WS2, 422077365a9SGeert Uytterhoeven FN_ADICS_SAMP, FN_DU2_CDE, FN_QPOLB, FN_SCIFA2_RXD_B, 423077365a9SGeert Uytterhoeven FN_USB1_PWEN, FN_AUDIO_CLKOUT_D, FN_USB1_OVC, 424077365a9SGeert Uytterhoeven FN_TCLK1_B, 425077365a9SGeert Uytterhoeven 426077365a9SGeert Uytterhoeven FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3, 427077365a9SGeert Uytterhoeven FN_SEL_SCIF1_4, 428077365a9SGeert Uytterhoeven FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, 429077365a9SGeert Uytterhoeven FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2, 430077365a9SGeert Uytterhoeven FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3, 431077365a9SGeert Uytterhoeven FN_SEL_SCIFB1_4, 432077365a9SGeert Uytterhoeven FN_SEL_SCIFB1_5, FN_SEL_SCIFB1_6, 433077365a9SGeert Uytterhoeven FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, FN_SEL_SCIFA1_3, 434077365a9SGeert Uytterhoeven FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, 435077365a9SGeert Uytterhoeven FN_SEL_SCFA_0, FN_SEL_SCFA_1, 436077365a9SGeert Uytterhoeven FN_SEL_SOF1_0, FN_SEL_SOF1_1, 437077365a9SGeert Uytterhoeven FN_SEL_SSI7_0, FN_SEL_SSI7_1, FN_SEL_SSI7_2, 438077365a9SGeert Uytterhoeven FN_SEL_SSI6_0, FN_SEL_SSI6_1, 439077365a9SGeert Uytterhoeven FN_SEL_SSI5_0, FN_SEL_SSI5_1, FN_SEL_SSI5_2, 440077365a9SGeert Uytterhoeven FN_SEL_VI3_0, FN_SEL_VI3_1, 441077365a9SGeert Uytterhoeven FN_SEL_VI2_0, FN_SEL_VI2_1, 442077365a9SGeert Uytterhoeven FN_SEL_VI1_0, FN_SEL_VI1_1, 443077365a9SGeert Uytterhoeven FN_SEL_VI0_0, FN_SEL_VI0_1, 444077365a9SGeert Uytterhoeven FN_SEL_TSIF1_0, FN_SEL_TSIF1_1, FN_SEL_TSIF1_2, 445077365a9SGeert Uytterhoeven FN_SEL_LBS_0, FN_SEL_LBS_1, 446077365a9SGeert Uytterhoeven FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3, 447077365a9SGeert Uytterhoeven FN_SEL_SOF3_0, FN_SEL_SOF3_1, 448077365a9SGeert Uytterhoeven FN_SEL_SOF0_0, FN_SEL_SOF0_1, 449077365a9SGeert Uytterhoeven 450077365a9SGeert Uytterhoeven FN_SEL_TMU1_0, FN_SEL_TMU1_1, 451077365a9SGeert Uytterhoeven FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, 452077365a9SGeert Uytterhoeven FN_SEL_SCIFCLK_0, FN_SEL_SCIFCLK_1, 453077365a9SGeert Uytterhoeven FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3, 454077365a9SGeert Uytterhoeven FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, 455077365a9SGeert Uytterhoeven FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, FN_SEL_SCIFA2_2, 456077365a9SGeert Uytterhoeven FN_SEL_CAN1_0, FN_SEL_CAN1_1, 457077365a9SGeert Uytterhoeven FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, 458077365a9SGeert Uytterhoeven FN_SEL_ADI_0, FN_SEL_ADI_1, 459077365a9SGeert Uytterhoeven FN_SEL_SSP_0, FN_SEL_SSP_1, 460077365a9SGeert Uytterhoeven FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3, 461077365a9SGeert Uytterhoeven FN_SEL_FM_4, FN_SEL_FM_5, FN_SEL_FM_6, 462077365a9SGeert Uytterhoeven FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, FN_SEL_HSCIF0_3, 463077365a9SGeert Uytterhoeven FN_SEL_HSCIF0_4, FN_SEL_HSCIF0_5, 464077365a9SGeert Uytterhoeven FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, 465077365a9SGeert Uytterhoeven FN_SEL_SIM_0, FN_SEL_SIM_1, FN_SEL_SIM_2, 466077365a9SGeert Uytterhoeven FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI8_2, 467077365a9SGeert Uytterhoeven 468077365a9SGeert Uytterhoeven FN_SEL_IICDVFS_0, FN_SEL_IICDVFS_1, 469077365a9SGeert Uytterhoeven FN_SEL_IIC0_0, FN_SEL_IIC0_1, 470077365a9SGeert Uytterhoeven FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, 471077365a9SGeert Uytterhoeven FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3, 472077365a9SGeert Uytterhoeven FN_SEL_IIC2_4, 473077365a9SGeert Uytterhoeven FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, 474077365a9SGeert Uytterhoeven FN_SEL_I2C2_0, FN_SEL_I2C2_1, FN_SEL_I2C2_2, FN_SEL_I2C2_3, 475077365a9SGeert Uytterhoeven FN_SEL_I2C2_4, 476077365a9SGeert Uytterhoeven FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2, 477077365a9SGeert Uytterhoeven PINMUX_FUNCTION_END, 478077365a9SGeert Uytterhoeven 479077365a9SGeert Uytterhoeven PINMUX_MARK_BEGIN, 480077365a9SGeert Uytterhoeven 481077365a9SGeert Uytterhoeven VI1_DATA7_VI1_B7_MARK, 482077365a9SGeert Uytterhoeven 483077365a9SGeert Uytterhoeven USB0_PWEN_MARK, USB0_OVC_VBUS_MARK, 484077365a9SGeert Uytterhoeven USB2_PWEN_MARK, USB2_OVC_MARK, AVS1_MARK, AVS2_MARK, 485077365a9SGeert Uytterhoeven DU_DOTCLKIN0_MARK, DU_DOTCLKIN2_MARK, 486077365a9SGeert Uytterhoeven 487077365a9SGeert Uytterhoeven D0_MARK, MSIOF3_SCK_B_MARK, VI3_DATA0_MARK, VI0_G4_MARK, VI0_G4_B_MARK, 488077365a9SGeert Uytterhoeven D1_MARK, MSIOF3_SYNC_B_MARK, VI3_DATA1_MARK, VI0_G5_MARK, 489077365a9SGeert Uytterhoeven VI0_G5_B_MARK, D2_MARK, MSIOF3_RXD_B_MARK, VI3_DATA2_MARK, 490077365a9SGeert Uytterhoeven VI0_G6_MARK, VI0_G6_B_MARK, D3_MARK, MSIOF3_TXD_B_MARK, 491077365a9SGeert Uytterhoeven VI3_DATA3_MARK, VI0_G7_MARK, VI0_G7_B_MARK, D4_MARK, 492077365a9SGeert Uytterhoeven SCIFB1_RXD_F_MARK, SCIFB0_RXD_C_MARK, VI3_DATA4_MARK, 493077365a9SGeert Uytterhoeven VI0_R0_MARK, VI0_R0_B_MARK, RX0_B_MARK, D5_MARK, 494077365a9SGeert Uytterhoeven SCIFB1_TXD_F_MARK, SCIFB0_TXD_C_MARK, VI3_DATA5_MARK, 495077365a9SGeert Uytterhoeven VI0_R1_MARK, VI0_R1_B_MARK, TX0_B_MARK, D6_MARK, 496077365a9SGeert Uytterhoeven IIC2_SCL_C_MARK, VI3_DATA6_MARK, VI0_R2_MARK, VI0_R2_B_MARK, 497077365a9SGeert Uytterhoeven I2C2_SCL_C_MARK, D7_MARK, AD_DI_B_MARK, IIC2_SDA_C_MARK, 498077365a9SGeert Uytterhoeven VI3_DATA7_MARK, VI0_R3_MARK, VI0_R3_B_MARK, I2C2_SDA_C_MARK, TCLK1_MARK, 499077365a9SGeert Uytterhoeven D8_MARK, SCIFA1_SCK_C_MARK, AVB_TXD0_MARK, 500077365a9SGeert Uytterhoeven VI0_G0_MARK, VI0_G0_B_MARK, VI2_DATA0_VI2_B0_MARK, 501077365a9SGeert Uytterhoeven 502077365a9SGeert Uytterhoeven D9_MARK, SCIFA1_RXD_C_MARK, AVB_TXD1_MARK, 503077365a9SGeert Uytterhoeven VI0_G1_MARK, VI0_G1_B_MARK, VI2_DATA1_VI2_B1_MARK, D10_MARK, 504077365a9SGeert Uytterhoeven SCIFA1_TXD_C_MARK, AVB_TXD2_MARK, 505077365a9SGeert Uytterhoeven VI0_G2_MARK, VI0_G2_B_MARK, VI2_DATA2_VI2_B2_MARK, D11_MARK, 506077365a9SGeert Uytterhoeven SCIFA1_CTS_N_C_MARK, AVB_TXD3_MARK, 507077365a9SGeert Uytterhoeven VI0_G3_MARK, VI0_G3_B_MARK, VI2_DATA3_VI2_B3_MARK, 508077365a9SGeert Uytterhoeven D12_MARK, SCIFA1_RTS_N_C_MARK, AVB_TXD4_MARK, 509077365a9SGeert Uytterhoeven VI0_HSYNC_N_MARK, VI0_HSYNC_N_B_MARK, VI2_DATA4_VI2_B4_MARK, 510077365a9SGeert Uytterhoeven D13_MARK, AVB_TXD5_MARK, VI0_VSYNC_N_MARK, 511077365a9SGeert Uytterhoeven VI0_VSYNC_N_B_MARK, VI2_DATA5_VI2_B5_MARK, D14_MARK, 512077365a9SGeert Uytterhoeven SCIFB1_RXD_C_MARK, AVB_TXD6_MARK, RX1_B_MARK, 513077365a9SGeert Uytterhoeven VI0_CLKENB_MARK, VI0_CLKENB_B_MARK, VI2_DATA6_VI2_B6_MARK, 514077365a9SGeert Uytterhoeven D15_MARK, SCIFB1_TXD_C_MARK, AVB_TXD7_MARK, TX1_B_MARK, 515077365a9SGeert Uytterhoeven VI0_FIELD_MARK, VI0_FIELD_B_MARK, VI2_DATA7_VI2_B7_MARK, 516077365a9SGeert Uytterhoeven A0_MARK, PWM3_MARK, A1_MARK, PWM4_MARK, 517077365a9SGeert Uytterhoeven 518077365a9SGeert Uytterhoeven A2_MARK, PWM5_MARK, MSIOF1_SS1_B_MARK, A3_MARK, 519077365a9SGeert Uytterhoeven PWM6_MARK, MSIOF1_SS2_B_MARK, A4_MARK, MSIOF1_TXD_B_MARK, 520077365a9SGeert Uytterhoeven TPU0TO0_MARK, A5_MARK, SCIFA1_TXD_B_MARK, TPU0TO1_MARK, 521077365a9SGeert Uytterhoeven A6_MARK, SCIFA1_RTS_N_B_MARK, TPU0TO2_MARK, A7_MARK, 522077365a9SGeert Uytterhoeven SCIFA1_SCK_B_MARK, AUDIO_CLKOUT_B_MARK, TPU0TO3_MARK, 523077365a9SGeert Uytterhoeven A8_MARK, SCIFA1_RXD_B_MARK, SSI_SCK5_B_MARK, VI0_R4_MARK, 524077365a9SGeert Uytterhoeven VI0_R4_B_MARK, SCIFB2_RXD_C_MARK, RX2_B_MARK, VI2_DATA0_VI2_B0_B_MARK, 525077365a9SGeert Uytterhoeven A9_MARK, SCIFA1_CTS_N_B_MARK, SSI_WS5_B_MARK, VI0_R5_MARK, 526077365a9SGeert Uytterhoeven VI0_R5_B_MARK, SCIFB2_TXD_C_MARK, TX2_B_MARK, VI2_DATA1_VI2_B1_B_MARK, 527077365a9SGeert Uytterhoeven A10_MARK, SSI_SDATA5_B_MARK, MSIOF2_SYNC_MARK, VI0_R6_MARK, 528077365a9SGeert Uytterhoeven VI0_R6_B_MARK, VI2_DATA2_VI2_B2_B_MARK, 529077365a9SGeert Uytterhoeven 530077365a9SGeert Uytterhoeven A11_MARK, SCIFB2_CTS_N_B_MARK, MSIOF2_SCK_MARK, VI1_R0_MARK, 531077365a9SGeert Uytterhoeven VI1_R0_B_MARK, VI2_G0_MARK, VI2_DATA3_VI2_B3_B_MARK, 532077365a9SGeert Uytterhoeven A12_MARK, SCIFB2_RXD_B_MARK, MSIOF2_TXD_MARK, VI1_R1_MARK, 533077365a9SGeert Uytterhoeven VI1_R1_B_MARK, VI2_G1_MARK, VI2_DATA4_VI2_B4_B_MARK, 534077365a9SGeert Uytterhoeven A13_MARK, SCIFB2_RTS_N_B_MARK, EX_WAIT2_MARK, 535077365a9SGeert Uytterhoeven MSIOF2_RXD_MARK, VI1_R2_MARK, VI1_R2_B_MARK, VI2_G2_MARK, 536077365a9SGeert Uytterhoeven VI2_DATA5_VI2_B5_B_MARK, A14_MARK, SCIFB2_TXD_B_MARK, 537077365a9SGeert Uytterhoeven ATACS11_N_MARK, MSIOF2_SS1_MARK, A15_MARK, SCIFB2_SCK_B_MARK, 538077365a9SGeert Uytterhoeven ATARD1_N_MARK, MSIOF2_SS2_MARK, A16_MARK, ATAWR1_N_MARK, 539077365a9SGeert Uytterhoeven A17_MARK, AD_DO_B_MARK, ATADIR1_N_MARK, A18_MARK, 540077365a9SGeert Uytterhoeven AD_CLK_B_MARK, ATAG1_N_MARK, A19_MARK, AD_NCS_N_B_MARK, 541077365a9SGeert Uytterhoeven ATACS01_N_MARK, EX_WAIT0_B_MARK, A20_MARK, SPCLK_MARK, 542077365a9SGeert Uytterhoeven VI1_R3_MARK, VI1_R3_B_MARK, VI2_G4_MARK, 543077365a9SGeert Uytterhoeven 544077365a9SGeert Uytterhoeven A21_MARK, MOSI_IO0_MARK, VI1_R4_MARK, VI1_R4_B_MARK, VI2_G5_MARK, 545077365a9SGeert Uytterhoeven A22_MARK, MISO_IO1_MARK, VI1_R5_MARK, VI1_R5_B_MARK, 546077365a9SGeert Uytterhoeven VI2_G6_MARK, A23_MARK, IO2_MARK, VI1_G7_MARK, 547077365a9SGeert Uytterhoeven VI1_G7_B_MARK, VI2_G7_MARK, A24_MARK, IO3_MARK, 548077365a9SGeert Uytterhoeven VI1_R7_MARK, VI1_R7_B_MARK, VI2_CLKENB_MARK, 549077365a9SGeert Uytterhoeven VI2_CLKENB_B_MARK, A25_MARK, SSL_MARK, VI1_G6_MARK, 550077365a9SGeert Uytterhoeven VI1_G6_B_MARK, VI2_FIELD_MARK, VI2_FIELD_B_MARK, CS0_N_MARK, 551077365a9SGeert Uytterhoeven VI1_R6_MARK, VI1_R6_B_MARK, VI2_G3_MARK, MSIOF0_SS2_B_MARK, 552077365a9SGeert Uytterhoeven CS1_N_A26_MARK, SPEEDIN_MARK, VI0_R7_MARK, VI0_R7_B_MARK, 553077365a9SGeert Uytterhoeven VI2_CLK_MARK, VI2_CLK_B_MARK, EX_CS0_N_MARK, HRX1_B_MARK, 554077365a9SGeert Uytterhoeven VI1_G5_MARK, VI1_G5_B_MARK, VI2_R0_MARK, HTX0_B_MARK, 555077365a9SGeert Uytterhoeven MSIOF0_SS1_B_MARK, EX_CS1_N_MARK, GPS_CLK_MARK, 556077365a9SGeert Uytterhoeven HCTS1_N_B_MARK, VI1_FIELD_MARK, VI1_FIELD_B_MARK, 557077365a9SGeert Uytterhoeven VI2_R1_MARK, EX_CS2_N_MARK, GPS_SIGN_MARK, HRTS1_N_B_MARK, 558077365a9SGeert Uytterhoeven VI3_CLKENB_MARK, VI1_G0_MARK, VI1_G0_B_MARK, VI2_R2_MARK, 559077365a9SGeert Uytterhoeven 560077365a9SGeert Uytterhoeven EX_CS3_N_MARK, GPS_MAG_MARK, VI3_FIELD_MARK, 561077365a9SGeert Uytterhoeven VI1_G1_MARK, VI1_G1_B_MARK, VI2_R3_MARK, 562077365a9SGeert Uytterhoeven EX_CS4_N_MARK, MSIOF1_SCK_B_MARK, VI3_HSYNC_N_MARK, 563077365a9SGeert Uytterhoeven VI2_HSYNC_N_MARK, IIC1_SCL_MARK, VI2_HSYNC_N_B_MARK, 564077365a9SGeert Uytterhoeven INTC_EN0_N_MARK, I2C1_SCL_MARK, EX_CS5_N_MARK, CAN0_RX_MARK, 565077365a9SGeert Uytterhoeven MSIOF1_RXD_B_MARK, VI3_VSYNC_N_MARK, VI1_G2_MARK, 566077365a9SGeert Uytterhoeven VI1_G2_B_MARK, VI2_R4_MARK, IIC1_SDA_MARK, INTC_EN1_N_MARK, 567077365a9SGeert Uytterhoeven I2C1_SDA_MARK, BS_N_MARK, IETX_MARK, HTX1_B_MARK, 568077365a9SGeert Uytterhoeven CAN1_TX_MARK, DRACK0_MARK, IETX_C_MARK, RD_N_MARK, 569077365a9SGeert Uytterhoeven CAN0_TX_MARK, SCIFA0_SCK_B_MARK, RD_WR_N_MARK, VI1_G3_MARK, 570077365a9SGeert Uytterhoeven VI1_G3_B_MARK, VI2_R5_MARK, SCIFA0_RXD_B_MARK, 571*c038a988SGeert Uytterhoeven WE0_N_MARK, IECLK_MARK, CAN_CLK_MARK, 572077365a9SGeert Uytterhoeven VI2_VSYNC_N_MARK, SCIFA0_TXD_B_MARK, VI2_VSYNC_N_B_MARK, 573077365a9SGeert Uytterhoeven WE1_N_MARK, IERX_MARK, CAN1_RX_MARK, VI1_G4_MARK, 574077365a9SGeert Uytterhoeven VI1_G4_B_MARK, VI2_R6_MARK, SCIFA0_CTS_N_B_MARK, 575*c038a988SGeert Uytterhoeven IERX_C_MARK, EX_WAIT0_MARK, IRQ3_MARK, 576077365a9SGeert Uytterhoeven VI3_CLK_MARK, SCIFA0_RTS_N_B_MARK, HRX0_B_MARK, 577077365a9SGeert Uytterhoeven MSIOF0_SCK_B_MARK, DREQ0_N_MARK, VI1_HSYNC_N_MARK, 578077365a9SGeert Uytterhoeven VI1_HSYNC_N_B_MARK, VI2_R7_MARK, SSI_SCK78_C_MARK, 579077365a9SGeert Uytterhoeven SSI_WS78_B_MARK, 580077365a9SGeert Uytterhoeven 581*c038a988SGeert Uytterhoeven DACK0_MARK, IRQ0_MARK, SSI_SCK6_B_MARK, 582077365a9SGeert Uytterhoeven VI1_VSYNC_N_MARK, VI1_VSYNC_N_B_MARK, SSI_WS78_C_MARK, 583077365a9SGeert Uytterhoeven DREQ1_N_MARK, VI1_CLKENB_MARK, VI1_CLKENB_B_MARK, 584077365a9SGeert Uytterhoeven SSI_SDATA7_C_MARK, SSI_SCK78_B_MARK, DACK1_MARK, IRQ1_MARK, 585*c038a988SGeert Uytterhoeven SSI_WS6_B_MARK, SSI_SDATA8_C_MARK, 586077365a9SGeert Uytterhoeven DREQ2_N_MARK, HSCK1_B_MARK, HCTS0_N_B_MARK, 587*c038a988SGeert Uytterhoeven MSIOF0_TXD_B_MARK, DACK2_MARK, IRQ2_MARK, 588077365a9SGeert Uytterhoeven SSI_SDATA6_B_MARK, HRTS0_N_B_MARK, MSIOF0_RXD_B_MARK, 589077365a9SGeert Uytterhoeven ETH_CRS_DV_MARK, STP_ISCLK_0_B_MARK, 590077365a9SGeert Uytterhoeven TS_SDEN0_D_MARK, GLO_Q0_C_MARK, IIC2_SCL_E_MARK, 591077365a9SGeert Uytterhoeven I2C2_SCL_E_MARK, ETH_RX_ER_MARK, 592077365a9SGeert Uytterhoeven STP_ISD_0_B_MARK, TS_SPSYNC0_D_MARK, GLO_Q1_C_MARK, 593077365a9SGeert Uytterhoeven IIC2_SDA_E_MARK, I2C2_SDA_E_MARK, ETH_RXD0_MARK, 594077365a9SGeert Uytterhoeven STP_ISEN_0_B_MARK, TS_SDAT0_D_MARK, GLO_I0_C_MARK, 595077365a9SGeert Uytterhoeven SCIFB1_SCK_G_MARK, SCK1_E_MARK, ETH_RXD1_MARK, 596077365a9SGeert Uytterhoeven HRX0_E_MARK, STP_ISSYNC_0_B_MARK, 597077365a9SGeert Uytterhoeven TS_SCK0_D_MARK, GLO_I1_C_MARK, SCIFB1_RXD_G_MARK, 598077365a9SGeert Uytterhoeven RX1_E_MARK, ETH_LINK_MARK, HTX0_E_MARK, 599077365a9SGeert Uytterhoeven STP_IVCXO27_0_B_MARK, SCIFB1_TXD_G_MARK, TX1_E_MARK, 600077365a9SGeert Uytterhoeven ETH_REF_CLK_MARK, HCTS0_N_E_MARK, 601077365a9SGeert Uytterhoeven STP_IVCXO27_1_B_MARK, HRX0_F_MARK, 602077365a9SGeert Uytterhoeven 603077365a9SGeert Uytterhoeven ETH_MDIO_MARK, HRTS0_N_E_MARK, 604077365a9SGeert Uytterhoeven SIM0_D_C_MARK, HCTS0_N_F_MARK, ETH_TXD1_MARK, 605077365a9SGeert Uytterhoeven HTX0_F_MARK, BPFCLK_G_MARK, 606077365a9SGeert Uytterhoeven ETH_TX_EN_MARK, SIM0_CLK_C_MARK, 607077365a9SGeert Uytterhoeven HRTS0_N_F_MARK, ETH_MAGIC_MARK, 608077365a9SGeert Uytterhoeven SIM0_RST_C_MARK, ETH_TXD0_MARK, 609077365a9SGeert Uytterhoeven STP_ISCLK_1_B_MARK, TS_SDEN1_C_MARK, GLO_SCLK_C_MARK, 610077365a9SGeert Uytterhoeven ETH_MDC_MARK, STP_ISD_1_B_MARK, 611077365a9SGeert Uytterhoeven TS_SPSYNC1_C_MARK, GLO_SDATA_C_MARK, PWM0_MARK, 612077365a9SGeert Uytterhoeven SCIFA2_SCK_C_MARK, STP_ISEN_1_B_MARK, TS_SDAT1_C_MARK, 613077365a9SGeert Uytterhoeven GLO_SS_C_MARK, PWM1_MARK, SCIFA2_TXD_C_MARK, 614077365a9SGeert Uytterhoeven STP_ISSYNC_1_B_MARK, TS_SCK1_C_MARK, GLO_RFON_C_MARK, 615077365a9SGeert Uytterhoeven PCMOE_N_MARK, PWM2_MARK, PWMFSW0_MARK, SCIFA2_RXD_C_MARK, 616077365a9SGeert Uytterhoeven PCMWE_N_MARK, IECLK_C_MARK, DU_DOTCLKIN1_MARK, 617077365a9SGeert Uytterhoeven AUDIO_CLKC_MARK, AUDIO_CLKOUT_C_MARK, VI0_CLK_MARK, 618077365a9SGeert Uytterhoeven ATACS00_N_MARK, AVB_RXD1_MARK, 619077365a9SGeert Uytterhoeven VI0_DATA0_VI0_B0_MARK, ATACS10_N_MARK, AVB_RXD2_MARK, 620077365a9SGeert Uytterhoeven 621077365a9SGeert Uytterhoeven VI0_DATA1_VI0_B1_MARK, ATARD0_N_MARK, AVB_RXD3_MARK, 622077365a9SGeert Uytterhoeven VI0_DATA2_VI0_B2_MARK, ATAWR0_N_MARK, 623077365a9SGeert Uytterhoeven AVB_RXD4_MARK, VI0_DATA3_VI0_B3_MARK, ATADIR0_N_MARK, 624077365a9SGeert Uytterhoeven AVB_RXD5_MARK, VI0_DATA4_VI0_B4_MARK, ATAG0_N_MARK, 625077365a9SGeert Uytterhoeven AVB_RXD6_MARK, VI0_DATA5_VI0_B5_MARK, EX_WAIT1_MARK, 626077365a9SGeert Uytterhoeven AVB_RXD7_MARK, VI0_DATA6_VI0_B6_MARK, AVB_RX_ER_MARK, 627077365a9SGeert Uytterhoeven VI0_DATA7_VI0_B7_MARK, AVB_RX_CLK_MARK, 628077365a9SGeert Uytterhoeven VI1_CLK_MARK, AVB_RX_DV_MARK, 629077365a9SGeert Uytterhoeven VI1_DATA0_VI1_B0_MARK, SCIFA1_SCK_D_MARK, 630077365a9SGeert Uytterhoeven AVB_CRS_MARK, VI1_DATA1_VI1_B1_MARK, 631077365a9SGeert Uytterhoeven SCIFA1_RXD_D_MARK, AVB_MDC_MARK, 632077365a9SGeert Uytterhoeven VI1_DATA2_VI1_B2_MARK, SCIFA1_TXD_D_MARK, AVB_MDIO_MARK, 633077365a9SGeert Uytterhoeven VI1_DATA3_VI1_B3_MARK, SCIFA1_CTS_N_D_MARK, 634077365a9SGeert Uytterhoeven AVB_GTX_CLK_MARK, VI1_DATA4_VI1_B4_MARK, SCIFA1_RTS_N_D_MARK, 635077365a9SGeert Uytterhoeven AVB_MAGIC_MARK, VI1_DATA5_VI1_B5_MARK, 636077365a9SGeert Uytterhoeven AVB_PHY_INT_MARK, VI1_DATA6_VI1_B6_MARK, AVB_GTXREFCLK_MARK, 637077365a9SGeert Uytterhoeven SD0_CLK_MARK, VI1_DATA0_VI1_B0_B_MARK, SD0_CMD_MARK, 638077365a9SGeert Uytterhoeven SCIFB1_SCK_B_MARK, VI1_DATA1_VI1_B1_B_MARK, 639077365a9SGeert Uytterhoeven 640077365a9SGeert Uytterhoeven SD0_DAT0_MARK, SCIFB1_RXD_B_MARK, VI1_DATA2_VI1_B2_B_MARK, 641077365a9SGeert Uytterhoeven SD0_DAT1_MARK, SCIFB1_TXD_B_MARK, VI1_DATA3_VI1_B3_B_MARK, 642077365a9SGeert Uytterhoeven SD0_DAT2_MARK, SCIFB1_CTS_N_B_MARK, VI1_DATA4_VI1_B4_B_MARK, 643077365a9SGeert Uytterhoeven SD0_DAT3_MARK, SCIFB1_RTS_N_B_MARK, VI1_DATA5_VI1_B5_B_MARK, 644077365a9SGeert Uytterhoeven SD0_CD_MARK, MMC0_D6_MARK, TS_SDEN0_B_MARK, USB0_EXTP_MARK, 645077365a9SGeert Uytterhoeven GLO_SCLK_MARK, VI1_DATA6_VI1_B6_B_MARK, IIC1_SCL_B_MARK, 646077365a9SGeert Uytterhoeven I2C1_SCL_B_MARK, VI2_DATA6_VI2_B6_B_MARK, SD0_WP_MARK, 647077365a9SGeert Uytterhoeven MMC0_D7_MARK, TS_SPSYNC0_B_MARK, USB0_IDIN_MARK, 648077365a9SGeert Uytterhoeven GLO_SDATA_MARK, VI1_DATA7_VI1_B7_B_MARK, IIC1_SDA_B_MARK, 649077365a9SGeert Uytterhoeven I2C1_SDA_B_MARK, VI2_DATA7_VI2_B7_B_MARK, SD1_CLK_MARK, 650077365a9SGeert Uytterhoeven AVB_TX_EN_MARK, SD1_CMD_MARK, 651077365a9SGeert Uytterhoeven AVB_TX_ER_MARK, SCIFB0_SCK_B_MARK, 652077365a9SGeert Uytterhoeven SD1_DAT0_MARK, AVB_TX_CLK_MARK, 653077365a9SGeert Uytterhoeven SCIFB0_RXD_B_MARK, SD1_DAT1_MARK, AVB_LINK_MARK, 654077365a9SGeert Uytterhoeven SCIFB0_TXD_B_MARK, SD1_DAT2_MARK, 655077365a9SGeert Uytterhoeven AVB_COL_MARK, SCIFB0_CTS_N_B_MARK, 656077365a9SGeert Uytterhoeven SD1_DAT3_MARK, AVB_RXD0_MARK, 657077365a9SGeert Uytterhoeven SCIFB0_RTS_N_B_MARK, SD1_CD_MARK, MMC1_D6_MARK, 658077365a9SGeert Uytterhoeven TS_SDEN1_MARK, USB1_EXTP_MARK, GLO_SS_MARK, VI0_CLK_B_MARK, 659077365a9SGeert Uytterhoeven IIC2_SCL_D_MARK, I2C2_SCL_D_MARK, SIM0_CLK_B_MARK, 660077365a9SGeert Uytterhoeven VI3_CLK_B_MARK, 661077365a9SGeert Uytterhoeven 662077365a9SGeert Uytterhoeven SD1_WP_MARK, MMC1_D7_MARK, TS_SPSYNC1_MARK, USB1_IDIN_MARK, 663077365a9SGeert Uytterhoeven GLO_RFON_MARK, VI1_CLK_B_MARK, IIC2_SDA_D_MARK, I2C2_SDA_D_MARK, 664077365a9SGeert Uytterhoeven SIM0_D_B_MARK, SD2_CLK_MARK, MMC0_CLK_MARK, SIM0_CLK_MARK, 665077365a9SGeert Uytterhoeven VI0_DATA0_VI0_B0_B_MARK, TS_SDEN0_C_MARK, GLO_SCLK_B_MARK, 666077365a9SGeert Uytterhoeven VI3_DATA0_B_MARK, SD2_CMD_MARK, MMC0_CMD_MARK, SIM0_D_MARK, 667077365a9SGeert Uytterhoeven VI0_DATA1_VI0_B1_B_MARK, SCIFB1_SCK_E_MARK, SCK1_D_MARK, 668077365a9SGeert Uytterhoeven TS_SPSYNC0_C_MARK, GLO_SDATA_B_MARK, VI3_DATA1_B_MARK, 669077365a9SGeert Uytterhoeven SD2_DAT0_MARK, MMC0_D0_MARK, FMCLK_B_MARK, 670077365a9SGeert Uytterhoeven VI0_DATA2_VI0_B2_B_MARK, SCIFB1_RXD_E_MARK, RX1_D_MARK, 671077365a9SGeert Uytterhoeven TS_SDAT0_C_MARK, GLO_SS_B_MARK, VI3_DATA2_B_MARK, 672077365a9SGeert Uytterhoeven SD2_DAT1_MARK, MMC0_D1_MARK, FMIN_B_MARK, 673077365a9SGeert Uytterhoeven VI0_DATA3_VI0_B3_B_MARK, SCIFB1_TXD_E_MARK, TX1_D_MARK, 674077365a9SGeert Uytterhoeven TS_SCK0_C_MARK, GLO_RFON_B_MARK, VI3_DATA3_B_MARK, 675077365a9SGeert Uytterhoeven SD2_DAT2_MARK, MMC0_D2_MARK, BPFCLK_B_MARK, 676077365a9SGeert Uytterhoeven VI0_DATA4_VI0_B4_B_MARK, HRX0_D_MARK, TS_SDEN1_B_MARK, 677077365a9SGeert Uytterhoeven GLO_Q0_B_MARK, VI3_DATA4_B_MARK, SD2_DAT3_MARK, 678077365a9SGeert Uytterhoeven MMC0_D3_MARK, SIM0_RST_MARK, VI0_DATA5_VI0_B5_B_MARK, 679077365a9SGeert Uytterhoeven HTX0_D_MARK, TS_SPSYNC1_B_MARK, GLO_Q1_B_MARK, 680077365a9SGeert Uytterhoeven VI3_DATA5_B_MARK, SD2_CD_MARK, MMC0_D4_MARK, 681077365a9SGeert Uytterhoeven TS_SDAT0_B_MARK, USB2_EXTP_MARK, GLO_I0_MARK, 682077365a9SGeert Uytterhoeven VI0_DATA6_VI0_B6_B_MARK, HCTS0_N_D_MARK, TS_SDAT1_B_MARK, 683077365a9SGeert Uytterhoeven GLO_I0_B_MARK, VI3_DATA6_B_MARK, 684077365a9SGeert Uytterhoeven 685077365a9SGeert Uytterhoeven SD2_WP_MARK, MMC0_D5_MARK, TS_SCK0_B_MARK, USB2_IDIN_MARK, 686077365a9SGeert Uytterhoeven GLO_I1_MARK, VI0_DATA7_VI0_B7_B_MARK, HRTS0_N_D_MARK, 687077365a9SGeert Uytterhoeven TS_SCK1_B_MARK, GLO_I1_B_MARK, VI3_DATA7_B_MARK, 688077365a9SGeert Uytterhoeven SD3_CLK_MARK, MMC1_CLK_MARK, SD3_CMD_MARK, MMC1_CMD_MARK, 689077365a9SGeert Uytterhoeven MTS_N_MARK, SD3_DAT0_MARK, MMC1_D0_MARK, STM_N_MARK, 690077365a9SGeert Uytterhoeven SD3_DAT1_MARK, MMC1_D1_MARK, MDATA_MARK, SD3_DAT2_MARK, 691077365a9SGeert Uytterhoeven MMC1_D2_MARK, SDATA_MARK, SD3_DAT3_MARK, MMC1_D3_MARK, 692077365a9SGeert Uytterhoeven SCKZ_MARK, SD3_CD_MARK, MMC1_D4_MARK, TS_SDAT1_MARK, 693077365a9SGeert Uytterhoeven VSP_MARK, GLO_Q0_MARK, SIM0_RST_B_MARK, SD3_WP_MARK, 694077365a9SGeert Uytterhoeven MMC1_D5_MARK, TS_SCK1_MARK, GLO_Q1_MARK, FMIN_C_MARK, 695077365a9SGeert Uytterhoeven FMIN_E_MARK, FMIN_F_MARK, 696077365a9SGeert Uytterhoeven MLB_CLK_MARK, IIC2_SCL_B_MARK, I2C2_SCL_B_MARK, 697077365a9SGeert Uytterhoeven MLB_SIG_MARK, SCIFB1_RXD_D_MARK, RX1_C_MARK, IIC2_SDA_B_MARK, 698077365a9SGeert Uytterhoeven I2C2_SDA_B_MARK, MLB_DAT_MARK, 699077365a9SGeert Uytterhoeven SCIFB1_TXD_D_MARK, TX1_C_MARK, BPFCLK_C_MARK, 700077365a9SGeert Uytterhoeven SSI_SCK0129_MARK, CAN_CLK_B_MARK, 701077365a9SGeert Uytterhoeven MOUT0_MARK, 702077365a9SGeert Uytterhoeven 703077365a9SGeert Uytterhoeven SSI_WS0129_MARK, CAN0_TX_B_MARK, MOUT1_MARK, 704077365a9SGeert Uytterhoeven SSI_SDATA0_MARK, CAN0_RX_B_MARK, MOUT2_MARK, 705077365a9SGeert Uytterhoeven SSI_SDATA1_MARK, CAN1_TX_B_MARK, MOUT5_MARK, 706077365a9SGeert Uytterhoeven SSI_SDATA2_MARK, CAN1_RX_B_MARK, SSI_SCK1_MARK, MOUT6_MARK, 707077365a9SGeert Uytterhoeven SSI_SCK34_MARK, STP_OPWM_0_MARK, SCIFB0_SCK_MARK, 708077365a9SGeert Uytterhoeven MSIOF1_SCK_MARK, CAN_DEBUG_HW_TRIGGER_MARK, SSI_WS34_MARK, 709077365a9SGeert Uytterhoeven STP_IVCXO27_0_MARK, SCIFB0_RXD_MARK, MSIOF1_SYNC_MARK, 710077365a9SGeert Uytterhoeven CAN_STEP0_MARK, SSI_SDATA3_MARK, STP_ISCLK_0_MARK, 711077365a9SGeert Uytterhoeven SCIFB0_TXD_MARK, MSIOF1_SS1_MARK, CAN_TXCLK_MARK, 712077365a9SGeert Uytterhoeven SSI_SCK4_MARK, STP_ISD_0_MARK, SCIFB0_CTS_N_MARK, 713077365a9SGeert Uytterhoeven MSIOF1_SS2_MARK, SSI_SCK5_C_MARK, CAN_DEBUGOUT0_MARK, 714077365a9SGeert Uytterhoeven SSI_WS4_MARK, STP_ISEN_0_MARK, SCIFB0_RTS_N_MARK, 715077365a9SGeert Uytterhoeven MSIOF1_TXD_MARK, SSI_WS5_C_MARK, CAN_DEBUGOUT1_MARK, 716077365a9SGeert Uytterhoeven SSI_SDATA4_MARK, STP_ISSYNC_0_MARK, MSIOF1_RXD_MARK, 717077365a9SGeert Uytterhoeven CAN_DEBUGOUT2_MARK, SSI_SCK5_MARK, SCIFB1_SCK_MARK, 718077365a9SGeert Uytterhoeven IERX_B_MARK, DU2_EXHSYNC_DU2_HSYNC_MARK, QSTH_QHS_MARK, 719077365a9SGeert Uytterhoeven CAN_DEBUGOUT3_MARK, SSI_WS5_MARK, SCIFB1_RXD_MARK, 720077365a9SGeert Uytterhoeven IECLK_B_MARK, DU2_EXVSYNC_DU2_VSYNC_MARK, QSTB_QHE_MARK, 721077365a9SGeert Uytterhoeven CAN_DEBUGOUT4_MARK, 722077365a9SGeert Uytterhoeven 723077365a9SGeert Uytterhoeven SSI_SDATA5_MARK, SCIFB1_TXD_MARK, IETX_B_MARK, DU2_DR2_MARK, 724077365a9SGeert Uytterhoeven LCDOUT2_MARK, CAN_DEBUGOUT5_MARK, SSI_SCK6_MARK, 725077365a9SGeert Uytterhoeven SCIFB1_CTS_N_MARK, BPFCLK_D_MARK, 726077365a9SGeert Uytterhoeven DU2_DR3_MARK, LCDOUT3_MARK, CAN_DEBUGOUT6_MARK, 727077365a9SGeert Uytterhoeven BPFCLK_F_MARK, SSI_WS6_MARK, 728077365a9SGeert Uytterhoeven SCIFB1_RTS_N_MARK, CAN0_TX_D_MARK, DU2_DR4_MARK, 729077365a9SGeert Uytterhoeven LCDOUT4_MARK, CAN_DEBUGOUT7_MARK, SSI_SDATA6_MARK, 730077365a9SGeert Uytterhoeven FMIN_D_MARK, DU2_DR5_MARK, LCDOUT5_MARK, 731077365a9SGeert Uytterhoeven CAN_DEBUGOUT8_MARK, SSI_SCK78_MARK, STP_IVCXO27_1_MARK, 732077365a9SGeert Uytterhoeven SCK1_MARK, SCIFA1_SCK_MARK, DU2_DR6_MARK, LCDOUT6_MARK, 733077365a9SGeert Uytterhoeven CAN_DEBUGOUT9_MARK, SSI_WS78_MARK, STP_ISCLK_1_MARK, 734077365a9SGeert Uytterhoeven SCIFB2_SCK_MARK, SCIFA2_CTS_N_MARK, DU2_DR7_MARK, 735077365a9SGeert Uytterhoeven LCDOUT7_MARK, CAN_DEBUGOUT10_MARK, SSI_SDATA7_MARK, 736077365a9SGeert Uytterhoeven STP_ISD_1_MARK, SCIFB2_RXD_MARK, SCIFA2_RTS_N_MARK, 737077365a9SGeert Uytterhoeven TCLK2_MARK, QSTVA_QVS_MARK, CAN_DEBUGOUT11_MARK, 738077365a9SGeert Uytterhoeven BPFCLK_E_MARK, SSI_SDATA7_B_MARK, 739077365a9SGeert Uytterhoeven FMIN_G_MARK, SSI_SDATA8_MARK, 740077365a9SGeert Uytterhoeven STP_ISEN_1_MARK, SCIFB2_TXD_MARK, CAN0_TX_C_MARK, 741077365a9SGeert Uytterhoeven CAN_DEBUGOUT12_MARK, SSI_SDATA8_B_MARK, SSI_SDATA9_MARK, 742077365a9SGeert Uytterhoeven STP_ISSYNC_1_MARK, SCIFB2_CTS_N_MARK, SSI_WS1_MARK, 743077365a9SGeert Uytterhoeven SSI_SDATA5_C_MARK, CAN_DEBUGOUT13_MARK, AUDIO_CLKA_MARK, 744077365a9SGeert Uytterhoeven SCIFB2_RTS_N_MARK, CAN_DEBUGOUT14_MARK, 745077365a9SGeert Uytterhoeven 746077365a9SGeert Uytterhoeven AUDIO_CLKB_MARK, SCIF_CLK_MARK, CAN0_RX_D_MARK, 747077365a9SGeert Uytterhoeven DVC_MUTE_MARK, CAN0_RX_C_MARK, CAN_DEBUGOUT15_MARK, 748077365a9SGeert Uytterhoeven REMOCON_MARK, SCIFA0_SCK_MARK, HSCK1_MARK, SCK0_MARK, 749077365a9SGeert Uytterhoeven MSIOF3_SS2_MARK, DU2_DG2_MARK, LCDOUT10_MARK, IIC1_SDA_C_MARK, 750077365a9SGeert Uytterhoeven I2C1_SDA_C_MARK, SCIFA0_RXD_MARK, HRX1_MARK, RX0_MARK, 751077365a9SGeert Uytterhoeven DU2_DR0_MARK, LCDOUT0_MARK, SCIFA0_TXD_MARK, HTX1_MARK, 752077365a9SGeert Uytterhoeven TX0_MARK, DU2_DR1_MARK, LCDOUT1_MARK, SCIFA0_CTS_N_MARK, 753077365a9SGeert Uytterhoeven HCTS1_N_MARK, CTS0_N_MARK, MSIOF3_SYNC_MARK, DU2_DG3_MARK, 754077365a9SGeert Uytterhoeven LCDOUT11_MARK, PWM0_B_MARK, IIC1_SCL_C_MARK, I2C1_SCL_C_MARK, 755077365a9SGeert Uytterhoeven SCIFA0_RTS_N_MARK, HRTS1_N_MARK, RTS0_N_MARK, 756077365a9SGeert Uytterhoeven MSIOF3_SS1_MARK, DU2_DG0_MARK, LCDOUT8_MARK, PWM1_B_MARK, 757077365a9SGeert Uytterhoeven SCIFA1_RXD_MARK, AD_DI_MARK, RX1_MARK, 758077365a9SGeert Uytterhoeven DU2_EXODDF_DU2_ODDF_DISP_CDE_MARK, QCPV_QDE_MARK, 759077365a9SGeert Uytterhoeven SCIFA1_TXD_MARK, AD_DO_MARK, TX1_MARK, DU2_DG1_MARK, 760077365a9SGeert Uytterhoeven LCDOUT9_MARK, SCIFA1_CTS_N_MARK, AD_CLK_MARK, 761077365a9SGeert Uytterhoeven CTS1_N_MARK, MSIOF3_RXD_MARK, DU0_DOTCLKOUT_MARK, QCLK_MARK, 762077365a9SGeert Uytterhoeven SCIFA1_RTS_N_MARK, AD_NCS_N_MARK, RTS1_N_MARK, 763077365a9SGeert Uytterhoeven MSIOF3_TXD_MARK, DU1_DOTCLKOUT_MARK, QSTVB_QVE_MARK, 764077365a9SGeert Uytterhoeven HRTS0_N_C_MARK, 765077365a9SGeert Uytterhoeven 766077365a9SGeert Uytterhoeven SCIFA2_SCK_MARK, FMCLK_MARK, SCK2_MARK, MSIOF3_SCK_MARK, DU2_DG7_MARK, 767077365a9SGeert Uytterhoeven LCDOUT15_MARK, SCIF_CLK_B_MARK, SCIFA2_RXD_MARK, FMIN_MARK, 768077365a9SGeert Uytterhoeven TX2_MARK, DU2_DB0_MARK, LCDOUT16_MARK, IIC2_SCL_MARK, I2C2_SCL_MARK, 769077365a9SGeert Uytterhoeven SCIFA2_TXD_MARK, BPFCLK_MARK, RX2_MARK, DU2_DB1_MARK, LCDOUT17_MARK, 770077365a9SGeert Uytterhoeven IIC2_SDA_MARK, I2C2_SDA_MARK, HSCK0_MARK, TS_SDEN0_MARK, 771077365a9SGeert Uytterhoeven DU2_DG4_MARK, LCDOUT12_MARK, HCTS0_N_C_MARK, HRX0_MARK, 772077365a9SGeert Uytterhoeven DU2_DB2_MARK, LCDOUT18_MARK, HTX0_MARK, DU2_DB3_MARK, 773077365a9SGeert Uytterhoeven LCDOUT19_MARK, HCTS0_N_MARK, SSI_SCK9_MARK, DU2_DB4_MARK, 774077365a9SGeert Uytterhoeven LCDOUT20_MARK, HRTS0_N_MARK, SSI_WS9_MARK, DU2_DB5_MARK, 775077365a9SGeert Uytterhoeven LCDOUT21_MARK, MSIOF0_SCK_MARK, TS_SDAT0_MARK, ADICLK_MARK, 776077365a9SGeert Uytterhoeven DU2_DB6_MARK, LCDOUT22_MARK, MSIOF0_SYNC_MARK, TS_SCK0_MARK, 777077365a9SGeert Uytterhoeven SSI_SCK2_MARK, ADIDATA_MARK, DU2_DB7_MARK, LCDOUT23_MARK, 778077365a9SGeert Uytterhoeven HRX0_C_MARK, MSIOF0_SS1_MARK, ADICHS0_MARK, 779077365a9SGeert Uytterhoeven DU2_DG5_MARK, LCDOUT13_MARK, MSIOF0_TXD_MARK, ADICHS1_MARK, 780077365a9SGeert Uytterhoeven DU2_DG6_MARK, LCDOUT14_MARK, 781077365a9SGeert Uytterhoeven 782077365a9SGeert Uytterhoeven MSIOF0_SS2_MARK, AUDIO_CLKOUT_MARK, ADICHS2_MARK, 783077365a9SGeert Uytterhoeven DU2_DISP_MARK, QPOLA_MARK, HTX0_C_MARK, SCIFA2_TXD_B_MARK, 784077365a9SGeert Uytterhoeven MSIOF0_RXD_MARK, TS_SPSYNC0_MARK, SSI_WS2_MARK, 785077365a9SGeert Uytterhoeven ADICS_SAMP_MARK, DU2_CDE_MARK, QPOLB_MARK, SCIFA2_RXD_B_MARK, 786077365a9SGeert Uytterhoeven USB1_PWEN_MARK, AUDIO_CLKOUT_D_MARK, USB1_OVC_MARK, 787077365a9SGeert Uytterhoeven TCLK1_B_MARK, 788077365a9SGeert Uytterhoeven 789077365a9SGeert Uytterhoeven IIC0_SCL_MARK, IIC0_SDA_MARK, I2C0_SCL_MARK, I2C0_SDA_MARK, 790077365a9SGeert Uytterhoeven IIC3_SCL_MARK, IIC3_SDA_MARK, I2C3_SCL_MARK, I2C3_SDA_MARK, 791077365a9SGeert Uytterhoeven PINMUX_MARK_END, 792077365a9SGeert Uytterhoeven }; 793077365a9SGeert Uytterhoeven 794077365a9SGeert Uytterhoeven static const u16 pinmux_data[] = { 795077365a9SGeert Uytterhoeven PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */ 796077365a9SGeert Uytterhoeven 797077365a9SGeert Uytterhoeven PINMUX_SINGLE(VI1_DATA7_VI1_B7), 798077365a9SGeert Uytterhoeven PINMUX_SINGLE(USB0_PWEN), 799077365a9SGeert Uytterhoeven PINMUX_SINGLE(USB0_OVC_VBUS), 800077365a9SGeert Uytterhoeven PINMUX_SINGLE(USB2_PWEN), 801077365a9SGeert Uytterhoeven PINMUX_SINGLE(USB2_OVC), 802077365a9SGeert Uytterhoeven PINMUX_SINGLE(AVS1), 803077365a9SGeert Uytterhoeven PINMUX_SINGLE(AVS2), 804077365a9SGeert Uytterhoeven PINMUX_SINGLE(DU_DOTCLKIN0), 805077365a9SGeert Uytterhoeven PINMUX_SINGLE(DU_DOTCLKIN2), 806077365a9SGeert Uytterhoeven 807077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_2_0, D0), 808077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_2_0, MSIOF3_SCK_B, SEL_SOF3_1), 809077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_2_0, VI3_DATA0, SEL_VI3_0), 810077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_2_0, VI0_G4, SEL_VI0_0), 811077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_2_0, VI0_G4_B, SEL_VI0_1), 812077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_5_3, D1), 813077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_5_3, MSIOF3_SYNC_B, SEL_SOF3_1), 814077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_5_3, VI3_DATA1, SEL_VI3_0), 815077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_5_3, VI0_G5, SEL_VI0_0), 816077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_5_3, VI0_G5_B, SEL_VI0_1), 817077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_8_6, D2), 818077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_8_6, MSIOF3_RXD_B, SEL_SOF3_1), 819077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_8_6, VI3_DATA2, SEL_VI3_0), 820077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_8_6, VI0_G6, SEL_VI0_0), 821077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_8_6, VI0_G6_B, SEL_VI0_1), 822077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_11_9, D3), 823077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_11_9, MSIOF3_TXD_B, SEL_SOF3_1), 824077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_11_9, VI3_DATA3, SEL_VI3_0), 825077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_11_9, VI0_G7, SEL_VI0_0), 826077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_11_9, VI0_G7_B, SEL_VI0_1), 827077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_15_12, D4), 828077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_15_12, SCIFB1_RXD_F, SEL_SCIFB1_5), 829077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_15_12, SCIFB0_RXD_C, SEL_SCIFB_2), 830077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_15_12, VI3_DATA4, SEL_VI3_0), 831077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_15_12, VI0_R0, SEL_VI0_0), 832077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_15_12, VI0_R0_B, SEL_VI0_1), 833077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_15_12, RX0_B, SEL_SCIF0_1), 834077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_19_16, D5), 835077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_19_16, SCIFB1_TXD_F, SEL_SCIFB1_5), 836077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_19_16, SCIFB0_TXD_C, SEL_SCIFB_2), 837077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_19_16, VI3_DATA5, SEL_VI3_0), 838077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_19_16, VI0_R1, SEL_VI0_0), 839077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_19_16, VI0_R1_B, SEL_VI0_1), 840077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_19_16, TX0_B, SEL_SCIF0_1), 841077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_22_20, D6), 842077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_22_20, IIC2_SCL_C, SEL_IIC2_2), 843077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_22_20, VI3_DATA6, SEL_VI3_0), 844077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_22_20, VI0_R2, SEL_VI0_0), 845077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_22_20, VI0_R2_B, SEL_VI0_1), 846077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_22_20, I2C2_SCL_C, SEL_I2C2_2), 847077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_26_23, D7), 848077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_26_23, AD_DI_B, SEL_ADI_1), 849077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_26_23, IIC2_SDA_C, SEL_IIC2_2), 850077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_26_23, VI3_DATA7, SEL_VI3_0), 851077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_26_23, VI0_R3, SEL_VI0_0), 852077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_26_23, VI0_R3_B, SEL_VI0_1), 853077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_26_23, I2C2_SDA_C, SEL_I2C2_2), 854077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_26_23, TCLK1, SEL_TMU1_0), 855077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_30_27, D8), 856077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_30_27, SCIFA1_SCK_C, SEL_SCIFA1_2), 857077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP0_30_27, AVB_TXD0), 858077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_30_27, VI0_G0, SEL_VI0_0), 859077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_30_27, VI0_G0_B, SEL_VI0_1), 860077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP0_30_27, VI2_DATA0_VI2_B0, SEL_VI2_0), 861077365a9SGeert Uytterhoeven 862077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_3_0, D9), 863077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_3_0, SCIFA1_RXD_C, SEL_SCIFA1_2), 864077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_3_0, AVB_TXD1), 865077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_3_0, VI0_G1, SEL_VI0_0), 866077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_3_0, VI0_G1_B, SEL_VI0_1), 867077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_3_0, VI2_DATA1_VI2_B1, SEL_VI2_0), 868077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_7_4, D10), 869077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_7_4, SCIFA1_TXD_C, SEL_SCIFA1_2), 870077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_7_4, AVB_TXD2), 871077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_7_4, VI0_G2, SEL_VI0_0), 872077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_7_4, VI0_G2_B, SEL_VI0_1), 873077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_7_4, VI2_DATA2_VI2_B2, SEL_VI2_0), 874077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_11_8, D11), 875077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_11_8, SCIFA1_CTS_N_C, SEL_SCIFA1_2), 876077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_11_8, AVB_TXD3), 877077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_11_8, VI0_G3, SEL_VI0_0), 878077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_11_8, VI0_G3_B, SEL_VI0_1), 879077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_11_8, VI2_DATA3_VI2_B3, SEL_VI2_0), 880077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_14_12, D12), 881077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_14_12, SCIFA1_RTS_N_C, SEL_SCIFA1_2), 882077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_14_12, AVB_TXD4), 883077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_14_12, VI0_HSYNC_N, SEL_VI0_0), 884077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_14_12, VI0_HSYNC_N_B, SEL_VI0_1), 885077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_14_12, VI2_DATA4_VI2_B4, SEL_VI2_0), 886077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_17_15, D13), 887077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_17_15, AVB_TXD5), 888077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_17_15, VI0_VSYNC_N, SEL_VI0_0), 889077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_17_15, VI0_VSYNC_N_B, SEL_VI0_1), 890077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_17_15, VI2_DATA5_VI2_B5, SEL_VI2_0), 891077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_21_18, D14), 892077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_21_18, SCIFB1_RXD_C, SEL_SCIFB1_2), 893077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_21_18, AVB_TXD6), 894077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_21_18, RX1_B, SEL_SCIF1_1), 895077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_21_18, VI0_CLKENB, SEL_VI0_0), 896077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_21_18, VI0_CLKENB_B, SEL_VI0_1), 897077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_21_18, VI2_DATA6_VI2_B6, SEL_VI2_0), 898077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_25_22, D15), 899077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_25_22, SCIFB1_TXD_C, SEL_SCIFB1_2), 900077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_25_22, AVB_TXD7), 901077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_25_22, TX1_B, SEL_SCIF1_1), 902077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_25_22, VI0_FIELD, SEL_VI0_0), 903077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_25_22, VI0_FIELD_B, SEL_VI0_1), 904077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP1_25_22, VI2_DATA7_VI2_B7, SEL_VI2_0), 905077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_27_26, A0), 906077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_27_26, PWM3), 907077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_29_28, A1), 908077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP1_29_28, PWM4), 909077365a9SGeert Uytterhoeven 910077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_2_0, A2), 911077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_2_0, PWM5), 912077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_2_0, MSIOF1_SS1_B, SEL_SOF1_1), 913077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_5_3, A3), 914077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_5_3, PWM6), 915077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_5_3, MSIOF1_SS2_B, SEL_SOF1_1), 916077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_8_6, A4), 917077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_8_6, MSIOF1_TXD_B, SEL_SOF1_1), 918077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_8_6, TPU0TO0), 919077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_11_9, A5), 920077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_11_9, SCIFA1_TXD_B, SEL_SCIFA1_1), 921077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_11_9, TPU0TO1), 922077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_14_12, A6), 923077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_14_12, SCIFA1_RTS_N_B, SEL_SCIFA1_1), 924077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_14_12, TPU0TO2), 925077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_17_15, A7), 926077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_17_15, SCIFA1_SCK_B, SEL_SCIFA1_1), 927077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_17_15, AUDIO_CLKOUT_B), 928077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_17_15, TPU0TO3), 929077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_21_18, A8), 930077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_21_18, SCIFA1_RXD_B, SEL_SCIFA1_1), 931077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_21_18, SSI_SCK5_B, SEL_SSI5_1), 932077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_21_18, VI0_R4, SEL_VI0_0), 933077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_21_18, VI0_R4_B, SEL_VI0_1), 934077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_21_18, SCIFB2_RXD_C, SEL_SCIFB2_2), 935077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_21_18, RX2_B, SEL_SCIF2_1), 936077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_21_18, VI2_DATA0_VI2_B0_B, SEL_VI2_1), 937077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_25_22, A9), 938077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_25_22, SCIFA1_CTS_N_B, SEL_SCIFA1_1), 939077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_25_22, SSI_WS5_B, SEL_SSI5_1), 940077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_25_22, VI0_R5, SEL_VI0_0), 941077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_25_22, VI0_R5_B, SEL_VI0_1), 942077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_25_22, SCIFB2_TXD_C, SEL_SCIFB2_2), 943077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_25_22, TX2_B, SEL_SCIF2_1), 944077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_25_22, VI2_DATA1_VI2_B1_B, SEL_VI2_1), 945077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_28_26, A10), 946077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_28_26, SSI_SDATA5_B, SEL_SSI5_1), 947077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP2_28_26, MSIOF2_SYNC), 948077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_28_26, VI0_R6, SEL_VI0_0), 949077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_28_26, VI0_R6_B, SEL_VI0_1), 950077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP2_28_26, VI2_DATA2_VI2_B2_B, SEL_VI2_1), 951077365a9SGeert Uytterhoeven 952077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_3_0, A11), 953077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_3_0, SCIFB2_CTS_N_B, SEL_SCIFB2_1), 954077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_3_0, MSIOF2_SCK), 955077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_3_0, VI1_R0, SEL_VI1_0), 956077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_3_0, VI1_R0_B, SEL_VI1_1), 957077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_3_0, VI2_G0), 958077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_3_0, VI2_DATA3_VI2_B3_B, SEL_VI2_1), 959077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_7_4, A12), 960077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_7_4, SCIFB2_RXD_B, SEL_SCIFB2_1), 961077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_7_4, MSIOF2_TXD), 962077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_7_4, VI1_R1, SEL_VI1_0), 963077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_7_4, VI1_R1_B, SEL_VI1_1), 964077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_7_4, VI2_G1), 965077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_7_4, VI2_DATA4_VI2_B4_B, SEL_VI2_1), 966077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_11_8, A13), 967077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_11_8, SCIFB2_RTS_N_B, SEL_SCIFB2_1), 968077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_11_8, EX_WAIT2), 969077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_11_8, MSIOF2_RXD), 970077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_11_8, VI1_R2, SEL_VI1_0), 971077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_11_8, VI1_R2_B, SEL_VI1_1), 972077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_11_8, VI2_G2), 973077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_11_8, VI2_DATA5_VI2_B5_B, SEL_VI2_1), 974077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_14_12, A14), 975077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_14_12, SCIFB2_TXD_B, SEL_SCIFB2_1), 976077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_14_12, ATACS11_N), 977077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_14_12, MSIOF2_SS1), 978077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_17_15, A15), 979077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_17_15, SCIFB2_SCK_B, SEL_SCIFB2_1), 980077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_17_15, ATARD1_N), 981077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_17_15, MSIOF2_SS2), 982077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_19_18, A16), 983077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_19_18, ATAWR1_N), 984077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_22_20, A17), 985077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_22_20, AD_DO_B, SEL_ADI_1), 986077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_22_20, ATADIR1_N), 987077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_25_23, A18), 988077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_25_23, AD_CLK_B, SEL_ADI_1), 989077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_25_23, ATAG1_N), 990077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_28_26, A19), 991077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_28_26, AD_NCS_N_B, SEL_ADI_1), 992077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_28_26, ATACS01_N), 993077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_28_26, EX_WAIT0_B, SEL_LBS_1), 994077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_31_29, A20), 995077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_31_29, SPCLK), 996077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_31_29, VI1_R3, SEL_VI1_0), 997077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP3_31_29, VI1_R3_B, SEL_VI1_1), 998077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP3_31_29, VI2_G4), 999077365a9SGeert Uytterhoeven 1000077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_2_0, A21), 1001077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_2_0, MOSI_IO0), 1002077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_2_0, VI1_R4, SEL_VI1_0), 1003077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_2_0, VI1_R4_B, SEL_VI1_1), 1004077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_2_0, VI2_G5), 1005077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_5_3, A22), 1006077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_5_3, MISO_IO1), 1007077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_5_3, VI1_R5, SEL_VI1_0), 1008077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_5_3, VI1_R5_B, SEL_VI1_1), 1009077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_5_3, VI2_G6), 1010077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_8_6, A23), 1011077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_8_6, IO2), 1012077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_8_6, VI1_G7, SEL_VI1_0), 1013077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_8_6, VI1_G7_B, SEL_VI1_1), 1014077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_8_6, VI2_G7), 1015077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_11_9, A24), 1016077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_11_9, IO3), 1017077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_11_9, VI1_R7, SEL_VI1_0), 1018077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_11_9, VI1_R7_B, SEL_VI1_1), 1019077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_11_9, VI2_CLKENB, SEL_VI2_0), 1020077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_11_9, VI2_CLKENB_B, SEL_VI2_1), 1021077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_14_12, A25), 1022077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_14_12, SSL), 1023077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_14_12, VI1_G6, SEL_VI1_0), 1024077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_14_12, VI1_G6_B, SEL_VI1_1), 1025077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_14_12, VI2_FIELD, SEL_VI2_0), 1026077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_14_12, VI2_FIELD_B, SEL_VI2_1), 1027077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_17_15, CS0_N), 1028077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_17_15, VI1_R6, SEL_VI1_0), 1029077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_17_15, VI1_R6_B, SEL_VI1_1), 1030077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_17_15, VI2_G3), 1031077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_17_15, MSIOF0_SS2_B, SEL_SOF0_1), 1032077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_20_18, CS1_N_A26), 1033077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_20_18, SPEEDIN), 1034077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_20_18, VI0_R7, SEL_VI0_0), 1035077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_20_18, VI0_R7_B, SEL_VI0_1), 1036077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_20_18, VI2_CLK, SEL_VI2_0), 1037077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_20_18, VI2_CLK_B, SEL_VI2_1), 1038077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_23_21, EX_CS0_N), 1039077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_23_21, HRX1_B, SEL_HSCIF1_1), 1040077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_23_21, VI1_G5, SEL_VI1_0), 1041077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_23_21, VI1_G5_B, SEL_VI1_1), 1042077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_23_21, VI2_R0), 1043077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_23_21, HTX0_B, SEL_HSCIF0_1), 1044077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_23_21, MSIOF0_SS1_B, SEL_SOF0_1), 1045077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_26_24, EX_CS1_N), 1046077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_26_24, GPS_CLK), 1047077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_26_24, HCTS1_N_B, SEL_HSCIF1_1), 1048077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_26_24, VI1_FIELD, SEL_VI1_0), 1049077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_26_24, VI1_FIELD_B, SEL_VI1_1), 1050077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_26_24, VI2_R1), 1051077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_29_27, EX_CS2_N), 1052077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_29_27, GPS_SIGN), 1053077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_29_27, HRTS1_N_B, SEL_HSCIF1_1), 1054077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_29_27, VI3_CLKENB), 1055077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_29_27, VI1_G0, SEL_VI1_0), 1056077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP4_29_27, VI1_G0_B, SEL_VI1_1), 1057077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP4_29_27, VI2_R2), 1058077365a9SGeert Uytterhoeven 1059077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_2_0, EX_CS3_N), 1060077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_2_0, GPS_MAG), 1061077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_2_0, VI3_FIELD), 1062077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_2_0, VI1_G1, SEL_VI1_0), 1063077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_2_0, VI1_G1_B, SEL_VI1_1), 1064077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_2_0, VI2_R3), 1065077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_5_3, EX_CS4_N), 1066077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_5_3, MSIOF1_SCK_B, SEL_SOF1_1), 1067077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_5_3, VI3_HSYNC_N), 1068077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_5_3, VI2_HSYNC_N, SEL_VI2_0), 1069077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_5_3, IIC1_SCL, SEL_IIC1_0), 1070077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_5_3, VI2_HSYNC_N_B, SEL_VI2_1), 1071077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_5_3, INTC_EN0_N), 1072077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_5_3, I2C1_SCL, SEL_I2C1_0), 1073077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_9_6, EX_CS5_N), 1074077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_9_6, CAN0_RX, SEL_CAN0_0), 1075077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_9_6, MSIOF1_RXD_B, SEL_SOF1_1), 1076077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_9_6, VI3_VSYNC_N), 1077077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_9_6, VI1_G2, SEL_VI1_0), 1078077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_9_6, VI1_G2_B, SEL_VI1_1), 1079077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_9_6, VI2_R4), 1080077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_9_6, IIC1_SDA, SEL_IIC1_0), 1081077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_9_6, INTC_EN1_N), 1082077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_9_6, I2C1_SDA, SEL_I2C1_0), 1083077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_12_10, BS_N), 1084077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_12_10, IETX, SEL_IEB_0), 1085077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_12_10, HTX1_B, SEL_HSCIF1_1), 1086077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_12_10, CAN1_TX, SEL_CAN1_0), 1087077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_12_10, DRACK0), 1088077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_12_10, IETX_C, SEL_IEB_2), 1089077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_14_13, RD_N), 1090077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_14_13, CAN0_TX, SEL_CAN0_0), 1091077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_14_13, SCIFA0_SCK_B, SEL_SCFA_1), 1092077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_17_15, RD_WR_N), 1093077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_17_15, VI1_G3, SEL_VI1_0), 1094077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_17_15, VI1_G3_B, SEL_VI1_1), 1095077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_17_15, VI2_R5), 1096077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_17_15, SCIFA0_RXD_B, SEL_SCFA_1), 1097077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_20_18, WE0_N), 1098077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_20_18, IECLK, SEL_IEB_0), 1099077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_20_18, CAN_CLK, SEL_CANCLK_0), 1100077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_20_18, VI2_VSYNC_N, SEL_VI2_0), 1101077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_20_18, SCIFA0_TXD_B, SEL_SCFA_1), 1102077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_20_18, VI2_VSYNC_N_B, SEL_VI2_1), 1103077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_23_21, WE1_N), 1104077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_23_21, IERX, SEL_IEB_0), 1105077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_23_21, CAN1_RX, SEL_CAN1_0), 1106077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_23_21, VI1_G4, SEL_VI1_0), 1107077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_23_21, VI1_G4_B, SEL_VI1_1), 1108077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_23_21, VI2_R6), 1109077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_23_21, SCIFA0_CTS_N_B, SEL_SCFA_1), 1110077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_23_21, IERX_C, SEL_IEB_2), 1111077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_26_24, EX_WAIT0, SEL_LBS_0), 1112077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_26_24, IRQ3), 1113077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_26_24, VI3_CLK, SEL_VI3_0), 1114077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_26_24, SCIFA0_RTS_N_B, SEL_SCFA_1), 1115077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_26_24, HRX0_B, SEL_HSCIF0_1), 1116077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_26_24, MSIOF0_SCK_B, SEL_SOF0_1), 1117077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_29_27, DREQ0_N), 1118077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_29_27, VI1_HSYNC_N, SEL_VI1_0), 1119077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_29_27, VI1_HSYNC_N_B, SEL_VI1_1), 1120077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP5_29_27, VI2_R7), 1121077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_29_27, SSI_SCK78_C, SEL_SSI7_2), 1122077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP5_29_27, SSI_WS78_B, SEL_SSI7_1), 1123077365a9SGeert Uytterhoeven 1124077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_2_0, DACK0), 1125077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_2_0, IRQ0), 1126077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_2_0, SSI_SCK6_B, SEL_SSI6_1), 1127077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_2_0, VI1_VSYNC_N, SEL_VI1_0), 1128077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_2_0, VI1_VSYNC_N_B, SEL_VI1_1), 1129077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_2_0, SSI_WS78_C, SEL_SSI7_2), 1130077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_5_3, DREQ1_N), 1131077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_5_3, VI1_CLKENB, SEL_VI1_0), 1132077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_5_3, VI1_CLKENB_B, SEL_VI1_1), 1133077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_5_3, SSI_SDATA7_C, SEL_SSI7_2), 1134077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_5_3, SSI_SCK78_B, SEL_SSI7_1), 1135077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_8_6, DACK1), 1136077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_8_6, IRQ1), 1137077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_8_6, SSI_WS6_B, SEL_SSI6_1), 1138077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_8_6, SSI_SDATA8_C, SEL_SSI8_2), 1139077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_10_9, DREQ2_N), 1140077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_10_9, HSCK1_B, SEL_HSCIF1_1), 1141077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_10_9, HCTS0_N_B, SEL_HSCIF0_1), 1142077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_10_9, MSIOF0_TXD_B, SEL_SOF0_1), 1143077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_13_11, DACK2), 1144077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_13_11, IRQ2), 1145077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_13_11, SSI_SDATA6_B, SEL_SSI6_1), 1146077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_13_11, HRTS0_N_B, SEL_HSCIF0_1), 1147077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_13_11, MSIOF0_RXD_B, SEL_SOF0_1), 1148077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_16_14, ETH_CRS_DV), 1149077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_16_14, STP_ISCLK_0_B, SEL_SSP_1), 1150077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_16_14, TS_SDEN0_D, SEL_TSIF0_3), 1151077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_16_14, GLO_Q0_C, SEL_GPS_2), 1152077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_16_14, IIC2_SCL_E, SEL_IIC2_4), 1153077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_16_14, I2C2_SCL_E, SEL_I2C2_4), 1154077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_19_17, ETH_RX_ER), 1155077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_19_17, STP_ISD_0_B, SEL_SSP_1), 1156077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_19_17, TS_SPSYNC0_D, SEL_TSIF0_3), 1157077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_19_17, GLO_Q1_C, SEL_GPS_2), 1158077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_19_17, IIC2_SDA_E, SEL_IIC2_4), 1159077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_19_17, I2C2_SDA_E, SEL_I2C2_4), 1160077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_22_20, ETH_RXD0), 1161077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_22_20, STP_ISEN_0_B, SEL_SSP_1), 1162077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_22_20, TS_SDAT0_D, SEL_TSIF0_3), 1163077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_22_20, GLO_I0_C, SEL_GPS_2), 1164077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_22_20, SCIFB1_SCK_G, SEL_SCIFB1_6), 1165077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_22_20, SCK1_E, SEL_SCIF1_4), 1166077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_25_23, ETH_RXD1), 1167077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_25_23, HRX0_E, SEL_HSCIF0_4), 1168077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_25_23, STP_ISSYNC_0_B, SEL_SSP_1), 1169077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_25_23, TS_SCK0_D, SEL_TSIF0_3), 1170077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_25_23, GLO_I1_C, SEL_GPS_2), 1171077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_25_23, SCIFB1_RXD_G, SEL_SCIFB1_6), 1172077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_25_23, RX1_E, SEL_SCIF1_4), 1173077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_28_26, ETH_LINK), 1174077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_28_26, HTX0_E, SEL_HSCIF0_4), 1175077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_28_26, STP_IVCXO27_0_B, SEL_SSP_1), 1176077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_28_26, SCIFB1_TXD_G, SEL_SCIFB1_6), 1177077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_28_26, TX1_E, SEL_SCIF1_4), 1178077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP6_31_29, ETH_REF_CLK), 1179077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_31_29, HCTS0_N_E, SEL_HSCIF0_4), 1180077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_31_29, STP_IVCXO27_1_B, SEL_SSP_1), 1181077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP6_31_29, HRX0_F, SEL_HSCIF0_5), 1182077365a9SGeert Uytterhoeven 1183077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_2_0, ETH_MDIO), 1184077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_2_0, HRTS0_N_E, SEL_HSCIF0_4), 1185077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_2_0, SIM0_D_C, SEL_SIM_2), 1186077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_2_0, HCTS0_N_F, SEL_HSCIF0_5), 1187077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_5_3, ETH_TXD1), 1188077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_5_3, HTX0_F, SEL_HSCIF0_5), 1189077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_5_3, BPFCLK_G, SEL_FM_6), 1190077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_7_6, ETH_TX_EN), 1191077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_7_6, SIM0_CLK_C, SEL_SIM_2), 1192077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_7_6, HRTS0_N_F, SEL_HSCIF0_5), 1193077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_9_8, ETH_MAGIC), 1194077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_9_8, SIM0_RST_C, SEL_SIM_2), 1195077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_12_10, ETH_TXD0), 1196077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_12_10, STP_ISCLK_1_B, SEL_SSP_1), 1197077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_12_10, TS_SDEN1_C, SEL_TSIF1_2), 1198077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_12_10, GLO_SCLK_C, SEL_GPS_2), 1199077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_15_13, ETH_MDC), 1200077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_15_13, STP_ISD_1_B, SEL_SSP_1), 1201077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_15_13, TS_SPSYNC1_C, SEL_TSIF1_2), 1202077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_15_13, GLO_SDATA_C, SEL_GPS_2), 1203077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_18_16, PWM0), 1204077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_18_16, SCIFA2_SCK_C, SEL_SCIFA2_2), 1205077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_18_16, STP_ISEN_1_B, SEL_SSP_1), 1206077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_18_16, TS_SDAT1_C, SEL_TSIF1_2), 1207077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_18_16, GLO_SS_C, SEL_GPS_2), 1208077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_21_19, PWM1), 1209077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_21_19, SCIFA2_TXD_C, SEL_SCIFA2_2), 1210077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_21_19, STP_ISSYNC_1_B, SEL_SSP_1), 1211077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_21_19, TS_SCK1_C, SEL_TSIF1_2), 1212077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_21_19, GLO_RFON_C, SEL_GPS_2), 1213077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_21_19, PCMOE_N), 1214077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_24_22, PWM2), 1215077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_24_22, PWMFSW0), 1216077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_24_22, SCIFA2_RXD_C, SEL_SCIFA2_2), 1217077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_24_22, PCMWE_N), 1218077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_24_22, IECLK_C, SEL_IEB_2), 1219077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_26_25, DU_DOTCLKIN1), 1220077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_26_25, AUDIO_CLKC), 1221077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_26_25, AUDIO_CLKOUT_C), 1222077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_28_27, VI0_CLK, SEL_VI0_0), 1223077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_28_27, ATACS00_N), 1224077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_28_27, AVB_RXD1), 1225077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP7_30_29, VI0_DATA0_VI0_B0, SEL_VI0_0), 1226077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_30_29, ATACS10_N), 1227077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP7_30_29, AVB_RXD2), 1228077365a9SGeert Uytterhoeven 1229077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_1_0, VI0_DATA1_VI0_B1, SEL_VI0_0), 1230077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_1_0, ATARD0_N), 1231077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_1_0, AVB_RXD3), 1232077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_3_2, VI0_DATA2_VI0_B2, SEL_VI0_0), 1233077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_3_2, ATAWR0_N), 1234077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_3_2, AVB_RXD4), 1235077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_5_4, VI0_DATA3_VI0_B3, SEL_VI0_0), 1236077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_5_4, ATADIR0_N), 1237077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_5_4, AVB_RXD5), 1238077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_7_6, VI0_DATA4_VI0_B4, SEL_VI0_0), 1239077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_7_6, ATAG0_N), 1240077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_7_6, AVB_RXD6), 1241077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_9_8, VI0_DATA5_VI0_B5, SEL_VI0_0), 1242077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_9_8, EX_WAIT1), 1243077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_9_8, AVB_RXD7), 1244077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_11_10, VI0_DATA6_VI0_B6, SEL_VI0_0), 1245077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_11_10, AVB_RX_ER), 1246077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_13_12, VI0_DATA7_VI0_B7, SEL_VI0_0), 1247077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_13_12, AVB_RX_CLK), 1248077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_15_14, VI1_CLK, SEL_VI1_0), 1249077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_15_14, AVB_RX_DV), 1250077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_17_16, VI1_DATA0_VI1_B0, SEL_VI1_0), 1251077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_17_16, SCIFA1_SCK_D, SEL_SCIFA1_3), 1252077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_17_16, AVB_CRS), 1253077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_19_18, VI1_DATA1_VI1_B1, SEL_VI1_0), 1254077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_19_18, SCIFA1_RXD_D, SEL_SCIFA1_3), 1255077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_19_18, AVB_MDC), 1256077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_21_20, VI1_DATA2_VI1_B2, SEL_VI1_0), 1257077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_21_20, SCIFA1_TXD_D, SEL_SCIFA1_3), 1258077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_21_20, AVB_MDIO), 1259077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_23_22, VI1_DATA3_VI1_B3, SEL_VI1_0), 1260077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_23_22, SCIFA1_CTS_N_D, SEL_SCIFA1_3), 1261077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_23_22, AVB_GTX_CLK), 1262077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_25_24, VI1_DATA4_VI1_B4, SEL_VI1_0), 1263077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_25_24, SCIFA1_RTS_N_D, SEL_SCIFA1_3), 1264077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_25_24, AVB_MAGIC), 1265077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_26, VI1_DATA5_VI1_B5, SEL_VI1_0), 1266077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_26, AVB_PHY_INT), 1267077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_27, VI1_DATA6_VI1_B6, SEL_VI1_0), 1268077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_27, AVB_GTXREFCLK), 1269077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_28, SD0_CLK), 1270077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_28, VI1_DATA0_VI1_B0_B, SEL_VI1_1), 1271077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP8_30_29, SD0_CMD), 1272077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_30_29, SCIFB1_SCK_B, SEL_SCIFB1_1), 1273077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP8_30_29, VI1_DATA1_VI1_B1_B, SEL_VI1_1), 1274077365a9SGeert Uytterhoeven 1275077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_1_0, SD0_DAT0), 1276077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_1_0, SCIFB1_RXD_B, SEL_SCIFB1_1), 1277077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_1_0, VI1_DATA2_VI1_B2_B, SEL_VI1_1), 1278077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_3_2, SD0_DAT1), 1279077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_3_2, SCIFB1_TXD_B, SEL_SCIFB1_1), 1280077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_3_2, VI1_DATA3_VI1_B3_B, SEL_VI1_1), 1281077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_5_4, SD0_DAT2), 1282077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_5_4, SCIFB1_CTS_N_B, SEL_SCIFB1_1), 1283077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_5_4, VI1_DATA4_VI1_B4_B, SEL_VI1_1), 1284077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_7_6, SD0_DAT3), 1285077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_7_6, SCIFB1_RTS_N_B, SEL_SCIFB1_1), 1286077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_7_6, VI1_DATA5_VI1_B5_B, SEL_VI1_1), 1287077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_11_8, SD0_CD), 1288077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_11_8, MMC0_D6), 1289077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_11_8, TS_SDEN0_B, SEL_TSIF0_1), 1290077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_11_8, USB0_EXTP), 1291077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_11_8, GLO_SCLK, SEL_GPS_0), 1292077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_11_8, VI1_DATA6_VI1_B6_B, SEL_VI1_1), 1293077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_11_8, IIC1_SCL_B, SEL_IIC1_1), 1294077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_11_8, I2C1_SCL_B, SEL_I2C1_1), 1295077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_11_8, VI2_DATA6_VI2_B6_B, SEL_VI2_1), 1296077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_15_12, SD0_WP), 1297077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_15_12, MMC0_D7), 1298077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_15_12, TS_SPSYNC0_B, SEL_TSIF0_1), 1299077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_15_12, USB0_IDIN), 1300077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_15_12, GLO_SDATA, SEL_GPS_0), 1301077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_15_12, VI1_DATA7_VI1_B7_B, SEL_VI1_1), 1302077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_15_12, IIC1_SDA_B, SEL_IIC1_1), 1303077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_15_12, I2C1_SDA_B, SEL_I2C1_1), 1304077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_15_12, VI2_DATA7_VI2_B7_B, SEL_VI2_1), 1305077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_17_16, SD1_CLK), 1306077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_17_16, AVB_TX_EN), 1307077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_19_18, SD1_CMD), 1308077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_19_18, AVB_TX_ER), 1309077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_19_18, SCIFB0_SCK_B, SEL_SCIFB_1), 1310077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_21_20, SD1_DAT0), 1311077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_21_20, AVB_TX_CLK), 1312077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_21_20, SCIFB0_RXD_B, SEL_SCIFB_1), 1313077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_23_22, SD1_DAT1), 1314077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_23_22, AVB_LINK), 1315077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_23_22, SCIFB0_TXD_B, SEL_SCIFB_1), 1316077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_25_24, SD1_DAT2), 1317077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_25_24, AVB_COL), 1318077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_25_24, SCIFB0_CTS_N_B, SEL_SCIFB_1), 1319077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_27_26, SD1_DAT3), 1320077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_27_26, AVB_RXD0), 1321077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_27_26, SCIFB0_RTS_N_B, SEL_SCIFB_1), 1322077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_31_28, SD1_CD), 1323077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_31_28, MMC1_D6), 1324077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_31_28, TS_SDEN1, SEL_TSIF1_0), 1325077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP9_31_28, USB1_EXTP), 1326077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_31_28, GLO_SS, SEL_GPS_0), 1327077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_31_28, VI0_CLK_B, SEL_VI0_1), 1328077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_31_28, IIC2_SCL_D, SEL_IIC2_3), 1329077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_31_28, I2C2_SCL_D, SEL_I2C2_3), 1330077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_31_28, SIM0_CLK_B, SEL_SIM_1), 1331077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP9_31_28, VI3_CLK_B, SEL_VI3_1), 1332077365a9SGeert Uytterhoeven 1333077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_3_0, SD1_WP), 1334077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_3_0, MMC1_D7), 1335077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_3_0, TS_SPSYNC1, SEL_TSIF1_0), 1336077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_3_0, USB1_IDIN), 1337077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_3_0, GLO_RFON, SEL_GPS_0), 1338077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_3_0, VI1_CLK_B, SEL_VI1_1), 1339077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_3_0, IIC2_SDA_D, SEL_IIC2_3), 1340077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_3_0, I2C2_SDA_D, SEL_I2C2_3), 1341077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_3_0, SIM0_D_B, SEL_SIM_1), 1342077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_6_4, SD2_CLK), 1343077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_6_4, MMC0_CLK), 1344077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_6_4, SIM0_CLK, SEL_SIM_0), 1345077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_6_4, VI0_DATA0_VI0_B0_B, SEL_VI0_1), 1346077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_6_4, TS_SDEN0_C, SEL_TSIF0_2), 1347077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_6_4, GLO_SCLK_B, SEL_GPS_1), 1348077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_6_4, VI3_DATA0_B, SEL_VI3_1), 1349077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_10_7, SD2_CMD), 1350077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_10_7, MMC0_CMD), 1351077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_10_7, SIM0_D, SEL_SIM_0), 1352077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_10_7, VI0_DATA1_VI0_B1_B, SEL_VI0_1), 1353077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_10_7, SCIFB1_SCK_E, SEL_SCIFB1_4), 1354077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_10_7, SCK1_D, SEL_SCIF1_3), 1355077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_10_7, TS_SPSYNC0_C, SEL_TSIF0_2), 1356077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_10_7, GLO_SDATA_B, SEL_GPS_1), 1357077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_10_7, VI3_DATA1_B, SEL_VI3_1), 1358077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_14_11, SD2_DAT0), 1359077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_14_11, MMC0_D0), 1360077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_14_11, FMCLK_B, SEL_FM_1), 1361077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_14_11, VI0_DATA2_VI0_B2_B, SEL_VI0_1), 1362077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_14_11, SCIFB1_RXD_E, SEL_SCIFB1_4), 1363077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_14_11, RX1_D, SEL_SCIF1_3), 1364077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_14_11, TS_SDAT0_C, SEL_TSIF0_2), 1365077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_14_11, GLO_SS_B, SEL_GPS_1), 1366077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_14_11, VI3_DATA2_B, SEL_VI3_1), 1367077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_18_15, SD2_DAT1), 1368077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_18_15, MMC0_D1), 1369077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_18_15, FMIN_B, SEL_FM_1), 1370077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_18_15, VI0_DATA3_VI0_B3_B, SEL_VI0_1), 1371077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_18_15, SCIFB1_TXD_E, SEL_SCIFB1_4), 1372077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_18_15, TX1_D, SEL_SCIF1_3), 1373077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_18_15, TS_SCK0_C, SEL_TSIF0_2), 1374077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_18_15, GLO_RFON_B, SEL_GPS_1), 1375077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_18_15, VI3_DATA3_B, SEL_VI3_1), 1376077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_22_19, SD2_DAT2), 1377077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_22_19, MMC0_D2), 1378077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_22_19, BPFCLK_B, SEL_FM_1), 1379077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_22_19, VI0_DATA4_VI0_B4_B, SEL_VI0_1), 1380077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_22_19, HRX0_D, SEL_HSCIF0_3), 1381077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_22_19, TS_SDEN1_B, SEL_TSIF1_1), 1382077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_22_19, GLO_Q0_B, SEL_GPS_1), 1383077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_22_19, VI3_DATA4_B, SEL_VI3_1), 1384077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_25_23, SD2_DAT3), 1385077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_25_23, MMC0_D3), 1386077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_25_23, SIM0_RST, SEL_SIM_0), 1387077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_25_23, VI0_DATA5_VI0_B5_B, SEL_VI0_1), 1388077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_25_23, HTX0_D, SEL_HSCIF0_3), 1389077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_25_23, TS_SPSYNC1_B, SEL_TSIF1_1), 1390077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_25_23, GLO_Q1_B, SEL_GPS_1), 1391077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_25_23, VI3_DATA5_B, SEL_VI3_1), 1392077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_29_26, SD2_CD), 1393077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_29_26, MMC0_D4), 1394077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_29_26, TS_SDAT0_B, SEL_TSIF0_1), 1395077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP10_29_26, USB2_EXTP), 1396077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_29_26, GLO_I0, SEL_GPS_0), 1397077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_29_26, VI0_DATA6_VI0_B6_B, SEL_VI0_1), 1398077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_29_26, HCTS0_N_D, SEL_HSCIF0_3), 1399077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_29_26, TS_SDAT1_B, SEL_TSIF1_1), 1400077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_29_26, GLO_I0_B, SEL_GPS_1), 1401077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP10_29_26, VI3_DATA6_B, SEL_VI3_1), 1402077365a9SGeert Uytterhoeven 1403077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_3_0, SD2_WP), 1404077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_3_0, MMC0_D5), 1405077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_3_0, TS_SCK0_B, SEL_TSIF0_1), 1406077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_3_0, USB2_IDIN), 1407077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_3_0, GLO_I1, SEL_GPS_0), 1408077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_3_0, VI0_DATA7_VI0_B7_B, SEL_VI0_1), 1409077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_3_0, HRTS0_N_D, SEL_HSCIF0_3), 1410077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_3_0, TS_SCK1_B, SEL_TSIF1_1), 1411077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_3_0, GLO_I1_B, SEL_GPS_1), 1412077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_3_0, VI3_DATA7_B, SEL_VI3_1), 1413077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_4, SD3_CLK), 1414077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_4, MMC1_CLK), 1415077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_6_5, SD3_CMD), 1416077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_6_5, MMC1_CMD), 1417077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_6_5, MTS_N), 1418077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_8_7, SD3_DAT0), 1419077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_8_7, MMC1_D0), 1420077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_8_7, STM_N), 1421077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_10_9, SD3_DAT1), 1422077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_10_9, MMC1_D1), 1423077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_10_9, MDATA), 1424077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_12_11, SD3_DAT2), 1425077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_12_11, MMC1_D2), 1426077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_12_11, SDATA), 1427077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_14_13, SD3_DAT3), 1428077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_14_13, MMC1_D3), 1429077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_14_13, SCKZ), 1430077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_17_15, SD3_CD), 1431077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_17_15, MMC1_D4), 1432077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_17_15, TS_SDAT1, SEL_TSIF1_0), 1433077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_17_15, VSP), 1434077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_17_15, GLO_Q0, SEL_GPS_0), 1435077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_17_15, SIM0_RST_B, SEL_SIM_1), 1436077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_21_18, SD3_WP), 1437077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_21_18, MMC1_D5), 1438077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_21_18, TS_SCK1, SEL_TSIF1_0), 1439077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_21_18, GLO_Q1, SEL_GPS_0), 1440077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_21_18, FMIN_C, SEL_FM_2), 1441077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_21_18, FMIN_E, SEL_FM_4), 1442077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_21_18, FMIN_F, SEL_FM_5), 1443077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_23_22, MLB_CLK), 1444077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_23_22, IIC2_SCL_B, SEL_IIC2_1), 1445077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_23_22, I2C2_SCL_B, SEL_I2C2_1), 1446077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_26_24, MLB_SIG), 1447077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_26_24, SCIFB1_RXD_D, SEL_SCIFB1_3), 1448077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_26_24, RX1_C, SEL_SCIF1_2), 1449077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_26_24, IIC2_SDA_B, SEL_IIC2_1), 1450077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_26_24, I2C2_SDA_B, SEL_I2C2_1), 1451077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_29_27, MLB_DAT), 1452077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_29_27, SCIFB1_TXD_D, SEL_SCIFB1_3), 1453077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_29_27, TX1_C, SEL_SCIF1_2), 1454077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_29_27, BPFCLK_C, SEL_FM_2), 1455077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_31_30, SSI_SCK0129), 1456077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP11_31_30, CAN_CLK_B, SEL_CANCLK_1), 1457077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP11_31_30, MOUT0), 1458077365a9SGeert Uytterhoeven 1459077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_1_0, SSI_WS0129), 1460077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_1_0, CAN0_TX_B, SEL_CAN0_1), 1461077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_1_0, MOUT1), 1462077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_3_2, SSI_SDATA0), 1463077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_3_2, CAN0_RX_B, SEL_CAN0_1), 1464077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_3_2, MOUT2), 1465077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_5_4, SSI_SDATA1), 1466077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_5_4, CAN1_TX_B, SEL_CAN1_1), 1467077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_5_4, MOUT5), 1468077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_7_6, SSI_SDATA2), 1469077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_7_6, CAN1_RX_B, SEL_CAN1_1), 1470077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_7_6, SSI_SCK1), 1471077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_7_6, MOUT6), 1472077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_10_8, SSI_SCK34), 1473077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_10_8, STP_OPWM_0), 1474077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_10_8, SCIFB0_SCK, SEL_SCIFB_0), 1475077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_10_8, MSIOF1_SCK, SEL_SOF1_0), 1476077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_10_8, CAN_DEBUG_HW_TRIGGER), 1477077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_13_11, SSI_WS34), 1478077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_13_11, STP_IVCXO27_0, SEL_SSP_0), 1479077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_13_11, SCIFB0_RXD, SEL_SCIFB_0), 1480077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_13_11, MSIOF1_SYNC), 1481077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_13_11, CAN_STEP0), 1482077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_16_14, SSI_SDATA3), 1483077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_16_14, STP_ISCLK_0, SEL_SSP_0), 1484077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_16_14, SCIFB0_TXD, SEL_SCIFB_0), 1485077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_16_14, MSIOF1_SS1, SEL_SOF1_0), 1486077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_16_14, CAN_TXCLK), 1487077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_19_17, SSI_SCK4), 1488077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_19_17, STP_ISD_0, SEL_SSP_0), 1489077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_19_17, SCIFB0_CTS_N, SEL_SCIFB_0), 1490077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_19_17, MSIOF1_SS2, SEL_SOF1_0), 1491077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_19_17, SSI_SCK5_C, SEL_SSI5_2), 1492077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_19_17, CAN_DEBUGOUT0), 1493077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_22_20, SSI_WS4), 1494077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_22_20, STP_ISEN_0, SEL_SSP_0), 1495077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_22_20, SCIFB0_RTS_N, SEL_SCIFB_0), 1496077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_22_20, MSIOF1_TXD, SEL_SOF1_0), 1497077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_22_20, SSI_WS5_C, SEL_SSI5_2), 1498077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_22_20, CAN_DEBUGOUT1), 1499077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_24_23, SSI_SDATA4), 1500077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_24_23, STP_ISSYNC_0, SEL_SSP_0), 1501077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_24_23, MSIOF1_RXD, SEL_SOF1_0), 1502077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_24_23, CAN_DEBUGOUT2), 1503077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_27_25, SSI_SCK5, SEL_SSI5_0), 1504077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_27_25, SCIFB1_SCK, SEL_SCIFB1_0), 1505077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_27_25, IERX_B, SEL_IEB_1), 1506077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_27_25, DU2_EXHSYNC_DU2_HSYNC), 1507077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_27_25, QSTH_QHS), 1508077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_27_25, CAN_DEBUGOUT3), 1509077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_30_28, SSI_WS5, SEL_SSI5_0), 1510077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_30_28, SCIFB1_RXD, SEL_SCIFB1_0), 1511077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP12_30_28, IECLK_B, SEL_IEB_1), 1512077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_30_28, DU2_EXVSYNC_DU2_VSYNC), 1513077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_30_28, QSTB_QHE), 1514077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP12_30_28, CAN_DEBUGOUT4), 1515077365a9SGeert Uytterhoeven 1516077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_2_0, SSI_SDATA5, SEL_SSI5_0), 1517077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_2_0, SCIFB1_TXD, SEL_SCIFB1_0), 1518077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_2_0, IETX_B, SEL_IEB_1), 1519077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_2_0, DU2_DR2), 1520077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_2_0, LCDOUT2), 1521077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_2_0, CAN_DEBUGOUT5), 1522077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_6_3, SSI_SCK6, SEL_SSI6_0), 1523077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_6_3, SCIFB1_CTS_N, SEL_SCIFB1_0), 1524077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_6_3, BPFCLK_D, SEL_FM_3), 1525077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_6_3, DU2_DR3), 1526077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_6_3, LCDOUT3), 1527077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_6_3, CAN_DEBUGOUT6), 1528077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_6_3, BPFCLK_F, SEL_FM_5), 1529077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_9_7, SSI_WS6, SEL_SSI6_0), 1530077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_9_7, SCIFB1_RTS_N, SEL_SCIFB1_0), 1531077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_9_7, CAN0_TX_D, SEL_CAN0_3), 1532077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_9_7, DU2_DR4), 1533077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_9_7, LCDOUT4), 1534077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_9_7, CAN_DEBUGOUT7), 1535077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_12_10, SSI_SDATA6, SEL_SSI6_0), 1536077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_12_10, FMIN_D, SEL_FM_3), 1537077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_12_10, DU2_DR5), 1538077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_12_10, LCDOUT5), 1539077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_12_10, CAN_DEBUGOUT8), 1540077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_15_13, SSI_SCK78, SEL_SSI7_0), 1541077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_15_13, STP_IVCXO27_1, SEL_SSP_0), 1542077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_15_13, SCK1, SEL_SCIF1_0), 1543077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_15_13, SCIFA1_SCK, SEL_SCIFA1_0), 1544077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_15_13, DU2_DR6), 1545077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_15_13, LCDOUT6), 1546077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_15_13, CAN_DEBUGOUT9), 1547077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_18_16, SSI_WS78, SEL_SSI7_0), 1548077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_18_16, STP_ISCLK_1, SEL_SSP_0), 1549077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_18_16, SCIFB2_SCK, SEL_SCIFB2_0), 1550077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_18_16, SCIFA2_CTS_N), 1551077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_18_16, DU2_DR7), 1552077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_18_16, LCDOUT7), 1553077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_18_16, CAN_DEBUGOUT10), 1554077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_22_19, SSI_SDATA7, SEL_SSI7_0), 1555077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_22_19, STP_ISD_1, SEL_SSP_0), 1556077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_22_19, SCIFB2_RXD, SEL_SCIFB2_0), 1557077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_22_19, SCIFA2_RTS_N), 1558077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_22_19, TCLK2), 1559077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_22_19, QSTVA_QVS), 1560077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_22_19, CAN_DEBUGOUT11), 1561077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_22_19, BPFCLK_E, SEL_FM_4), 1562077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_22_19, SSI_SDATA7_B, SEL_SSI7_1), 1563077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_22_19, FMIN_G, SEL_FM_6), 1564077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_25_23, SSI_SDATA8, SEL_SSI8_0), 1565077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_25_23, STP_ISEN_1, SEL_SSP_0), 1566077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_25_23, SCIFB2_TXD, SEL_SCIFB2_0), 1567077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_25_23, CAN0_TX_C, SEL_CAN0_2), 1568077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_25_23, CAN_DEBUGOUT12), 1569077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_25_23, SSI_SDATA8_B, SEL_SSI8_1), 1570077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_28_26, SSI_SDATA9), 1571077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_28_26, STP_ISSYNC_1, SEL_SSP_0), 1572077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_28_26, SCIFB2_CTS_N, SEL_SCIFB2_0), 1573077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_28_26, SSI_WS1), 1574077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_28_26, SSI_SDATA5_C, SEL_SSI5_2), 1575077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_28_26, CAN_DEBUGOUT13), 1576077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_30_29, AUDIO_CLKA), 1577077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP13_30_29, SCIFB2_RTS_N, SEL_SCIFB2_0), 1578077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP13_30_29, CAN_DEBUGOUT14), 1579077365a9SGeert Uytterhoeven 1580077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_2_0, AUDIO_CLKB), 1581077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_2_0, SCIF_CLK, SEL_SCIFCLK_0), 1582077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_2_0, CAN0_RX_D, SEL_CAN0_3), 1583077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_2_0, DVC_MUTE), 1584077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_2_0, CAN0_RX_C, SEL_CAN0_2), 1585077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_2_0, CAN_DEBUGOUT15), 1586077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_2_0, REMOCON), 1587077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_5_3, SCIFA0_SCK, SEL_SCFA_0), 1588077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_5_3, HSCK1, SEL_HSCIF1_0), 1589077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_5_3, SCK0), 1590077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_5_3, MSIOF3_SS2), 1591077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_5_3, DU2_DG2), 1592077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_5_3, LCDOUT10), 1593077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_5_3, IIC1_SDA_C, SEL_IIC1_2), 1594077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_5_3, I2C1_SDA_C, SEL_I2C1_2), 1595077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_8_6, SCIFA0_RXD, SEL_SCFA_0), 1596077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_8_6, HRX1, SEL_HSCIF1_0), 1597077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_8_6, RX0, SEL_SCIF0_0), 1598077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_8_6, DU2_DR0), 1599077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_8_6, LCDOUT0), 1600077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_11_9, SCIFA0_TXD, SEL_SCFA_0), 1601077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_11_9, HTX1, SEL_HSCIF1_0), 1602077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_11_9, TX0, SEL_SCIF0_0), 1603077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_11_9, DU2_DR1), 1604077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_11_9, LCDOUT1), 1605077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_15_12, SCIFA0_CTS_N, SEL_SCFA_0), 1606077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_15_12, HCTS1_N, SEL_HSCIF1_0), 1607077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_15_12, CTS0_N), 1608077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_15_12, MSIOF3_SYNC, SEL_SOF3_0), 1609077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_15_12, DU2_DG3), 1610077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_15_12, LCDOUT11), 1611077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_15_12, PWM0_B), 1612077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_15_12, IIC1_SCL_C, SEL_IIC1_2), 1613077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_15_12, I2C1_SCL_C, SEL_I2C1_2), 1614077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_18_16, SCIFA0_RTS_N, SEL_SCFA_0), 1615077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_18_16, HRTS1_N, SEL_HSCIF1_0), 1616077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_18_16, RTS0_N), 1617077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_18_16, MSIOF3_SS1), 1618077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_18_16, DU2_DG0), 1619077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_18_16, LCDOUT8), 1620077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_18_16, PWM1_B), 1621077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_21_19, SCIFA1_RXD, SEL_SCIFA1_0), 1622077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_21_19, AD_DI, SEL_ADI_0), 1623077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_21_19, RX1, SEL_SCIF1_0), 1624077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_21_19, DU2_EXODDF_DU2_ODDF_DISP_CDE), 1625077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_21_19, QCPV_QDE), 1626077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_24_22, SCIFA1_TXD, SEL_SCIFA1_0), 1627077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_24_22, AD_DO, SEL_ADI_0), 1628077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_24_22, TX1, SEL_SCIF1_0), 1629077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_24_22, DU2_DG1), 1630077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_24_22, LCDOUT9), 1631077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_27_25, SCIFA1_CTS_N, SEL_SCIFA1_0), 1632077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_27_25, AD_CLK, SEL_ADI_0), 1633077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_27_25, CTS1_N), 1634077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_27_25, MSIOF3_RXD, SEL_SOF3_0), 1635077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_27_25, DU0_DOTCLKOUT), 1636077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_27_25, QCLK), 1637077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_30_28, SCIFA1_RTS_N, SEL_SCIFA1_0), 1638077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_30_28, AD_NCS_N, SEL_ADI_0), 1639077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_30_28, RTS1_N), 1640077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_30_28, MSIOF3_TXD, SEL_SOF3_0), 1641077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_30_28, DU1_DOTCLKOUT), 1642077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP14_30_28, QSTVB_QVE), 1643077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP14_30_28, HRTS0_N_C, SEL_HSCIF0_2), 1644077365a9SGeert Uytterhoeven 1645077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_2_0, SCIFA2_SCK, SEL_SCIFA2_0), 1646077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_2_0, FMCLK, SEL_FM_0), 1647077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_2_0, SCK2), 1648077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_2_0, MSIOF3_SCK, SEL_SOF3_0), 1649077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_2_0, DU2_DG7), 1650077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_2_0, LCDOUT15), 1651077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_2_0, SCIF_CLK_B, SEL_SCIFCLK_1), 1652077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_5_3, SCIFA2_RXD, SEL_SCIFA2_0), 1653077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_5_3, FMIN, SEL_FM_0), 1654077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_5_3, TX2, SEL_SCIF2_0), 1655077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_5_3, DU2_DB0), 1656077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_5_3, LCDOUT16), 1657077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_5_3, IIC2_SCL, SEL_IIC2_0), 1658077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_5_3, I2C2_SCL, SEL_I2C2_0), 1659077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_8_6, SCIFA2_TXD, SEL_SCIFA2_0), 1660077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_8_6, BPFCLK, SEL_FM_0), 1661077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_8_6, RX2, SEL_SCIF2_0), 1662077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_8_6, DU2_DB1), 1663077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_8_6, LCDOUT17), 1664077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_8_6, IIC2_SDA, SEL_IIC2_0), 1665077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_8_6, I2C2_SDA, SEL_I2C2_0), 1666077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_11_9, HSCK0), 1667077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_11_9, TS_SDEN0, SEL_TSIF0_0), 1668077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_11_9, DU2_DG4), 1669077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_11_9, LCDOUT12), 1670077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_11_9, HCTS0_N_C, SEL_HSCIF0_2), 1671077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_13_12, HRX0, SEL_HSCIF0_0), 1672077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_13_12, DU2_DB2), 1673077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_13_12, LCDOUT18), 1674077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_15_14, HTX0, SEL_HSCIF0_0), 1675077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_15_14, DU2_DB3), 1676077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_15_14, LCDOUT19), 1677077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_17_16, HCTS0_N, SEL_HSCIF0_0), 1678077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_17_16, SSI_SCK9), 1679077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_17_16, DU2_DB4), 1680077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_17_16, LCDOUT20), 1681077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_19_18, HRTS0_N, SEL_HSCIF0_0), 1682077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_19_18, SSI_WS9), 1683077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_19_18, DU2_DB5), 1684077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_19_18, LCDOUT21), 1685077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_22_20, MSIOF0_SCK, SEL_SOF0_0), 1686077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_22_20, TS_SDAT0, SEL_TSIF0_0), 1687077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_22_20, ADICLK), 1688077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_22_20, DU2_DB6), 1689077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_22_20, LCDOUT22), 1690077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_25_23, MSIOF0_SYNC), 1691077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_25_23, TS_SCK0, SEL_TSIF0_0), 1692077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_25_23, SSI_SCK2), 1693077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_25_23, ADIDATA), 1694077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_25_23, DU2_DB7), 1695077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_25_23, LCDOUT23), 1696077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_25_23, HRX0_C, SEL_SCIFA2_1), 1697077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_27_26, MSIOF0_SS1, SEL_SOF0_0), 1698077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_27_26, ADICHS0), 1699077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_27_26, DU2_DG5), 1700077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_27_26, LCDOUT13), 1701077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP15_29_28, MSIOF0_TXD, SEL_SOF0_0), 1702077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_29_28, ADICHS1), 1703077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_29_28, DU2_DG6), 1704077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP15_29_28, LCDOUT14), 1705077365a9SGeert Uytterhoeven 1706077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_2_0, MSIOF0_SS2, SEL_SOF0_0), 1707077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_2_0, AUDIO_CLKOUT), 1708077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_2_0, ADICHS2), 1709077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_2_0, DU2_DISP), 1710077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_2_0, QPOLA), 1711077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_2_0, HTX0_C, SEL_HSCIF0_2), 1712077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_2_0, SCIFA2_TXD_B, SEL_SCIFA2_1), 1713077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_5_3, MSIOF0_RXD, SEL_SOF0_0), 1714077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_5_3, TS_SPSYNC0, SEL_TSIF0_0), 1715077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_5_3, SSI_WS2), 1716077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_5_3, ADICS_SAMP), 1717077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_5_3, DU2_CDE), 1718077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_5_3, QPOLB), 1719077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_5_3, SCIFA2_RXD_B, SEL_HSCIF0_2), 1720077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_6, USB1_PWEN), 1721077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_6, AUDIO_CLKOUT_D), 1722077365a9SGeert Uytterhoeven PINMUX_IPSR_GPSR(IP16_7, USB1_OVC), 1723077365a9SGeert Uytterhoeven PINMUX_IPSR_MSEL(IP16_7, TCLK1_B, SEL_TMU1_1), 1724077365a9SGeert Uytterhoeven 1725077365a9SGeert Uytterhoeven PINMUX_DATA(IIC0_SCL_MARK, FN_SEL_IIC0_0), 1726077365a9SGeert Uytterhoeven PINMUX_DATA(IIC0_SDA_MARK, FN_SEL_IIC0_0), 1727077365a9SGeert Uytterhoeven PINMUX_DATA(I2C0_SCL_MARK, FN_SEL_IIC0_1), 1728077365a9SGeert Uytterhoeven PINMUX_DATA(I2C0_SDA_MARK, FN_SEL_IIC0_1), 1729077365a9SGeert Uytterhoeven 1730077365a9SGeert Uytterhoeven PINMUX_DATA(IIC3_SCL_MARK, FN_SEL_IICDVFS_0), 1731077365a9SGeert Uytterhoeven PINMUX_DATA(IIC3_SDA_MARK, FN_SEL_IICDVFS_0), 1732077365a9SGeert Uytterhoeven PINMUX_DATA(I2C3_SCL_MARK, FN_SEL_IICDVFS_1), 1733077365a9SGeert Uytterhoeven PINMUX_DATA(I2C3_SDA_MARK, FN_SEL_IICDVFS_1), 1734077365a9SGeert Uytterhoeven }; 1735077365a9SGeert Uytterhoeven 1736077365a9SGeert Uytterhoeven /* 1737077365a9SGeert Uytterhoeven * Pins not associated with a GPIO port. 1738077365a9SGeert Uytterhoeven */ 1739077365a9SGeert Uytterhoeven enum { 1740077365a9SGeert Uytterhoeven GP_ASSIGN_LAST(), 1741077365a9SGeert Uytterhoeven NOGP_ALL(), 1742077365a9SGeert Uytterhoeven }; 1743077365a9SGeert Uytterhoeven 1744077365a9SGeert Uytterhoeven static const struct sh_pfc_pin pinmux_pins[] = { 1745077365a9SGeert Uytterhoeven PINMUX_GPIO_GP_ALL(), 1746077365a9SGeert Uytterhoeven PINMUX_NOGP_ALL(), 1747077365a9SGeert Uytterhoeven }; 1748077365a9SGeert Uytterhoeven 1749077365a9SGeert Uytterhoeven /* - AUDIO CLOCK ------------------------------------------------------------ */ 1750077365a9SGeert Uytterhoeven static const unsigned int audio_clk_a_pins[] = { 1751077365a9SGeert Uytterhoeven /* CLK A */ 1752077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 25), 1753077365a9SGeert Uytterhoeven }; 1754077365a9SGeert Uytterhoeven static const unsigned int audio_clk_a_mux[] = { 1755077365a9SGeert Uytterhoeven AUDIO_CLKA_MARK, 1756077365a9SGeert Uytterhoeven }; 1757077365a9SGeert Uytterhoeven static const unsigned int audio_clk_b_pins[] = { 1758077365a9SGeert Uytterhoeven /* CLK B */ 1759077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 26), 1760077365a9SGeert Uytterhoeven }; 1761077365a9SGeert Uytterhoeven static const unsigned int audio_clk_b_mux[] = { 1762077365a9SGeert Uytterhoeven AUDIO_CLKB_MARK, 1763077365a9SGeert Uytterhoeven }; 1764077365a9SGeert Uytterhoeven static const unsigned int audio_clk_c_pins[] = { 1765077365a9SGeert Uytterhoeven /* CLK C */ 1766077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 27), 1767077365a9SGeert Uytterhoeven }; 1768077365a9SGeert Uytterhoeven static const unsigned int audio_clk_c_mux[] = { 1769077365a9SGeert Uytterhoeven AUDIO_CLKC_MARK, 1770077365a9SGeert Uytterhoeven }; 1771077365a9SGeert Uytterhoeven static const unsigned int audio_clkout_pins[] = { 1772077365a9SGeert Uytterhoeven /* CLK OUT */ 1773077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 16), 1774077365a9SGeert Uytterhoeven }; 1775077365a9SGeert Uytterhoeven static const unsigned int audio_clkout_mux[] = { 1776077365a9SGeert Uytterhoeven AUDIO_CLKOUT_MARK, 1777077365a9SGeert Uytterhoeven }; 1778077365a9SGeert Uytterhoeven static const unsigned int audio_clkout_b_pins[] = { 1779077365a9SGeert Uytterhoeven /* CLK OUT B */ 1780077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 23), 1781077365a9SGeert Uytterhoeven }; 1782077365a9SGeert Uytterhoeven static const unsigned int audio_clkout_b_mux[] = { 1783077365a9SGeert Uytterhoeven AUDIO_CLKOUT_B_MARK, 1784077365a9SGeert Uytterhoeven }; 1785077365a9SGeert Uytterhoeven static const unsigned int audio_clkout_c_pins[] = { 1786077365a9SGeert Uytterhoeven /* CLK OUT C */ 1787077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 27), 1788077365a9SGeert Uytterhoeven }; 1789077365a9SGeert Uytterhoeven static const unsigned int audio_clkout_c_mux[] = { 1790077365a9SGeert Uytterhoeven AUDIO_CLKOUT_C_MARK, 1791077365a9SGeert Uytterhoeven }; 1792077365a9SGeert Uytterhoeven static const unsigned int audio_clkout_d_pins[] = { 1793077365a9SGeert Uytterhoeven /* CLK OUT D */ 1794077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 20), 1795077365a9SGeert Uytterhoeven }; 1796077365a9SGeert Uytterhoeven static const unsigned int audio_clkout_d_mux[] = { 1797077365a9SGeert Uytterhoeven AUDIO_CLKOUT_D_MARK, 1798077365a9SGeert Uytterhoeven }; 1799077365a9SGeert Uytterhoeven /* - AVB -------------------------------------------------------------------- */ 1800077365a9SGeert Uytterhoeven static const unsigned int avb_link_pins[] = { 1801077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 11), 1802077365a9SGeert Uytterhoeven }; 1803077365a9SGeert Uytterhoeven static const unsigned int avb_link_mux[] = { 1804077365a9SGeert Uytterhoeven AVB_LINK_MARK, 1805077365a9SGeert Uytterhoeven }; 1806077365a9SGeert Uytterhoeven static const unsigned int avb_magic_pins[] = { 1807077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 14), 1808077365a9SGeert Uytterhoeven }; 1809077365a9SGeert Uytterhoeven static const unsigned int avb_magic_mux[] = { 1810077365a9SGeert Uytterhoeven AVB_MAGIC_MARK, 1811077365a9SGeert Uytterhoeven }; 1812077365a9SGeert Uytterhoeven static const unsigned int avb_phy_int_pins[] = { 1813077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 15), 1814077365a9SGeert Uytterhoeven }; 1815077365a9SGeert Uytterhoeven static const unsigned int avb_phy_int_mux[] = { 1816077365a9SGeert Uytterhoeven AVB_PHY_INT_MARK, 1817077365a9SGeert Uytterhoeven }; 1818077365a9SGeert Uytterhoeven static const unsigned int avb_mdio_pins[] = { 1819077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 12), 1820077365a9SGeert Uytterhoeven }; 1821077365a9SGeert Uytterhoeven static const unsigned int avb_mdio_mux[] = { 1822077365a9SGeert Uytterhoeven AVB_MDC_MARK, AVB_MDIO_MARK, 1823077365a9SGeert Uytterhoeven }; 1824077365a9SGeert Uytterhoeven static const unsigned int avb_mii_pins[] = { 1825077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10), 1826077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 11), 1827077365a9SGeert Uytterhoeven 1828077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 13), RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1), 1829077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 2), 1830077365a9SGeert Uytterhoeven 1831077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8), RCAR_GP_PIN(2, 9), 1832077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 10), RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9), 1833077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 12), 1834077365a9SGeert Uytterhoeven }; 1835077365a9SGeert Uytterhoeven static const unsigned int avb_mii_mux[] = { 1836077365a9SGeert Uytterhoeven AVB_TXD0_MARK, AVB_TXD1_MARK, AVB_TXD2_MARK, 1837077365a9SGeert Uytterhoeven AVB_TXD3_MARK, 1838077365a9SGeert Uytterhoeven 1839077365a9SGeert Uytterhoeven AVB_RXD0_MARK, AVB_RXD1_MARK, AVB_RXD2_MARK, 1840077365a9SGeert Uytterhoeven AVB_RXD3_MARK, 1841077365a9SGeert Uytterhoeven 1842077365a9SGeert Uytterhoeven AVB_RX_ER_MARK, AVB_RX_CLK_MARK, AVB_RX_DV_MARK, 1843077365a9SGeert Uytterhoeven AVB_CRS_MARK, AVB_TX_EN_MARK, AVB_TX_ER_MARK, 1844077365a9SGeert Uytterhoeven AVB_TX_CLK_MARK, AVB_COL_MARK, 1845077365a9SGeert Uytterhoeven }; 1846077365a9SGeert Uytterhoeven static const unsigned int avb_gmii_pins[] = { 1847077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10), 1848077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13), 1849077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15), 1850077365a9SGeert Uytterhoeven 1851077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 13), RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1), 1852077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 4), 1853077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 6), 1854077365a9SGeert Uytterhoeven 1855077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8), RCAR_GP_PIN(2, 9), 1856077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 10), RCAR_GP_PIN(2, 13), RCAR_GP_PIN(2, 16), 1857077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9), RCAR_GP_PIN(3, 10), 1858077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 12), 1859077365a9SGeert Uytterhoeven }; 1860077365a9SGeert Uytterhoeven static const unsigned int avb_gmii_mux[] = { 1861077365a9SGeert Uytterhoeven AVB_TXD0_MARK, AVB_TXD1_MARK, AVB_TXD2_MARK, 1862077365a9SGeert Uytterhoeven AVB_TXD3_MARK, AVB_TXD4_MARK, AVB_TXD5_MARK, 1863077365a9SGeert Uytterhoeven AVB_TXD6_MARK, AVB_TXD7_MARK, 1864077365a9SGeert Uytterhoeven 1865077365a9SGeert Uytterhoeven AVB_RXD0_MARK, AVB_RXD1_MARK, AVB_RXD2_MARK, 1866077365a9SGeert Uytterhoeven AVB_RXD3_MARK, AVB_RXD4_MARK, AVB_RXD5_MARK, 1867077365a9SGeert Uytterhoeven AVB_RXD6_MARK, AVB_RXD7_MARK, 1868077365a9SGeert Uytterhoeven 1869077365a9SGeert Uytterhoeven AVB_RX_ER_MARK, AVB_RX_CLK_MARK, AVB_RX_DV_MARK, 1870077365a9SGeert Uytterhoeven AVB_CRS_MARK, AVB_GTX_CLK_MARK, AVB_GTXREFCLK_MARK, 1871077365a9SGeert Uytterhoeven AVB_TX_EN_MARK, AVB_TX_ER_MARK, AVB_TX_CLK_MARK, 1872077365a9SGeert Uytterhoeven AVB_COL_MARK, 1873077365a9SGeert Uytterhoeven }; 1874077365a9SGeert Uytterhoeven /* - CAN0 ----------------------------------------------------------------- */ 1875077365a9SGeert Uytterhoeven static const unsigned int can0_data_pins[] = { 1876077365a9SGeert Uytterhoeven /* CAN0 RX */ 1877077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 17), 1878077365a9SGeert Uytterhoeven /* CAN0 TX */ 1879077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 19), 1880077365a9SGeert Uytterhoeven }; 1881077365a9SGeert Uytterhoeven static const unsigned int can0_data_mux[] = { 1882077365a9SGeert Uytterhoeven CAN0_RX_MARK, 1883077365a9SGeert Uytterhoeven CAN0_TX_MARK, 1884077365a9SGeert Uytterhoeven }; 1885077365a9SGeert Uytterhoeven static const unsigned int can0_data_b_pins[] = { 1886077365a9SGeert Uytterhoeven /* CAN0 RXB */ 1887077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 5), 1888077365a9SGeert Uytterhoeven /* CAN0 TXB */ 1889077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 4), 1890077365a9SGeert Uytterhoeven }; 1891077365a9SGeert Uytterhoeven static const unsigned int can0_data_b_mux[] = { 1892077365a9SGeert Uytterhoeven CAN0_RX_B_MARK, 1893077365a9SGeert Uytterhoeven CAN0_TX_B_MARK, 1894077365a9SGeert Uytterhoeven }; 1895077365a9SGeert Uytterhoeven static const unsigned int can0_data_c_pins[] = { 1896077365a9SGeert Uytterhoeven /* CAN0 RXC */ 1897077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 26), 1898077365a9SGeert Uytterhoeven /* CAN0 TXC */ 1899077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 23), 1900077365a9SGeert Uytterhoeven }; 1901077365a9SGeert Uytterhoeven static const unsigned int can0_data_c_mux[] = { 1902077365a9SGeert Uytterhoeven CAN0_RX_C_MARK, 1903077365a9SGeert Uytterhoeven CAN0_TX_C_MARK, 1904077365a9SGeert Uytterhoeven }; 1905077365a9SGeert Uytterhoeven static const unsigned int can0_data_d_pins[] = { 1906077365a9SGeert Uytterhoeven /* CAN0 RXD */ 1907077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 26), 1908077365a9SGeert Uytterhoeven /* CAN0 TXD */ 1909077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 18), 1910077365a9SGeert Uytterhoeven }; 1911077365a9SGeert Uytterhoeven static const unsigned int can0_data_d_mux[] = { 1912077365a9SGeert Uytterhoeven CAN0_RX_D_MARK, 1913077365a9SGeert Uytterhoeven CAN0_TX_D_MARK, 1914077365a9SGeert Uytterhoeven }; 1915077365a9SGeert Uytterhoeven /* - CAN1 ----------------------------------------------------------------- */ 1916077365a9SGeert Uytterhoeven static const unsigned int can1_data_pins[] = { 1917077365a9SGeert Uytterhoeven /* CAN1 RX */ 1918077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 22), 1919077365a9SGeert Uytterhoeven /* CAN1 TX */ 1920077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 18), 1921077365a9SGeert Uytterhoeven }; 1922077365a9SGeert Uytterhoeven static const unsigned int can1_data_mux[] = { 1923077365a9SGeert Uytterhoeven CAN1_RX_MARK, 1924077365a9SGeert Uytterhoeven CAN1_TX_MARK, 1925077365a9SGeert Uytterhoeven }; 1926077365a9SGeert Uytterhoeven static const unsigned int can1_data_b_pins[] = { 1927077365a9SGeert Uytterhoeven /* CAN1 RXB */ 1928077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 7), 1929077365a9SGeert Uytterhoeven /* CAN1 TXB */ 1930077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 6), 1931077365a9SGeert Uytterhoeven }; 1932077365a9SGeert Uytterhoeven static const unsigned int can1_data_b_mux[] = { 1933077365a9SGeert Uytterhoeven CAN1_RX_B_MARK, 1934077365a9SGeert Uytterhoeven CAN1_TX_B_MARK, 1935077365a9SGeert Uytterhoeven }; 1936077365a9SGeert Uytterhoeven /* - CAN Clock -------------------------------------------------------------- */ 1937077365a9SGeert Uytterhoeven static const unsigned int can_clk_pins[] = { 1938077365a9SGeert Uytterhoeven /* CLK */ 1939077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 21), 1940077365a9SGeert Uytterhoeven }; 1941077365a9SGeert Uytterhoeven 1942077365a9SGeert Uytterhoeven static const unsigned int can_clk_mux[] = { 1943077365a9SGeert Uytterhoeven CAN_CLK_MARK, 1944077365a9SGeert Uytterhoeven }; 1945077365a9SGeert Uytterhoeven 1946077365a9SGeert Uytterhoeven static const unsigned int can_clk_b_pins[] = { 1947077365a9SGeert Uytterhoeven /* CLK */ 1948077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 3), 1949077365a9SGeert Uytterhoeven }; 1950077365a9SGeert Uytterhoeven 1951077365a9SGeert Uytterhoeven static const unsigned int can_clk_b_mux[] = { 1952077365a9SGeert Uytterhoeven CAN_CLK_B_MARK, 1953077365a9SGeert Uytterhoeven }; 1954077365a9SGeert Uytterhoeven /* - DU RGB ----------------------------------------------------------------- */ 1955077365a9SGeert Uytterhoeven static const unsigned int du_rgb666_pins[] = { 1956077365a9SGeert Uytterhoeven /* R[7:2], G[7:2], B[7:2] */ 1957077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 21), RCAR_GP_PIN(4, 20), RCAR_GP_PIN(4, 19), 1958077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 18), RCAR_GP_PIN(4, 17), RCAR_GP_PIN(4, 16), 1959077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 14), 1960077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 7), RCAR_GP_PIN(4, 30), RCAR_GP_PIN(4, 27), 1961077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 11), 1962077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 10), RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 8), 1963077365a9SGeert Uytterhoeven }; 1964077365a9SGeert Uytterhoeven static const unsigned int du_rgb666_mux[] = { 1965077365a9SGeert Uytterhoeven DU2_DR7_MARK, DU2_DR6_MARK, DU2_DR5_MARK, DU2_DR4_MARK, 1966077365a9SGeert Uytterhoeven DU2_DR3_MARK, DU2_DR2_MARK, 1967077365a9SGeert Uytterhoeven DU2_DG7_MARK, DU2_DG6_MARK, DU2_DG5_MARK, DU2_DG4_MARK, 1968077365a9SGeert Uytterhoeven DU2_DG3_MARK, DU2_DG2_MARK, 1969077365a9SGeert Uytterhoeven DU2_DB7_MARK, DU2_DB6_MARK, DU2_DB5_MARK, DU2_DB4_MARK, 1970077365a9SGeert Uytterhoeven DU2_DB3_MARK, DU2_DB2_MARK, 1971077365a9SGeert Uytterhoeven }; 1972077365a9SGeert Uytterhoeven static const unsigned int du_rgb888_pins[] = { 1973077365a9SGeert Uytterhoeven /* R[7:0], G[7:0], B[7:0] */ 1974077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 21), RCAR_GP_PIN(4, 20), RCAR_GP_PIN(4, 19), 1975077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 18), RCAR_GP_PIN(4, 17), RCAR_GP_PIN(4, 16), 1976077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 29), RCAR_GP_PIN(4, 28), RCAR_GP_PIN(5, 4), 1977077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 14), RCAR_GP_PIN(5, 7), 1978077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 30), RCAR_GP_PIN(4, 27), RCAR_GP_PIN(5, 1), 1979077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 31), RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 12), 1980077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 10), RCAR_GP_PIN(5, 9), 1981077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 6), RCAR_GP_PIN(5, 5), 1982077365a9SGeert Uytterhoeven }; 1983077365a9SGeert Uytterhoeven static const unsigned int du_rgb888_mux[] = { 1984077365a9SGeert Uytterhoeven DU2_DR7_MARK, DU2_DR6_MARK, DU2_DR5_MARK, DU2_DR4_MARK, 1985077365a9SGeert Uytterhoeven DU2_DR3_MARK, DU2_DR2_MARK, DU2_DR1_MARK, DU2_DR0_MARK, 1986077365a9SGeert Uytterhoeven DU2_DG7_MARK, DU2_DG6_MARK, DU2_DG5_MARK, DU2_DG4_MARK, 1987077365a9SGeert Uytterhoeven DU2_DG3_MARK, DU2_DG2_MARK, DU2_DG1_MARK, DU2_DG0_MARK, 1988077365a9SGeert Uytterhoeven DU2_DB7_MARK, DU2_DB6_MARK, DU2_DB5_MARK, DU2_DB4_MARK, 1989077365a9SGeert Uytterhoeven DU2_DB3_MARK, DU2_DB2_MARK, DU2_DB1_MARK, DU2_DB0_MARK, 1990077365a9SGeert Uytterhoeven }; 1991077365a9SGeert Uytterhoeven static const unsigned int du_clk_out_0_pins[] = { 1992077365a9SGeert Uytterhoeven /* CLKOUT */ 1993077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 2), 1994077365a9SGeert Uytterhoeven }; 1995077365a9SGeert Uytterhoeven static const unsigned int du_clk_out_0_mux[] = { 1996077365a9SGeert Uytterhoeven DU0_DOTCLKOUT_MARK 1997077365a9SGeert Uytterhoeven }; 1998077365a9SGeert Uytterhoeven static const unsigned int du_clk_out_1_pins[] = { 1999077365a9SGeert Uytterhoeven /* CLKOUT */ 2000077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 3), 2001077365a9SGeert Uytterhoeven }; 2002077365a9SGeert Uytterhoeven static const unsigned int du_clk_out_1_mux[] = { 2003077365a9SGeert Uytterhoeven DU1_DOTCLKOUT_MARK 2004077365a9SGeert Uytterhoeven }; 2005077365a9SGeert Uytterhoeven static const unsigned int du_sync_0_pins[] = { 2006077365a9SGeert Uytterhoeven /* VSYNC, HSYNC, DISP */ 2007077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 14), RCAR_GP_PIN(5, 0), 2008077365a9SGeert Uytterhoeven }; 2009077365a9SGeert Uytterhoeven static const unsigned int du_sync_0_mux[] = { 2010077365a9SGeert Uytterhoeven DU2_EXVSYNC_DU2_VSYNC_MARK, DU2_EXHSYNC_DU2_HSYNC_MARK, 2011077365a9SGeert Uytterhoeven DU2_EXODDF_DU2_ODDF_DISP_CDE_MARK 2012077365a9SGeert Uytterhoeven }; 2013077365a9SGeert Uytterhoeven static const unsigned int du_sync_1_pins[] = { 2014077365a9SGeert Uytterhoeven /* VSYNC, HSYNC, DISP */ 2015077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 14), RCAR_GP_PIN(5, 16), 2016077365a9SGeert Uytterhoeven }; 2017077365a9SGeert Uytterhoeven static const unsigned int du_sync_1_mux[] = { 2018077365a9SGeert Uytterhoeven DU2_EXVSYNC_DU2_VSYNC_MARK, DU2_EXHSYNC_DU2_HSYNC_MARK, 2019077365a9SGeert Uytterhoeven DU2_DISP_MARK 2020077365a9SGeert Uytterhoeven }; 2021077365a9SGeert Uytterhoeven static const unsigned int du_cde_pins[] = { 2022077365a9SGeert Uytterhoeven /* CDE */ 2023077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 17), 2024077365a9SGeert Uytterhoeven }; 2025077365a9SGeert Uytterhoeven static const unsigned int du_cde_mux[] = { 2026077365a9SGeert Uytterhoeven DU2_CDE_MARK, 2027077365a9SGeert Uytterhoeven }; 2028077365a9SGeert Uytterhoeven /* - DU0 -------------------------------------------------------------------- */ 2029077365a9SGeert Uytterhoeven static const unsigned int du0_clk_in_pins[] = { 2030077365a9SGeert Uytterhoeven /* CLKIN */ 2031077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 26), 2032077365a9SGeert Uytterhoeven }; 2033077365a9SGeert Uytterhoeven static const unsigned int du0_clk_in_mux[] = { 2034077365a9SGeert Uytterhoeven DU_DOTCLKIN0_MARK 2035077365a9SGeert Uytterhoeven }; 2036077365a9SGeert Uytterhoeven /* - DU1 -------------------------------------------------------------------- */ 2037077365a9SGeert Uytterhoeven static const unsigned int du1_clk_in_pins[] = { 2038077365a9SGeert Uytterhoeven /* CLKIN */ 2039077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 27), 2040077365a9SGeert Uytterhoeven }; 2041077365a9SGeert Uytterhoeven static const unsigned int du1_clk_in_mux[] = { 2042077365a9SGeert Uytterhoeven DU_DOTCLKIN1_MARK, 2043077365a9SGeert Uytterhoeven }; 2044077365a9SGeert Uytterhoeven /* - DU2 -------------------------------------------------------------------- */ 2045077365a9SGeert Uytterhoeven static const unsigned int du2_clk_in_pins[] = { 2046077365a9SGeert Uytterhoeven /* CLKIN */ 2047077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 28), 2048077365a9SGeert Uytterhoeven }; 2049077365a9SGeert Uytterhoeven static const unsigned int du2_clk_in_mux[] = { 2050077365a9SGeert Uytterhoeven DU_DOTCLKIN2_MARK, 2051077365a9SGeert Uytterhoeven }; 2052077365a9SGeert Uytterhoeven /* - ETH -------------------------------------------------------------------- */ 2053077365a9SGeert Uytterhoeven static const unsigned int eth_link_pins[] = { 2054077365a9SGeert Uytterhoeven /* LINK */ 2055077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 22), 2056077365a9SGeert Uytterhoeven }; 2057077365a9SGeert Uytterhoeven static const unsigned int eth_link_mux[] = { 2058077365a9SGeert Uytterhoeven ETH_LINK_MARK, 2059077365a9SGeert Uytterhoeven }; 2060077365a9SGeert Uytterhoeven static const unsigned int eth_magic_pins[] = { 2061077365a9SGeert Uytterhoeven /* MAGIC */ 2062077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 27), 2063077365a9SGeert Uytterhoeven }; 2064077365a9SGeert Uytterhoeven static const unsigned int eth_magic_mux[] = { 2065077365a9SGeert Uytterhoeven ETH_MAGIC_MARK, 2066077365a9SGeert Uytterhoeven }; 2067077365a9SGeert Uytterhoeven static const unsigned int eth_mdio_pins[] = { 2068077365a9SGeert Uytterhoeven /* MDC, MDIO */ 2069077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 29), RCAR_GP_PIN(2, 24), 2070077365a9SGeert Uytterhoeven }; 2071077365a9SGeert Uytterhoeven static const unsigned int eth_mdio_mux[] = { 2072077365a9SGeert Uytterhoeven ETH_MDC_MARK, ETH_MDIO_MARK, 2073077365a9SGeert Uytterhoeven }; 2074077365a9SGeert Uytterhoeven static const unsigned int eth_rmii_pins[] = { 2075077365a9SGeert Uytterhoeven /* RXD[0:1], RX_ER, CRS_DV, TXD[0:1], TX_EN, REF_CLK */ 2076077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 20), RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 19), 2077077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 18), RCAR_GP_PIN(2, 28), RCAR_GP_PIN(2, 25), 2078077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 26), RCAR_GP_PIN(2, 23), 2079077365a9SGeert Uytterhoeven }; 2080077365a9SGeert Uytterhoeven static const unsigned int eth_rmii_mux[] = { 2081077365a9SGeert Uytterhoeven ETH_RXD0_MARK, ETH_RXD1_MARK, ETH_RX_ER_MARK, ETH_CRS_DV_MARK, 2082077365a9SGeert Uytterhoeven ETH_TXD0_MARK, ETH_TXD1_MARK, ETH_TX_EN_MARK, ETH_REF_CLK_MARK, 2083077365a9SGeert Uytterhoeven }; 2084077365a9SGeert Uytterhoeven /* - HSCIF0 ----------------------------------------------------------------- */ 2085077365a9SGeert Uytterhoeven static const unsigned int hscif0_data_pins[] = { 2086077365a9SGeert Uytterhoeven /* RX, TX */ 2087077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 9), 2088077365a9SGeert Uytterhoeven }; 2089077365a9SGeert Uytterhoeven static const unsigned int hscif0_data_mux[] = { 2090077365a9SGeert Uytterhoeven HRX0_MARK, HTX0_MARK, 2091077365a9SGeert Uytterhoeven }; 2092077365a9SGeert Uytterhoeven static const unsigned int hscif0_clk_pins[] = { 2093077365a9SGeert Uytterhoeven /* SCK */ 2094077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 7), 2095077365a9SGeert Uytterhoeven }; 2096077365a9SGeert Uytterhoeven static const unsigned int hscif0_clk_mux[] = { 2097077365a9SGeert Uytterhoeven HSCK0_MARK, 2098077365a9SGeert Uytterhoeven }; 2099077365a9SGeert Uytterhoeven static const unsigned int hscif0_ctrl_pins[] = { 2100077365a9SGeert Uytterhoeven /* RTS, CTS */ 2101077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 10), 2102077365a9SGeert Uytterhoeven }; 2103077365a9SGeert Uytterhoeven static const unsigned int hscif0_ctrl_mux[] = { 2104077365a9SGeert Uytterhoeven HRTS0_N_MARK, HCTS0_N_MARK, 2105077365a9SGeert Uytterhoeven }; 2106077365a9SGeert Uytterhoeven static const unsigned int hscif0_data_b_pins[] = { 2107077365a9SGeert Uytterhoeven /* RX, TX */ 2108077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 12), 2109077365a9SGeert Uytterhoeven }; 2110077365a9SGeert Uytterhoeven static const unsigned int hscif0_data_b_mux[] = { 2111077365a9SGeert Uytterhoeven HRX0_B_MARK, HTX0_B_MARK, 2112077365a9SGeert Uytterhoeven }; 2113077365a9SGeert Uytterhoeven static const unsigned int hscif0_ctrl_b_pins[] = { 2114077365a9SGeert Uytterhoeven /* RTS, CTS */ 2115077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 29), RCAR_GP_PIN(1, 28), 2116077365a9SGeert Uytterhoeven }; 2117077365a9SGeert Uytterhoeven static const unsigned int hscif0_ctrl_b_mux[] = { 2118077365a9SGeert Uytterhoeven HRTS0_N_B_MARK, HCTS0_N_B_MARK, 2119077365a9SGeert Uytterhoeven }; 2120077365a9SGeert Uytterhoeven static const unsigned int hscif0_data_c_pins[] = { 2121077365a9SGeert Uytterhoeven /* RX, TX */ 2122077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 16), 2123077365a9SGeert Uytterhoeven }; 2124077365a9SGeert Uytterhoeven static const unsigned int hscif0_data_c_mux[] = { 2125077365a9SGeert Uytterhoeven HRX0_C_MARK, HTX0_C_MARK, 2126077365a9SGeert Uytterhoeven }; 2127077365a9SGeert Uytterhoeven static const unsigned int hscif0_ctrl_c_pins[] = { 2128077365a9SGeert Uytterhoeven /* RTS, CTS */ 2129077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 7), 2130077365a9SGeert Uytterhoeven }; 2131077365a9SGeert Uytterhoeven static const unsigned int hscif0_ctrl_c_mux[] = { 2132077365a9SGeert Uytterhoeven HRTS0_N_C_MARK, HCTS0_N_C_MARK, 2133077365a9SGeert Uytterhoeven }; 2134077365a9SGeert Uytterhoeven static const unsigned int hscif0_data_d_pins[] = { 2135077365a9SGeert Uytterhoeven /* RX, TX */ 2136077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 21), 2137077365a9SGeert Uytterhoeven }; 2138077365a9SGeert Uytterhoeven static const unsigned int hscif0_data_d_mux[] = { 2139077365a9SGeert Uytterhoeven HRX0_D_MARK, HTX0_D_MARK, 2140077365a9SGeert Uytterhoeven }; 2141077365a9SGeert Uytterhoeven static const unsigned int hscif0_ctrl_d_pins[] = { 2142077365a9SGeert Uytterhoeven /* RTS, CTS */ 2143077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 23), RCAR_GP_PIN(3, 22), 2144077365a9SGeert Uytterhoeven }; 2145077365a9SGeert Uytterhoeven static const unsigned int hscif0_ctrl_d_mux[] = { 2146077365a9SGeert Uytterhoeven HRTS0_N_D_MARK, HCTS0_N_D_MARK, 2147077365a9SGeert Uytterhoeven }; 2148077365a9SGeert Uytterhoeven static const unsigned int hscif0_data_e_pins[] = { 2149077365a9SGeert Uytterhoeven /* RX, TX */ 2150077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 22), 2151077365a9SGeert Uytterhoeven }; 2152077365a9SGeert Uytterhoeven static const unsigned int hscif0_data_e_mux[] = { 2153077365a9SGeert Uytterhoeven HRX0_E_MARK, HTX0_E_MARK, 2154077365a9SGeert Uytterhoeven }; 2155077365a9SGeert Uytterhoeven static const unsigned int hscif0_ctrl_e_pins[] = { 2156077365a9SGeert Uytterhoeven /* RTS, CTS */ 2157077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 24), RCAR_GP_PIN(2, 23), 2158077365a9SGeert Uytterhoeven }; 2159077365a9SGeert Uytterhoeven static const unsigned int hscif0_ctrl_e_mux[] = { 2160077365a9SGeert Uytterhoeven HRTS0_N_E_MARK, HCTS0_N_E_MARK, 2161077365a9SGeert Uytterhoeven }; 2162077365a9SGeert Uytterhoeven static const unsigned int hscif0_data_f_pins[] = { 2163077365a9SGeert Uytterhoeven /* RX, TX */ 2164077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 23), RCAR_GP_PIN(2, 25), 2165077365a9SGeert Uytterhoeven }; 2166077365a9SGeert Uytterhoeven static const unsigned int hscif0_data_f_mux[] = { 2167077365a9SGeert Uytterhoeven HRX0_F_MARK, HTX0_F_MARK, 2168077365a9SGeert Uytterhoeven }; 2169077365a9SGeert Uytterhoeven static const unsigned int hscif0_ctrl_f_pins[] = { 2170077365a9SGeert Uytterhoeven /* RTS, CTS */ 2171077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 26), RCAR_GP_PIN(2, 24), 2172077365a9SGeert Uytterhoeven }; 2173077365a9SGeert Uytterhoeven static const unsigned int hscif0_ctrl_f_mux[] = { 2174077365a9SGeert Uytterhoeven HRTS0_N_F_MARK, HCTS0_N_F_MARK, 2175077365a9SGeert Uytterhoeven }; 2176077365a9SGeert Uytterhoeven /* - HSCIF1 ----------------------------------------------------------------- */ 2177077365a9SGeert Uytterhoeven static const unsigned int hscif1_data_pins[] = { 2178077365a9SGeert Uytterhoeven /* RX, TX */ 2179077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 28), RCAR_GP_PIN(4, 29), 2180077365a9SGeert Uytterhoeven }; 2181077365a9SGeert Uytterhoeven static const unsigned int hscif1_data_mux[] = { 2182077365a9SGeert Uytterhoeven HRX1_MARK, HTX1_MARK, 2183077365a9SGeert Uytterhoeven }; 2184077365a9SGeert Uytterhoeven static const unsigned int hscif1_clk_pins[] = { 2185077365a9SGeert Uytterhoeven /* SCK */ 2186077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 27), 2187077365a9SGeert Uytterhoeven }; 2188077365a9SGeert Uytterhoeven static const unsigned int hscif1_clk_mux[] = { 2189077365a9SGeert Uytterhoeven HSCK1_MARK, 2190077365a9SGeert Uytterhoeven }; 2191077365a9SGeert Uytterhoeven static const unsigned int hscif1_ctrl_pins[] = { 2192077365a9SGeert Uytterhoeven /* RTS, CTS */ 2193077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 31), RCAR_GP_PIN(4, 30), 2194077365a9SGeert Uytterhoeven }; 2195077365a9SGeert Uytterhoeven static const unsigned int hscif1_ctrl_mux[] = { 2196077365a9SGeert Uytterhoeven HRTS1_N_MARK, HCTS1_N_MARK, 2197077365a9SGeert Uytterhoeven }; 2198077365a9SGeert Uytterhoeven static const unsigned int hscif1_data_b_pins[] = { 2199077365a9SGeert Uytterhoeven /* RX, TX */ 2200077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 18), 2201077365a9SGeert Uytterhoeven }; 2202077365a9SGeert Uytterhoeven static const unsigned int hscif1_data_b_mux[] = { 2203077365a9SGeert Uytterhoeven HRX1_B_MARK, HTX1_B_MARK, 2204077365a9SGeert Uytterhoeven }; 2205077365a9SGeert Uytterhoeven static const unsigned int hscif1_clk_b_pins[] = { 2206077365a9SGeert Uytterhoeven /* SCK */ 2207077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 28), 2208077365a9SGeert Uytterhoeven }; 2209077365a9SGeert Uytterhoeven static const unsigned int hscif1_clk_b_mux[] = { 2210077365a9SGeert Uytterhoeven HSCK1_B_MARK, 2211077365a9SGeert Uytterhoeven }; 2212077365a9SGeert Uytterhoeven static const unsigned int hscif1_ctrl_b_pins[] = { 2213077365a9SGeert Uytterhoeven /* RTS, CTS */ 2214077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13), 2215077365a9SGeert Uytterhoeven }; 2216077365a9SGeert Uytterhoeven static const unsigned int hscif1_ctrl_b_mux[] = { 2217077365a9SGeert Uytterhoeven HRTS1_N_B_MARK, HCTS1_N_B_MARK, 2218077365a9SGeert Uytterhoeven }; 2219077365a9SGeert Uytterhoeven /* - I2C0 ------------------------------------------------------------------- */ 2220077365a9SGeert Uytterhoeven static const unsigned int i2c0_pins[] = { 2221077365a9SGeert Uytterhoeven /* SCL, SDA */ 2222077365a9SGeert Uytterhoeven PIN_IIC0_SCL, PIN_IIC0_SDA, 2223077365a9SGeert Uytterhoeven }; 2224077365a9SGeert Uytterhoeven static const unsigned int i2c0_mux[] = { 2225077365a9SGeert Uytterhoeven I2C0_SCL_MARK, I2C0_SDA_MARK, 2226077365a9SGeert Uytterhoeven }; 2227077365a9SGeert Uytterhoeven /* - I2C1 ------------------------------------------------------------------- */ 2228077365a9SGeert Uytterhoeven static const unsigned int i2c1_pins[] = { 2229077365a9SGeert Uytterhoeven /* SCL, SDA */ 2230077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 16), RCAR_GP_PIN(1, 17), 2231077365a9SGeert Uytterhoeven }; 2232077365a9SGeert Uytterhoeven static const unsigned int i2c1_mux[] = { 2233077365a9SGeert Uytterhoeven I2C1_SCL_MARK, I2C1_SDA_MARK, 2234077365a9SGeert Uytterhoeven }; 2235077365a9SGeert Uytterhoeven static const unsigned int i2c1_b_pins[] = { 2236077365a9SGeert Uytterhoeven /* SCL, SDA */ 2237077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7), 2238077365a9SGeert Uytterhoeven }; 2239077365a9SGeert Uytterhoeven static const unsigned int i2c1_b_mux[] = { 2240077365a9SGeert Uytterhoeven I2C1_SCL_B_MARK, I2C1_SDA_B_MARK, 2241077365a9SGeert Uytterhoeven }; 2242077365a9SGeert Uytterhoeven static const unsigned int i2c1_c_pins[] = { 2243077365a9SGeert Uytterhoeven /* SCL, SDA */ 2244077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 30), RCAR_GP_PIN(4, 27), 2245077365a9SGeert Uytterhoeven }; 2246077365a9SGeert Uytterhoeven static const unsigned int i2c1_c_mux[] = { 2247077365a9SGeert Uytterhoeven I2C1_SCL_C_MARK, I2C1_SDA_C_MARK, 2248077365a9SGeert Uytterhoeven }; 2249077365a9SGeert Uytterhoeven /* - I2C2 ------------------------------------------------------------------- */ 2250077365a9SGeert Uytterhoeven static const unsigned int i2c2_pins[] = { 2251077365a9SGeert Uytterhoeven /* SCL, SDA */ 2252077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6), 2253077365a9SGeert Uytterhoeven }; 2254077365a9SGeert Uytterhoeven static const unsigned int i2c2_mux[] = { 2255077365a9SGeert Uytterhoeven I2C2_SCL_MARK, I2C2_SDA_MARK, 2256077365a9SGeert Uytterhoeven }; 2257077365a9SGeert Uytterhoeven static const unsigned int i2c2_b_pins[] = { 2258077365a9SGeert Uytterhoeven /* SCL, SDA */ 2259077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1), 2260077365a9SGeert Uytterhoeven }; 2261077365a9SGeert Uytterhoeven static const unsigned int i2c2_b_mux[] = { 2262077365a9SGeert Uytterhoeven I2C2_SCL_B_MARK, I2C2_SDA_B_MARK, 2263077365a9SGeert Uytterhoeven }; 2264077365a9SGeert Uytterhoeven static const unsigned int i2c2_c_pins[] = { 2265077365a9SGeert Uytterhoeven /* SCL, SDA */ 2266077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7), 2267077365a9SGeert Uytterhoeven }; 2268077365a9SGeert Uytterhoeven static const unsigned int i2c2_c_mux[] = { 2269077365a9SGeert Uytterhoeven I2C2_SCL_C_MARK, I2C2_SDA_C_MARK, 2270077365a9SGeert Uytterhoeven }; 2271077365a9SGeert Uytterhoeven static const unsigned int i2c2_d_pins[] = { 2272077365a9SGeert Uytterhoeven /* SCL, SDA */ 2273077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15), 2274077365a9SGeert Uytterhoeven }; 2275077365a9SGeert Uytterhoeven static const unsigned int i2c2_d_mux[] = { 2276077365a9SGeert Uytterhoeven I2C2_SCL_D_MARK, I2C2_SDA_D_MARK, 2277077365a9SGeert Uytterhoeven }; 2278077365a9SGeert Uytterhoeven static const unsigned int i2c2_e_pins[] = { 2279077365a9SGeert Uytterhoeven /* SCL, SDA */ 2280077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 18), RCAR_GP_PIN(2, 19), 2281077365a9SGeert Uytterhoeven }; 2282077365a9SGeert Uytterhoeven static const unsigned int i2c2_e_mux[] = { 2283077365a9SGeert Uytterhoeven I2C2_SCL_E_MARK, I2C2_SDA_E_MARK, 2284077365a9SGeert Uytterhoeven }; 2285077365a9SGeert Uytterhoeven /* - I2C3 ------------------------------------------------------------------- */ 2286077365a9SGeert Uytterhoeven static const unsigned int i2c3_pins[] = { 2287077365a9SGeert Uytterhoeven /* SCL, SDA */ 2288077365a9SGeert Uytterhoeven PIN_IIC3_SCL, PIN_IIC3_SDA, 2289077365a9SGeert Uytterhoeven }; 2290077365a9SGeert Uytterhoeven static const unsigned int i2c3_mux[] = { 2291077365a9SGeert Uytterhoeven I2C3_SCL_MARK, I2C3_SDA_MARK, 2292077365a9SGeert Uytterhoeven }; 2293077365a9SGeert Uytterhoeven /* - IIC0 (I2C4) ------------------------------------------------------------ */ 2294077365a9SGeert Uytterhoeven static const unsigned int iic0_pins[] = { 2295077365a9SGeert Uytterhoeven /* SCL, SDA */ 2296077365a9SGeert Uytterhoeven PIN_IIC0_SCL, PIN_IIC0_SDA, 2297077365a9SGeert Uytterhoeven }; 2298077365a9SGeert Uytterhoeven static const unsigned int iic0_mux[] = { 2299077365a9SGeert Uytterhoeven IIC0_SCL_MARK, IIC0_SDA_MARK, 2300077365a9SGeert Uytterhoeven }; 2301077365a9SGeert Uytterhoeven /* - IIC1 (I2C5) ------------------------------------------------------------ */ 2302077365a9SGeert Uytterhoeven static const unsigned int iic1_pins[] = { 2303077365a9SGeert Uytterhoeven /* SCL, SDA */ 2304077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 16), RCAR_GP_PIN(1, 17), 2305077365a9SGeert Uytterhoeven }; 2306077365a9SGeert Uytterhoeven static const unsigned int iic1_mux[] = { 2307077365a9SGeert Uytterhoeven IIC1_SCL_MARK, IIC1_SDA_MARK, 2308077365a9SGeert Uytterhoeven }; 2309077365a9SGeert Uytterhoeven static const unsigned int iic1_b_pins[] = { 2310077365a9SGeert Uytterhoeven /* SCL, SDA */ 2311077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7), 2312077365a9SGeert Uytterhoeven }; 2313077365a9SGeert Uytterhoeven static const unsigned int iic1_b_mux[] = { 2314077365a9SGeert Uytterhoeven IIC1_SCL_B_MARK, IIC1_SDA_B_MARK, 2315077365a9SGeert Uytterhoeven }; 2316077365a9SGeert Uytterhoeven static const unsigned int iic1_c_pins[] = { 2317077365a9SGeert Uytterhoeven /* SCL, SDA */ 2318077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 30), RCAR_GP_PIN(4, 27), 2319077365a9SGeert Uytterhoeven }; 2320077365a9SGeert Uytterhoeven static const unsigned int iic1_c_mux[] = { 2321077365a9SGeert Uytterhoeven IIC1_SCL_C_MARK, IIC1_SDA_C_MARK, 2322077365a9SGeert Uytterhoeven }; 2323077365a9SGeert Uytterhoeven /* - IIC2 (I2C6) ------------------------------------------------------------ */ 2324077365a9SGeert Uytterhoeven static const unsigned int iic2_pins[] = { 2325077365a9SGeert Uytterhoeven /* SCL, SDA */ 2326077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6), 2327077365a9SGeert Uytterhoeven }; 2328077365a9SGeert Uytterhoeven static const unsigned int iic2_mux[] = { 2329077365a9SGeert Uytterhoeven IIC2_SCL_MARK, IIC2_SDA_MARK, 2330077365a9SGeert Uytterhoeven }; 2331077365a9SGeert Uytterhoeven static const unsigned int iic2_b_pins[] = { 2332077365a9SGeert Uytterhoeven /* SCL, SDA */ 2333077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1), 2334077365a9SGeert Uytterhoeven }; 2335077365a9SGeert Uytterhoeven static const unsigned int iic2_b_mux[] = { 2336077365a9SGeert Uytterhoeven IIC2_SCL_B_MARK, IIC2_SDA_B_MARK, 2337077365a9SGeert Uytterhoeven }; 2338077365a9SGeert Uytterhoeven static const unsigned int iic2_c_pins[] = { 2339077365a9SGeert Uytterhoeven /* SCL, SDA */ 2340077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7), 2341077365a9SGeert Uytterhoeven }; 2342077365a9SGeert Uytterhoeven static const unsigned int iic2_c_mux[] = { 2343077365a9SGeert Uytterhoeven IIC2_SCL_C_MARK, IIC2_SDA_C_MARK, 2344077365a9SGeert Uytterhoeven }; 2345077365a9SGeert Uytterhoeven static const unsigned int iic2_d_pins[] = { 2346077365a9SGeert Uytterhoeven /* SCL, SDA */ 2347077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15), 2348077365a9SGeert Uytterhoeven }; 2349077365a9SGeert Uytterhoeven static const unsigned int iic2_d_mux[] = { 2350077365a9SGeert Uytterhoeven IIC2_SCL_D_MARK, IIC2_SDA_D_MARK, 2351077365a9SGeert Uytterhoeven }; 2352077365a9SGeert Uytterhoeven static const unsigned int iic2_e_pins[] = { 2353077365a9SGeert Uytterhoeven /* SCL, SDA */ 2354077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 18), RCAR_GP_PIN(2, 19), 2355077365a9SGeert Uytterhoeven }; 2356077365a9SGeert Uytterhoeven static const unsigned int iic2_e_mux[] = { 2357077365a9SGeert Uytterhoeven IIC2_SCL_E_MARK, IIC2_SDA_E_MARK, 2358077365a9SGeert Uytterhoeven }; 2359077365a9SGeert Uytterhoeven /* - IIC3 (I2C7) ------------------------------------------------------------ */ 2360077365a9SGeert Uytterhoeven static const unsigned int iic3_pins[] = { 2361077365a9SGeert Uytterhoeven /* SCL, SDA */ 2362077365a9SGeert Uytterhoeven PIN_IIC3_SCL, PIN_IIC3_SDA, 2363077365a9SGeert Uytterhoeven }; 2364077365a9SGeert Uytterhoeven static const unsigned int iic3_mux[] = { 2365077365a9SGeert Uytterhoeven IIC3_SCL_MARK, IIC3_SDA_MARK, 2366077365a9SGeert Uytterhoeven }; 2367077365a9SGeert Uytterhoeven /* - INTC ------------------------------------------------------------------- */ 2368077365a9SGeert Uytterhoeven static const unsigned int intc_irq0_pins[] = { 2369077365a9SGeert Uytterhoeven /* IRQ */ 2370077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 25), 2371077365a9SGeert Uytterhoeven }; 2372077365a9SGeert Uytterhoeven static const unsigned int intc_irq0_mux[] = { 2373077365a9SGeert Uytterhoeven IRQ0_MARK, 2374077365a9SGeert Uytterhoeven }; 2375077365a9SGeert Uytterhoeven static const unsigned int intc_irq1_pins[] = { 2376077365a9SGeert Uytterhoeven /* IRQ */ 2377077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 27), 2378077365a9SGeert Uytterhoeven }; 2379077365a9SGeert Uytterhoeven static const unsigned int intc_irq1_mux[] = { 2380077365a9SGeert Uytterhoeven IRQ1_MARK, 2381077365a9SGeert Uytterhoeven }; 2382077365a9SGeert Uytterhoeven static const unsigned int intc_irq2_pins[] = { 2383077365a9SGeert Uytterhoeven /* IRQ */ 2384077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 29), 2385077365a9SGeert Uytterhoeven }; 2386077365a9SGeert Uytterhoeven static const unsigned int intc_irq2_mux[] = { 2387077365a9SGeert Uytterhoeven IRQ2_MARK, 2388077365a9SGeert Uytterhoeven }; 2389077365a9SGeert Uytterhoeven static const unsigned int intc_irq3_pins[] = { 2390077365a9SGeert Uytterhoeven /* IRQ */ 2391077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 23), 2392077365a9SGeert Uytterhoeven }; 2393077365a9SGeert Uytterhoeven static const unsigned int intc_irq3_mux[] = { 2394077365a9SGeert Uytterhoeven IRQ3_MARK, 2395077365a9SGeert Uytterhoeven }; 2396529b8eecSBiju Das 2397529b8eecSBiju Das #ifdef CONFIG_PINCTRL_PFC_R8A7790 2398077365a9SGeert Uytterhoeven /* - MLB+ ------------------------------------------------------------------- */ 2399077365a9SGeert Uytterhoeven static const unsigned int mlb_3pin_pins[] = { 2400077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1), RCAR_GP_PIN(4, 2), 2401077365a9SGeert Uytterhoeven }; 2402077365a9SGeert Uytterhoeven static const unsigned int mlb_3pin_mux[] = { 2403077365a9SGeert Uytterhoeven MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK, 2404077365a9SGeert Uytterhoeven }; 2405529b8eecSBiju Das #endif /* CONFIG_PINCTRL_PFC_R8A7790 */ 2406529b8eecSBiju Das 2407077365a9SGeert Uytterhoeven /* - MMCIF0 ----------------------------------------------------------------- */ 2408077365a9SGeert Uytterhoeven static const unsigned int mmc0_data1_pins[] = { 2409077365a9SGeert Uytterhoeven /* D[0] */ 2410077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 18), 2411077365a9SGeert Uytterhoeven }; 2412077365a9SGeert Uytterhoeven static const unsigned int mmc0_data1_mux[] = { 2413077365a9SGeert Uytterhoeven MMC0_D0_MARK, 2414077365a9SGeert Uytterhoeven }; 2415077365a9SGeert Uytterhoeven static const unsigned int mmc0_data4_pins[] = { 2416077365a9SGeert Uytterhoeven /* D[0:3] */ 2417077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19), 2418077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 21), 2419077365a9SGeert Uytterhoeven }; 2420077365a9SGeert Uytterhoeven static const unsigned int mmc0_data4_mux[] = { 2421077365a9SGeert Uytterhoeven MMC0_D0_MARK, MMC0_D1_MARK, MMC0_D2_MARK, MMC0_D3_MARK, 2422077365a9SGeert Uytterhoeven }; 2423077365a9SGeert Uytterhoeven static const unsigned int mmc0_data8_pins[] = { 2424077365a9SGeert Uytterhoeven /* D[0:7] */ 2425077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19), 2426077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 21), 2427077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 22), RCAR_GP_PIN(3, 23), 2428077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7), 2429077365a9SGeert Uytterhoeven }; 2430077365a9SGeert Uytterhoeven static const unsigned int mmc0_data8_mux[] = { 2431077365a9SGeert Uytterhoeven MMC0_D0_MARK, MMC0_D1_MARK, MMC0_D2_MARK, MMC0_D3_MARK, 2432077365a9SGeert Uytterhoeven MMC0_D4_MARK, MMC0_D5_MARK, MMC0_D6_MARK, MMC0_D7_MARK, 2433077365a9SGeert Uytterhoeven }; 2434077365a9SGeert Uytterhoeven static const unsigned int mmc0_ctrl_pins[] = { 2435077365a9SGeert Uytterhoeven /* CLK, CMD */ 2436077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 16), RCAR_GP_PIN(3, 17), 2437077365a9SGeert Uytterhoeven }; 2438077365a9SGeert Uytterhoeven static const unsigned int mmc0_ctrl_mux[] = { 2439077365a9SGeert Uytterhoeven MMC0_CLK_MARK, MMC0_CMD_MARK, 2440077365a9SGeert Uytterhoeven }; 2441077365a9SGeert Uytterhoeven /* - MMCIF1 ----------------------------------------------------------------- */ 2442077365a9SGeert Uytterhoeven static const unsigned int mmc1_data1_pins[] = { 2443077365a9SGeert Uytterhoeven /* D[0] */ 2444077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 26), 2445077365a9SGeert Uytterhoeven }; 2446077365a9SGeert Uytterhoeven static const unsigned int mmc1_data1_mux[] = { 2447077365a9SGeert Uytterhoeven MMC1_D0_MARK, 2448077365a9SGeert Uytterhoeven }; 2449077365a9SGeert Uytterhoeven static const unsigned int mmc1_data4_pins[] = { 2450077365a9SGeert Uytterhoeven /* D[0:3] */ 2451077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 27), 2452077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29), 2453077365a9SGeert Uytterhoeven }; 2454077365a9SGeert Uytterhoeven static const unsigned int mmc1_data4_mux[] = { 2455077365a9SGeert Uytterhoeven MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK, 2456077365a9SGeert Uytterhoeven }; 2457077365a9SGeert Uytterhoeven static const unsigned int mmc1_data8_pins[] = { 2458077365a9SGeert Uytterhoeven /* D[0:7] */ 2459077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 27), 2460077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29), 2461077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 30), RCAR_GP_PIN(3, 31), 2462077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15), 2463077365a9SGeert Uytterhoeven }; 2464077365a9SGeert Uytterhoeven static const unsigned int mmc1_data8_mux[] = { 2465077365a9SGeert Uytterhoeven MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK, 2466077365a9SGeert Uytterhoeven MMC1_D4_MARK, MMC1_D5_MARK, MMC1_D6_MARK, MMC1_D7_MARK, 2467077365a9SGeert Uytterhoeven }; 2468077365a9SGeert Uytterhoeven static const unsigned int mmc1_ctrl_pins[] = { 2469077365a9SGeert Uytterhoeven /* CLK, CMD */ 2470077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 24), RCAR_GP_PIN(3, 25), 2471077365a9SGeert Uytterhoeven }; 2472077365a9SGeert Uytterhoeven static const unsigned int mmc1_ctrl_mux[] = { 2473077365a9SGeert Uytterhoeven MMC1_CLK_MARK, MMC1_CMD_MARK, 2474077365a9SGeert Uytterhoeven }; 2475077365a9SGeert Uytterhoeven /* - MSIOF0 ----------------------------------------------------------------- */ 2476077365a9SGeert Uytterhoeven static const unsigned int msiof0_clk_pins[] = { 2477077365a9SGeert Uytterhoeven /* SCK */ 2478077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 12), 2479077365a9SGeert Uytterhoeven }; 2480077365a9SGeert Uytterhoeven static const unsigned int msiof0_clk_mux[] = { 2481077365a9SGeert Uytterhoeven MSIOF0_SCK_MARK, 2482077365a9SGeert Uytterhoeven }; 2483077365a9SGeert Uytterhoeven static const unsigned int msiof0_sync_pins[] = { 2484077365a9SGeert Uytterhoeven /* SYNC */ 2485077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 13), 2486077365a9SGeert Uytterhoeven }; 2487077365a9SGeert Uytterhoeven static const unsigned int msiof0_sync_mux[] = { 2488077365a9SGeert Uytterhoeven MSIOF0_SYNC_MARK, 2489077365a9SGeert Uytterhoeven }; 2490077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss1_pins[] = { 2491077365a9SGeert Uytterhoeven /* SS1 */ 2492077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 14), 2493077365a9SGeert Uytterhoeven }; 2494077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss1_mux[] = { 2495077365a9SGeert Uytterhoeven MSIOF0_SS1_MARK, 2496077365a9SGeert Uytterhoeven }; 2497077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss2_pins[] = { 2498077365a9SGeert Uytterhoeven /* SS2 */ 2499077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 16), 2500077365a9SGeert Uytterhoeven }; 2501077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss2_mux[] = { 2502077365a9SGeert Uytterhoeven MSIOF0_SS2_MARK, 2503077365a9SGeert Uytterhoeven }; 2504077365a9SGeert Uytterhoeven static const unsigned int msiof0_rx_pins[] = { 2505077365a9SGeert Uytterhoeven /* RXD */ 2506077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 17), 2507077365a9SGeert Uytterhoeven }; 2508077365a9SGeert Uytterhoeven static const unsigned int msiof0_rx_mux[] = { 2509077365a9SGeert Uytterhoeven MSIOF0_RXD_MARK, 2510077365a9SGeert Uytterhoeven }; 2511077365a9SGeert Uytterhoeven static const unsigned int msiof0_tx_pins[] = { 2512077365a9SGeert Uytterhoeven /* TXD */ 2513077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 15), 2514077365a9SGeert Uytterhoeven }; 2515077365a9SGeert Uytterhoeven static const unsigned int msiof0_tx_mux[] = { 2516077365a9SGeert Uytterhoeven MSIOF0_TXD_MARK, 2517077365a9SGeert Uytterhoeven }; 2518077365a9SGeert Uytterhoeven 2519077365a9SGeert Uytterhoeven static const unsigned int msiof0_clk_b_pins[] = { 2520077365a9SGeert Uytterhoeven /* SCK */ 2521077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 23), 2522077365a9SGeert Uytterhoeven }; 2523077365a9SGeert Uytterhoeven static const unsigned int msiof0_clk_b_mux[] = { 2524077365a9SGeert Uytterhoeven MSIOF0_SCK_B_MARK, 2525077365a9SGeert Uytterhoeven }; 2526077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss1_b_pins[] = { 2527077365a9SGeert Uytterhoeven /* SS1 */ 2528077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 12), 2529077365a9SGeert Uytterhoeven }; 2530077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss1_b_mux[] = { 2531077365a9SGeert Uytterhoeven MSIOF0_SS1_B_MARK, 2532077365a9SGeert Uytterhoeven }; 2533077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss2_b_pins[] = { 2534077365a9SGeert Uytterhoeven /* SS2 */ 2535077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 10), 2536077365a9SGeert Uytterhoeven }; 2537077365a9SGeert Uytterhoeven static const unsigned int msiof0_ss2_b_mux[] = { 2538077365a9SGeert Uytterhoeven MSIOF0_SS2_B_MARK, 2539077365a9SGeert Uytterhoeven }; 2540077365a9SGeert Uytterhoeven static const unsigned int msiof0_rx_b_pins[] = { 2541077365a9SGeert Uytterhoeven /* RXD */ 2542077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 29), 2543077365a9SGeert Uytterhoeven }; 2544077365a9SGeert Uytterhoeven static const unsigned int msiof0_rx_b_mux[] = { 2545077365a9SGeert Uytterhoeven MSIOF0_RXD_B_MARK, 2546077365a9SGeert Uytterhoeven }; 2547077365a9SGeert Uytterhoeven static const unsigned int msiof0_tx_b_pins[] = { 2548077365a9SGeert Uytterhoeven /* TXD */ 2549077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 28), 2550077365a9SGeert Uytterhoeven }; 2551077365a9SGeert Uytterhoeven static const unsigned int msiof0_tx_b_mux[] = { 2552077365a9SGeert Uytterhoeven MSIOF0_TXD_B_MARK, 2553077365a9SGeert Uytterhoeven }; 2554077365a9SGeert Uytterhoeven /* - MSIOF1 ----------------------------------------------------------------- */ 2555077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_pins[] = { 2556077365a9SGeert Uytterhoeven /* SCK */ 2557077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 8), 2558077365a9SGeert Uytterhoeven }; 2559077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_mux[] = { 2560077365a9SGeert Uytterhoeven MSIOF1_SCK_MARK, 2561077365a9SGeert Uytterhoeven }; 2562077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_pins[] = { 2563077365a9SGeert Uytterhoeven /* SYNC */ 2564077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 9), 2565077365a9SGeert Uytterhoeven }; 2566077365a9SGeert Uytterhoeven static const unsigned int msiof1_sync_mux[] = { 2567077365a9SGeert Uytterhoeven MSIOF1_SYNC_MARK, 2568077365a9SGeert Uytterhoeven }; 2569077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_pins[] = { 2570077365a9SGeert Uytterhoeven /* SS1 */ 2571077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 10), 2572077365a9SGeert Uytterhoeven }; 2573077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_mux[] = { 2574077365a9SGeert Uytterhoeven MSIOF1_SS1_MARK, 2575077365a9SGeert Uytterhoeven }; 2576077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_pins[] = { 2577077365a9SGeert Uytterhoeven /* SS2 */ 2578077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 11), 2579077365a9SGeert Uytterhoeven }; 2580077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_mux[] = { 2581077365a9SGeert Uytterhoeven MSIOF1_SS2_MARK, 2582077365a9SGeert Uytterhoeven }; 2583077365a9SGeert Uytterhoeven static const unsigned int msiof1_rx_pins[] = { 2584077365a9SGeert Uytterhoeven /* RXD */ 2585077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 13), 2586077365a9SGeert Uytterhoeven }; 2587077365a9SGeert Uytterhoeven static const unsigned int msiof1_rx_mux[] = { 2588077365a9SGeert Uytterhoeven MSIOF1_RXD_MARK, 2589077365a9SGeert Uytterhoeven }; 2590077365a9SGeert Uytterhoeven static const unsigned int msiof1_tx_pins[] = { 2591077365a9SGeert Uytterhoeven /* TXD */ 2592077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 12), 2593077365a9SGeert Uytterhoeven }; 2594077365a9SGeert Uytterhoeven static const unsigned int msiof1_tx_mux[] = { 2595077365a9SGeert Uytterhoeven MSIOF1_TXD_MARK, 2596077365a9SGeert Uytterhoeven }; 2597077365a9SGeert Uytterhoeven 2598077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_b_pins[] = { 2599077365a9SGeert Uytterhoeven /* SCK */ 2600077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 16), 2601077365a9SGeert Uytterhoeven }; 2602077365a9SGeert Uytterhoeven static const unsigned int msiof1_clk_b_mux[] = { 2603077365a9SGeert Uytterhoeven MSIOF1_SCK_B_MARK, 2604077365a9SGeert Uytterhoeven }; 2605077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_b_pins[] = { 2606077365a9SGeert Uytterhoeven /* SS1 */ 2607077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 18), 2608077365a9SGeert Uytterhoeven }; 2609077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss1_b_mux[] = { 2610077365a9SGeert Uytterhoeven MSIOF1_SS1_B_MARK, 2611077365a9SGeert Uytterhoeven }; 2612077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_b_pins[] = { 2613077365a9SGeert Uytterhoeven /* SS2 */ 2614077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 19), 2615077365a9SGeert Uytterhoeven }; 2616077365a9SGeert Uytterhoeven static const unsigned int msiof1_ss2_b_mux[] = { 2617077365a9SGeert Uytterhoeven MSIOF1_SS2_B_MARK, 2618077365a9SGeert Uytterhoeven }; 2619077365a9SGeert Uytterhoeven static const unsigned int msiof1_rx_b_pins[] = { 2620077365a9SGeert Uytterhoeven /* RXD */ 2621077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 17), 2622077365a9SGeert Uytterhoeven }; 2623077365a9SGeert Uytterhoeven static const unsigned int msiof1_rx_b_mux[] = { 2624077365a9SGeert Uytterhoeven MSIOF1_RXD_B_MARK, 2625077365a9SGeert Uytterhoeven }; 2626077365a9SGeert Uytterhoeven static const unsigned int msiof1_tx_b_pins[] = { 2627077365a9SGeert Uytterhoeven /* TXD */ 2628077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 20), 2629077365a9SGeert Uytterhoeven }; 2630077365a9SGeert Uytterhoeven static const unsigned int msiof1_tx_b_mux[] = { 2631077365a9SGeert Uytterhoeven MSIOF1_TXD_B_MARK, 2632077365a9SGeert Uytterhoeven }; 2633077365a9SGeert Uytterhoeven /* - MSIOF2 ----------------------------------------------------------------- */ 2634077365a9SGeert Uytterhoeven static const unsigned int msiof2_clk_pins[] = { 2635077365a9SGeert Uytterhoeven /* SCK */ 2636077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 27), 2637077365a9SGeert Uytterhoeven }; 2638077365a9SGeert Uytterhoeven static const unsigned int msiof2_clk_mux[] = { 2639077365a9SGeert Uytterhoeven MSIOF2_SCK_MARK, 2640077365a9SGeert Uytterhoeven }; 2641077365a9SGeert Uytterhoeven static const unsigned int msiof2_sync_pins[] = { 2642077365a9SGeert Uytterhoeven /* SYNC */ 2643077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 26), 2644077365a9SGeert Uytterhoeven }; 2645077365a9SGeert Uytterhoeven static const unsigned int msiof2_sync_mux[] = { 2646077365a9SGeert Uytterhoeven MSIOF2_SYNC_MARK, 2647077365a9SGeert Uytterhoeven }; 2648077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss1_pins[] = { 2649077365a9SGeert Uytterhoeven /* SS1 */ 2650077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 30), 2651077365a9SGeert Uytterhoeven }; 2652077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss1_mux[] = { 2653077365a9SGeert Uytterhoeven MSIOF2_SS1_MARK, 2654077365a9SGeert Uytterhoeven }; 2655077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss2_pins[] = { 2656077365a9SGeert Uytterhoeven /* SS2 */ 2657077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 31), 2658077365a9SGeert Uytterhoeven }; 2659077365a9SGeert Uytterhoeven static const unsigned int msiof2_ss2_mux[] = { 2660077365a9SGeert Uytterhoeven MSIOF2_SS2_MARK, 2661077365a9SGeert Uytterhoeven }; 2662077365a9SGeert Uytterhoeven static const unsigned int msiof2_rx_pins[] = { 2663077365a9SGeert Uytterhoeven /* RXD */ 2664077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 29), 2665077365a9SGeert Uytterhoeven }; 2666077365a9SGeert Uytterhoeven static const unsigned int msiof2_rx_mux[] = { 2667077365a9SGeert Uytterhoeven MSIOF2_RXD_MARK, 2668077365a9SGeert Uytterhoeven }; 2669077365a9SGeert Uytterhoeven static const unsigned int msiof2_tx_pins[] = { 2670077365a9SGeert Uytterhoeven /* TXD */ 2671077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 28), 2672077365a9SGeert Uytterhoeven }; 2673077365a9SGeert Uytterhoeven static const unsigned int msiof2_tx_mux[] = { 2674077365a9SGeert Uytterhoeven MSIOF2_TXD_MARK, 2675077365a9SGeert Uytterhoeven }; 2676077365a9SGeert Uytterhoeven /* - MSIOF3 ----------------------------------------------------------------- */ 2677077365a9SGeert Uytterhoeven static const unsigned int msiof3_clk_pins[] = { 2678077365a9SGeert Uytterhoeven /* SCK */ 2679077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 4), 2680077365a9SGeert Uytterhoeven }; 2681077365a9SGeert Uytterhoeven static const unsigned int msiof3_clk_mux[] = { 2682077365a9SGeert Uytterhoeven MSIOF3_SCK_MARK, 2683077365a9SGeert Uytterhoeven }; 2684077365a9SGeert Uytterhoeven static const unsigned int msiof3_sync_pins[] = { 2685077365a9SGeert Uytterhoeven /* SYNC */ 2686077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 30), 2687077365a9SGeert Uytterhoeven }; 2688077365a9SGeert Uytterhoeven static const unsigned int msiof3_sync_mux[] = { 2689077365a9SGeert Uytterhoeven MSIOF3_SYNC_MARK, 2690077365a9SGeert Uytterhoeven }; 2691077365a9SGeert Uytterhoeven static const unsigned int msiof3_ss1_pins[] = { 2692077365a9SGeert Uytterhoeven /* SS1 */ 2693077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 31), 2694077365a9SGeert Uytterhoeven }; 2695077365a9SGeert Uytterhoeven static const unsigned int msiof3_ss1_mux[] = { 2696077365a9SGeert Uytterhoeven MSIOF3_SS1_MARK, 2697077365a9SGeert Uytterhoeven }; 2698077365a9SGeert Uytterhoeven static const unsigned int msiof3_ss2_pins[] = { 2699077365a9SGeert Uytterhoeven /* SS2 */ 2700077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 27), 2701077365a9SGeert Uytterhoeven }; 2702077365a9SGeert Uytterhoeven static const unsigned int msiof3_ss2_mux[] = { 2703077365a9SGeert Uytterhoeven MSIOF3_SS2_MARK, 2704077365a9SGeert Uytterhoeven }; 2705077365a9SGeert Uytterhoeven static const unsigned int msiof3_rx_pins[] = { 2706077365a9SGeert Uytterhoeven /* RXD */ 2707077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 2), 2708077365a9SGeert Uytterhoeven }; 2709077365a9SGeert Uytterhoeven static const unsigned int msiof3_rx_mux[] = { 2710077365a9SGeert Uytterhoeven MSIOF3_RXD_MARK, 2711077365a9SGeert Uytterhoeven }; 2712077365a9SGeert Uytterhoeven static const unsigned int msiof3_tx_pins[] = { 2713077365a9SGeert Uytterhoeven /* TXD */ 2714077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 3), 2715077365a9SGeert Uytterhoeven }; 2716077365a9SGeert Uytterhoeven static const unsigned int msiof3_tx_mux[] = { 2717077365a9SGeert Uytterhoeven MSIOF3_TXD_MARK, 2718077365a9SGeert Uytterhoeven }; 2719077365a9SGeert Uytterhoeven 2720077365a9SGeert Uytterhoeven static const unsigned int msiof3_clk_b_pins[] = { 2721077365a9SGeert Uytterhoeven /* SCK */ 2722077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 0), 2723077365a9SGeert Uytterhoeven }; 2724077365a9SGeert Uytterhoeven static const unsigned int msiof3_clk_b_mux[] = { 2725077365a9SGeert Uytterhoeven MSIOF3_SCK_B_MARK, 2726077365a9SGeert Uytterhoeven }; 2727077365a9SGeert Uytterhoeven static const unsigned int msiof3_sync_b_pins[] = { 2728077365a9SGeert Uytterhoeven /* SYNC */ 2729077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 1), 2730077365a9SGeert Uytterhoeven }; 2731077365a9SGeert Uytterhoeven static const unsigned int msiof3_sync_b_mux[] = { 2732077365a9SGeert Uytterhoeven MSIOF3_SYNC_B_MARK, 2733077365a9SGeert Uytterhoeven }; 2734077365a9SGeert Uytterhoeven static const unsigned int msiof3_rx_b_pins[] = { 2735077365a9SGeert Uytterhoeven /* RXD */ 2736077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 2), 2737077365a9SGeert Uytterhoeven }; 2738077365a9SGeert Uytterhoeven static const unsigned int msiof3_rx_b_mux[] = { 2739077365a9SGeert Uytterhoeven MSIOF3_RXD_B_MARK, 2740077365a9SGeert Uytterhoeven }; 2741077365a9SGeert Uytterhoeven static const unsigned int msiof3_tx_b_pins[] = { 2742077365a9SGeert Uytterhoeven /* TXD */ 2743077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 3), 2744077365a9SGeert Uytterhoeven }; 2745077365a9SGeert Uytterhoeven static const unsigned int msiof3_tx_b_mux[] = { 2746077365a9SGeert Uytterhoeven MSIOF3_TXD_B_MARK, 2747077365a9SGeert Uytterhoeven }; 2748077365a9SGeert Uytterhoeven /* - PWM -------------------------------------------------------------------- */ 2749077365a9SGeert Uytterhoeven static const unsigned int pwm0_pins[] = { 2750077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 29), 2751077365a9SGeert Uytterhoeven }; 2752077365a9SGeert Uytterhoeven static const unsigned int pwm0_mux[] = { 2753077365a9SGeert Uytterhoeven PWM0_MARK, 2754077365a9SGeert Uytterhoeven }; 2755077365a9SGeert Uytterhoeven static const unsigned int pwm0_b_pins[] = { 2756077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 30), 2757077365a9SGeert Uytterhoeven }; 2758077365a9SGeert Uytterhoeven static const unsigned int pwm0_b_mux[] = { 2759077365a9SGeert Uytterhoeven PWM0_B_MARK, 2760077365a9SGeert Uytterhoeven }; 2761077365a9SGeert Uytterhoeven static const unsigned int pwm1_pins[] = { 2762077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 30), 2763077365a9SGeert Uytterhoeven }; 2764077365a9SGeert Uytterhoeven static const unsigned int pwm1_mux[] = { 2765077365a9SGeert Uytterhoeven PWM1_MARK, 2766077365a9SGeert Uytterhoeven }; 2767077365a9SGeert Uytterhoeven static const unsigned int pwm1_b_pins[] = { 2768077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 31), 2769077365a9SGeert Uytterhoeven }; 2770077365a9SGeert Uytterhoeven static const unsigned int pwm1_b_mux[] = { 2771077365a9SGeert Uytterhoeven PWM1_B_MARK, 2772077365a9SGeert Uytterhoeven }; 2773077365a9SGeert Uytterhoeven static const unsigned int pwm2_pins[] = { 2774077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 31), 2775077365a9SGeert Uytterhoeven }; 2776077365a9SGeert Uytterhoeven static const unsigned int pwm2_mux[] = { 2777077365a9SGeert Uytterhoeven PWM2_MARK, 2778077365a9SGeert Uytterhoeven }; 2779077365a9SGeert Uytterhoeven static const unsigned int pwm3_pins[] = { 2780077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 16), 2781077365a9SGeert Uytterhoeven }; 2782077365a9SGeert Uytterhoeven static const unsigned int pwm3_mux[] = { 2783077365a9SGeert Uytterhoeven PWM3_MARK, 2784077365a9SGeert Uytterhoeven }; 2785077365a9SGeert Uytterhoeven static const unsigned int pwm4_pins[] = { 2786077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 17), 2787077365a9SGeert Uytterhoeven }; 2788077365a9SGeert Uytterhoeven static const unsigned int pwm4_mux[] = { 2789077365a9SGeert Uytterhoeven PWM4_MARK, 2790077365a9SGeert Uytterhoeven }; 2791077365a9SGeert Uytterhoeven static const unsigned int pwm5_pins[] = { 2792077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 18), 2793077365a9SGeert Uytterhoeven }; 2794077365a9SGeert Uytterhoeven static const unsigned int pwm5_mux[] = { 2795077365a9SGeert Uytterhoeven PWM5_MARK, 2796077365a9SGeert Uytterhoeven }; 2797077365a9SGeert Uytterhoeven static const unsigned int pwm6_pins[] = { 2798077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 19), 2799077365a9SGeert Uytterhoeven }; 2800077365a9SGeert Uytterhoeven static const unsigned int pwm6_mux[] = { 2801077365a9SGeert Uytterhoeven PWM6_MARK, 2802077365a9SGeert Uytterhoeven }; 2803077365a9SGeert Uytterhoeven /* - QSPI ------------------------------------------------------------------- */ 2804077365a9SGeert Uytterhoeven static const unsigned int qspi_ctrl_pins[] = { 2805077365a9SGeert Uytterhoeven /* SPCLK, SSL */ 2806077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 9), 2807077365a9SGeert Uytterhoeven }; 2808077365a9SGeert Uytterhoeven static const unsigned int qspi_ctrl_mux[] = { 2809077365a9SGeert Uytterhoeven SPCLK_MARK, SSL_MARK, 2810077365a9SGeert Uytterhoeven }; 2811077365a9SGeert Uytterhoeven static const unsigned int qspi_data2_pins[] = { 2812077365a9SGeert Uytterhoeven /* MOSI_IO0, MISO_IO1 */ 2813077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6), 2814077365a9SGeert Uytterhoeven }; 2815077365a9SGeert Uytterhoeven static const unsigned int qspi_data2_mux[] = { 2816077365a9SGeert Uytterhoeven MOSI_IO0_MARK, MISO_IO1_MARK, 2817077365a9SGeert Uytterhoeven }; 2818077365a9SGeert Uytterhoeven static const unsigned int qspi_data4_pins[] = { 2819077365a9SGeert Uytterhoeven /* MOSI_IO0, MISO_IO1, IO2, IO3 */ 2820077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7), 2821077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 8), 2822077365a9SGeert Uytterhoeven }; 2823077365a9SGeert Uytterhoeven static const unsigned int qspi_data4_mux[] = { 2824077365a9SGeert Uytterhoeven MOSI_IO0_MARK, MISO_IO1_MARK, IO2_MARK, IO3_MARK, 2825077365a9SGeert Uytterhoeven }; 2826077365a9SGeert Uytterhoeven /* - SCIF0 ------------------------------------------------------------------ */ 2827077365a9SGeert Uytterhoeven static const unsigned int scif0_data_pins[] = { 2828077365a9SGeert Uytterhoeven /* RX, TX */ 2829077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 28), RCAR_GP_PIN(4, 29), 2830077365a9SGeert Uytterhoeven }; 2831077365a9SGeert Uytterhoeven static const unsigned int scif0_data_mux[] = { 2832077365a9SGeert Uytterhoeven RX0_MARK, TX0_MARK, 2833077365a9SGeert Uytterhoeven }; 2834077365a9SGeert Uytterhoeven static const unsigned int scif0_clk_pins[] = { 2835077365a9SGeert Uytterhoeven /* SCK */ 2836077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 27), 2837077365a9SGeert Uytterhoeven }; 2838077365a9SGeert Uytterhoeven static const unsigned int scif0_clk_mux[] = { 2839077365a9SGeert Uytterhoeven SCK0_MARK, 2840077365a9SGeert Uytterhoeven }; 2841077365a9SGeert Uytterhoeven static const unsigned int scif0_ctrl_pins[] = { 2842077365a9SGeert Uytterhoeven /* RTS, CTS */ 2843077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 31), RCAR_GP_PIN(4, 30), 2844077365a9SGeert Uytterhoeven }; 2845077365a9SGeert Uytterhoeven static const unsigned int scif0_ctrl_mux[] = { 2846077365a9SGeert Uytterhoeven RTS0_N_MARK, CTS0_N_MARK, 2847077365a9SGeert Uytterhoeven }; 2848077365a9SGeert Uytterhoeven static const unsigned int scif0_data_b_pins[] = { 2849077365a9SGeert Uytterhoeven /* RX, TX */ 2850077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5), 2851077365a9SGeert Uytterhoeven }; 2852077365a9SGeert Uytterhoeven static const unsigned int scif0_data_b_mux[] = { 2853077365a9SGeert Uytterhoeven RX0_B_MARK, TX0_B_MARK, 2854077365a9SGeert Uytterhoeven }; 2855077365a9SGeert Uytterhoeven /* - SCIF1 ------------------------------------------------------------------ */ 2856077365a9SGeert Uytterhoeven static const unsigned int scif1_data_pins[] = { 2857077365a9SGeert Uytterhoeven /* RX, TX */ 2858077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 1), 2859077365a9SGeert Uytterhoeven }; 2860077365a9SGeert Uytterhoeven static const unsigned int scif1_data_mux[] = { 2861077365a9SGeert Uytterhoeven RX1_MARK, TX1_MARK, 2862077365a9SGeert Uytterhoeven }; 2863077365a9SGeert Uytterhoeven static const unsigned int scif1_clk_pins[] = { 2864077365a9SGeert Uytterhoeven /* SCK */ 2865077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 20), 2866077365a9SGeert Uytterhoeven }; 2867077365a9SGeert Uytterhoeven static const unsigned int scif1_clk_mux[] = { 2868077365a9SGeert Uytterhoeven SCK1_MARK, 2869077365a9SGeert Uytterhoeven }; 2870077365a9SGeert Uytterhoeven static const unsigned int scif1_ctrl_pins[] = { 2871077365a9SGeert Uytterhoeven /* RTS, CTS */ 2872077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 2), 2873077365a9SGeert Uytterhoeven }; 2874077365a9SGeert Uytterhoeven static const unsigned int scif1_ctrl_mux[] = { 2875077365a9SGeert Uytterhoeven RTS1_N_MARK, CTS1_N_MARK, 2876077365a9SGeert Uytterhoeven }; 2877077365a9SGeert Uytterhoeven static const unsigned int scif1_data_b_pins[] = { 2878077365a9SGeert Uytterhoeven /* RX, TX */ 2879077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15), 2880077365a9SGeert Uytterhoeven }; 2881077365a9SGeert Uytterhoeven static const unsigned int scif1_data_b_mux[] = { 2882077365a9SGeert Uytterhoeven RX1_B_MARK, TX1_B_MARK, 2883077365a9SGeert Uytterhoeven }; 2884077365a9SGeert Uytterhoeven static const unsigned int scif1_data_c_pins[] = { 2885077365a9SGeert Uytterhoeven /* RX, TX */ 2886077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 1), RCAR_GP_PIN(4, 2), 2887077365a9SGeert Uytterhoeven }; 2888077365a9SGeert Uytterhoeven static const unsigned int scif1_data_c_mux[] = { 2889077365a9SGeert Uytterhoeven RX1_C_MARK, TX1_C_MARK, 2890077365a9SGeert Uytterhoeven }; 2891077365a9SGeert Uytterhoeven static const unsigned int scif1_data_d_pins[] = { 2892077365a9SGeert Uytterhoeven /* RX, TX */ 2893077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19), 2894077365a9SGeert Uytterhoeven }; 2895077365a9SGeert Uytterhoeven static const unsigned int scif1_data_d_mux[] = { 2896077365a9SGeert Uytterhoeven RX1_D_MARK, TX1_D_MARK, 2897077365a9SGeert Uytterhoeven }; 2898077365a9SGeert Uytterhoeven static const unsigned int scif1_clk_d_pins[] = { 2899077365a9SGeert Uytterhoeven /* SCK */ 2900077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 17), 2901077365a9SGeert Uytterhoeven }; 2902077365a9SGeert Uytterhoeven static const unsigned int scif1_clk_d_mux[] = { 2903077365a9SGeert Uytterhoeven SCK1_D_MARK, 2904077365a9SGeert Uytterhoeven }; 2905077365a9SGeert Uytterhoeven static const unsigned int scif1_data_e_pins[] = { 2906077365a9SGeert Uytterhoeven /* RX, TX */ 2907077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 22), 2908077365a9SGeert Uytterhoeven }; 2909077365a9SGeert Uytterhoeven static const unsigned int scif1_data_e_mux[] = { 2910077365a9SGeert Uytterhoeven RX1_E_MARK, TX1_E_MARK, 2911077365a9SGeert Uytterhoeven }; 2912077365a9SGeert Uytterhoeven static const unsigned int scif1_clk_e_pins[] = { 2913077365a9SGeert Uytterhoeven /* SCK */ 2914077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 20), 2915077365a9SGeert Uytterhoeven }; 2916077365a9SGeert Uytterhoeven static const unsigned int scif1_clk_e_mux[] = { 2917077365a9SGeert Uytterhoeven SCK1_E_MARK, 2918077365a9SGeert Uytterhoeven }; 2919077365a9SGeert Uytterhoeven /* - SCIF2 ------------------------------------------------------------------ */ 2920077365a9SGeert Uytterhoeven static const unsigned int scif2_data_pins[] = { 2921077365a9SGeert Uytterhoeven /* RX, TX */ 2922077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 6), RCAR_GP_PIN(5, 5), 2923077365a9SGeert Uytterhoeven }; 2924077365a9SGeert Uytterhoeven static const unsigned int scif2_data_mux[] = { 2925077365a9SGeert Uytterhoeven RX2_MARK, TX2_MARK, 2926077365a9SGeert Uytterhoeven }; 2927077365a9SGeert Uytterhoeven static const unsigned int scif2_clk_pins[] = { 2928077365a9SGeert Uytterhoeven /* SCK */ 2929077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 4), 2930077365a9SGeert Uytterhoeven }; 2931077365a9SGeert Uytterhoeven static const unsigned int scif2_clk_mux[] = { 2932077365a9SGeert Uytterhoeven SCK2_MARK, 2933077365a9SGeert Uytterhoeven }; 2934077365a9SGeert Uytterhoeven static const unsigned int scif2_data_b_pins[] = { 2935077365a9SGeert Uytterhoeven /* RX, TX */ 2936077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 24), RCAR_GP_PIN(0, 25), 2937077365a9SGeert Uytterhoeven }; 2938077365a9SGeert Uytterhoeven static const unsigned int scif2_data_b_mux[] = { 2939077365a9SGeert Uytterhoeven RX2_B_MARK, TX2_B_MARK, 2940077365a9SGeert Uytterhoeven }; 2941077365a9SGeert Uytterhoeven /* - SCIFA0 ----------------------------------------------------------------- */ 2942077365a9SGeert Uytterhoeven static const unsigned int scifa0_data_pins[] = { 2943077365a9SGeert Uytterhoeven /* RXD, TXD */ 2944077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 28), RCAR_GP_PIN(4, 29), 2945077365a9SGeert Uytterhoeven }; 2946077365a9SGeert Uytterhoeven static const unsigned int scifa0_data_mux[] = { 2947077365a9SGeert Uytterhoeven SCIFA0_RXD_MARK, SCIFA0_TXD_MARK, 2948077365a9SGeert Uytterhoeven }; 2949077365a9SGeert Uytterhoeven static const unsigned int scifa0_clk_pins[] = { 2950077365a9SGeert Uytterhoeven /* SCK */ 2951077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 27), 2952077365a9SGeert Uytterhoeven }; 2953077365a9SGeert Uytterhoeven static const unsigned int scifa0_clk_mux[] = { 2954077365a9SGeert Uytterhoeven SCIFA0_SCK_MARK, 2955077365a9SGeert Uytterhoeven }; 2956077365a9SGeert Uytterhoeven static const unsigned int scifa0_ctrl_pins[] = { 2957077365a9SGeert Uytterhoeven /* RTS, CTS */ 2958077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 31), RCAR_GP_PIN(4, 30), 2959077365a9SGeert Uytterhoeven }; 2960077365a9SGeert Uytterhoeven static const unsigned int scifa0_ctrl_mux[] = { 2961077365a9SGeert Uytterhoeven SCIFA0_RTS_N_MARK, SCIFA0_CTS_N_MARK, 2962077365a9SGeert Uytterhoeven }; 2963077365a9SGeert Uytterhoeven static const unsigned int scifa0_data_b_pins[] = { 2964077365a9SGeert Uytterhoeven /* RXD, TXD */ 2965077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 21), 2966077365a9SGeert Uytterhoeven }; 2967077365a9SGeert Uytterhoeven static const unsigned int scifa0_data_b_mux[] = { 2968077365a9SGeert Uytterhoeven SCIFA0_RXD_B_MARK, SCIFA0_TXD_B_MARK 2969077365a9SGeert Uytterhoeven }; 2970077365a9SGeert Uytterhoeven static const unsigned int scifa0_clk_b_pins[] = { 2971077365a9SGeert Uytterhoeven /* SCK */ 2972077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 19), 2973077365a9SGeert Uytterhoeven }; 2974077365a9SGeert Uytterhoeven static const unsigned int scifa0_clk_b_mux[] = { 2975077365a9SGeert Uytterhoeven SCIFA0_SCK_B_MARK, 2976077365a9SGeert Uytterhoeven }; 2977077365a9SGeert Uytterhoeven static const unsigned int scifa0_ctrl_b_pins[] = { 2978077365a9SGeert Uytterhoeven /* RTS, CTS */ 2979077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 22), 2980077365a9SGeert Uytterhoeven }; 2981077365a9SGeert Uytterhoeven static const unsigned int scifa0_ctrl_b_mux[] = { 2982077365a9SGeert Uytterhoeven SCIFA0_RTS_N_B_MARK, SCIFA0_CTS_N_B_MARK, 2983077365a9SGeert Uytterhoeven }; 2984077365a9SGeert Uytterhoeven /* - SCIFA1 ----------------------------------------------------------------- */ 2985077365a9SGeert Uytterhoeven static const unsigned int scifa1_data_pins[] = { 2986077365a9SGeert Uytterhoeven /* RXD, TXD */ 2987077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 1), 2988077365a9SGeert Uytterhoeven }; 2989077365a9SGeert Uytterhoeven static const unsigned int scifa1_data_mux[] = { 2990077365a9SGeert Uytterhoeven SCIFA1_RXD_MARK, SCIFA1_TXD_MARK, 2991077365a9SGeert Uytterhoeven }; 2992077365a9SGeert Uytterhoeven static const unsigned int scifa1_clk_pins[] = { 2993077365a9SGeert Uytterhoeven /* SCK */ 2994077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 20), 2995077365a9SGeert Uytterhoeven }; 2996077365a9SGeert Uytterhoeven static const unsigned int scifa1_clk_mux[] = { 2997077365a9SGeert Uytterhoeven SCIFA1_SCK_MARK, 2998077365a9SGeert Uytterhoeven }; 2999077365a9SGeert Uytterhoeven static const unsigned int scifa1_ctrl_pins[] = { 3000077365a9SGeert Uytterhoeven /* RTS, CTS */ 3001077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 2), 3002077365a9SGeert Uytterhoeven }; 3003077365a9SGeert Uytterhoeven static const unsigned int scifa1_ctrl_mux[] = { 3004077365a9SGeert Uytterhoeven SCIFA1_RTS_N_MARK, SCIFA1_CTS_N_MARK, 3005077365a9SGeert Uytterhoeven }; 3006077365a9SGeert Uytterhoeven static const unsigned int scifa1_data_b_pins[] = { 3007077365a9SGeert Uytterhoeven /* RXD, TXD */ 3008077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 24), RCAR_GP_PIN(0, 21), 3009077365a9SGeert Uytterhoeven }; 3010077365a9SGeert Uytterhoeven static const unsigned int scifa1_data_b_mux[] = { 3011077365a9SGeert Uytterhoeven SCIFA1_RXD_B_MARK, SCIFA1_TXD_B_MARK, 3012077365a9SGeert Uytterhoeven }; 3013077365a9SGeert Uytterhoeven static const unsigned int scifa1_clk_b_pins[] = { 3014077365a9SGeert Uytterhoeven /* SCK */ 3015077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 23), 3016077365a9SGeert Uytterhoeven }; 3017077365a9SGeert Uytterhoeven static const unsigned int scifa1_clk_b_mux[] = { 3018077365a9SGeert Uytterhoeven SCIFA1_SCK_B_MARK, 3019077365a9SGeert Uytterhoeven }; 3020077365a9SGeert Uytterhoeven static const unsigned int scifa1_ctrl_b_pins[] = { 3021077365a9SGeert Uytterhoeven /* RTS, CTS */ 3022077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 22), RCAR_GP_PIN(0, 25), 3023077365a9SGeert Uytterhoeven }; 3024077365a9SGeert Uytterhoeven static const unsigned int scifa1_ctrl_b_mux[] = { 3025077365a9SGeert Uytterhoeven SCIFA1_RTS_N_B_MARK, SCIFA1_CTS_N_B_MARK, 3026077365a9SGeert Uytterhoeven }; 3027077365a9SGeert Uytterhoeven static const unsigned int scifa1_data_c_pins[] = { 3028077365a9SGeert Uytterhoeven /* RXD, TXD */ 3029077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10), 3030077365a9SGeert Uytterhoeven }; 3031077365a9SGeert Uytterhoeven static const unsigned int scifa1_data_c_mux[] = { 3032077365a9SGeert Uytterhoeven SCIFA1_RXD_C_MARK, SCIFA1_TXD_C_MARK, 3033077365a9SGeert Uytterhoeven }; 3034077365a9SGeert Uytterhoeven static const unsigned int scifa1_clk_c_pins[] = { 3035077365a9SGeert Uytterhoeven /* SCK */ 3036077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 8), 3037077365a9SGeert Uytterhoeven }; 3038077365a9SGeert Uytterhoeven static const unsigned int scifa1_clk_c_mux[] = { 3039077365a9SGeert Uytterhoeven SCIFA1_SCK_C_MARK, 3040077365a9SGeert Uytterhoeven }; 3041077365a9SGeert Uytterhoeven static const unsigned int scifa1_ctrl_c_pins[] = { 3042077365a9SGeert Uytterhoeven /* RTS, CTS */ 3043077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11), 3044077365a9SGeert Uytterhoeven }; 3045077365a9SGeert Uytterhoeven static const unsigned int scifa1_ctrl_c_mux[] = { 3046077365a9SGeert Uytterhoeven SCIFA1_RTS_N_C_MARK, SCIFA1_CTS_N_C_MARK, 3047077365a9SGeert Uytterhoeven }; 3048077365a9SGeert Uytterhoeven static const unsigned int scifa1_data_d_pins[] = { 3049077365a9SGeert Uytterhoeven /* RXD, TXD */ 3050077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 12), 3051077365a9SGeert Uytterhoeven }; 3052077365a9SGeert Uytterhoeven static const unsigned int scifa1_data_d_mux[] = { 3053077365a9SGeert Uytterhoeven SCIFA1_RXD_D_MARK, SCIFA1_TXD_D_MARK, 3054077365a9SGeert Uytterhoeven }; 3055077365a9SGeert Uytterhoeven static const unsigned int scifa1_clk_d_pins[] = { 3056077365a9SGeert Uytterhoeven /* SCK */ 3057077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 10), 3058077365a9SGeert Uytterhoeven }; 3059077365a9SGeert Uytterhoeven static const unsigned int scifa1_clk_d_mux[] = { 3060077365a9SGeert Uytterhoeven SCIFA1_SCK_D_MARK, 3061077365a9SGeert Uytterhoeven }; 3062077365a9SGeert Uytterhoeven static const unsigned int scifa1_ctrl_d_pins[] = { 3063077365a9SGeert Uytterhoeven /* RTS, CTS */ 3064077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 13), 3065077365a9SGeert Uytterhoeven }; 3066077365a9SGeert Uytterhoeven static const unsigned int scifa1_ctrl_d_mux[] = { 3067077365a9SGeert Uytterhoeven SCIFA1_RTS_N_D_MARK, SCIFA1_CTS_N_D_MARK, 3068077365a9SGeert Uytterhoeven }; 3069077365a9SGeert Uytterhoeven /* - SCIFA2 ----------------------------------------------------------------- */ 3070077365a9SGeert Uytterhoeven static const unsigned int scifa2_data_pins[] = { 3071077365a9SGeert Uytterhoeven /* RXD, TXD */ 3072077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6), 3073077365a9SGeert Uytterhoeven }; 3074077365a9SGeert Uytterhoeven static const unsigned int scifa2_data_mux[] = { 3075077365a9SGeert Uytterhoeven SCIFA2_RXD_MARK, SCIFA2_TXD_MARK, 3076077365a9SGeert Uytterhoeven }; 3077077365a9SGeert Uytterhoeven static const unsigned int scifa2_clk_pins[] = { 3078077365a9SGeert Uytterhoeven /* SCK */ 3079077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 4), 3080077365a9SGeert Uytterhoeven }; 3081077365a9SGeert Uytterhoeven static const unsigned int scifa2_clk_mux[] = { 3082077365a9SGeert Uytterhoeven SCIFA2_SCK_MARK, 3083077365a9SGeert Uytterhoeven }; 3084077365a9SGeert Uytterhoeven static const unsigned int scifa2_ctrl_pins[] = { 3085077365a9SGeert Uytterhoeven /* RTS, CTS */ 3086077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 22), RCAR_GP_PIN(4, 21), 3087077365a9SGeert Uytterhoeven }; 3088077365a9SGeert Uytterhoeven static const unsigned int scifa2_ctrl_mux[] = { 3089077365a9SGeert Uytterhoeven SCIFA2_RTS_N_MARK, SCIFA2_CTS_N_MARK, 3090077365a9SGeert Uytterhoeven }; 3091077365a9SGeert Uytterhoeven static const unsigned int scifa2_data_b_pins[] = { 3092077365a9SGeert Uytterhoeven /* RXD, TXD */ 3093077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 16), 3094077365a9SGeert Uytterhoeven }; 3095077365a9SGeert Uytterhoeven static const unsigned int scifa2_data_b_mux[] = { 3096077365a9SGeert Uytterhoeven SCIFA2_RXD_B_MARK, SCIFA2_TXD_B_MARK, 3097077365a9SGeert Uytterhoeven }; 3098077365a9SGeert Uytterhoeven static const unsigned int scifa2_data_c_pins[] = { 3099077365a9SGeert Uytterhoeven /* RXD, TXD */ 3100077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 31), RCAR_GP_PIN(5, 30), 3101077365a9SGeert Uytterhoeven }; 3102077365a9SGeert Uytterhoeven static const unsigned int scifa2_data_c_mux[] = { 3103077365a9SGeert Uytterhoeven SCIFA2_RXD_C_MARK, SCIFA2_TXD_C_MARK, 3104077365a9SGeert Uytterhoeven }; 3105077365a9SGeert Uytterhoeven static const unsigned int scifa2_clk_c_pins[] = { 3106077365a9SGeert Uytterhoeven /* SCK */ 3107077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 29), 3108077365a9SGeert Uytterhoeven }; 3109077365a9SGeert Uytterhoeven static const unsigned int scifa2_clk_c_mux[] = { 3110077365a9SGeert Uytterhoeven SCIFA2_SCK_C_MARK, 3111077365a9SGeert Uytterhoeven }; 3112077365a9SGeert Uytterhoeven /* - SCIFB0 ----------------------------------------------------------------- */ 3113077365a9SGeert Uytterhoeven static const unsigned int scifb0_data_pins[] = { 3114077365a9SGeert Uytterhoeven /* RXD, TXD */ 3115077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 9), RCAR_GP_PIN(4, 10), 3116077365a9SGeert Uytterhoeven }; 3117077365a9SGeert Uytterhoeven static const unsigned int scifb0_data_mux[] = { 3118077365a9SGeert Uytterhoeven SCIFB0_RXD_MARK, SCIFB0_TXD_MARK, 3119077365a9SGeert Uytterhoeven }; 3120077365a9SGeert Uytterhoeven static const unsigned int scifb0_clk_pins[] = { 3121077365a9SGeert Uytterhoeven /* SCK */ 3122077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 8), 3123077365a9SGeert Uytterhoeven }; 3124077365a9SGeert Uytterhoeven static const unsigned int scifb0_clk_mux[] = { 3125077365a9SGeert Uytterhoeven SCIFB0_SCK_MARK, 3126077365a9SGeert Uytterhoeven }; 3127077365a9SGeert Uytterhoeven static const unsigned int scifb0_ctrl_pins[] = { 3128077365a9SGeert Uytterhoeven /* RTS, CTS */ 3129077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 12), RCAR_GP_PIN(4, 11), 3130077365a9SGeert Uytterhoeven }; 3131077365a9SGeert Uytterhoeven static const unsigned int scifb0_ctrl_mux[] = { 3132077365a9SGeert Uytterhoeven SCIFB0_RTS_N_MARK, SCIFB0_CTS_N_MARK, 3133077365a9SGeert Uytterhoeven }; 3134077365a9SGeert Uytterhoeven static const unsigned int scifb0_data_b_pins[] = { 3135077365a9SGeert Uytterhoeven /* RXD, TXD */ 3136077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11), 3137077365a9SGeert Uytterhoeven }; 3138077365a9SGeert Uytterhoeven static const unsigned int scifb0_data_b_mux[] = { 3139077365a9SGeert Uytterhoeven SCIFB0_RXD_B_MARK, SCIFB0_TXD_B_MARK, 3140077365a9SGeert Uytterhoeven }; 3141077365a9SGeert Uytterhoeven static const unsigned int scifb0_clk_b_pins[] = { 3142077365a9SGeert Uytterhoeven /* SCK */ 3143077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 9), 3144077365a9SGeert Uytterhoeven }; 3145077365a9SGeert Uytterhoeven static const unsigned int scifb0_clk_b_mux[] = { 3146077365a9SGeert Uytterhoeven SCIFB0_SCK_B_MARK, 3147077365a9SGeert Uytterhoeven }; 3148077365a9SGeert Uytterhoeven static const unsigned int scifb0_ctrl_b_pins[] = { 3149077365a9SGeert Uytterhoeven /* RTS, CTS */ 3150077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 12), 3151077365a9SGeert Uytterhoeven }; 3152077365a9SGeert Uytterhoeven static const unsigned int scifb0_ctrl_b_mux[] = { 3153077365a9SGeert Uytterhoeven SCIFB0_RTS_N_B_MARK, SCIFB0_CTS_N_B_MARK, 3154077365a9SGeert Uytterhoeven }; 3155077365a9SGeert Uytterhoeven static const unsigned int scifb0_data_c_pins[] = { 3156077365a9SGeert Uytterhoeven /* RXD, TXD */ 3157077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5), 3158077365a9SGeert Uytterhoeven }; 3159077365a9SGeert Uytterhoeven static const unsigned int scifb0_data_c_mux[] = { 3160077365a9SGeert Uytterhoeven SCIFB0_RXD_C_MARK, SCIFB0_TXD_C_MARK, 3161077365a9SGeert Uytterhoeven }; 3162077365a9SGeert Uytterhoeven /* - SCIFB1 ----------------------------------------------------------------- */ 3163077365a9SGeert Uytterhoeven static const unsigned int scifb1_data_pins[] = { 3164077365a9SGeert Uytterhoeven /* RXD, TXD */ 3165077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 16), 3166077365a9SGeert Uytterhoeven }; 3167077365a9SGeert Uytterhoeven static const unsigned int scifb1_data_mux[] = { 3168077365a9SGeert Uytterhoeven SCIFB1_RXD_MARK, SCIFB1_TXD_MARK, 3169077365a9SGeert Uytterhoeven }; 3170077365a9SGeert Uytterhoeven static const unsigned int scifb1_clk_pins[] = { 3171077365a9SGeert Uytterhoeven /* SCK */ 3172077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 14), 3173077365a9SGeert Uytterhoeven }; 3174077365a9SGeert Uytterhoeven static const unsigned int scifb1_clk_mux[] = { 3175077365a9SGeert Uytterhoeven SCIFB1_SCK_MARK, 3176077365a9SGeert Uytterhoeven }; 3177077365a9SGeert Uytterhoeven static const unsigned int scifb1_ctrl_pins[] = { 3178077365a9SGeert Uytterhoeven /* RTS, CTS */ 3179077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 18), RCAR_GP_PIN(4, 17), 3180077365a9SGeert Uytterhoeven }; 3181077365a9SGeert Uytterhoeven static const unsigned int scifb1_ctrl_mux[] = { 3182077365a9SGeert Uytterhoeven SCIFB1_RTS_N_MARK, SCIFB1_CTS_N_MARK, 3183077365a9SGeert Uytterhoeven }; 3184077365a9SGeert Uytterhoeven static const unsigned int scifb1_data_b_pins[] = { 3185077365a9SGeert Uytterhoeven /* RXD, TXD */ 3186077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3), 3187077365a9SGeert Uytterhoeven }; 3188077365a9SGeert Uytterhoeven static const unsigned int scifb1_data_b_mux[] = { 3189077365a9SGeert Uytterhoeven SCIFB1_RXD_B_MARK, SCIFB1_TXD_B_MARK, 3190077365a9SGeert Uytterhoeven }; 3191077365a9SGeert Uytterhoeven static const unsigned int scifb1_clk_b_pins[] = { 3192077365a9SGeert Uytterhoeven /* SCK */ 3193077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 1), 3194077365a9SGeert Uytterhoeven }; 3195077365a9SGeert Uytterhoeven static const unsigned int scifb1_clk_b_mux[] = { 3196077365a9SGeert Uytterhoeven SCIFB1_SCK_B_MARK, 3197077365a9SGeert Uytterhoeven }; 3198077365a9SGeert Uytterhoeven static const unsigned int scifb1_ctrl_b_pins[] = { 3199077365a9SGeert Uytterhoeven /* RTS, CTS */ 3200077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 5), RCAR_GP_PIN(3, 4), 3201077365a9SGeert Uytterhoeven }; 3202077365a9SGeert Uytterhoeven static const unsigned int scifb1_ctrl_b_mux[] = { 3203077365a9SGeert Uytterhoeven SCIFB1_RTS_N_B_MARK, SCIFB1_CTS_N_B_MARK, 3204077365a9SGeert Uytterhoeven }; 3205077365a9SGeert Uytterhoeven static const unsigned int scifb1_data_c_pins[] = { 3206077365a9SGeert Uytterhoeven /* RXD, TXD */ 3207077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15), 3208077365a9SGeert Uytterhoeven }; 3209077365a9SGeert Uytterhoeven static const unsigned int scifb1_data_c_mux[] = { 3210077365a9SGeert Uytterhoeven SCIFB1_RXD_C_MARK, SCIFB1_TXD_C_MARK, 3211077365a9SGeert Uytterhoeven }; 3212077365a9SGeert Uytterhoeven static const unsigned int scifb1_data_d_pins[] = { 3213077365a9SGeert Uytterhoeven /* RXD, TXD */ 3214077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 1), RCAR_GP_PIN(4, 2), 3215077365a9SGeert Uytterhoeven }; 3216077365a9SGeert Uytterhoeven static const unsigned int scifb1_data_d_mux[] = { 3217077365a9SGeert Uytterhoeven SCIFB1_RXD_D_MARK, SCIFB1_TXD_D_MARK, 3218077365a9SGeert Uytterhoeven }; 3219077365a9SGeert Uytterhoeven static const unsigned int scifb1_data_e_pins[] = { 3220077365a9SGeert Uytterhoeven /* RXD, TXD */ 3221077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19), 3222077365a9SGeert Uytterhoeven }; 3223077365a9SGeert Uytterhoeven static const unsigned int scifb1_data_e_mux[] = { 3224077365a9SGeert Uytterhoeven SCIFB1_RXD_E_MARK, SCIFB1_TXD_E_MARK, 3225077365a9SGeert Uytterhoeven }; 3226077365a9SGeert Uytterhoeven static const unsigned int scifb1_clk_e_pins[] = { 3227077365a9SGeert Uytterhoeven /* SCK */ 3228077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 17), 3229077365a9SGeert Uytterhoeven }; 3230077365a9SGeert Uytterhoeven static const unsigned int scifb1_clk_e_mux[] = { 3231077365a9SGeert Uytterhoeven SCIFB1_SCK_E_MARK, 3232077365a9SGeert Uytterhoeven }; 3233077365a9SGeert Uytterhoeven static const unsigned int scifb1_data_f_pins[] = { 3234077365a9SGeert Uytterhoeven /* RXD, TXD */ 3235077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5), 3236077365a9SGeert Uytterhoeven }; 3237077365a9SGeert Uytterhoeven static const unsigned int scifb1_data_f_mux[] = { 3238077365a9SGeert Uytterhoeven SCIFB1_RXD_F_MARK, SCIFB1_TXD_F_MARK, 3239077365a9SGeert Uytterhoeven }; 3240077365a9SGeert Uytterhoeven static const unsigned int scifb1_data_g_pins[] = { 3241077365a9SGeert Uytterhoeven /* RXD, TXD */ 3242077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 22), 3243077365a9SGeert Uytterhoeven }; 3244077365a9SGeert Uytterhoeven static const unsigned int scifb1_data_g_mux[] = { 3245077365a9SGeert Uytterhoeven SCIFB1_RXD_G_MARK, SCIFB1_TXD_G_MARK, 3246077365a9SGeert Uytterhoeven }; 3247077365a9SGeert Uytterhoeven static const unsigned int scifb1_clk_g_pins[] = { 3248077365a9SGeert Uytterhoeven /* SCK */ 3249077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 20), 3250077365a9SGeert Uytterhoeven }; 3251077365a9SGeert Uytterhoeven static const unsigned int scifb1_clk_g_mux[] = { 3252077365a9SGeert Uytterhoeven SCIFB1_SCK_G_MARK, 3253077365a9SGeert Uytterhoeven }; 3254077365a9SGeert Uytterhoeven /* - SCIFB2 ----------------------------------------------------------------- */ 3255077365a9SGeert Uytterhoeven static const unsigned int scifb2_data_pins[] = { 3256077365a9SGeert Uytterhoeven /* RXD, TXD */ 3257077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 22), RCAR_GP_PIN(4, 23), 3258077365a9SGeert Uytterhoeven }; 3259077365a9SGeert Uytterhoeven static const unsigned int scifb2_data_mux[] = { 3260077365a9SGeert Uytterhoeven SCIFB2_RXD_MARK, SCIFB2_TXD_MARK, 3261077365a9SGeert Uytterhoeven }; 3262077365a9SGeert Uytterhoeven static const unsigned int scifb2_clk_pins[] = { 3263077365a9SGeert Uytterhoeven /* SCK */ 3264077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 21), 3265077365a9SGeert Uytterhoeven }; 3266077365a9SGeert Uytterhoeven static const unsigned int scifb2_clk_mux[] = { 3267077365a9SGeert Uytterhoeven SCIFB2_SCK_MARK, 3268077365a9SGeert Uytterhoeven }; 3269077365a9SGeert Uytterhoeven static const unsigned int scifb2_ctrl_pins[] = { 3270077365a9SGeert Uytterhoeven /* RTS, CTS */ 3271077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 25), RCAR_GP_PIN(4, 24), 3272077365a9SGeert Uytterhoeven }; 3273077365a9SGeert Uytterhoeven static const unsigned int scifb2_ctrl_mux[] = { 3274077365a9SGeert Uytterhoeven SCIFB2_RTS_N_MARK, SCIFB2_CTS_N_MARK, 3275077365a9SGeert Uytterhoeven }; 3276077365a9SGeert Uytterhoeven static const unsigned int scifb2_data_b_pins[] = { 3277077365a9SGeert Uytterhoeven /* RXD, TXD */ 3278077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 28), RCAR_GP_PIN(0, 30), 3279077365a9SGeert Uytterhoeven }; 3280077365a9SGeert Uytterhoeven static const unsigned int scifb2_data_b_mux[] = { 3281077365a9SGeert Uytterhoeven SCIFB2_RXD_B_MARK, SCIFB2_TXD_B_MARK, 3282077365a9SGeert Uytterhoeven }; 3283077365a9SGeert Uytterhoeven static const unsigned int scifb2_clk_b_pins[] = { 3284077365a9SGeert Uytterhoeven /* SCK */ 3285077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 31), 3286077365a9SGeert Uytterhoeven }; 3287077365a9SGeert Uytterhoeven static const unsigned int scifb2_clk_b_mux[] = { 3288077365a9SGeert Uytterhoeven SCIFB2_SCK_B_MARK, 3289077365a9SGeert Uytterhoeven }; 3290077365a9SGeert Uytterhoeven static const unsigned int scifb2_ctrl_b_pins[] = { 3291077365a9SGeert Uytterhoeven /* RTS, CTS */ 3292077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 29), RCAR_GP_PIN(0, 27), 3293077365a9SGeert Uytterhoeven }; 3294077365a9SGeert Uytterhoeven static const unsigned int scifb2_ctrl_b_mux[] = { 3295077365a9SGeert Uytterhoeven SCIFB2_RTS_N_B_MARK, SCIFB2_CTS_N_B_MARK, 3296077365a9SGeert Uytterhoeven }; 3297077365a9SGeert Uytterhoeven static const unsigned int scifb2_data_c_pins[] = { 3298077365a9SGeert Uytterhoeven /* RXD, TXD */ 3299077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 24), RCAR_GP_PIN(0, 25), 3300077365a9SGeert Uytterhoeven }; 3301077365a9SGeert Uytterhoeven static const unsigned int scifb2_data_c_mux[] = { 3302077365a9SGeert Uytterhoeven SCIFB2_RXD_C_MARK, SCIFB2_TXD_C_MARK, 3303077365a9SGeert Uytterhoeven }; 3304077365a9SGeert Uytterhoeven /* - SCIF Clock ------------------------------------------------------------- */ 3305077365a9SGeert Uytterhoeven static const unsigned int scif_clk_pins[] = { 3306077365a9SGeert Uytterhoeven /* SCIF_CLK */ 3307077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 26), 3308077365a9SGeert Uytterhoeven }; 3309077365a9SGeert Uytterhoeven static const unsigned int scif_clk_mux[] = { 3310077365a9SGeert Uytterhoeven SCIF_CLK_MARK, 3311077365a9SGeert Uytterhoeven }; 3312077365a9SGeert Uytterhoeven static const unsigned int scif_clk_b_pins[] = { 3313077365a9SGeert Uytterhoeven /* SCIF_CLK */ 3314077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 4), 3315077365a9SGeert Uytterhoeven }; 3316077365a9SGeert Uytterhoeven static const unsigned int scif_clk_b_mux[] = { 3317077365a9SGeert Uytterhoeven SCIF_CLK_B_MARK, 3318077365a9SGeert Uytterhoeven }; 3319077365a9SGeert Uytterhoeven /* - SDHI0 ------------------------------------------------------------------ */ 3320077365a9SGeert Uytterhoeven static const unsigned int sdhi0_data1_pins[] = { 3321077365a9SGeert Uytterhoeven /* D0 */ 3322077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 2), 3323077365a9SGeert Uytterhoeven }; 3324077365a9SGeert Uytterhoeven static const unsigned int sdhi0_data1_mux[] = { 3325077365a9SGeert Uytterhoeven SD0_DAT0_MARK, 3326077365a9SGeert Uytterhoeven }; 3327077365a9SGeert Uytterhoeven static const unsigned int sdhi0_data4_pins[] = { 3328077365a9SGeert Uytterhoeven /* D[0:3] */ 3329077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3), RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5), 3330077365a9SGeert Uytterhoeven }; 3331077365a9SGeert Uytterhoeven static const unsigned int sdhi0_data4_mux[] = { 3332077365a9SGeert Uytterhoeven SD0_DAT0_MARK, SD0_DAT1_MARK, SD0_DAT2_MARK, SD0_DAT3_MARK, 3333077365a9SGeert Uytterhoeven }; 3334077365a9SGeert Uytterhoeven static const unsigned int sdhi0_ctrl_pins[] = { 3335077365a9SGeert Uytterhoeven /* CLK, CMD */ 3336077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1), 3337077365a9SGeert Uytterhoeven }; 3338077365a9SGeert Uytterhoeven static const unsigned int sdhi0_ctrl_mux[] = { 3339077365a9SGeert Uytterhoeven SD0_CLK_MARK, SD0_CMD_MARK, 3340077365a9SGeert Uytterhoeven }; 3341077365a9SGeert Uytterhoeven static const unsigned int sdhi0_cd_pins[] = { 3342077365a9SGeert Uytterhoeven /* CD */ 3343077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 6), 3344077365a9SGeert Uytterhoeven }; 3345077365a9SGeert Uytterhoeven static const unsigned int sdhi0_cd_mux[] = { 3346077365a9SGeert Uytterhoeven SD0_CD_MARK, 3347077365a9SGeert Uytterhoeven }; 3348077365a9SGeert Uytterhoeven static const unsigned int sdhi0_wp_pins[] = { 3349077365a9SGeert Uytterhoeven /* WP */ 3350077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 7), 3351077365a9SGeert Uytterhoeven }; 3352077365a9SGeert Uytterhoeven static const unsigned int sdhi0_wp_mux[] = { 3353077365a9SGeert Uytterhoeven SD0_WP_MARK, 3354077365a9SGeert Uytterhoeven }; 3355077365a9SGeert Uytterhoeven /* - SDHI1 ------------------------------------------------------------------ */ 3356077365a9SGeert Uytterhoeven static const unsigned int sdhi1_data1_pins[] = { 3357077365a9SGeert Uytterhoeven /* D0 */ 3358077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 10), 3359077365a9SGeert Uytterhoeven }; 3360077365a9SGeert Uytterhoeven static const unsigned int sdhi1_data1_mux[] = { 3361077365a9SGeert Uytterhoeven SD1_DAT0_MARK, 3362077365a9SGeert Uytterhoeven }; 3363077365a9SGeert Uytterhoeven static const unsigned int sdhi1_data4_pins[] = { 3364077365a9SGeert Uytterhoeven /* D[0:3] */ 3365077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11), RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 13), 3366077365a9SGeert Uytterhoeven }; 3367077365a9SGeert Uytterhoeven static const unsigned int sdhi1_data4_mux[] = { 3368077365a9SGeert Uytterhoeven SD1_DAT0_MARK, SD1_DAT1_MARK, SD1_DAT2_MARK, SD1_DAT3_MARK, 3369077365a9SGeert Uytterhoeven }; 3370077365a9SGeert Uytterhoeven static const unsigned int sdhi1_ctrl_pins[] = { 3371077365a9SGeert Uytterhoeven /* CLK, CMD */ 3372077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9), 3373077365a9SGeert Uytterhoeven }; 3374077365a9SGeert Uytterhoeven static const unsigned int sdhi1_ctrl_mux[] = { 3375077365a9SGeert Uytterhoeven SD1_CLK_MARK, SD1_CMD_MARK, 3376077365a9SGeert Uytterhoeven }; 3377077365a9SGeert Uytterhoeven static const unsigned int sdhi1_cd_pins[] = { 3378077365a9SGeert Uytterhoeven /* CD */ 3379077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 14), 3380077365a9SGeert Uytterhoeven }; 3381077365a9SGeert Uytterhoeven static const unsigned int sdhi1_cd_mux[] = { 3382077365a9SGeert Uytterhoeven SD1_CD_MARK, 3383077365a9SGeert Uytterhoeven }; 3384077365a9SGeert Uytterhoeven static const unsigned int sdhi1_wp_pins[] = { 3385077365a9SGeert Uytterhoeven /* WP */ 3386077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 15), 3387077365a9SGeert Uytterhoeven }; 3388077365a9SGeert Uytterhoeven static const unsigned int sdhi1_wp_mux[] = { 3389077365a9SGeert Uytterhoeven SD1_WP_MARK, 3390077365a9SGeert Uytterhoeven }; 3391077365a9SGeert Uytterhoeven /* - SDHI2 ------------------------------------------------------------------ */ 3392077365a9SGeert Uytterhoeven static const unsigned int sdhi2_data1_pins[] = { 3393077365a9SGeert Uytterhoeven /* D0 */ 3394077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 18), 3395077365a9SGeert Uytterhoeven }; 3396077365a9SGeert Uytterhoeven static const unsigned int sdhi2_data1_mux[] = { 3397077365a9SGeert Uytterhoeven SD2_DAT0_MARK, 3398077365a9SGeert Uytterhoeven }; 3399077365a9SGeert Uytterhoeven static const unsigned int sdhi2_data4_pins[] = { 3400077365a9SGeert Uytterhoeven /* D[0:3] */ 3401077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19), RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 21), 3402077365a9SGeert Uytterhoeven }; 3403077365a9SGeert Uytterhoeven static const unsigned int sdhi2_data4_mux[] = { 3404077365a9SGeert Uytterhoeven SD2_DAT0_MARK, SD2_DAT1_MARK, SD2_DAT2_MARK, SD2_DAT3_MARK, 3405077365a9SGeert Uytterhoeven }; 3406077365a9SGeert Uytterhoeven static const unsigned int sdhi2_ctrl_pins[] = { 3407077365a9SGeert Uytterhoeven /* CLK, CMD */ 3408077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 16), RCAR_GP_PIN(3, 17), 3409077365a9SGeert Uytterhoeven }; 3410077365a9SGeert Uytterhoeven static const unsigned int sdhi2_ctrl_mux[] = { 3411077365a9SGeert Uytterhoeven SD2_CLK_MARK, SD2_CMD_MARK, 3412077365a9SGeert Uytterhoeven }; 3413077365a9SGeert Uytterhoeven static const unsigned int sdhi2_cd_pins[] = { 3414077365a9SGeert Uytterhoeven /* CD */ 3415077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 22), 3416077365a9SGeert Uytterhoeven }; 3417077365a9SGeert Uytterhoeven static const unsigned int sdhi2_cd_mux[] = { 3418077365a9SGeert Uytterhoeven SD2_CD_MARK, 3419077365a9SGeert Uytterhoeven }; 3420077365a9SGeert Uytterhoeven static const unsigned int sdhi2_wp_pins[] = { 3421077365a9SGeert Uytterhoeven /* WP */ 3422077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 23), 3423077365a9SGeert Uytterhoeven }; 3424077365a9SGeert Uytterhoeven static const unsigned int sdhi2_wp_mux[] = { 3425077365a9SGeert Uytterhoeven SD2_WP_MARK, 3426077365a9SGeert Uytterhoeven }; 3427077365a9SGeert Uytterhoeven /* - SDHI3 ------------------------------------------------------------------ */ 3428077365a9SGeert Uytterhoeven static const unsigned int sdhi3_data1_pins[] = { 3429077365a9SGeert Uytterhoeven /* D0 */ 3430077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 26), 3431077365a9SGeert Uytterhoeven }; 3432077365a9SGeert Uytterhoeven static const unsigned int sdhi3_data1_mux[] = { 3433077365a9SGeert Uytterhoeven SD3_DAT0_MARK, 3434077365a9SGeert Uytterhoeven }; 3435077365a9SGeert Uytterhoeven static const unsigned int sdhi3_data4_pins[] = { 3436077365a9SGeert Uytterhoeven /* D[0:3] */ 3437077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 27), RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29), 3438077365a9SGeert Uytterhoeven }; 3439077365a9SGeert Uytterhoeven static const unsigned int sdhi3_data4_mux[] = { 3440077365a9SGeert Uytterhoeven SD3_DAT0_MARK, SD3_DAT1_MARK, SD3_DAT2_MARK, SD3_DAT3_MARK, 3441077365a9SGeert Uytterhoeven }; 3442077365a9SGeert Uytterhoeven static const unsigned int sdhi3_ctrl_pins[] = { 3443077365a9SGeert Uytterhoeven /* CLK, CMD */ 3444077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 24), RCAR_GP_PIN(3, 25), 3445077365a9SGeert Uytterhoeven }; 3446077365a9SGeert Uytterhoeven static const unsigned int sdhi3_ctrl_mux[] = { 3447077365a9SGeert Uytterhoeven SD3_CLK_MARK, SD3_CMD_MARK, 3448077365a9SGeert Uytterhoeven }; 3449077365a9SGeert Uytterhoeven static const unsigned int sdhi3_cd_pins[] = { 3450077365a9SGeert Uytterhoeven /* CD */ 3451077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 30), 3452077365a9SGeert Uytterhoeven }; 3453077365a9SGeert Uytterhoeven static const unsigned int sdhi3_cd_mux[] = { 3454077365a9SGeert Uytterhoeven SD3_CD_MARK, 3455077365a9SGeert Uytterhoeven }; 3456077365a9SGeert Uytterhoeven static const unsigned int sdhi3_wp_pins[] = { 3457077365a9SGeert Uytterhoeven /* WP */ 3458077365a9SGeert Uytterhoeven RCAR_GP_PIN(3, 31), 3459077365a9SGeert Uytterhoeven }; 3460077365a9SGeert Uytterhoeven static const unsigned int sdhi3_wp_mux[] = { 3461077365a9SGeert Uytterhoeven SD3_WP_MARK, 3462077365a9SGeert Uytterhoeven }; 3463077365a9SGeert Uytterhoeven /* - SSI -------------------------------------------------------------------- */ 3464077365a9SGeert Uytterhoeven static const unsigned int ssi0_data_pins[] = { 3465077365a9SGeert Uytterhoeven /* SDATA0 */ 3466077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 5), 3467077365a9SGeert Uytterhoeven }; 3468077365a9SGeert Uytterhoeven static const unsigned int ssi0_data_mux[] = { 3469077365a9SGeert Uytterhoeven SSI_SDATA0_MARK, 3470077365a9SGeert Uytterhoeven }; 3471077365a9SGeert Uytterhoeven static const unsigned int ssi0129_ctrl_pins[] = { 3472077365a9SGeert Uytterhoeven /* SCK, WS */ 3473077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 3), RCAR_GP_PIN(4, 4), 3474077365a9SGeert Uytterhoeven }; 3475077365a9SGeert Uytterhoeven static const unsigned int ssi0129_ctrl_mux[] = { 3476077365a9SGeert Uytterhoeven SSI_SCK0129_MARK, SSI_WS0129_MARK, 3477077365a9SGeert Uytterhoeven }; 3478077365a9SGeert Uytterhoeven static const unsigned int ssi1_data_pins[] = { 3479077365a9SGeert Uytterhoeven /* SDATA1 */ 3480077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 6), 3481077365a9SGeert Uytterhoeven }; 3482077365a9SGeert Uytterhoeven static const unsigned int ssi1_data_mux[] = { 3483077365a9SGeert Uytterhoeven SSI_SDATA1_MARK, 3484077365a9SGeert Uytterhoeven }; 3485077365a9SGeert Uytterhoeven static const unsigned int ssi1_ctrl_pins[] = { 3486077365a9SGeert Uytterhoeven /* SCK, WS */ 3487077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 7), RCAR_GP_PIN(4, 24), 3488077365a9SGeert Uytterhoeven }; 3489077365a9SGeert Uytterhoeven static const unsigned int ssi1_ctrl_mux[] = { 3490077365a9SGeert Uytterhoeven SSI_SCK1_MARK, SSI_WS1_MARK, 3491077365a9SGeert Uytterhoeven }; 3492077365a9SGeert Uytterhoeven static const unsigned int ssi2_data_pins[] = { 3493077365a9SGeert Uytterhoeven /* SDATA2 */ 3494077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 7), 3495077365a9SGeert Uytterhoeven }; 3496077365a9SGeert Uytterhoeven static const unsigned int ssi2_data_mux[] = { 3497077365a9SGeert Uytterhoeven SSI_SDATA2_MARK, 3498077365a9SGeert Uytterhoeven }; 3499077365a9SGeert Uytterhoeven static const unsigned int ssi2_ctrl_pins[] = { 3500077365a9SGeert Uytterhoeven /* SCK, WS */ 3501077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 17), 3502077365a9SGeert Uytterhoeven }; 3503077365a9SGeert Uytterhoeven static const unsigned int ssi2_ctrl_mux[] = { 3504077365a9SGeert Uytterhoeven SSI_SCK2_MARK, SSI_WS2_MARK, 3505077365a9SGeert Uytterhoeven }; 3506077365a9SGeert Uytterhoeven static const unsigned int ssi3_data_pins[] = { 3507077365a9SGeert Uytterhoeven /* SDATA3 */ 3508077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 10), 3509077365a9SGeert Uytterhoeven }; 3510077365a9SGeert Uytterhoeven static const unsigned int ssi3_data_mux[] = { 3511077365a9SGeert Uytterhoeven SSI_SDATA3_MARK 3512077365a9SGeert Uytterhoeven }; 3513077365a9SGeert Uytterhoeven static const unsigned int ssi34_ctrl_pins[] = { 3514077365a9SGeert Uytterhoeven /* SCK, WS */ 3515077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 8), RCAR_GP_PIN(4, 9), 3516077365a9SGeert Uytterhoeven }; 3517077365a9SGeert Uytterhoeven static const unsigned int ssi34_ctrl_mux[] = { 3518077365a9SGeert Uytterhoeven SSI_SCK34_MARK, SSI_WS34_MARK, 3519077365a9SGeert Uytterhoeven }; 3520077365a9SGeert Uytterhoeven static const unsigned int ssi4_data_pins[] = { 3521077365a9SGeert Uytterhoeven /* SDATA4 */ 3522077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 13), 3523077365a9SGeert Uytterhoeven }; 3524077365a9SGeert Uytterhoeven static const unsigned int ssi4_data_mux[] = { 3525077365a9SGeert Uytterhoeven SSI_SDATA4_MARK, 3526077365a9SGeert Uytterhoeven }; 3527077365a9SGeert Uytterhoeven static const unsigned int ssi4_ctrl_pins[] = { 3528077365a9SGeert Uytterhoeven /* SCK, WS */ 3529077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 12), 3530077365a9SGeert Uytterhoeven }; 3531077365a9SGeert Uytterhoeven static const unsigned int ssi4_ctrl_mux[] = { 3532077365a9SGeert Uytterhoeven SSI_SCK4_MARK, SSI_WS4_MARK, 3533077365a9SGeert Uytterhoeven }; 3534077365a9SGeert Uytterhoeven static const unsigned int ssi5_pins[] = { 3535077365a9SGeert Uytterhoeven /* SDATA5, SCK, WS */ 3536077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 16), RCAR_GP_PIN(4, 14), RCAR_GP_PIN(4, 15), 3537077365a9SGeert Uytterhoeven }; 3538077365a9SGeert Uytterhoeven static const unsigned int ssi5_mux[] = { 3539077365a9SGeert Uytterhoeven SSI_SDATA5_MARK, SSI_SCK5_MARK, SSI_WS5_MARK, 3540077365a9SGeert Uytterhoeven }; 3541077365a9SGeert Uytterhoeven static const unsigned int ssi5_b_pins[] = { 3542077365a9SGeert Uytterhoeven /* SDATA5, SCK, WS */ 3543077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 26), RCAR_GP_PIN(0, 24), RCAR_GP_PIN(0, 25), 3544077365a9SGeert Uytterhoeven }; 3545077365a9SGeert Uytterhoeven static const unsigned int ssi5_b_mux[] = { 3546077365a9SGeert Uytterhoeven SSI_SDATA5_B_MARK, SSI_SCK5_B_MARK, SSI_WS5_B_MARK 3547077365a9SGeert Uytterhoeven }; 3548077365a9SGeert Uytterhoeven static const unsigned int ssi5_c_pins[] = { 3549077365a9SGeert Uytterhoeven /* SDATA5, SCK, WS */ 3550077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 24), RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 12), 3551077365a9SGeert Uytterhoeven }; 3552077365a9SGeert Uytterhoeven static const unsigned int ssi5_c_mux[] = { 3553077365a9SGeert Uytterhoeven SSI_SDATA5_C_MARK, SSI_SCK5_C_MARK, SSI_WS5_C_MARK, 3554077365a9SGeert Uytterhoeven }; 3555077365a9SGeert Uytterhoeven static const unsigned int ssi6_pins[] = { 3556077365a9SGeert Uytterhoeven /* SDATA6, SCK, WS */ 3557077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 19), RCAR_GP_PIN(4, 17), RCAR_GP_PIN(4, 18), 3558077365a9SGeert Uytterhoeven }; 3559077365a9SGeert Uytterhoeven static const unsigned int ssi6_mux[] = { 3560077365a9SGeert Uytterhoeven SSI_SDATA6_MARK, SSI_SCK6_MARK, SSI_WS6_MARK, 3561077365a9SGeert Uytterhoeven }; 3562077365a9SGeert Uytterhoeven static const unsigned int ssi6_b_pins[] = { 3563077365a9SGeert Uytterhoeven /* SDATA6, SCK, WS */ 3564077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 29), RCAR_GP_PIN(1, 25), RCAR_GP_PIN(1, 27), 3565077365a9SGeert Uytterhoeven }; 3566077365a9SGeert Uytterhoeven static const unsigned int ssi6_b_mux[] = { 3567077365a9SGeert Uytterhoeven SSI_SDATA6_B_MARK, SSI_SCK6_B_MARK, SSI_WS6_B_MARK, 3568077365a9SGeert Uytterhoeven }; 3569077365a9SGeert Uytterhoeven static const unsigned int ssi7_data_pins[] = { 3570077365a9SGeert Uytterhoeven /* SDATA7 */ 3571077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 22), 3572077365a9SGeert Uytterhoeven }; 3573077365a9SGeert Uytterhoeven static const unsigned int ssi7_data_mux[] = { 3574077365a9SGeert Uytterhoeven SSI_SDATA7_MARK, 3575077365a9SGeert Uytterhoeven }; 3576077365a9SGeert Uytterhoeven static const unsigned int ssi7_b_data_pins[] = { 3577077365a9SGeert Uytterhoeven /* SDATA7 */ 3578077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 22), 3579077365a9SGeert Uytterhoeven }; 3580077365a9SGeert Uytterhoeven static const unsigned int ssi7_b_data_mux[] = { 3581077365a9SGeert Uytterhoeven SSI_SDATA7_B_MARK, 3582077365a9SGeert Uytterhoeven }; 3583077365a9SGeert Uytterhoeven static const unsigned int ssi7_c_data_pins[] = { 3584077365a9SGeert Uytterhoeven /* SDATA7 */ 3585077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 26), 3586077365a9SGeert Uytterhoeven }; 3587077365a9SGeert Uytterhoeven static const unsigned int ssi7_c_data_mux[] = { 3588077365a9SGeert Uytterhoeven SSI_SDATA7_C_MARK, 3589077365a9SGeert Uytterhoeven }; 3590077365a9SGeert Uytterhoeven static const unsigned int ssi78_ctrl_pins[] = { 3591077365a9SGeert Uytterhoeven /* SCK, WS */ 3592077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 20), RCAR_GP_PIN(4, 21), 3593077365a9SGeert Uytterhoeven }; 3594077365a9SGeert Uytterhoeven static const unsigned int ssi78_ctrl_mux[] = { 3595077365a9SGeert Uytterhoeven SSI_SCK78_MARK, SSI_WS78_MARK, 3596077365a9SGeert Uytterhoeven }; 3597077365a9SGeert Uytterhoeven static const unsigned int ssi78_b_ctrl_pins[] = { 3598077365a9SGeert Uytterhoeven /* SCK, WS */ 3599077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 24), 3600077365a9SGeert Uytterhoeven }; 3601077365a9SGeert Uytterhoeven static const unsigned int ssi78_b_ctrl_mux[] = { 3602077365a9SGeert Uytterhoeven SSI_SCK78_B_MARK, SSI_WS78_B_MARK, 3603077365a9SGeert Uytterhoeven }; 3604077365a9SGeert Uytterhoeven static const unsigned int ssi78_c_ctrl_pins[] = { 3605077365a9SGeert Uytterhoeven /* SCK, WS */ 3606077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 24), RCAR_GP_PIN(1, 25), 3607077365a9SGeert Uytterhoeven }; 3608077365a9SGeert Uytterhoeven static const unsigned int ssi78_c_ctrl_mux[] = { 3609077365a9SGeert Uytterhoeven SSI_SCK78_C_MARK, SSI_WS78_C_MARK, 3610077365a9SGeert Uytterhoeven }; 3611077365a9SGeert Uytterhoeven static const unsigned int ssi8_data_pins[] = { 3612077365a9SGeert Uytterhoeven /* SDATA8 */ 3613077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 23), 3614077365a9SGeert Uytterhoeven }; 3615077365a9SGeert Uytterhoeven static const unsigned int ssi8_data_mux[] = { 3616077365a9SGeert Uytterhoeven SSI_SDATA8_MARK, 3617077365a9SGeert Uytterhoeven }; 3618077365a9SGeert Uytterhoeven static const unsigned int ssi8_b_data_pins[] = { 3619077365a9SGeert Uytterhoeven /* SDATA8 */ 3620077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 23), 3621077365a9SGeert Uytterhoeven }; 3622077365a9SGeert Uytterhoeven static const unsigned int ssi8_b_data_mux[] = { 3623077365a9SGeert Uytterhoeven SSI_SDATA8_B_MARK, 3624077365a9SGeert Uytterhoeven }; 3625077365a9SGeert Uytterhoeven static const unsigned int ssi8_c_data_pins[] = { 3626077365a9SGeert Uytterhoeven /* SDATA8 */ 3627077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 27), 3628077365a9SGeert Uytterhoeven }; 3629077365a9SGeert Uytterhoeven static const unsigned int ssi8_c_data_mux[] = { 3630077365a9SGeert Uytterhoeven SSI_SDATA8_C_MARK, 3631077365a9SGeert Uytterhoeven }; 3632077365a9SGeert Uytterhoeven static const unsigned int ssi9_data_pins[] = { 3633077365a9SGeert Uytterhoeven /* SDATA9 */ 3634077365a9SGeert Uytterhoeven RCAR_GP_PIN(4, 24), 3635077365a9SGeert Uytterhoeven }; 3636077365a9SGeert Uytterhoeven static const unsigned int ssi9_data_mux[] = { 3637077365a9SGeert Uytterhoeven SSI_SDATA9_MARK, 3638077365a9SGeert Uytterhoeven }; 3639077365a9SGeert Uytterhoeven static const unsigned int ssi9_ctrl_pins[] = { 3640077365a9SGeert Uytterhoeven /* SCK, WS */ 3641077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 10), RCAR_GP_PIN(5, 11), 3642077365a9SGeert Uytterhoeven }; 3643077365a9SGeert Uytterhoeven static const unsigned int ssi9_ctrl_mux[] = { 3644077365a9SGeert Uytterhoeven SSI_SCK9_MARK, SSI_WS9_MARK, 3645077365a9SGeert Uytterhoeven }; 3646077365a9SGeert Uytterhoeven /* - TPU0 ------------------------------------------------------------------- */ 3647077365a9SGeert Uytterhoeven static const unsigned int tpu0_to0_pins[] = { 3648077365a9SGeert Uytterhoeven /* TO */ 3649077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 20), 3650077365a9SGeert Uytterhoeven }; 3651077365a9SGeert Uytterhoeven static const unsigned int tpu0_to0_mux[] = { 3652077365a9SGeert Uytterhoeven TPU0TO0_MARK, 3653077365a9SGeert Uytterhoeven }; 3654077365a9SGeert Uytterhoeven static const unsigned int tpu0_to1_pins[] = { 3655077365a9SGeert Uytterhoeven /* TO */ 3656077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 21), 3657077365a9SGeert Uytterhoeven }; 3658077365a9SGeert Uytterhoeven static const unsigned int tpu0_to1_mux[] = { 3659077365a9SGeert Uytterhoeven TPU0TO1_MARK, 3660077365a9SGeert Uytterhoeven }; 3661077365a9SGeert Uytterhoeven static const unsigned int tpu0_to2_pins[] = { 3662077365a9SGeert Uytterhoeven /* TO */ 3663077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 22), 3664077365a9SGeert Uytterhoeven }; 3665077365a9SGeert Uytterhoeven static const unsigned int tpu0_to2_mux[] = { 3666077365a9SGeert Uytterhoeven TPU0TO2_MARK, 3667077365a9SGeert Uytterhoeven }; 3668077365a9SGeert Uytterhoeven static const unsigned int tpu0_to3_pins[] = { 3669077365a9SGeert Uytterhoeven /* TO */ 3670077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 23), 3671077365a9SGeert Uytterhoeven }; 3672077365a9SGeert Uytterhoeven static const unsigned int tpu0_to3_mux[] = { 3673077365a9SGeert Uytterhoeven TPU0TO3_MARK, 3674077365a9SGeert Uytterhoeven }; 3675077365a9SGeert Uytterhoeven /* - USB0 ------------------------------------------------------------------- */ 3676077365a9SGeert Uytterhoeven static const unsigned int usb0_pins[] = { 3677077365a9SGeert Uytterhoeven /* PWEN, OVC/VBUS */ 3678077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 18), RCAR_GP_PIN(5, 19), 3679077365a9SGeert Uytterhoeven }; 3680077365a9SGeert Uytterhoeven static const unsigned int usb0_mux[] = { 3681077365a9SGeert Uytterhoeven USB0_PWEN_MARK, USB0_OVC_VBUS_MARK, 3682077365a9SGeert Uytterhoeven }; 3683077365a9SGeert Uytterhoeven static const unsigned int usb0_ovc_vbus_pins[] = { 3684077365a9SGeert Uytterhoeven /* OVC/VBUS */ 3685077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 19), 3686077365a9SGeert Uytterhoeven }; 3687077365a9SGeert Uytterhoeven static const unsigned int usb0_ovc_vbus_mux[] = { 3688077365a9SGeert Uytterhoeven USB0_OVC_VBUS_MARK, 3689077365a9SGeert Uytterhoeven }; 3690077365a9SGeert Uytterhoeven /* - USB1 ------------------------------------------------------------------- */ 3691077365a9SGeert Uytterhoeven static const unsigned int usb1_pins[] = { 3692077365a9SGeert Uytterhoeven /* PWEN, OVC */ 3693077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 20), RCAR_GP_PIN(5, 21), 3694077365a9SGeert Uytterhoeven }; 3695077365a9SGeert Uytterhoeven static const unsigned int usb1_mux[] = { 3696077365a9SGeert Uytterhoeven USB1_PWEN_MARK, USB1_OVC_MARK, 3697077365a9SGeert Uytterhoeven }; 3698077365a9SGeert Uytterhoeven static const unsigned int usb1_pwen_pins[] = { 3699077365a9SGeert Uytterhoeven /* PWEN */ 3700077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 20), 3701077365a9SGeert Uytterhoeven }; 3702077365a9SGeert Uytterhoeven static const unsigned int usb1_pwen_mux[] = { 3703077365a9SGeert Uytterhoeven USB1_PWEN_MARK, 3704077365a9SGeert Uytterhoeven }; 3705077365a9SGeert Uytterhoeven /* - USB2 ------------------------------------------------------------------- */ 3706077365a9SGeert Uytterhoeven static const unsigned int usb2_pins[] = { 3707077365a9SGeert Uytterhoeven /* PWEN, OVC */ 3708077365a9SGeert Uytterhoeven RCAR_GP_PIN(5, 22), RCAR_GP_PIN(5, 23), 3709077365a9SGeert Uytterhoeven }; 3710077365a9SGeert Uytterhoeven static const unsigned int usb2_mux[] = { 3711077365a9SGeert Uytterhoeven USB2_PWEN_MARK, USB2_OVC_MARK, 3712077365a9SGeert Uytterhoeven }; 3713077365a9SGeert Uytterhoeven /* - VIN0 ------------------------------------------------------------------- */ 3714077365a9SGeert Uytterhoeven static const union vin_data vin0_data_pins = { 3715077365a9SGeert Uytterhoeven .data24 = { 3716077365a9SGeert Uytterhoeven /* B */ 3717077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 1), RCAR_GP_PIN(2, 2), 3718077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 4), 3719077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 6), 3720077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8), 3721077365a9SGeert Uytterhoeven /* G */ 3722077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9), 3723077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11), 3724077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1), 3725077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 3), 3726077365a9SGeert Uytterhoeven /* R */ 3727077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5), 3728077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7), 3729077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 24), RCAR_GP_PIN(0, 25), 3730077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 26), RCAR_GP_PIN(1, 11), 3731077365a9SGeert Uytterhoeven }, 3732077365a9SGeert Uytterhoeven }; 3733077365a9SGeert Uytterhoeven static const union vin_data vin0_data_mux = { 3734077365a9SGeert Uytterhoeven .data24 = { 3735077365a9SGeert Uytterhoeven /* B */ 3736077365a9SGeert Uytterhoeven VI0_DATA0_VI0_B0_MARK, VI0_DATA1_VI0_B1_MARK, 3737077365a9SGeert Uytterhoeven VI0_DATA2_VI0_B2_MARK, VI0_DATA3_VI0_B3_MARK, 3738077365a9SGeert Uytterhoeven VI0_DATA4_VI0_B4_MARK, VI0_DATA5_VI0_B5_MARK, 3739077365a9SGeert Uytterhoeven VI0_DATA6_VI0_B6_MARK, VI0_DATA7_VI0_B7_MARK, 3740077365a9SGeert Uytterhoeven /* G */ 3741077365a9SGeert Uytterhoeven VI0_G0_MARK, VI0_G1_MARK, 3742077365a9SGeert Uytterhoeven VI0_G2_MARK, VI0_G3_MARK, 3743077365a9SGeert Uytterhoeven VI0_G4_MARK, VI0_G5_MARK, 3744077365a9SGeert Uytterhoeven VI0_G6_MARK, VI0_G7_MARK, 3745077365a9SGeert Uytterhoeven /* R */ 3746077365a9SGeert Uytterhoeven VI0_R0_MARK, VI0_R1_MARK, 3747077365a9SGeert Uytterhoeven VI0_R2_MARK, VI0_R3_MARK, 3748077365a9SGeert Uytterhoeven VI0_R4_MARK, VI0_R5_MARK, 3749077365a9SGeert Uytterhoeven VI0_R6_MARK, VI0_R7_MARK, 3750077365a9SGeert Uytterhoeven }, 3751077365a9SGeert Uytterhoeven }; 3752077365a9SGeert Uytterhoeven static const unsigned int vin0_data18_pins[] = { 3753077365a9SGeert Uytterhoeven /* B */ 3754077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 4), 3755077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 6), 3756077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8), 3757077365a9SGeert Uytterhoeven /* G */ 3758077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11), 3759077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1), 3760077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 3), 3761077365a9SGeert Uytterhoeven /* R */ 3762077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7), 3763077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 24), RCAR_GP_PIN(0, 25), 3764077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 26), RCAR_GP_PIN(1, 11), 3765077365a9SGeert Uytterhoeven }; 3766077365a9SGeert Uytterhoeven static const unsigned int vin0_data18_mux[] = { 3767077365a9SGeert Uytterhoeven /* B */ 3768077365a9SGeert Uytterhoeven VI0_DATA2_VI0_B2_MARK, VI0_DATA3_VI0_B3_MARK, 3769077365a9SGeert Uytterhoeven VI0_DATA4_VI0_B4_MARK, VI0_DATA5_VI0_B5_MARK, 3770077365a9SGeert Uytterhoeven VI0_DATA6_VI0_B6_MARK, VI0_DATA7_VI0_B7_MARK, 3771077365a9SGeert Uytterhoeven /* G */ 3772077365a9SGeert Uytterhoeven VI0_G2_MARK, VI0_G3_MARK, 3773077365a9SGeert Uytterhoeven VI0_G4_MARK, VI0_G5_MARK, 3774077365a9SGeert Uytterhoeven VI0_G6_MARK, VI0_G7_MARK, 3775077365a9SGeert Uytterhoeven /* R */ 3776077365a9SGeert Uytterhoeven VI0_R2_MARK, VI0_R3_MARK, 3777077365a9SGeert Uytterhoeven VI0_R4_MARK, VI0_R5_MARK, 3778077365a9SGeert Uytterhoeven VI0_R6_MARK, VI0_R7_MARK, 3779077365a9SGeert Uytterhoeven }; 3780077365a9SGeert Uytterhoeven static const unsigned int vin0_sync_pins[] = { 3781077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 12), /* HSYNC */ 3782077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 13), /* VSYNC */ 3783077365a9SGeert Uytterhoeven }; 3784077365a9SGeert Uytterhoeven static const unsigned int vin0_sync_mux[] = { 3785077365a9SGeert Uytterhoeven VI0_HSYNC_N_MARK, 3786077365a9SGeert Uytterhoeven VI0_VSYNC_N_MARK, 3787077365a9SGeert Uytterhoeven }; 3788077365a9SGeert Uytterhoeven static const unsigned int vin0_field_pins[] = { 3789077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 15), 3790077365a9SGeert Uytterhoeven }; 3791077365a9SGeert Uytterhoeven static const unsigned int vin0_field_mux[] = { 3792077365a9SGeert Uytterhoeven VI0_FIELD_MARK, 3793077365a9SGeert Uytterhoeven }; 3794077365a9SGeert Uytterhoeven static const unsigned int vin0_clkenb_pins[] = { 3795077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 14), 3796077365a9SGeert Uytterhoeven }; 3797077365a9SGeert Uytterhoeven static const unsigned int vin0_clkenb_mux[] = { 3798077365a9SGeert Uytterhoeven VI0_CLKENB_MARK, 3799077365a9SGeert Uytterhoeven }; 3800077365a9SGeert Uytterhoeven static const unsigned int vin0_clk_pins[] = { 3801077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 0), 3802077365a9SGeert Uytterhoeven }; 3803077365a9SGeert Uytterhoeven static const unsigned int vin0_clk_mux[] = { 3804077365a9SGeert Uytterhoeven VI0_CLK_MARK, 3805077365a9SGeert Uytterhoeven }; 3806077365a9SGeert Uytterhoeven /* - VIN1 ------------------------------------------------------------------- */ 3807077365a9SGeert Uytterhoeven static const union vin_data vin1_data_pins = { 3808077365a9SGeert Uytterhoeven .data24 = { 3809077365a9SGeert Uytterhoeven /* B */ 3810077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 10), RCAR_GP_PIN(2, 11), 3811077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 12), RCAR_GP_PIN(2, 13), 3812077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 15), 3813077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 16), RCAR_GP_PIN(2, 17), 3814077365a9SGeert Uytterhoeven /* G */ 3815077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15), 3816077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 20), 3817077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 12), 3818077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 7), 3819077365a9SGeert Uytterhoeven /* R */ 3820077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 27), RCAR_GP_PIN(0, 28), 3821077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 29), RCAR_GP_PIN(1, 4), 3822077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6), 3823077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 8), 3824077365a9SGeert Uytterhoeven }, 3825077365a9SGeert Uytterhoeven }; 3826077365a9SGeert Uytterhoeven static const union vin_data vin1_data_mux = { 3827077365a9SGeert Uytterhoeven .data24 = { 3828077365a9SGeert Uytterhoeven /* B */ 3829077365a9SGeert Uytterhoeven VI1_DATA0_VI1_B0_MARK, VI1_DATA1_VI1_B1_MARK, 3830077365a9SGeert Uytterhoeven VI1_DATA2_VI1_B2_MARK, VI1_DATA3_VI1_B3_MARK, 3831077365a9SGeert Uytterhoeven VI1_DATA4_VI1_B4_MARK, VI1_DATA5_VI1_B5_MARK, 3832077365a9SGeert Uytterhoeven VI1_DATA6_VI1_B6_MARK, VI1_DATA7_VI1_B7_MARK, 3833077365a9SGeert Uytterhoeven /* G */ 3834077365a9SGeert Uytterhoeven VI1_G0_MARK, VI1_G1_MARK, 3835077365a9SGeert Uytterhoeven VI1_G2_MARK, VI1_G3_MARK, 3836077365a9SGeert Uytterhoeven VI1_G4_MARK, VI1_G5_MARK, 3837077365a9SGeert Uytterhoeven VI1_G6_MARK, VI1_G7_MARK, 3838077365a9SGeert Uytterhoeven /* R */ 3839077365a9SGeert Uytterhoeven VI1_R0_MARK, VI1_R1_MARK, 3840077365a9SGeert Uytterhoeven VI1_R2_MARK, VI1_R3_MARK, 3841077365a9SGeert Uytterhoeven VI1_R4_MARK, VI1_R5_MARK, 3842077365a9SGeert Uytterhoeven VI1_R6_MARK, VI1_R7_MARK, 3843077365a9SGeert Uytterhoeven }, 3844077365a9SGeert Uytterhoeven }; 3845077365a9SGeert Uytterhoeven static const unsigned int vin1_data18_pins[] = { 3846077365a9SGeert Uytterhoeven /* B */ 3847077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 12), RCAR_GP_PIN(2, 13), 3848077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 15), 3849077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 16), RCAR_GP_PIN(2, 17), 3850077365a9SGeert Uytterhoeven /* G */ 3851077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 20), 3852077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 12), 3853077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 7), 3854077365a9SGeert Uytterhoeven /* R */ 3855077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 29), RCAR_GP_PIN(1, 4), 3856077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6), 3857077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 8), 3858077365a9SGeert Uytterhoeven }; 3859077365a9SGeert Uytterhoeven static const unsigned int vin1_data18_mux[] = { 3860077365a9SGeert Uytterhoeven /* B */ 3861077365a9SGeert Uytterhoeven VI1_DATA2_VI1_B2_MARK, VI1_DATA3_VI1_B3_MARK, 3862077365a9SGeert Uytterhoeven VI1_DATA4_VI1_B4_MARK, VI1_DATA5_VI1_B5_MARK, 3863077365a9SGeert Uytterhoeven VI1_DATA6_VI1_B6_MARK, VI1_DATA7_VI1_B7_MARK, 3864077365a9SGeert Uytterhoeven /* G */ 3865077365a9SGeert Uytterhoeven VI1_G2_MARK, VI1_G3_MARK, 3866077365a9SGeert Uytterhoeven VI1_G4_MARK, VI1_G5_MARK, 3867077365a9SGeert Uytterhoeven VI1_G6_MARK, VI1_G7_MARK, 3868077365a9SGeert Uytterhoeven /* R */ 3869077365a9SGeert Uytterhoeven VI1_R2_MARK, VI1_R3_MARK, 3870077365a9SGeert Uytterhoeven VI1_R4_MARK, VI1_R5_MARK, 3871077365a9SGeert Uytterhoeven VI1_R6_MARK, VI1_R7_MARK, 3872077365a9SGeert Uytterhoeven }; 387381f652afSLad Prabhakar static const union vin_data vin1_data_b_pins = { 387481f652afSLad Prabhakar .data24 = { 387581f652afSLad Prabhakar /* B */ 387681f652afSLad Prabhakar RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1), 387781f652afSLad Prabhakar RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3), 387881f652afSLad Prabhakar RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5), 387981f652afSLad Prabhakar RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7), 388081f652afSLad Prabhakar /* G */ 388181f652afSLad Prabhakar RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15), 388281f652afSLad Prabhakar RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 20), 388381f652afSLad Prabhakar RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 12), 388481f652afSLad Prabhakar RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 7), 388581f652afSLad Prabhakar /* R */ 388681f652afSLad Prabhakar RCAR_GP_PIN(0, 27), RCAR_GP_PIN(0, 28), 388781f652afSLad Prabhakar RCAR_GP_PIN(0, 29), RCAR_GP_PIN(1, 4), 388881f652afSLad Prabhakar RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6), 388981f652afSLad Prabhakar RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 8), 389081f652afSLad Prabhakar }, 389181f652afSLad Prabhakar }; 389281f652afSLad Prabhakar static const union vin_data vin1_data_b_mux = { 389381f652afSLad Prabhakar .data24 = { 389481f652afSLad Prabhakar /* B */ 389581f652afSLad Prabhakar VI1_DATA0_VI1_B0_B_MARK, VI1_DATA1_VI1_B1_B_MARK, 389681f652afSLad Prabhakar VI1_DATA2_VI1_B2_B_MARK, VI1_DATA3_VI1_B3_B_MARK, 389781f652afSLad Prabhakar VI1_DATA4_VI1_B4_B_MARK, VI1_DATA5_VI1_B5_B_MARK, 389881f652afSLad Prabhakar VI1_DATA6_VI1_B6_B_MARK, VI1_DATA7_VI1_B7_B_MARK, 389981f652afSLad Prabhakar /* G */ 390081f652afSLad Prabhakar VI1_G0_B_MARK, VI1_G1_B_MARK, 390181f652afSLad Prabhakar VI1_G2_B_MARK, VI1_G3_B_MARK, 390281f652afSLad Prabhakar VI1_G4_B_MARK, VI1_G5_B_MARK, 390381f652afSLad Prabhakar VI1_G6_B_MARK, VI1_G7_B_MARK, 390481f652afSLad Prabhakar /* R */ 390581f652afSLad Prabhakar VI1_R0_B_MARK, VI1_R1_B_MARK, 390681f652afSLad Prabhakar VI1_R2_B_MARK, VI1_R3_B_MARK, 390781f652afSLad Prabhakar VI1_R4_B_MARK, VI1_R5_B_MARK, 390881f652afSLad Prabhakar VI1_R6_B_MARK, VI1_R7_B_MARK, 390981f652afSLad Prabhakar }, 391081f652afSLad Prabhakar }; 391181f652afSLad Prabhakar static const unsigned int vin1_data18_b_pins[] = { 391281f652afSLad Prabhakar /* B */ 391381f652afSLad Prabhakar RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3), 391481f652afSLad Prabhakar RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5), 391581f652afSLad Prabhakar RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7), 391681f652afSLad Prabhakar /* G */ 391781f652afSLad Prabhakar RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 20), 391881f652afSLad Prabhakar RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 12), 391981f652afSLad Prabhakar RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 7), 392081f652afSLad Prabhakar /* R */ 392181f652afSLad Prabhakar RCAR_GP_PIN(0, 29), RCAR_GP_PIN(1, 4), 392281f652afSLad Prabhakar RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6), 392381f652afSLad Prabhakar RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 8), 392481f652afSLad Prabhakar }; 392581f652afSLad Prabhakar static const unsigned int vin1_data18_b_mux[] = { 392681f652afSLad Prabhakar /* B */ 392781f652afSLad Prabhakar VI1_DATA2_VI1_B2_B_MARK, VI1_DATA3_VI1_B3_B_MARK, 392881f652afSLad Prabhakar VI1_DATA4_VI1_B4_B_MARK, VI1_DATA5_VI1_B5_B_MARK, 392981f652afSLad Prabhakar VI1_DATA6_VI1_B6_B_MARK, VI1_DATA7_VI1_B7_B_MARK, 393081f652afSLad Prabhakar /* G */ 393181f652afSLad Prabhakar VI1_G2_B_MARK, VI1_G3_B_MARK, 393281f652afSLad Prabhakar VI1_G4_B_MARK, VI1_G5_B_MARK, 393381f652afSLad Prabhakar VI1_G6_B_MARK, VI1_G7_B_MARK, 393481f652afSLad Prabhakar /* R */ 393581f652afSLad Prabhakar VI1_R2_B_MARK, VI1_R3_B_MARK, 393681f652afSLad Prabhakar VI1_R4_B_MARK, VI1_R5_B_MARK, 393781f652afSLad Prabhakar VI1_R6_B_MARK, VI1_R7_B_MARK, 393881f652afSLad Prabhakar }; 3939077365a9SGeert Uytterhoeven static const unsigned int vin1_sync_pins[] = { 3940077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 24), /* HSYNC */ 3941077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 25), /* VSYNC */ 3942077365a9SGeert Uytterhoeven }; 3943077365a9SGeert Uytterhoeven static const unsigned int vin1_sync_mux[] = { 3944077365a9SGeert Uytterhoeven VI1_HSYNC_N_MARK, 3945077365a9SGeert Uytterhoeven VI1_VSYNC_N_MARK, 3946077365a9SGeert Uytterhoeven }; 394781f652afSLad Prabhakar static const unsigned int vin1_sync_b_pins[] = { 394881f652afSLad Prabhakar RCAR_GP_PIN(1, 24), /* HSYNC */ 394981f652afSLad Prabhakar RCAR_GP_PIN(1, 25), /* VSYNC */ 395081f652afSLad Prabhakar }; 395181f652afSLad Prabhakar static const unsigned int vin1_sync_b_mux[] = { 395281f652afSLad Prabhakar VI1_HSYNC_N_B_MARK, 395381f652afSLad Prabhakar VI1_VSYNC_N_B_MARK, 395481f652afSLad Prabhakar }; 3955077365a9SGeert Uytterhoeven static const unsigned int vin1_field_pins[] = { 3956077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 13), 3957077365a9SGeert Uytterhoeven }; 3958077365a9SGeert Uytterhoeven static const unsigned int vin1_field_mux[] = { 3959077365a9SGeert Uytterhoeven VI1_FIELD_MARK, 3960077365a9SGeert Uytterhoeven }; 396181f652afSLad Prabhakar static const unsigned int vin1_field_b_pins[] = { 396281f652afSLad Prabhakar RCAR_GP_PIN(1, 13), 396381f652afSLad Prabhakar }; 396481f652afSLad Prabhakar static const unsigned int vin1_field_b_mux[] = { 396581f652afSLad Prabhakar VI1_FIELD_B_MARK, 396681f652afSLad Prabhakar }; 3967077365a9SGeert Uytterhoeven static const unsigned int vin1_clkenb_pins[] = { 3968077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 26), 3969077365a9SGeert Uytterhoeven }; 3970077365a9SGeert Uytterhoeven static const unsigned int vin1_clkenb_mux[] = { 3971077365a9SGeert Uytterhoeven VI1_CLKENB_MARK, 3972077365a9SGeert Uytterhoeven }; 397381f652afSLad Prabhakar static const unsigned int vin1_clkenb_b_pins[] = { 397481f652afSLad Prabhakar RCAR_GP_PIN(1, 26), 397581f652afSLad Prabhakar }; 397681f652afSLad Prabhakar static const unsigned int vin1_clkenb_b_mux[] = { 397781f652afSLad Prabhakar VI1_CLKENB_B_MARK, 397881f652afSLad Prabhakar }; 3979077365a9SGeert Uytterhoeven static const unsigned int vin1_clk_pins[] = { 3980077365a9SGeert Uytterhoeven RCAR_GP_PIN(2, 9), 3981077365a9SGeert Uytterhoeven }; 3982077365a9SGeert Uytterhoeven static const unsigned int vin1_clk_mux[] = { 3983077365a9SGeert Uytterhoeven VI1_CLK_MARK, 3984077365a9SGeert Uytterhoeven }; 398581f652afSLad Prabhakar static const unsigned int vin1_clk_b_pins[] = { 398681f652afSLad Prabhakar RCAR_GP_PIN(3, 15), 398781f652afSLad Prabhakar }; 398881f652afSLad Prabhakar static const unsigned int vin1_clk_b_mux[] = { 398981f652afSLad Prabhakar VI1_CLK_B_MARK, 399081f652afSLad Prabhakar }; 3991077365a9SGeert Uytterhoeven /* - VIN2 ----------------------------------------------------------------- */ 3992077365a9SGeert Uytterhoeven static const union vin_data vin2_data_pins = { 3993077365a9SGeert Uytterhoeven .data24 = { 3994077365a9SGeert Uytterhoeven /* B */ 3995077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9), 3996077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11), 3997077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13), 3998077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15), 3999077365a9SGeert Uytterhoeven /* G */ 4000077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 27), RCAR_GP_PIN(0, 28), 4001077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 29), RCAR_GP_PIN(1, 10), 4002077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5), 4003077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7), 4004077365a9SGeert Uytterhoeven /* R */ 4005077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13), 4006077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15), 4007077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 20), 4008077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 24), 4009077365a9SGeert Uytterhoeven }, 4010077365a9SGeert Uytterhoeven }; 4011077365a9SGeert Uytterhoeven static const union vin_data vin2_data_mux = { 4012077365a9SGeert Uytterhoeven .data24 = { 4013077365a9SGeert Uytterhoeven /* B */ 4014077365a9SGeert Uytterhoeven VI2_DATA0_VI2_B0_MARK, VI2_DATA1_VI2_B1_MARK, 4015077365a9SGeert Uytterhoeven VI2_DATA2_VI2_B2_MARK, VI2_DATA3_VI2_B3_MARK, 4016077365a9SGeert Uytterhoeven VI2_DATA4_VI2_B4_MARK, VI2_DATA5_VI2_B5_MARK, 4017077365a9SGeert Uytterhoeven VI2_DATA6_VI2_B6_MARK, VI2_DATA7_VI2_B7_MARK, 4018077365a9SGeert Uytterhoeven /* G */ 4019077365a9SGeert Uytterhoeven VI2_G0_MARK, VI2_G1_MARK, 4020077365a9SGeert Uytterhoeven VI2_G2_MARK, VI2_G3_MARK, 4021077365a9SGeert Uytterhoeven VI2_G4_MARK, VI2_G5_MARK, 4022077365a9SGeert Uytterhoeven VI2_G6_MARK, VI2_G7_MARK, 4023077365a9SGeert Uytterhoeven /* R */ 4024077365a9SGeert Uytterhoeven VI2_R0_MARK, VI2_R1_MARK, 4025077365a9SGeert Uytterhoeven VI2_R2_MARK, VI2_R3_MARK, 4026077365a9SGeert Uytterhoeven VI2_R4_MARK, VI2_R5_MARK, 4027077365a9SGeert Uytterhoeven VI2_R6_MARK, VI2_R7_MARK, 4028077365a9SGeert Uytterhoeven }, 4029077365a9SGeert Uytterhoeven }; 4030077365a9SGeert Uytterhoeven static const unsigned int vin2_data18_pins[] = { 4031077365a9SGeert Uytterhoeven /* B */ 4032077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11), 4033077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13), 4034077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15), 4035077365a9SGeert Uytterhoeven /* G */ 4036077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 29), RCAR_GP_PIN(1, 10), 4037077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5), 4038077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7), 4039077365a9SGeert Uytterhoeven /* R */ 4040077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15), 4041077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 20), 4042077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 24), 4043077365a9SGeert Uytterhoeven }; 4044077365a9SGeert Uytterhoeven static const unsigned int vin2_data18_mux[] = { 4045077365a9SGeert Uytterhoeven /* B */ 4046077365a9SGeert Uytterhoeven VI2_DATA2_VI2_B2_MARK, VI2_DATA3_VI2_B3_MARK, 4047077365a9SGeert Uytterhoeven VI2_DATA4_VI2_B4_MARK, VI2_DATA5_VI2_B5_MARK, 4048077365a9SGeert Uytterhoeven VI2_DATA6_VI2_B6_MARK, VI2_DATA7_VI2_B7_MARK, 4049077365a9SGeert Uytterhoeven /* G */ 4050077365a9SGeert Uytterhoeven VI2_G2_MARK, VI2_G3_MARK, 4051077365a9SGeert Uytterhoeven VI2_G4_MARK, VI2_G5_MARK, 4052077365a9SGeert Uytterhoeven VI2_G6_MARK, VI2_G7_MARK, 4053077365a9SGeert Uytterhoeven /* R */ 4054077365a9SGeert Uytterhoeven VI2_R2_MARK, VI2_R3_MARK, 4055077365a9SGeert Uytterhoeven VI2_R4_MARK, VI2_R5_MARK, 4056077365a9SGeert Uytterhoeven VI2_R6_MARK, VI2_R7_MARK, 4057077365a9SGeert Uytterhoeven }; 405881f652afSLad Prabhakar static const unsigned int vin2_g8_pins[] = { 405981f652afSLad Prabhakar RCAR_GP_PIN(0, 27), RCAR_GP_PIN(0, 28), 406081f652afSLad Prabhakar RCAR_GP_PIN(0, 29), RCAR_GP_PIN(1, 10), 406181f652afSLad Prabhakar RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5), 406281f652afSLad Prabhakar RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7), 406381f652afSLad Prabhakar }; 406481f652afSLad Prabhakar static const unsigned int vin2_g8_mux[] = { 406581f652afSLad Prabhakar VI2_G0_MARK, VI2_G1_MARK, 406681f652afSLad Prabhakar VI2_G2_MARK, VI2_G3_MARK, 406781f652afSLad Prabhakar VI2_G4_MARK, VI2_G5_MARK, 406881f652afSLad Prabhakar VI2_G6_MARK, VI2_G7_MARK, 406981f652afSLad Prabhakar }; 4070077365a9SGeert Uytterhoeven static const unsigned int vin2_sync_pins[] = { 4071077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 16), /* HSYNC */ 4072077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 21), /* VSYNC */ 4073077365a9SGeert Uytterhoeven }; 4074077365a9SGeert Uytterhoeven static const unsigned int vin2_sync_mux[] = { 4075077365a9SGeert Uytterhoeven VI2_HSYNC_N_MARK, 4076077365a9SGeert Uytterhoeven VI2_VSYNC_N_MARK, 4077077365a9SGeert Uytterhoeven }; 4078077365a9SGeert Uytterhoeven static const unsigned int vin2_field_pins[] = { 4079077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 9), 4080077365a9SGeert Uytterhoeven }; 4081077365a9SGeert Uytterhoeven static const unsigned int vin2_field_mux[] = { 4082077365a9SGeert Uytterhoeven VI2_FIELD_MARK, 4083077365a9SGeert Uytterhoeven }; 4084077365a9SGeert Uytterhoeven static const unsigned int vin2_clkenb_pins[] = { 4085077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 8), 4086077365a9SGeert Uytterhoeven }; 4087077365a9SGeert Uytterhoeven static const unsigned int vin2_clkenb_mux[] = { 4088077365a9SGeert Uytterhoeven VI2_CLKENB_MARK, 4089077365a9SGeert Uytterhoeven }; 4090077365a9SGeert Uytterhoeven static const unsigned int vin2_clk_pins[] = { 4091077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 11), 4092077365a9SGeert Uytterhoeven }; 4093077365a9SGeert Uytterhoeven static const unsigned int vin2_clk_mux[] = { 4094077365a9SGeert Uytterhoeven VI2_CLK_MARK, 4095077365a9SGeert Uytterhoeven }; 4096077365a9SGeert Uytterhoeven /* - VIN3 ----------------------------------------------------------------- */ 4097077365a9SGeert Uytterhoeven static const unsigned int vin3_data8_pins[] = { 4098077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1), 4099077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 3), 4100077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5), 4101077365a9SGeert Uytterhoeven RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7), 4102077365a9SGeert Uytterhoeven }; 4103077365a9SGeert Uytterhoeven static const unsigned int vin3_data8_mux[] = { 4104077365a9SGeert Uytterhoeven VI3_DATA0_MARK, VI3_DATA1_MARK, 4105077365a9SGeert Uytterhoeven VI3_DATA2_MARK, VI3_DATA3_MARK, 4106077365a9SGeert Uytterhoeven VI3_DATA4_MARK, VI3_DATA5_MARK, 4107077365a9SGeert Uytterhoeven VI3_DATA6_MARK, VI3_DATA7_MARK, 4108077365a9SGeert Uytterhoeven }; 4109077365a9SGeert Uytterhoeven static const unsigned int vin3_sync_pins[] = { 4110077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 16), /* HSYNC */ 4111077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 17), /* VSYNC */ 4112077365a9SGeert Uytterhoeven }; 4113077365a9SGeert Uytterhoeven static const unsigned int vin3_sync_mux[] = { 4114077365a9SGeert Uytterhoeven VI3_HSYNC_N_MARK, 4115077365a9SGeert Uytterhoeven VI3_VSYNC_N_MARK, 4116077365a9SGeert Uytterhoeven }; 4117077365a9SGeert Uytterhoeven static const unsigned int vin3_field_pins[] = { 4118077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 15), 4119077365a9SGeert Uytterhoeven }; 4120077365a9SGeert Uytterhoeven static const unsigned int vin3_field_mux[] = { 4121077365a9SGeert Uytterhoeven VI3_FIELD_MARK, 4122077365a9SGeert Uytterhoeven }; 4123077365a9SGeert Uytterhoeven static const unsigned int vin3_clkenb_pins[] = { 4124077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 14), 4125077365a9SGeert Uytterhoeven }; 4126077365a9SGeert Uytterhoeven static const unsigned int vin3_clkenb_mux[] = { 4127077365a9SGeert Uytterhoeven VI3_CLKENB_MARK, 4128077365a9SGeert Uytterhoeven }; 4129077365a9SGeert Uytterhoeven static const unsigned int vin3_clk_pins[] = { 4130077365a9SGeert Uytterhoeven RCAR_GP_PIN(1, 23), 4131077365a9SGeert Uytterhoeven }; 4132077365a9SGeert Uytterhoeven static const unsigned int vin3_clk_mux[] = { 4133077365a9SGeert Uytterhoeven VI3_CLK_MARK, 4134077365a9SGeert Uytterhoeven }; 4135077365a9SGeert Uytterhoeven 4136077365a9SGeert Uytterhoeven static const struct { 413781f652afSLad Prabhakar struct sh_pfc_pin_group common[311]; 4138529b8eecSBiju Das #ifdef CONFIG_PINCTRL_PFC_R8A7790 4139077365a9SGeert Uytterhoeven struct sh_pfc_pin_group automotive[1]; 4140529b8eecSBiju Das #endif 4141077365a9SGeert Uytterhoeven } pinmux_groups = { 4142077365a9SGeert Uytterhoeven .common = { 4143077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(audio_clk_a), 4144077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(audio_clk_b), 4145077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(audio_clk_c), 4146077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(audio_clkout), 4147077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(audio_clkout_b), 4148077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(audio_clkout_c), 4149077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(audio_clkout_d), 4150077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_link), 4151077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_magic), 4152077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_phy_int), 4153077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_mdio), 4154077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_mii), 4155077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(avb_gmii), 4156077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(can0_data), 4157077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(can0_data_b), 4158077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(can0_data_c), 4159077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(can0_data_d), 4160077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(can1_data), 4161077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(can1_data_b), 4162077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(can_clk), 4163077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(can_clk_b), 4164077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du_rgb666), 4165077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du_rgb888), 4166077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du_clk_out_0), 4167077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du_clk_out_1), 4168077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du_sync_0), 4169077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du_sync_1), 4170077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du_cde), 4171077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du0_clk_in), 4172077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du1_clk_in), 4173077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(du2_clk_in), 4174077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(eth_link), 4175077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(eth_magic), 4176077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(eth_mdio), 4177077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(eth_rmii), 4178077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_data), 4179077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_clk), 4180077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_ctrl), 4181077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_data_b), 4182077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_ctrl_b), 4183077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_data_c), 4184077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_ctrl_c), 4185077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_data_d), 4186077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_ctrl_d), 4187077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_data_e), 4188077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_ctrl_e), 4189077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_data_f), 4190077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif0_ctrl_f), 4191077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif1_data), 4192077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif1_clk), 4193077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif1_ctrl), 4194077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif1_data_b), 4195077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif1_clk_b), 4196077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(hscif1_ctrl_b), 4197077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c0), 4198077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c1), 4199077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c1_b), 4200077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c1_c), 4201077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c2), 4202077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c2_b), 4203077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c2_c), 4204077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c2_d), 4205077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c2_e), 4206077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(i2c3), 4207077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(iic0), 4208077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(iic1), 4209077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(iic1_b), 4210077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(iic1_c), 4211077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(iic2), 4212077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(iic2_b), 4213077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(iic2_c), 4214077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(iic2_d), 4215077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(iic2_e), 4216077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(iic3), 4217077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(intc_irq0), 4218077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(intc_irq1), 4219077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(intc_irq2), 4220077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(intc_irq3), 4221077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(mmc0_data1), 4222077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(mmc0_data4), 4223077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(mmc0_data8), 4224077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(mmc0_ctrl), 4225077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(mmc1_data1), 4226077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(mmc1_data4), 4227077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(mmc1_data8), 4228077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(mmc1_ctrl), 4229077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_clk), 4230077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_sync), 4231077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_ss1), 4232077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_ss2), 4233077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_rx), 4234077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_tx), 4235077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_clk_b), 4236077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_ss1_b), 4237077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_ss2_b), 4238077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_rx_b), 4239077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof0_tx_b), 4240077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_clk), 4241077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_sync), 4242077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_ss1), 4243077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_ss2), 4244077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_rx), 4245077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_tx), 4246077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_clk_b), 4247077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_ss1_b), 4248077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_ss2_b), 4249077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_rx_b), 4250077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof1_tx_b), 4251077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_clk), 4252077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_sync), 4253077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_ss1), 4254077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_ss2), 4255077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_rx), 4256077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof2_tx), 4257077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof3_clk), 4258077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof3_sync), 4259077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof3_ss1), 4260077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof3_ss2), 4261077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof3_rx), 4262077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof3_tx), 4263077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof3_clk_b), 4264077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof3_sync_b), 4265077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof3_rx_b), 4266077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(msiof3_tx_b), 4267077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm0), 4268077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm0_b), 4269077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm1), 4270077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm1_b), 4271077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm2), 4272077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm3), 4273077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm4), 4274077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm5), 4275077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(pwm6), 4276077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(qspi_ctrl), 4277077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(qspi_data2), 4278077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(qspi_data4), 4279077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif0_data), 4280077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif0_clk), 4281077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif0_ctrl), 4282077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif0_data_b), 4283077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_data), 4284077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_clk), 4285077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_ctrl), 4286077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_data_b), 4287077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_data_c), 4288077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_data_d), 4289077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_clk_d), 4290077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_data_e), 4291077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif1_clk_e), 4292077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif2_data), 4293077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif2_clk), 4294077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif2_data_b), 4295077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa0_data), 4296077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa0_clk), 4297077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa0_ctrl), 4298077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa0_data_b), 4299077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa0_clk_b), 4300077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa0_ctrl_b), 4301077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa1_data), 4302077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa1_clk), 4303077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa1_ctrl), 4304077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa1_data_b), 4305077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa1_clk_b), 4306077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa1_ctrl_b), 4307077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa1_data_c), 4308077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa1_clk_c), 4309077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa1_ctrl_c), 4310077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa1_data_d), 4311077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa1_clk_d), 4312077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa1_ctrl_d), 4313077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa2_data), 4314077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa2_clk), 4315077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa2_ctrl), 4316077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa2_data_b), 4317077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa2_data_c), 4318077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifa2_clk_c), 4319077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb0_data), 4320077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb0_clk), 4321077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb0_ctrl), 4322077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb0_data_b), 4323077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb0_clk_b), 4324077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb0_ctrl_b), 4325077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb0_data_c), 4326077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb1_data), 4327077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb1_clk), 4328077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb1_ctrl), 4329077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb1_data_b), 4330077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb1_clk_b), 4331077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb1_ctrl_b), 4332077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb1_data_c), 4333077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb1_data_d), 4334077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb1_data_e), 4335077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb1_clk_e), 4336077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb1_data_f), 4337077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb1_data_g), 4338077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb1_clk_g), 4339077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb2_data), 4340077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb2_clk), 4341077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb2_ctrl), 4342077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb2_data_b), 4343077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb2_clk_b), 4344077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb2_ctrl_b), 4345077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scifb2_data_c), 4346077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif_clk), 4347077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(scif_clk_b), 4348077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi0_data1), 4349077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi0_data4), 4350077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi0_ctrl), 4351077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi0_cd), 4352077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi0_wp), 4353077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi1_data1), 4354077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi1_data4), 4355077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi1_ctrl), 4356077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi1_cd), 4357077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi1_wp), 4358077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi2_data1), 4359077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi2_data4), 4360077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi2_ctrl), 4361077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi2_cd), 4362077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi2_wp), 4363077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi3_data1), 4364077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi3_data4), 4365077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi3_ctrl), 4366077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi3_cd), 4367077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(sdhi3_wp), 4368077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi0_data), 4369077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi0129_ctrl), 4370077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi1_data), 4371077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi1_ctrl), 4372077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi2_data), 4373077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi2_ctrl), 4374077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi3_data), 4375077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi34_ctrl), 4376077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi4_data), 4377077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi4_ctrl), 4378077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi5), 4379077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi5_b), 4380077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi5_c), 4381077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi6), 4382077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi6_b), 4383077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi7_data), 4384077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi7_b_data), 4385077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi7_c_data), 4386077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi78_ctrl), 4387077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi78_b_ctrl), 4388077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi78_c_ctrl), 4389077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi8_data), 4390077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi8_b_data), 4391077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi8_c_data), 4392077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi9_data), 4393077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(ssi9_ctrl), 4394077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(tpu0_to0), 4395077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(tpu0_to1), 4396077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(tpu0_to2), 4397077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(tpu0_to3), 4398077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(usb0), 4399077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(usb0_ovc_vbus), 4400077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(usb1), 4401077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(usb1_pwen), 4402077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(usb2), 4403077365a9SGeert Uytterhoeven VIN_DATA_PIN_GROUP(vin0_data, 24), 4404077365a9SGeert Uytterhoeven VIN_DATA_PIN_GROUP(vin0_data, 20), 4405077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin0_data18), 4406077365a9SGeert Uytterhoeven VIN_DATA_PIN_GROUP(vin0_data, 16), 4407077365a9SGeert Uytterhoeven VIN_DATA_PIN_GROUP(vin0_data, 12), 4408077365a9SGeert Uytterhoeven VIN_DATA_PIN_GROUP(vin0_data, 10), 4409077365a9SGeert Uytterhoeven VIN_DATA_PIN_GROUP(vin0_data, 8), 4410077365a9SGeert Uytterhoeven VIN_DATA_PIN_GROUP(vin0_data, 4), 4411077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin0_sync), 4412077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin0_field), 4413077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin0_clkenb), 4414077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin0_clk), 4415077365a9SGeert Uytterhoeven VIN_DATA_PIN_GROUP(vin1_data, 24), 4416077365a9SGeert Uytterhoeven VIN_DATA_PIN_GROUP(vin1_data, 20), 4417077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_data18), 4418077365a9SGeert Uytterhoeven VIN_DATA_PIN_GROUP(vin1_data, 16), 4419077365a9SGeert Uytterhoeven VIN_DATA_PIN_GROUP(vin1_data, 12), 4420077365a9SGeert Uytterhoeven VIN_DATA_PIN_GROUP(vin1_data, 10), 4421077365a9SGeert Uytterhoeven VIN_DATA_PIN_GROUP(vin1_data, 8), 4422077365a9SGeert Uytterhoeven VIN_DATA_PIN_GROUP(vin1_data, 4), 442381f652afSLad Prabhakar VIN_DATA_PIN_GROUP(vin1_data, 24, _b), 442481f652afSLad Prabhakar VIN_DATA_PIN_GROUP(vin1_data, 20, _b), 442581f652afSLad Prabhakar SH_PFC_PIN_GROUP(vin1_data18_b), 442681f652afSLad Prabhakar VIN_DATA_PIN_GROUP(vin1_data, 16, _b), 442781f652afSLad Prabhakar VIN_DATA_PIN_GROUP(vin1_data, 12, _b), 442881f652afSLad Prabhakar VIN_DATA_PIN_GROUP(vin1_data, 10, _b), 442981f652afSLad Prabhakar VIN_DATA_PIN_GROUP(vin1_data, 8, _b), 443081f652afSLad Prabhakar VIN_DATA_PIN_GROUP(vin1_data, 4, _b), 4431077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_sync), 443281f652afSLad Prabhakar SH_PFC_PIN_GROUP(vin1_sync_b), 4433077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_field), 443481f652afSLad Prabhakar SH_PFC_PIN_GROUP(vin1_field_b), 4435077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_clkenb), 443681f652afSLad Prabhakar SH_PFC_PIN_GROUP(vin1_clkenb_b), 4437077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin1_clk), 443881f652afSLad Prabhakar SH_PFC_PIN_GROUP(vin1_clk_b), 4439077365a9SGeert Uytterhoeven VIN_DATA_PIN_GROUP(vin2_data, 24), 4440077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin2_data18), 4441077365a9SGeert Uytterhoeven VIN_DATA_PIN_GROUP(vin2_data, 16), 4442077365a9SGeert Uytterhoeven VIN_DATA_PIN_GROUP(vin2_data, 8), 4443077365a9SGeert Uytterhoeven VIN_DATA_PIN_GROUP(vin2_data, 4), 444481f652afSLad Prabhakar SH_PFC_PIN_GROUP(vin2_g8), 4445077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin2_sync), 4446077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin2_field), 4447077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin2_clkenb), 4448077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin2_clk), 4449077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin3_data8), 4450077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin3_sync), 4451077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin3_field), 4452077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin3_clkenb), 4453077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(vin3_clk), 4454077365a9SGeert Uytterhoeven }, 4455529b8eecSBiju Das #ifdef CONFIG_PINCTRL_PFC_R8A7790 4456077365a9SGeert Uytterhoeven .automotive = { 4457077365a9SGeert Uytterhoeven SH_PFC_PIN_GROUP(mlb_3pin), 4458077365a9SGeert Uytterhoeven } 4459529b8eecSBiju Das #endif /* CONFIG_PINCTRL_PFC_R8A7790 */ 4460077365a9SGeert Uytterhoeven }; 4461077365a9SGeert Uytterhoeven 4462077365a9SGeert Uytterhoeven static const char * const audio_clk_groups[] = { 4463077365a9SGeert Uytterhoeven "audio_clk_a", 4464077365a9SGeert Uytterhoeven "audio_clk_b", 4465077365a9SGeert Uytterhoeven "audio_clk_c", 4466077365a9SGeert Uytterhoeven "audio_clkout", 4467077365a9SGeert Uytterhoeven "audio_clkout_b", 4468077365a9SGeert Uytterhoeven "audio_clkout_c", 4469077365a9SGeert Uytterhoeven "audio_clkout_d", 4470077365a9SGeert Uytterhoeven }; 4471077365a9SGeert Uytterhoeven 4472077365a9SGeert Uytterhoeven static const char * const avb_groups[] = { 4473077365a9SGeert Uytterhoeven "avb_link", 4474077365a9SGeert Uytterhoeven "avb_magic", 4475077365a9SGeert Uytterhoeven "avb_phy_int", 4476077365a9SGeert Uytterhoeven "avb_mdio", 4477077365a9SGeert Uytterhoeven "avb_mii", 4478077365a9SGeert Uytterhoeven "avb_gmii", 4479077365a9SGeert Uytterhoeven }; 4480077365a9SGeert Uytterhoeven 4481077365a9SGeert Uytterhoeven static const char * const can0_groups[] = { 4482077365a9SGeert Uytterhoeven "can0_data", 4483077365a9SGeert Uytterhoeven "can0_data_b", 4484077365a9SGeert Uytterhoeven "can0_data_c", 4485077365a9SGeert Uytterhoeven "can0_data_d", 4486077365a9SGeert Uytterhoeven }; 4487077365a9SGeert Uytterhoeven 4488077365a9SGeert Uytterhoeven static const char * const can1_groups[] = { 4489077365a9SGeert Uytterhoeven "can1_data", 4490077365a9SGeert Uytterhoeven "can1_data_b", 4491077365a9SGeert Uytterhoeven }; 4492077365a9SGeert Uytterhoeven 4493077365a9SGeert Uytterhoeven static const char * const can_clk_groups[] = { 4494077365a9SGeert Uytterhoeven "can_clk", 4495077365a9SGeert Uytterhoeven "can_clk_b", 4496077365a9SGeert Uytterhoeven }; 4497077365a9SGeert Uytterhoeven 4498077365a9SGeert Uytterhoeven static const char * const du_groups[] = { 4499077365a9SGeert Uytterhoeven "du_rgb666", 4500077365a9SGeert Uytterhoeven "du_rgb888", 4501077365a9SGeert Uytterhoeven "du_clk_out_0", 4502077365a9SGeert Uytterhoeven "du_clk_out_1", 4503077365a9SGeert Uytterhoeven "du_sync_0", 4504077365a9SGeert Uytterhoeven "du_sync_1", 4505077365a9SGeert Uytterhoeven "du_cde", 4506077365a9SGeert Uytterhoeven }; 4507077365a9SGeert Uytterhoeven 4508077365a9SGeert Uytterhoeven static const char * const du0_groups[] = { 4509077365a9SGeert Uytterhoeven "du0_clk_in", 4510077365a9SGeert Uytterhoeven }; 4511077365a9SGeert Uytterhoeven 4512077365a9SGeert Uytterhoeven static const char * const du1_groups[] = { 4513077365a9SGeert Uytterhoeven "du1_clk_in", 4514077365a9SGeert Uytterhoeven }; 4515077365a9SGeert Uytterhoeven 4516077365a9SGeert Uytterhoeven static const char * const du2_groups[] = { 4517077365a9SGeert Uytterhoeven "du2_clk_in", 4518077365a9SGeert Uytterhoeven }; 4519077365a9SGeert Uytterhoeven 4520077365a9SGeert Uytterhoeven static const char * const eth_groups[] = { 4521077365a9SGeert Uytterhoeven "eth_link", 4522077365a9SGeert Uytterhoeven "eth_magic", 4523077365a9SGeert Uytterhoeven "eth_mdio", 4524077365a9SGeert Uytterhoeven "eth_rmii", 4525077365a9SGeert Uytterhoeven }; 4526077365a9SGeert Uytterhoeven 4527077365a9SGeert Uytterhoeven static const char * const hscif0_groups[] = { 4528077365a9SGeert Uytterhoeven "hscif0_data", 4529077365a9SGeert Uytterhoeven "hscif0_clk", 4530077365a9SGeert Uytterhoeven "hscif0_ctrl", 4531077365a9SGeert Uytterhoeven "hscif0_data_b", 4532077365a9SGeert Uytterhoeven "hscif0_ctrl_b", 4533077365a9SGeert Uytterhoeven "hscif0_data_c", 4534077365a9SGeert Uytterhoeven "hscif0_ctrl_c", 4535077365a9SGeert Uytterhoeven "hscif0_data_d", 4536077365a9SGeert Uytterhoeven "hscif0_ctrl_d", 4537077365a9SGeert Uytterhoeven "hscif0_data_e", 4538077365a9SGeert Uytterhoeven "hscif0_ctrl_e", 4539077365a9SGeert Uytterhoeven "hscif0_data_f", 4540077365a9SGeert Uytterhoeven "hscif0_ctrl_f", 4541077365a9SGeert Uytterhoeven }; 4542077365a9SGeert Uytterhoeven 4543077365a9SGeert Uytterhoeven static const char * const hscif1_groups[] = { 4544077365a9SGeert Uytterhoeven "hscif1_data", 4545077365a9SGeert Uytterhoeven "hscif1_clk", 4546077365a9SGeert Uytterhoeven "hscif1_ctrl", 4547077365a9SGeert Uytterhoeven "hscif1_data_b", 4548077365a9SGeert Uytterhoeven "hscif1_clk_b", 4549077365a9SGeert Uytterhoeven "hscif1_ctrl_b", 4550077365a9SGeert Uytterhoeven }; 4551077365a9SGeert Uytterhoeven 4552077365a9SGeert Uytterhoeven static const char * const i2c0_groups[] = { 4553077365a9SGeert Uytterhoeven "i2c0", 4554077365a9SGeert Uytterhoeven }; 4555077365a9SGeert Uytterhoeven 4556077365a9SGeert Uytterhoeven static const char * const i2c1_groups[] = { 4557077365a9SGeert Uytterhoeven "i2c1", 4558077365a9SGeert Uytterhoeven "i2c1_b", 4559077365a9SGeert Uytterhoeven "i2c1_c", 4560077365a9SGeert Uytterhoeven }; 4561077365a9SGeert Uytterhoeven 4562077365a9SGeert Uytterhoeven static const char * const i2c2_groups[] = { 4563077365a9SGeert Uytterhoeven "i2c2", 4564077365a9SGeert Uytterhoeven "i2c2_b", 4565077365a9SGeert Uytterhoeven "i2c2_c", 4566077365a9SGeert Uytterhoeven "i2c2_d", 4567077365a9SGeert Uytterhoeven "i2c2_e", 4568077365a9SGeert Uytterhoeven }; 4569077365a9SGeert Uytterhoeven 4570077365a9SGeert Uytterhoeven static const char * const i2c3_groups[] = { 4571077365a9SGeert Uytterhoeven "i2c3", 4572077365a9SGeert Uytterhoeven }; 4573077365a9SGeert Uytterhoeven 4574077365a9SGeert Uytterhoeven static const char * const iic0_groups[] = { 4575077365a9SGeert Uytterhoeven "iic0", 4576077365a9SGeert Uytterhoeven }; 4577077365a9SGeert Uytterhoeven 4578077365a9SGeert Uytterhoeven static const char * const iic1_groups[] = { 4579077365a9SGeert Uytterhoeven "iic1", 4580077365a9SGeert Uytterhoeven "iic1_b", 4581077365a9SGeert Uytterhoeven "iic1_c", 4582077365a9SGeert Uytterhoeven }; 4583077365a9SGeert Uytterhoeven 4584077365a9SGeert Uytterhoeven static const char * const iic2_groups[] = { 4585077365a9SGeert Uytterhoeven "iic2", 4586077365a9SGeert Uytterhoeven "iic2_b", 4587077365a9SGeert Uytterhoeven "iic2_c", 4588077365a9SGeert Uytterhoeven "iic2_d", 4589077365a9SGeert Uytterhoeven "iic2_e", 4590077365a9SGeert Uytterhoeven }; 4591077365a9SGeert Uytterhoeven 4592077365a9SGeert Uytterhoeven static const char * const iic3_groups[] = { 4593077365a9SGeert Uytterhoeven "iic3", 4594077365a9SGeert Uytterhoeven }; 4595077365a9SGeert Uytterhoeven 4596077365a9SGeert Uytterhoeven static const char * const intc_groups[] = { 4597077365a9SGeert Uytterhoeven "intc_irq0", 4598077365a9SGeert Uytterhoeven "intc_irq1", 4599077365a9SGeert Uytterhoeven "intc_irq2", 4600077365a9SGeert Uytterhoeven "intc_irq3", 4601077365a9SGeert Uytterhoeven }; 4602077365a9SGeert Uytterhoeven 4603529b8eecSBiju Das #ifdef CONFIG_PINCTRL_PFC_R8A7790 4604077365a9SGeert Uytterhoeven static const char * const mlb_groups[] = { 4605077365a9SGeert Uytterhoeven "mlb_3pin", 4606077365a9SGeert Uytterhoeven }; 4607529b8eecSBiju Das #endif /* CONFIG_PINCTRL_PFC_R8A7790 */ 4608077365a9SGeert Uytterhoeven 4609077365a9SGeert Uytterhoeven static const char * const mmc0_groups[] = { 4610077365a9SGeert Uytterhoeven "mmc0_data1", 4611077365a9SGeert Uytterhoeven "mmc0_data4", 4612077365a9SGeert Uytterhoeven "mmc0_data8", 4613077365a9SGeert Uytterhoeven "mmc0_ctrl", 4614077365a9SGeert Uytterhoeven }; 4615077365a9SGeert Uytterhoeven 4616077365a9SGeert Uytterhoeven static const char * const mmc1_groups[] = { 4617077365a9SGeert Uytterhoeven "mmc1_data1", 4618077365a9SGeert Uytterhoeven "mmc1_data4", 4619077365a9SGeert Uytterhoeven "mmc1_data8", 4620077365a9SGeert Uytterhoeven "mmc1_ctrl", 4621077365a9SGeert Uytterhoeven }; 4622077365a9SGeert Uytterhoeven 4623077365a9SGeert Uytterhoeven static const char * const msiof0_groups[] = { 4624077365a9SGeert Uytterhoeven "msiof0_clk", 4625077365a9SGeert Uytterhoeven "msiof0_sync", 4626077365a9SGeert Uytterhoeven "msiof0_ss1", 4627077365a9SGeert Uytterhoeven "msiof0_ss2", 4628077365a9SGeert Uytterhoeven "msiof0_rx", 4629077365a9SGeert Uytterhoeven "msiof0_tx", 4630077365a9SGeert Uytterhoeven "msiof0_clk_b", 4631077365a9SGeert Uytterhoeven "msiof0_ss1_b", 4632077365a9SGeert Uytterhoeven "msiof0_ss2_b", 4633077365a9SGeert Uytterhoeven "msiof0_rx_b", 4634077365a9SGeert Uytterhoeven "msiof0_tx_b", 4635077365a9SGeert Uytterhoeven }; 4636077365a9SGeert Uytterhoeven 4637077365a9SGeert Uytterhoeven static const char * const msiof1_groups[] = { 4638077365a9SGeert Uytterhoeven "msiof1_clk", 4639077365a9SGeert Uytterhoeven "msiof1_sync", 4640077365a9SGeert Uytterhoeven "msiof1_ss1", 4641077365a9SGeert Uytterhoeven "msiof1_ss2", 4642077365a9SGeert Uytterhoeven "msiof1_rx", 4643077365a9SGeert Uytterhoeven "msiof1_tx", 4644077365a9SGeert Uytterhoeven "msiof1_clk_b", 4645077365a9SGeert Uytterhoeven "msiof1_ss1_b", 4646077365a9SGeert Uytterhoeven "msiof1_ss2_b", 4647077365a9SGeert Uytterhoeven "msiof1_rx_b", 4648077365a9SGeert Uytterhoeven "msiof1_tx_b", 4649077365a9SGeert Uytterhoeven }; 4650077365a9SGeert Uytterhoeven 4651077365a9SGeert Uytterhoeven static const char * const msiof2_groups[] = { 4652077365a9SGeert Uytterhoeven "msiof2_clk", 4653077365a9SGeert Uytterhoeven "msiof2_sync", 4654077365a9SGeert Uytterhoeven "msiof2_ss1", 4655077365a9SGeert Uytterhoeven "msiof2_ss2", 4656077365a9SGeert Uytterhoeven "msiof2_rx", 4657077365a9SGeert Uytterhoeven "msiof2_tx", 4658077365a9SGeert Uytterhoeven }; 4659077365a9SGeert Uytterhoeven 4660077365a9SGeert Uytterhoeven static const char * const msiof3_groups[] = { 4661077365a9SGeert Uytterhoeven "msiof3_clk", 4662077365a9SGeert Uytterhoeven "msiof3_sync", 4663077365a9SGeert Uytterhoeven "msiof3_ss1", 4664077365a9SGeert Uytterhoeven "msiof3_ss2", 4665077365a9SGeert Uytterhoeven "msiof3_rx", 4666077365a9SGeert Uytterhoeven "msiof3_tx", 4667077365a9SGeert Uytterhoeven "msiof3_clk_b", 4668077365a9SGeert Uytterhoeven "msiof3_sync_b", 4669077365a9SGeert Uytterhoeven "msiof3_rx_b", 4670077365a9SGeert Uytterhoeven "msiof3_tx_b", 4671077365a9SGeert Uytterhoeven }; 4672077365a9SGeert Uytterhoeven 4673077365a9SGeert Uytterhoeven static const char * const pwm0_groups[] = { 4674077365a9SGeert Uytterhoeven "pwm0", 4675077365a9SGeert Uytterhoeven "pwm0_b", 4676077365a9SGeert Uytterhoeven }; 4677077365a9SGeert Uytterhoeven 4678077365a9SGeert Uytterhoeven static const char * const pwm1_groups[] = { 4679077365a9SGeert Uytterhoeven "pwm1", 4680077365a9SGeert Uytterhoeven "pwm1_b", 4681077365a9SGeert Uytterhoeven }; 4682077365a9SGeert Uytterhoeven 4683077365a9SGeert Uytterhoeven static const char * const pwm2_groups[] = { 4684077365a9SGeert Uytterhoeven "pwm2", 4685077365a9SGeert Uytterhoeven }; 4686077365a9SGeert Uytterhoeven 4687077365a9SGeert Uytterhoeven static const char * const pwm3_groups[] = { 4688077365a9SGeert Uytterhoeven "pwm3", 4689077365a9SGeert Uytterhoeven }; 4690077365a9SGeert Uytterhoeven 4691077365a9SGeert Uytterhoeven static const char * const pwm4_groups[] = { 4692077365a9SGeert Uytterhoeven "pwm4", 4693077365a9SGeert Uytterhoeven }; 4694077365a9SGeert Uytterhoeven 4695077365a9SGeert Uytterhoeven static const char * const pwm5_groups[] = { 4696077365a9SGeert Uytterhoeven "pwm5", 4697077365a9SGeert Uytterhoeven }; 4698077365a9SGeert Uytterhoeven 4699077365a9SGeert Uytterhoeven static const char * const pwm6_groups[] = { 4700077365a9SGeert Uytterhoeven "pwm6", 4701077365a9SGeert Uytterhoeven }; 4702077365a9SGeert Uytterhoeven 4703077365a9SGeert Uytterhoeven static const char * const qspi_groups[] = { 4704077365a9SGeert Uytterhoeven "qspi_ctrl", 4705077365a9SGeert Uytterhoeven "qspi_data2", 4706077365a9SGeert Uytterhoeven "qspi_data4", 4707077365a9SGeert Uytterhoeven }; 4708077365a9SGeert Uytterhoeven 4709077365a9SGeert Uytterhoeven static const char * const scif0_groups[] = { 4710077365a9SGeert Uytterhoeven "scif0_data", 4711077365a9SGeert Uytterhoeven "scif0_clk", 4712077365a9SGeert Uytterhoeven "scif0_ctrl", 4713077365a9SGeert Uytterhoeven "scif0_data_b", 4714077365a9SGeert Uytterhoeven }; 4715077365a9SGeert Uytterhoeven 4716077365a9SGeert Uytterhoeven static const char * const scif1_groups[] = { 4717077365a9SGeert Uytterhoeven "scif1_data", 4718077365a9SGeert Uytterhoeven "scif1_clk", 4719077365a9SGeert Uytterhoeven "scif1_ctrl", 4720077365a9SGeert Uytterhoeven "scif1_data_b", 4721077365a9SGeert Uytterhoeven "scif1_data_c", 4722077365a9SGeert Uytterhoeven "scif1_data_d", 4723077365a9SGeert Uytterhoeven "scif1_clk_d", 4724077365a9SGeert Uytterhoeven "scif1_data_e", 4725077365a9SGeert Uytterhoeven "scif1_clk_e", 4726077365a9SGeert Uytterhoeven }; 4727077365a9SGeert Uytterhoeven 4728077365a9SGeert Uytterhoeven static const char * const scif2_groups[] = { 4729077365a9SGeert Uytterhoeven "scif2_data", 4730077365a9SGeert Uytterhoeven "scif2_clk", 4731077365a9SGeert Uytterhoeven "scif2_data_b", 4732077365a9SGeert Uytterhoeven }; 4733077365a9SGeert Uytterhoeven 4734077365a9SGeert Uytterhoeven static const char * const scifa0_groups[] = { 4735077365a9SGeert Uytterhoeven "scifa0_data", 4736077365a9SGeert Uytterhoeven "scifa0_clk", 4737077365a9SGeert Uytterhoeven "scifa0_ctrl", 4738077365a9SGeert Uytterhoeven "scifa0_data_b", 4739077365a9SGeert Uytterhoeven "scifa0_clk_b", 4740077365a9SGeert Uytterhoeven "scifa0_ctrl_b", 4741077365a9SGeert Uytterhoeven }; 4742077365a9SGeert Uytterhoeven 4743077365a9SGeert Uytterhoeven static const char * const scifa1_groups[] = { 4744077365a9SGeert Uytterhoeven "scifa1_data", 4745077365a9SGeert Uytterhoeven "scifa1_clk", 4746077365a9SGeert Uytterhoeven "scifa1_ctrl", 4747077365a9SGeert Uytterhoeven "scifa1_data_b", 4748077365a9SGeert Uytterhoeven "scifa1_clk_b", 4749077365a9SGeert Uytterhoeven "scifa1_ctrl_b", 4750077365a9SGeert Uytterhoeven "scifa1_data_c", 4751077365a9SGeert Uytterhoeven "scifa1_clk_c", 4752077365a9SGeert Uytterhoeven "scifa1_ctrl_c", 4753077365a9SGeert Uytterhoeven "scifa1_data_d", 4754077365a9SGeert Uytterhoeven "scifa1_clk_d", 4755077365a9SGeert Uytterhoeven "scifa1_ctrl_d", 4756077365a9SGeert Uytterhoeven }; 4757077365a9SGeert Uytterhoeven 4758077365a9SGeert Uytterhoeven static const char * const scifa2_groups[] = { 4759077365a9SGeert Uytterhoeven "scifa2_data", 4760077365a9SGeert Uytterhoeven "scifa2_clk", 4761077365a9SGeert Uytterhoeven "scifa2_ctrl", 4762077365a9SGeert Uytterhoeven "scifa2_data_b", 4763077365a9SGeert Uytterhoeven "scifa2_data_c", 4764077365a9SGeert Uytterhoeven "scifa2_clk_c", 4765077365a9SGeert Uytterhoeven }; 4766077365a9SGeert Uytterhoeven 4767077365a9SGeert Uytterhoeven static const char * const scifb0_groups[] = { 4768077365a9SGeert Uytterhoeven "scifb0_data", 4769077365a9SGeert Uytterhoeven "scifb0_clk", 4770077365a9SGeert Uytterhoeven "scifb0_ctrl", 4771077365a9SGeert Uytterhoeven "scifb0_data_b", 4772077365a9SGeert Uytterhoeven "scifb0_clk_b", 4773077365a9SGeert Uytterhoeven "scifb0_ctrl_b", 4774077365a9SGeert Uytterhoeven "scifb0_data_c", 4775077365a9SGeert Uytterhoeven }; 4776077365a9SGeert Uytterhoeven 4777077365a9SGeert Uytterhoeven static const char * const scifb1_groups[] = { 4778077365a9SGeert Uytterhoeven "scifb1_data", 4779077365a9SGeert Uytterhoeven "scifb1_clk", 4780077365a9SGeert Uytterhoeven "scifb1_ctrl", 4781077365a9SGeert Uytterhoeven "scifb1_data_b", 4782077365a9SGeert Uytterhoeven "scifb1_clk_b", 4783077365a9SGeert Uytterhoeven "scifb1_ctrl_b", 4784077365a9SGeert Uytterhoeven "scifb1_data_c", 4785077365a9SGeert Uytterhoeven "scifb1_data_d", 4786077365a9SGeert Uytterhoeven "scifb1_data_e", 4787077365a9SGeert Uytterhoeven "scifb1_clk_e", 4788077365a9SGeert Uytterhoeven "scifb1_data_f", 4789077365a9SGeert Uytterhoeven "scifb1_data_g", 4790077365a9SGeert Uytterhoeven "scifb1_clk_g", 4791077365a9SGeert Uytterhoeven }; 4792077365a9SGeert Uytterhoeven 4793077365a9SGeert Uytterhoeven static const char * const scifb2_groups[] = { 4794077365a9SGeert Uytterhoeven "scifb2_data", 4795077365a9SGeert Uytterhoeven "scifb2_clk", 4796077365a9SGeert Uytterhoeven "scifb2_ctrl", 4797077365a9SGeert Uytterhoeven "scifb2_data_b", 4798077365a9SGeert Uytterhoeven "scifb2_clk_b", 4799077365a9SGeert Uytterhoeven "scifb2_ctrl_b", 4800077365a9SGeert Uytterhoeven "scifb2_data_c", 4801077365a9SGeert Uytterhoeven }; 4802077365a9SGeert Uytterhoeven 4803077365a9SGeert Uytterhoeven static const char * const scif_clk_groups[] = { 4804077365a9SGeert Uytterhoeven "scif_clk", 4805077365a9SGeert Uytterhoeven "scif_clk_b", 4806077365a9SGeert Uytterhoeven }; 4807077365a9SGeert Uytterhoeven 4808077365a9SGeert Uytterhoeven static const char * const sdhi0_groups[] = { 4809077365a9SGeert Uytterhoeven "sdhi0_data1", 4810077365a9SGeert Uytterhoeven "sdhi0_data4", 4811077365a9SGeert Uytterhoeven "sdhi0_ctrl", 4812077365a9SGeert Uytterhoeven "sdhi0_cd", 4813077365a9SGeert Uytterhoeven "sdhi0_wp", 4814077365a9SGeert Uytterhoeven }; 4815077365a9SGeert Uytterhoeven 4816077365a9SGeert Uytterhoeven static const char * const sdhi1_groups[] = { 4817077365a9SGeert Uytterhoeven "sdhi1_data1", 4818077365a9SGeert Uytterhoeven "sdhi1_data4", 4819077365a9SGeert Uytterhoeven "sdhi1_ctrl", 4820077365a9SGeert Uytterhoeven "sdhi1_cd", 4821077365a9SGeert Uytterhoeven "sdhi1_wp", 4822077365a9SGeert Uytterhoeven }; 4823077365a9SGeert Uytterhoeven 4824077365a9SGeert Uytterhoeven static const char * const sdhi2_groups[] = { 4825077365a9SGeert Uytterhoeven "sdhi2_data1", 4826077365a9SGeert Uytterhoeven "sdhi2_data4", 4827077365a9SGeert Uytterhoeven "sdhi2_ctrl", 4828077365a9SGeert Uytterhoeven "sdhi2_cd", 4829077365a9SGeert Uytterhoeven "sdhi2_wp", 4830077365a9SGeert Uytterhoeven }; 4831077365a9SGeert Uytterhoeven 4832077365a9SGeert Uytterhoeven static const char * const sdhi3_groups[] = { 4833077365a9SGeert Uytterhoeven "sdhi3_data1", 4834077365a9SGeert Uytterhoeven "sdhi3_data4", 4835077365a9SGeert Uytterhoeven "sdhi3_ctrl", 4836077365a9SGeert Uytterhoeven "sdhi3_cd", 4837077365a9SGeert Uytterhoeven "sdhi3_wp", 4838077365a9SGeert Uytterhoeven }; 4839077365a9SGeert Uytterhoeven 4840077365a9SGeert Uytterhoeven static const char * const ssi_groups[] = { 4841077365a9SGeert Uytterhoeven "ssi0_data", 4842077365a9SGeert Uytterhoeven "ssi0129_ctrl", 4843077365a9SGeert Uytterhoeven "ssi1_data", 4844077365a9SGeert Uytterhoeven "ssi1_ctrl", 4845077365a9SGeert Uytterhoeven "ssi2_data", 4846077365a9SGeert Uytterhoeven "ssi2_ctrl", 4847077365a9SGeert Uytterhoeven "ssi3_data", 4848077365a9SGeert Uytterhoeven "ssi34_ctrl", 4849077365a9SGeert Uytterhoeven "ssi4_data", 4850077365a9SGeert Uytterhoeven "ssi4_ctrl", 4851077365a9SGeert Uytterhoeven "ssi5", 4852077365a9SGeert Uytterhoeven "ssi5_b", 4853077365a9SGeert Uytterhoeven "ssi5_c", 4854077365a9SGeert Uytterhoeven "ssi6", 4855077365a9SGeert Uytterhoeven "ssi6_b", 4856077365a9SGeert Uytterhoeven "ssi7_data", 4857077365a9SGeert Uytterhoeven "ssi7_b_data", 4858077365a9SGeert Uytterhoeven "ssi7_c_data", 4859077365a9SGeert Uytterhoeven "ssi78_ctrl", 4860077365a9SGeert Uytterhoeven "ssi78_b_ctrl", 4861077365a9SGeert Uytterhoeven "ssi78_c_ctrl", 4862077365a9SGeert Uytterhoeven "ssi8_data", 4863077365a9SGeert Uytterhoeven "ssi8_b_data", 4864077365a9SGeert Uytterhoeven "ssi8_c_data", 4865077365a9SGeert Uytterhoeven "ssi9_data", 4866077365a9SGeert Uytterhoeven "ssi9_ctrl", 4867077365a9SGeert Uytterhoeven }; 4868077365a9SGeert Uytterhoeven 4869077365a9SGeert Uytterhoeven static const char * const tpu0_groups[] = { 4870077365a9SGeert Uytterhoeven "tpu0_to0", 4871077365a9SGeert Uytterhoeven "tpu0_to1", 4872077365a9SGeert Uytterhoeven "tpu0_to2", 4873077365a9SGeert Uytterhoeven "tpu0_to3", 4874077365a9SGeert Uytterhoeven }; 4875077365a9SGeert Uytterhoeven 4876077365a9SGeert Uytterhoeven static const char * const usb0_groups[] = { 4877077365a9SGeert Uytterhoeven "usb0", 4878077365a9SGeert Uytterhoeven "usb0_ovc_vbus", 4879077365a9SGeert Uytterhoeven }; 4880077365a9SGeert Uytterhoeven 4881077365a9SGeert Uytterhoeven static const char * const usb1_groups[] = { 4882077365a9SGeert Uytterhoeven "usb1", 4883077365a9SGeert Uytterhoeven "usb1_pwen", 4884077365a9SGeert Uytterhoeven }; 4885077365a9SGeert Uytterhoeven 4886077365a9SGeert Uytterhoeven static const char * const usb2_groups[] = { 4887077365a9SGeert Uytterhoeven "usb2", 4888077365a9SGeert Uytterhoeven }; 4889077365a9SGeert Uytterhoeven 4890077365a9SGeert Uytterhoeven static const char * const vin0_groups[] = { 4891077365a9SGeert Uytterhoeven "vin0_data24", 4892077365a9SGeert Uytterhoeven "vin0_data20", 4893077365a9SGeert Uytterhoeven "vin0_data18", 4894077365a9SGeert Uytterhoeven "vin0_data16", 4895077365a9SGeert Uytterhoeven "vin0_data12", 4896077365a9SGeert Uytterhoeven "vin0_data10", 4897077365a9SGeert Uytterhoeven "vin0_data8", 4898077365a9SGeert Uytterhoeven "vin0_data4", 4899077365a9SGeert Uytterhoeven "vin0_sync", 4900077365a9SGeert Uytterhoeven "vin0_field", 4901077365a9SGeert Uytterhoeven "vin0_clkenb", 4902077365a9SGeert Uytterhoeven "vin0_clk", 4903077365a9SGeert Uytterhoeven }; 4904077365a9SGeert Uytterhoeven 4905077365a9SGeert Uytterhoeven static const char * const vin1_groups[] = { 4906077365a9SGeert Uytterhoeven "vin1_data24", 4907077365a9SGeert Uytterhoeven "vin1_data20", 4908077365a9SGeert Uytterhoeven "vin1_data18", 4909077365a9SGeert Uytterhoeven "vin1_data16", 4910077365a9SGeert Uytterhoeven "vin1_data12", 4911077365a9SGeert Uytterhoeven "vin1_data10", 4912077365a9SGeert Uytterhoeven "vin1_data8", 4913077365a9SGeert Uytterhoeven "vin1_data4", 491481f652afSLad Prabhakar "vin1_data24_b", 491581f652afSLad Prabhakar "vin1_data20_b", 491681f652afSLad Prabhakar "vin1_data18_b", 491781f652afSLad Prabhakar "vin1_data16_b", 491881f652afSLad Prabhakar "vin1_data12_b", 491981f652afSLad Prabhakar "vin1_data10_b", 492081f652afSLad Prabhakar "vin1_data8_b", 492181f652afSLad Prabhakar "vin1_data4_b", 4922077365a9SGeert Uytterhoeven "vin1_sync", 492381f652afSLad Prabhakar "vin1_sync_b", 4924077365a9SGeert Uytterhoeven "vin1_field", 492581f652afSLad Prabhakar "vin1_field_b", 4926077365a9SGeert Uytterhoeven "vin1_clkenb", 492781f652afSLad Prabhakar "vin1_clkenb_b", 4928077365a9SGeert Uytterhoeven "vin1_clk", 492981f652afSLad Prabhakar "vin1_clk_b", 4930077365a9SGeert Uytterhoeven }; 4931077365a9SGeert Uytterhoeven 4932077365a9SGeert Uytterhoeven static const char * const vin2_groups[] = { 4933077365a9SGeert Uytterhoeven "vin2_data24", 4934077365a9SGeert Uytterhoeven "vin2_data18", 4935077365a9SGeert Uytterhoeven "vin2_data16", 4936077365a9SGeert Uytterhoeven "vin2_data8", 4937077365a9SGeert Uytterhoeven "vin2_data4", 493881f652afSLad Prabhakar "vin2_g8", 4939077365a9SGeert Uytterhoeven "vin2_sync", 4940077365a9SGeert Uytterhoeven "vin2_field", 4941077365a9SGeert Uytterhoeven "vin2_clkenb", 4942077365a9SGeert Uytterhoeven "vin2_clk", 4943077365a9SGeert Uytterhoeven }; 4944077365a9SGeert Uytterhoeven 4945077365a9SGeert Uytterhoeven static const char * const vin3_groups[] = { 4946077365a9SGeert Uytterhoeven "vin3_data8", 4947077365a9SGeert Uytterhoeven "vin3_sync", 4948077365a9SGeert Uytterhoeven "vin3_field", 4949077365a9SGeert Uytterhoeven "vin3_clkenb", 4950077365a9SGeert Uytterhoeven "vin3_clk", 4951077365a9SGeert Uytterhoeven }; 4952077365a9SGeert Uytterhoeven 4953077365a9SGeert Uytterhoeven static const struct { 4954077365a9SGeert Uytterhoeven struct sh_pfc_function common[58]; 4955529b8eecSBiju Das #ifdef CONFIG_PINCTRL_PFC_R8A7790 4956077365a9SGeert Uytterhoeven struct sh_pfc_function automotive[1]; 4957529b8eecSBiju Das #endif 4958077365a9SGeert Uytterhoeven } pinmux_functions = { 4959077365a9SGeert Uytterhoeven .common = { 4960077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(audio_clk), 4961077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(avb), 4962077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(du), 4963077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(can0), 4964077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(can1), 4965077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(can_clk), 4966077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(du0), 4967077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(du1), 4968077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(du2), 4969077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(eth), 4970077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(hscif0), 4971077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(hscif1), 4972077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(i2c0), 4973077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(i2c1), 4974077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(i2c2), 4975077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(i2c3), 4976077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(iic0), 4977077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(iic1), 4978077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(iic2), 4979077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(iic3), 4980077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(intc), 4981077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(mmc0), 4982077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(mmc1), 4983077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(msiof0), 4984077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(msiof1), 4985077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(msiof2), 4986077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(msiof3), 4987077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(pwm0), 4988077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(pwm1), 4989077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(pwm2), 4990077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(pwm3), 4991077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(pwm4), 4992077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(pwm5), 4993077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(pwm6), 4994077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(qspi), 4995077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif0), 4996077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif1), 4997077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif2), 4998077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scifa0), 4999077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scifa1), 5000077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scifa2), 5001077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scifb0), 5002077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scifb1), 5003077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scifb2), 5004077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(scif_clk), 5005077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(sdhi0), 5006077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(sdhi1), 5007077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(sdhi2), 5008077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(sdhi3), 5009077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(ssi), 5010077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(tpu0), 5011077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(usb0), 5012077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(usb1), 5013077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(usb2), 5014077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(vin0), 5015077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(vin1), 5016077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(vin2), 5017077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(vin3), 5018077365a9SGeert Uytterhoeven }, 5019529b8eecSBiju Das #ifdef CONFIG_PINCTRL_PFC_R8A7790 5020077365a9SGeert Uytterhoeven .automotive = { 5021077365a9SGeert Uytterhoeven SH_PFC_FUNCTION(mlb), 5022077365a9SGeert Uytterhoeven } 5023529b8eecSBiju Das #endif /* CONFIG_PINCTRL_PFC_R8A7790 */ 5024077365a9SGeert Uytterhoeven }; 5025077365a9SGeert Uytterhoeven 5026077365a9SGeert Uytterhoeven static const struct pinmux_cfg_reg pinmux_config_regs[] = { 5027077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1, GROUP( 5028077365a9SGeert Uytterhoeven GP_0_31_FN, FN_IP3_17_15, 5029077365a9SGeert Uytterhoeven GP_0_30_FN, FN_IP3_14_12, 5030077365a9SGeert Uytterhoeven GP_0_29_FN, FN_IP3_11_8, 5031077365a9SGeert Uytterhoeven GP_0_28_FN, FN_IP3_7_4, 5032077365a9SGeert Uytterhoeven GP_0_27_FN, FN_IP3_3_0, 5033077365a9SGeert Uytterhoeven GP_0_26_FN, FN_IP2_28_26, 5034077365a9SGeert Uytterhoeven GP_0_25_FN, FN_IP2_25_22, 5035077365a9SGeert Uytterhoeven GP_0_24_FN, FN_IP2_21_18, 5036077365a9SGeert Uytterhoeven GP_0_23_FN, FN_IP2_17_15, 5037077365a9SGeert Uytterhoeven GP_0_22_FN, FN_IP2_14_12, 5038077365a9SGeert Uytterhoeven GP_0_21_FN, FN_IP2_11_9, 5039077365a9SGeert Uytterhoeven GP_0_20_FN, FN_IP2_8_6, 5040077365a9SGeert Uytterhoeven GP_0_19_FN, FN_IP2_5_3, 5041077365a9SGeert Uytterhoeven GP_0_18_FN, FN_IP2_2_0, 5042077365a9SGeert Uytterhoeven GP_0_17_FN, FN_IP1_29_28, 5043077365a9SGeert Uytterhoeven GP_0_16_FN, FN_IP1_27_26, 5044077365a9SGeert Uytterhoeven GP_0_15_FN, FN_IP1_25_22, 5045077365a9SGeert Uytterhoeven GP_0_14_FN, FN_IP1_21_18, 5046077365a9SGeert Uytterhoeven GP_0_13_FN, FN_IP1_17_15, 5047077365a9SGeert Uytterhoeven GP_0_12_FN, FN_IP1_14_12, 5048077365a9SGeert Uytterhoeven GP_0_11_FN, FN_IP1_11_8, 5049077365a9SGeert Uytterhoeven GP_0_10_FN, FN_IP1_7_4, 5050077365a9SGeert Uytterhoeven GP_0_9_FN, FN_IP1_3_0, 5051077365a9SGeert Uytterhoeven GP_0_8_FN, FN_IP0_30_27, 5052077365a9SGeert Uytterhoeven GP_0_7_FN, FN_IP0_26_23, 5053077365a9SGeert Uytterhoeven GP_0_6_FN, FN_IP0_22_20, 5054077365a9SGeert Uytterhoeven GP_0_5_FN, FN_IP0_19_16, 5055077365a9SGeert Uytterhoeven GP_0_4_FN, FN_IP0_15_12, 5056077365a9SGeert Uytterhoeven GP_0_3_FN, FN_IP0_11_9, 5057077365a9SGeert Uytterhoeven GP_0_2_FN, FN_IP0_8_6, 5058077365a9SGeert Uytterhoeven GP_0_1_FN, FN_IP0_5_3, 5059077365a9SGeert Uytterhoeven GP_0_0_FN, FN_IP0_2_0 )) 5060077365a9SGeert Uytterhoeven }, 5061077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1, GROUP( 5062077365a9SGeert Uytterhoeven 0, 0, 5063077365a9SGeert Uytterhoeven 0, 0, 5064077365a9SGeert Uytterhoeven GP_1_29_FN, FN_IP6_13_11, 5065077365a9SGeert Uytterhoeven GP_1_28_FN, FN_IP6_10_9, 5066077365a9SGeert Uytterhoeven GP_1_27_FN, FN_IP6_8_6, 5067077365a9SGeert Uytterhoeven GP_1_26_FN, FN_IP6_5_3, 5068077365a9SGeert Uytterhoeven GP_1_25_FN, FN_IP6_2_0, 5069077365a9SGeert Uytterhoeven GP_1_24_FN, FN_IP5_29_27, 5070077365a9SGeert Uytterhoeven GP_1_23_FN, FN_IP5_26_24, 5071077365a9SGeert Uytterhoeven GP_1_22_FN, FN_IP5_23_21, 5072077365a9SGeert Uytterhoeven GP_1_21_FN, FN_IP5_20_18, 5073077365a9SGeert Uytterhoeven GP_1_20_FN, FN_IP5_17_15, 5074077365a9SGeert Uytterhoeven GP_1_19_FN, FN_IP5_14_13, 5075077365a9SGeert Uytterhoeven GP_1_18_FN, FN_IP5_12_10, 5076077365a9SGeert Uytterhoeven GP_1_17_FN, FN_IP5_9_6, 5077077365a9SGeert Uytterhoeven GP_1_16_FN, FN_IP5_5_3, 5078077365a9SGeert Uytterhoeven GP_1_15_FN, FN_IP5_2_0, 5079077365a9SGeert Uytterhoeven GP_1_14_FN, FN_IP4_29_27, 5080077365a9SGeert Uytterhoeven GP_1_13_FN, FN_IP4_26_24, 5081077365a9SGeert Uytterhoeven GP_1_12_FN, FN_IP4_23_21, 5082077365a9SGeert Uytterhoeven GP_1_11_FN, FN_IP4_20_18, 5083077365a9SGeert Uytterhoeven GP_1_10_FN, FN_IP4_17_15, 5084077365a9SGeert Uytterhoeven GP_1_9_FN, FN_IP4_14_12, 5085077365a9SGeert Uytterhoeven GP_1_8_FN, FN_IP4_11_9, 5086077365a9SGeert Uytterhoeven GP_1_7_FN, FN_IP4_8_6, 5087077365a9SGeert Uytterhoeven GP_1_6_FN, FN_IP4_5_3, 5088077365a9SGeert Uytterhoeven GP_1_5_FN, FN_IP4_2_0, 5089077365a9SGeert Uytterhoeven GP_1_4_FN, FN_IP3_31_29, 5090077365a9SGeert Uytterhoeven GP_1_3_FN, FN_IP3_28_26, 5091077365a9SGeert Uytterhoeven GP_1_2_FN, FN_IP3_25_23, 5092077365a9SGeert Uytterhoeven GP_1_1_FN, FN_IP3_22_20, 5093077365a9SGeert Uytterhoeven GP_1_0_FN, FN_IP3_19_18, )) 5094077365a9SGeert Uytterhoeven }, 5095077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1, GROUP( 5096077365a9SGeert Uytterhoeven 0, 0, 5097077365a9SGeert Uytterhoeven 0, 0, 5098077365a9SGeert Uytterhoeven GP_2_29_FN, FN_IP7_15_13, 5099077365a9SGeert Uytterhoeven GP_2_28_FN, FN_IP7_12_10, 5100077365a9SGeert Uytterhoeven GP_2_27_FN, FN_IP7_9_8, 5101077365a9SGeert Uytterhoeven GP_2_26_FN, FN_IP7_7_6, 5102077365a9SGeert Uytterhoeven GP_2_25_FN, FN_IP7_5_3, 5103077365a9SGeert Uytterhoeven GP_2_24_FN, FN_IP7_2_0, 5104077365a9SGeert Uytterhoeven GP_2_23_FN, FN_IP6_31_29, 5105077365a9SGeert Uytterhoeven GP_2_22_FN, FN_IP6_28_26, 5106077365a9SGeert Uytterhoeven GP_2_21_FN, FN_IP6_25_23, 5107077365a9SGeert Uytterhoeven GP_2_20_FN, FN_IP6_22_20, 5108077365a9SGeert Uytterhoeven GP_2_19_FN, FN_IP6_19_17, 5109077365a9SGeert Uytterhoeven GP_2_18_FN, FN_IP6_16_14, 5110077365a9SGeert Uytterhoeven GP_2_17_FN, FN_VI1_DATA7_VI1_B7, 5111077365a9SGeert Uytterhoeven GP_2_16_FN, FN_IP8_27, 5112077365a9SGeert Uytterhoeven GP_2_15_FN, FN_IP8_26, 5113077365a9SGeert Uytterhoeven GP_2_14_FN, FN_IP8_25_24, 5114077365a9SGeert Uytterhoeven GP_2_13_FN, FN_IP8_23_22, 5115077365a9SGeert Uytterhoeven GP_2_12_FN, FN_IP8_21_20, 5116077365a9SGeert Uytterhoeven GP_2_11_FN, FN_IP8_19_18, 5117077365a9SGeert Uytterhoeven GP_2_10_FN, FN_IP8_17_16, 5118077365a9SGeert Uytterhoeven GP_2_9_FN, FN_IP8_15_14, 5119077365a9SGeert Uytterhoeven GP_2_8_FN, FN_IP8_13_12, 5120077365a9SGeert Uytterhoeven GP_2_7_FN, FN_IP8_11_10, 5121077365a9SGeert Uytterhoeven GP_2_6_FN, FN_IP8_9_8, 5122077365a9SGeert Uytterhoeven GP_2_5_FN, FN_IP8_7_6, 5123077365a9SGeert Uytterhoeven GP_2_4_FN, FN_IP8_5_4, 5124077365a9SGeert Uytterhoeven GP_2_3_FN, FN_IP8_3_2, 5125077365a9SGeert Uytterhoeven GP_2_2_FN, FN_IP8_1_0, 5126077365a9SGeert Uytterhoeven GP_2_1_FN, FN_IP7_30_29, 5127077365a9SGeert Uytterhoeven GP_2_0_FN, FN_IP7_28_27 )) 5128077365a9SGeert Uytterhoeven }, 5129077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1, GROUP( 5130077365a9SGeert Uytterhoeven GP_3_31_FN, FN_IP11_21_18, 5131077365a9SGeert Uytterhoeven GP_3_30_FN, FN_IP11_17_15, 5132077365a9SGeert Uytterhoeven GP_3_29_FN, FN_IP11_14_13, 5133077365a9SGeert Uytterhoeven GP_3_28_FN, FN_IP11_12_11, 5134077365a9SGeert Uytterhoeven GP_3_27_FN, FN_IP11_10_9, 5135077365a9SGeert Uytterhoeven GP_3_26_FN, FN_IP11_8_7, 5136077365a9SGeert Uytterhoeven GP_3_25_FN, FN_IP11_6_5, 5137077365a9SGeert Uytterhoeven GP_3_24_FN, FN_IP11_4, 5138077365a9SGeert Uytterhoeven GP_3_23_FN, FN_IP11_3_0, 5139077365a9SGeert Uytterhoeven GP_3_22_FN, FN_IP10_29_26, 5140077365a9SGeert Uytterhoeven GP_3_21_FN, FN_IP10_25_23, 5141077365a9SGeert Uytterhoeven GP_3_20_FN, FN_IP10_22_19, 5142077365a9SGeert Uytterhoeven GP_3_19_FN, FN_IP10_18_15, 5143077365a9SGeert Uytterhoeven GP_3_18_FN, FN_IP10_14_11, 5144077365a9SGeert Uytterhoeven GP_3_17_FN, FN_IP10_10_7, 5145077365a9SGeert Uytterhoeven GP_3_16_FN, FN_IP10_6_4, 5146077365a9SGeert Uytterhoeven GP_3_15_FN, FN_IP10_3_0, 5147077365a9SGeert Uytterhoeven GP_3_14_FN, FN_IP9_31_28, 5148077365a9SGeert Uytterhoeven GP_3_13_FN, FN_IP9_27_26, 5149077365a9SGeert Uytterhoeven GP_3_12_FN, FN_IP9_25_24, 5150077365a9SGeert Uytterhoeven GP_3_11_FN, FN_IP9_23_22, 5151077365a9SGeert Uytterhoeven GP_3_10_FN, FN_IP9_21_20, 5152077365a9SGeert Uytterhoeven GP_3_9_FN, FN_IP9_19_18, 5153077365a9SGeert Uytterhoeven GP_3_8_FN, FN_IP9_17_16, 5154077365a9SGeert Uytterhoeven GP_3_7_FN, FN_IP9_15_12, 5155077365a9SGeert Uytterhoeven GP_3_6_FN, FN_IP9_11_8, 5156077365a9SGeert Uytterhoeven GP_3_5_FN, FN_IP9_7_6, 5157077365a9SGeert Uytterhoeven GP_3_4_FN, FN_IP9_5_4, 5158077365a9SGeert Uytterhoeven GP_3_3_FN, FN_IP9_3_2, 5159077365a9SGeert Uytterhoeven GP_3_2_FN, FN_IP9_1_0, 5160077365a9SGeert Uytterhoeven GP_3_1_FN, FN_IP8_30_29, 5161077365a9SGeert Uytterhoeven GP_3_0_FN, FN_IP8_28 )) 5162077365a9SGeert Uytterhoeven }, 5163077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1, GROUP( 5164077365a9SGeert Uytterhoeven GP_4_31_FN, FN_IP14_18_16, 5165077365a9SGeert Uytterhoeven GP_4_30_FN, FN_IP14_15_12, 5166077365a9SGeert Uytterhoeven GP_4_29_FN, FN_IP14_11_9, 5167077365a9SGeert Uytterhoeven GP_4_28_FN, FN_IP14_8_6, 5168077365a9SGeert Uytterhoeven GP_4_27_FN, FN_IP14_5_3, 5169077365a9SGeert Uytterhoeven GP_4_26_FN, FN_IP14_2_0, 5170077365a9SGeert Uytterhoeven GP_4_25_FN, FN_IP13_30_29, 5171077365a9SGeert Uytterhoeven GP_4_24_FN, FN_IP13_28_26, 5172077365a9SGeert Uytterhoeven GP_4_23_FN, FN_IP13_25_23, 5173077365a9SGeert Uytterhoeven GP_4_22_FN, FN_IP13_22_19, 5174077365a9SGeert Uytterhoeven GP_4_21_FN, FN_IP13_18_16, 5175077365a9SGeert Uytterhoeven GP_4_20_FN, FN_IP13_15_13, 5176077365a9SGeert Uytterhoeven GP_4_19_FN, FN_IP13_12_10, 5177077365a9SGeert Uytterhoeven GP_4_18_FN, FN_IP13_9_7, 5178077365a9SGeert Uytterhoeven GP_4_17_FN, FN_IP13_6_3, 5179077365a9SGeert Uytterhoeven GP_4_16_FN, FN_IP13_2_0, 5180077365a9SGeert Uytterhoeven GP_4_15_FN, FN_IP12_30_28, 5181077365a9SGeert Uytterhoeven GP_4_14_FN, FN_IP12_27_25, 5182077365a9SGeert Uytterhoeven GP_4_13_FN, FN_IP12_24_23, 5183077365a9SGeert Uytterhoeven GP_4_12_FN, FN_IP12_22_20, 5184077365a9SGeert Uytterhoeven GP_4_11_FN, FN_IP12_19_17, 5185077365a9SGeert Uytterhoeven GP_4_10_FN, FN_IP12_16_14, 5186077365a9SGeert Uytterhoeven GP_4_9_FN, FN_IP12_13_11, 5187077365a9SGeert Uytterhoeven GP_4_8_FN, FN_IP12_10_8, 5188077365a9SGeert Uytterhoeven GP_4_7_FN, FN_IP12_7_6, 5189077365a9SGeert Uytterhoeven GP_4_6_FN, FN_IP12_5_4, 5190077365a9SGeert Uytterhoeven GP_4_5_FN, FN_IP12_3_2, 5191077365a9SGeert Uytterhoeven GP_4_4_FN, FN_IP12_1_0, 5192077365a9SGeert Uytterhoeven GP_4_3_FN, FN_IP11_31_30, 5193077365a9SGeert Uytterhoeven GP_4_2_FN, FN_IP11_29_27, 5194077365a9SGeert Uytterhoeven GP_4_1_FN, FN_IP11_26_24, 5195077365a9SGeert Uytterhoeven GP_4_0_FN, FN_IP11_23_22 )) 5196077365a9SGeert Uytterhoeven }, 5197077365a9SGeert Uytterhoeven { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1, GROUP( 5198077365a9SGeert Uytterhoeven GP_5_31_FN, FN_IP7_24_22, 5199077365a9SGeert Uytterhoeven GP_5_30_FN, FN_IP7_21_19, 5200077365a9SGeert Uytterhoeven GP_5_29_FN, FN_IP7_18_16, 5201077365a9SGeert Uytterhoeven GP_5_28_FN, FN_DU_DOTCLKIN2, 5202077365a9SGeert Uytterhoeven GP_5_27_FN, FN_IP7_26_25, 5203077365a9SGeert Uytterhoeven GP_5_26_FN, FN_DU_DOTCLKIN0, 5204077365a9SGeert Uytterhoeven GP_5_25_FN, FN_AVS2, 5205077365a9SGeert Uytterhoeven GP_5_24_FN, FN_AVS1, 5206077365a9SGeert Uytterhoeven GP_5_23_FN, FN_USB2_OVC, 5207077365a9SGeert Uytterhoeven GP_5_22_FN, FN_USB2_PWEN, 5208077365a9SGeert Uytterhoeven GP_5_21_FN, FN_IP16_7, 5209077365a9SGeert Uytterhoeven GP_5_20_FN, FN_IP16_6, 5210077365a9SGeert Uytterhoeven GP_5_19_FN, FN_USB0_OVC_VBUS, 5211077365a9SGeert Uytterhoeven GP_5_18_FN, FN_USB0_PWEN, 5212077365a9SGeert Uytterhoeven GP_5_17_FN, FN_IP16_5_3, 5213077365a9SGeert Uytterhoeven GP_5_16_FN, FN_IP16_2_0, 5214077365a9SGeert Uytterhoeven GP_5_15_FN, FN_IP15_29_28, 5215077365a9SGeert Uytterhoeven GP_5_14_FN, FN_IP15_27_26, 5216077365a9SGeert Uytterhoeven GP_5_13_FN, FN_IP15_25_23, 5217077365a9SGeert Uytterhoeven GP_5_12_FN, FN_IP15_22_20, 5218077365a9SGeert Uytterhoeven GP_5_11_FN, FN_IP15_19_18, 5219077365a9SGeert Uytterhoeven GP_5_10_FN, FN_IP15_17_16, 5220077365a9SGeert Uytterhoeven GP_5_9_FN, FN_IP15_15_14, 5221077365a9SGeert Uytterhoeven GP_5_8_FN, FN_IP15_13_12, 5222077365a9SGeert Uytterhoeven GP_5_7_FN, FN_IP15_11_9, 5223077365a9SGeert Uytterhoeven GP_5_6_FN, FN_IP15_8_6, 5224077365a9SGeert Uytterhoeven GP_5_5_FN, FN_IP15_5_3, 5225077365a9SGeert Uytterhoeven GP_5_4_FN, FN_IP15_2_0, 5226077365a9SGeert Uytterhoeven GP_5_3_FN, FN_IP14_30_28, 5227077365a9SGeert Uytterhoeven GP_5_2_FN, FN_IP14_27_25, 5228077365a9SGeert Uytterhoeven GP_5_1_FN, FN_IP14_24_22, 5229077365a9SGeert Uytterhoeven GP_5_0_FN, FN_IP14_21_19 )) 5230077365a9SGeert Uytterhoeven }, 5231077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR0", 0xE6060020, 32, 5232077365a9SGeert Uytterhoeven GROUP(1, 4, 4, 3, 4, 4, 3, 3, 3, 3), 5233077365a9SGeert Uytterhoeven GROUP( 5234077365a9SGeert Uytterhoeven /* IP0_31 [1] */ 5235077365a9SGeert Uytterhoeven 0, 0, 5236077365a9SGeert Uytterhoeven /* IP0_30_27 [4] */ 5237077365a9SGeert Uytterhoeven FN_D8, FN_SCIFA1_SCK_C, FN_AVB_TXD0, 0, 5238077365a9SGeert Uytterhoeven FN_VI0_G0, FN_VI0_G0_B, FN_VI2_DATA0_VI2_B0, 5239077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 5240077365a9SGeert Uytterhoeven /* IP0_26_23 [4] */ 5241077365a9SGeert Uytterhoeven FN_D7, FN_AD_DI_B, FN_IIC2_SDA_C, 5242077365a9SGeert Uytterhoeven FN_VI3_DATA7, FN_VI0_R3, FN_VI0_R3_B, FN_I2C2_SDA_C, 5243077365a9SGeert Uytterhoeven FN_TCLK1, 0, 0, 0, 0, 0, 0, 0, 0, 5244077365a9SGeert Uytterhoeven /* IP0_22_20 [3] */ 5245077365a9SGeert Uytterhoeven FN_D6, FN_IIC2_SCL_C, FN_VI3_DATA6, FN_VI0_R2, FN_VI0_R2_B, 5246077365a9SGeert Uytterhoeven FN_I2C2_SCL_C, 0, 0, 5247077365a9SGeert Uytterhoeven /* IP0_19_16 [4] */ 5248077365a9SGeert Uytterhoeven FN_D5, FN_SCIFB1_TXD_F, FN_SCIFB0_TXD_C, FN_VI3_DATA5, 5249077365a9SGeert Uytterhoeven FN_VI0_R1, FN_VI0_R1_B, FN_TX0_B, 5250077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 5251077365a9SGeert Uytterhoeven /* IP0_15_12 [4] */ 5252077365a9SGeert Uytterhoeven FN_D4, FN_SCIFB1_RXD_F, FN_SCIFB0_RXD_C, FN_VI3_DATA4, 5253077365a9SGeert Uytterhoeven FN_VI0_R0, FN_VI0_R0_B, FN_RX0_B, 5254077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 5255077365a9SGeert Uytterhoeven /* IP0_11_9 [3] */ 5256077365a9SGeert Uytterhoeven FN_D3, FN_MSIOF3_TXD_B, FN_VI3_DATA3, FN_VI0_G7, FN_VI0_G7_B, 5257077365a9SGeert Uytterhoeven 0, 0, 0, 5258077365a9SGeert Uytterhoeven /* IP0_8_6 [3] */ 5259077365a9SGeert Uytterhoeven FN_D2, FN_MSIOF3_RXD_B, FN_VI3_DATA2, FN_VI0_G6, FN_VI0_G6_B, 5260077365a9SGeert Uytterhoeven 0, 0, 0, 5261077365a9SGeert Uytterhoeven /* IP0_5_3 [3] */ 5262077365a9SGeert Uytterhoeven FN_D1, FN_MSIOF3_SYNC_B, FN_VI3_DATA1, FN_VI0_G5, FN_VI0_G5_B, 5263077365a9SGeert Uytterhoeven 0, 0, 0, 5264077365a9SGeert Uytterhoeven /* IP0_2_0 [3] */ 5265077365a9SGeert Uytterhoeven FN_D0, FN_MSIOF3_SCK_B, FN_VI3_DATA0, FN_VI0_G4, FN_VI0_G4_B, 5266077365a9SGeert Uytterhoeven 0, 0, 0, )) 5267077365a9SGeert Uytterhoeven }, 5268077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR1", 0xE6060024, 32, 5269077365a9SGeert Uytterhoeven GROUP(2, 2, 2, 4, 4, 3, 3, 4, 4, 4), 5270077365a9SGeert Uytterhoeven GROUP( 5271077365a9SGeert Uytterhoeven /* IP1_31_30 [2] */ 5272077365a9SGeert Uytterhoeven 0, 0, 0, 0, 5273077365a9SGeert Uytterhoeven /* IP1_29_28 [2] */ 5274077365a9SGeert Uytterhoeven FN_A1, FN_PWM4, 0, 0, 5275077365a9SGeert Uytterhoeven /* IP1_27_26 [2] */ 5276077365a9SGeert Uytterhoeven FN_A0, FN_PWM3, 0, 0, 5277077365a9SGeert Uytterhoeven /* IP1_25_22 [4] */ 5278077365a9SGeert Uytterhoeven FN_D15, FN_SCIFB1_TXD_C, FN_AVB_TXD7, FN_TX1_B, 5279077365a9SGeert Uytterhoeven FN_VI0_FIELD, FN_VI0_FIELD_B, FN_VI2_DATA7_VI2_B7, 5280077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 5281077365a9SGeert Uytterhoeven /* IP1_21_18 [4] */ 5282077365a9SGeert Uytterhoeven FN_D14, FN_SCIFB1_RXD_C, FN_AVB_TXD6, FN_RX1_B, 5283077365a9SGeert Uytterhoeven FN_VI0_CLKENB, FN_VI0_CLKENB_B, FN_VI2_DATA6_VI2_B6, 5284077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 5285077365a9SGeert Uytterhoeven /* IP1_17_15 [3] */ 5286077365a9SGeert Uytterhoeven FN_D13, FN_AVB_TXD5, FN_VI0_VSYNC_N, 5287077365a9SGeert Uytterhoeven FN_VI0_VSYNC_N_B, FN_VI2_DATA5_VI2_B5, 5288077365a9SGeert Uytterhoeven 0, 0, 0, 5289077365a9SGeert Uytterhoeven /* IP1_14_12 [3] */ 5290077365a9SGeert Uytterhoeven FN_D12, FN_SCIFA1_RTS_N_C, FN_AVB_TXD4, 5291077365a9SGeert Uytterhoeven FN_VI0_HSYNC_N, FN_VI0_HSYNC_N_B, FN_VI2_DATA4_VI2_B4, 5292077365a9SGeert Uytterhoeven 0, 0, 5293077365a9SGeert Uytterhoeven /* IP1_11_8 [4] */ 5294077365a9SGeert Uytterhoeven FN_D11, FN_SCIFA1_CTS_N_C, FN_AVB_TXD3, 0, 5295077365a9SGeert Uytterhoeven FN_VI0_G3, FN_VI0_G3_B, FN_VI2_DATA3_VI2_B3, 5296077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 5297077365a9SGeert Uytterhoeven /* IP1_7_4 [4] */ 5298077365a9SGeert Uytterhoeven FN_D10, FN_SCIFA1_TXD_C, FN_AVB_TXD2, 0, 5299077365a9SGeert Uytterhoeven FN_VI0_G2, FN_VI0_G2_B, FN_VI2_DATA2_VI2_B2, 5300077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 5301077365a9SGeert Uytterhoeven /* IP1_3_0 [4] */ 5302077365a9SGeert Uytterhoeven FN_D9, FN_SCIFA1_RXD_C, FN_AVB_TXD1, 0, 5303077365a9SGeert Uytterhoeven FN_VI0_G1, FN_VI0_G1_B, FN_VI2_DATA1_VI2_B1, 5304077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, )) 5305077365a9SGeert Uytterhoeven }, 5306077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR2", 0xE6060028, 32, 5307077365a9SGeert Uytterhoeven GROUP(3, 3, 4, 4, 3, 3, 3, 3, 3, 3), 5308077365a9SGeert Uytterhoeven GROUP( 5309077365a9SGeert Uytterhoeven /* IP2_31_29 [3] */ 5310077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5311077365a9SGeert Uytterhoeven /* IP2_28_26 [3] */ 5312077365a9SGeert Uytterhoeven FN_A10, FN_SSI_SDATA5_B, FN_MSIOF2_SYNC, FN_VI0_R6, 5313077365a9SGeert Uytterhoeven FN_VI0_R6_B, FN_VI2_DATA2_VI2_B2_B, 0, 0, 5314077365a9SGeert Uytterhoeven /* IP2_25_22 [4] */ 5315077365a9SGeert Uytterhoeven FN_A9, FN_SCIFA1_CTS_N_B, FN_SSI_WS5_B, FN_VI0_R5, 5316077365a9SGeert Uytterhoeven FN_VI0_R5_B, FN_SCIFB2_TXD_C, FN_TX2_B, FN_VI2_DATA1_VI2_B1_B, 5317077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5318077365a9SGeert Uytterhoeven /* IP2_21_18 [4] */ 5319077365a9SGeert Uytterhoeven FN_A8, FN_SCIFA1_RXD_B, FN_SSI_SCK5_B, FN_VI0_R4, 5320077365a9SGeert Uytterhoeven FN_VI0_R4_B, FN_SCIFB2_RXD_C, FN_RX2_B, FN_VI2_DATA0_VI2_B0_B, 5321077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5322077365a9SGeert Uytterhoeven /* IP2_17_15 [3] */ 5323077365a9SGeert Uytterhoeven FN_A7, FN_SCIFA1_SCK_B, FN_AUDIO_CLKOUT_B, FN_TPU0TO3, 5324077365a9SGeert Uytterhoeven 0, 0, 0, 0, 5325077365a9SGeert Uytterhoeven /* IP2_14_12 [3] */ 5326077365a9SGeert Uytterhoeven FN_A6, FN_SCIFA1_RTS_N_B, FN_TPU0TO2, 0, 0, 0, 0, 0, 5327077365a9SGeert Uytterhoeven /* IP2_11_9 [3] */ 5328077365a9SGeert Uytterhoeven FN_A5, FN_SCIFA1_TXD_B, FN_TPU0TO1, 0, 0, 0, 0, 0, 5329077365a9SGeert Uytterhoeven /* IP2_8_6 [3] */ 5330077365a9SGeert Uytterhoeven FN_A4, FN_MSIOF1_TXD_B, FN_TPU0TO0, 0, 0, 0, 0, 0, 5331077365a9SGeert Uytterhoeven /* IP2_5_3 [3] */ 5332077365a9SGeert Uytterhoeven FN_A3, FN_PWM6, FN_MSIOF1_SS2_B, 0, 0, 0, 0, 0, 5333077365a9SGeert Uytterhoeven /* IP2_2_0 [3] */ 5334077365a9SGeert Uytterhoeven FN_A2, FN_PWM5, FN_MSIOF1_SS1_B, 0, 0, 0, 0, 0, )) 5335077365a9SGeert Uytterhoeven }, 5336077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR3", 0xE606002C, 32, 5337077365a9SGeert Uytterhoeven GROUP(3, 3, 3, 3, 2, 3, 3, 4, 4, 4), 5338077365a9SGeert Uytterhoeven GROUP( 5339077365a9SGeert Uytterhoeven /* IP3_31_29 [3] */ 5340077365a9SGeert Uytterhoeven FN_A20, FN_SPCLK, FN_VI1_R3, FN_VI1_R3_B, FN_VI2_G4, 5341077365a9SGeert Uytterhoeven 0, 0, 0, 5342077365a9SGeert Uytterhoeven /* IP3_28_26 [3] */ 5343077365a9SGeert Uytterhoeven FN_A19, FN_AD_NCS_N_B, FN_ATACS01_N, FN_EX_WAIT0_B, 5344077365a9SGeert Uytterhoeven 0, 0, 0, 0, 5345077365a9SGeert Uytterhoeven /* IP3_25_23 [3] */ 5346077365a9SGeert Uytterhoeven FN_A18, FN_AD_CLK_B, FN_ATAG1_N, 0, 0, 0, 0, 0, 5347077365a9SGeert Uytterhoeven /* IP3_22_20 [3] */ 5348077365a9SGeert Uytterhoeven FN_A17, FN_AD_DO_B, FN_ATADIR1_N, 0, 0, 0, 0, 0, 5349077365a9SGeert Uytterhoeven /* IP3_19_18 [2] */ 5350077365a9SGeert Uytterhoeven FN_A16, FN_ATAWR1_N, 0, 0, 5351077365a9SGeert Uytterhoeven /* IP3_17_15 [3] */ 5352077365a9SGeert Uytterhoeven FN_A15, FN_SCIFB2_SCK_B, FN_ATARD1_N, FN_MSIOF2_SS2, 5353077365a9SGeert Uytterhoeven 0, 0, 0, 0, 5354077365a9SGeert Uytterhoeven /* IP3_14_12 [3] */ 5355077365a9SGeert Uytterhoeven FN_A14, FN_SCIFB2_TXD_B, FN_ATACS11_N, FN_MSIOF2_SS1, 5356077365a9SGeert Uytterhoeven 0, 0, 0, 0, 5357077365a9SGeert Uytterhoeven /* IP3_11_8 [4] */ 5358077365a9SGeert Uytterhoeven FN_A13, FN_SCIFB2_RTS_N_B, FN_EX_WAIT2, 5359077365a9SGeert Uytterhoeven FN_MSIOF2_RXD, FN_VI1_R2, FN_VI1_R2_B, FN_VI2_G2, 5360077365a9SGeert Uytterhoeven FN_VI2_DATA5_VI2_B5_B, 0, 0, 0, 0, 0, 0, 0, 0, 5361077365a9SGeert Uytterhoeven /* IP3_7_4 [4] */ 5362077365a9SGeert Uytterhoeven FN_A12, FN_SCIFB2_RXD_B, FN_MSIOF2_TXD, FN_VI1_R1, 5363077365a9SGeert Uytterhoeven FN_VI1_R1_B, FN_VI2_G1, FN_VI2_DATA4_VI2_B4_B, 5364077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 0, 5365077365a9SGeert Uytterhoeven /* IP3_3_0 [4] */ 5366077365a9SGeert Uytterhoeven FN_A11, FN_SCIFB2_CTS_N_B, FN_MSIOF2_SCK, FN_VI1_R0, 5367077365a9SGeert Uytterhoeven FN_VI1_R0_B, FN_VI2_G0, FN_VI2_DATA3_VI2_B3_B, 0, 5368077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, )) 5369077365a9SGeert Uytterhoeven }, 5370077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR4", 0xE6060030, 32, 5371077365a9SGeert Uytterhoeven GROUP(2, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3), 5372077365a9SGeert Uytterhoeven GROUP( 5373077365a9SGeert Uytterhoeven /* IP4_31_30 [2] */ 5374077365a9SGeert Uytterhoeven 0, 0, 0, 0, 5375077365a9SGeert Uytterhoeven /* IP4_29_27 [3] */ 5376077365a9SGeert Uytterhoeven FN_EX_CS2_N, FN_GPS_SIGN, FN_HRTS1_N_B, 5377077365a9SGeert Uytterhoeven FN_VI3_CLKENB, FN_VI1_G0, FN_VI1_G0_B, FN_VI2_R2, 0, 5378077365a9SGeert Uytterhoeven /* IP4_26_24 [3] */ 5379077365a9SGeert Uytterhoeven FN_EX_CS1_N, FN_GPS_CLK, FN_HCTS1_N_B, FN_VI1_FIELD, 5380077365a9SGeert Uytterhoeven FN_VI1_FIELD_B, FN_VI2_R1, 0, 0, 5381077365a9SGeert Uytterhoeven /* IP4_23_21 [3] */ 5382077365a9SGeert Uytterhoeven FN_EX_CS0_N, FN_HRX1_B, FN_VI1_G5, FN_VI1_G5_B, FN_VI2_R0, 5383077365a9SGeert Uytterhoeven FN_HTX0_B, FN_MSIOF0_SS1_B, 0, 5384077365a9SGeert Uytterhoeven /* IP4_20_18 [3] */ 5385077365a9SGeert Uytterhoeven FN_CS1_N_A26, FN_SPEEDIN, FN_VI0_R7, FN_VI0_R7_B, 5386077365a9SGeert Uytterhoeven FN_VI2_CLK, FN_VI2_CLK_B, 0, 0, 5387077365a9SGeert Uytterhoeven /* IP4_17_15 [3] */ 5388077365a9SGeert Uytterhoeven FN_CS0_N, FN_VI1_R6, FN_VI1_R6_B, FN_VI2_G3, FN_MSIOF0_SS2_B, 5389077365a9SGeert Uytterhoeven 0, 0, 0, 5390077365a9SGeert Uytterhoeven /* IP4_14_12 [3] */ 5391077365a9SGeert Uytterhoeven FN_A25, FN_SSL, FN_VI1_G6, FN_VI1_G6_B, FN_VI2_FIELD, 5392077365a9SGeert Uytterhoeven FN_VI2_FIELD_B, 0, 0, 5393077365a9SGeert Uytterhoeven /* IP4_11_9 [3] */ 5394077365a9SGeert Uytterhoeven FN_A24, FN_IO3, FN_VI1_R7, FN_VI1_R7_B, FN_VI2_CLKENB, 5395077365a9SGeert Uytterhoeven FN_VI2_CLKENB_B, 0, 0, 5396077365a9SGeert Uytterhoeven /* IP4_8_6 [3] */ 5397077365a9SGeert Uytterhoeven FN_A23, FN_IO2, FN_VI1_G7, FN_VI1_G7_B, FN_VI2_G7, 0, 0, 0, 5398077365a9SGeert Uytterhoeven /* IP4_5_3 [3] */ 5399077365a9SGeert Uytterhoeven FN_A22, FN_MISO_IO1, FN_VI1_R5, FN_VI1_R5_B, FN_VI2_G6, 0, 0, 0, 5400077365a9SGeert Uytterhoeven /* IP4_2_0 [3] */ 5401077365a9SGeert Uytterhoeven FN_A21, FN_MOSI_IO0, FN_VI1_R4, FN_VI1_R4_B, FN_VI2_G5, 0, 0, 0, 5402077365a9SGeert Uytterhoeven )) 5403077365a9SGeert Uytterhoeven }, 5404077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR5", 0xE6060034, 32, 5405077365a9SGeert Uytterhoeven GROUP(2, 3, 3, 3, 3, 3, 2, 3, 4, 3, 3), 5406077365a9SGeert Uytterhoeven GROUP( 5407077365a9SGeert Uytterhoeven /* IP5_31_30 [2] */ 5408077365a9SGeert Uytterhoeven 0, 0, 0, 0, 5409077365a9SGeert Uytterhoeven /* IP5_29_27 [3] */ 5410077365a9SGeert Uytterhoeven FN_DREQ0_N, FN_VI1_HSYNC_N, FN_VI1_HSYNC_N_B, FN_VI2_R7, 5411077365a9SGeert Uytterhoeven FN_SSI_SCK78_C, FN_SSI_WS78_B, 0, 0, 5412077365a9SGeert Uytterhoeven /* IP5_26_24 [3] */ 5413*c038a988SGeert Uytterhoeven FN_EX_WAIT0, FN_IRQ3, 0, FN_VI3_CLK, FN_SCIFA0_RTS_N_B, 5414*c038a988SGeert Uytterhoeven FN_HRX0_B, FN_MSIOF0_SCK_B, 0, 5415077365a9SGeert Uytterhoeven /* IP5_23_21 [3] */ 5416077365a9SGeert Uytterhoeven FN_WE1_N, FN_IERX, FN_CAN1_RX, FN_VI1_G4, 5417077365a9SGeert Uytterhoeven FN_VI1_G4_B, FN_VI2_R6, FN_SCIFA0_CTS_N_B, FN_IERX_C, 5418077365a9SGeert Uytterhoeven /* IP5_20_18 [3] */ 5419077365a9SGeert Uytterhoeven FN_WE0_N, FN_IECLK, FN_CAN_CLK, 5420077365a9SGeert Uytterhoeven FN_VI2_VSYNC_N, FN_SCIFA0_TXD_B, FN_VI2_VSYNC_N_B, 0, 0, 5421077365a9SGeert Uytterhoeven /* IP5_17_15 [3] */ 5422077365a9SGeert Uytterhoeven FN_RD_WR_N, FN_VI1_G3, FN_VI1_G3_B, FN_VI2_R5, FN_SCIFA0_RXD_B, 5423*c038a988SGeert Uytterhoeven 0, 0, 0, 5424077365a9SGeert Uytterhoeven /* IP5_14_13 [2] */ 5425077365a9SGeert Uytterhoeven FN_RD_N, FN_CAN0_TX, FN_SCIFA0_SCK_B, 0, 5426077365a9SGeert Uytterhoeven /* IP5_12_10 [3] */ 5427077365a9SGeert Uytterhoeven FN_BS_N, FN_IETX, FN_HTX1_B, FN_CAN1_TX, FN_DRACK0, FN_IETX_C, 5428077365a9SGeert Uytterhoeven 0, 0, 5429077365a9SGeert Uytterhoeven /* IP5_9_6 [4] */ 5430077365a9SGeert Uytterhoeven FN_EX_CS5_N, FN_CAN0_RX, FN_MSIOF1_RXD_B, FN_VI3_VSYNC_N, 5431077365a9SGeert Uytterhoeven FN_VI1_G2, FN_VI1_G2_B, FN_VI2_R4, FN_IIC1_SDA, FN_INTC_EN1_N, 5432077365a9SGeert Uytterhoeven FN_I2C1_SDA, 0, 0, 0, 0, 0, 0, 5433077365a9SGeert Uytterhoeven /* IP5_5_3 [3] */ 5434077365a9SGeert Uytterhoeven FN_EX_CS4_N, FN_MSIOF1_SCK_B, FN_VI3_HSYNC_N, 5435077365a9SGeert Uytterhoeven FN_VI2_HSYNC_N, FN_IIC1_SCL, FN_VI2_HSYNC_N_B, 5436077365a9SGeert Uytterhoeven FN_INTC_EN0_N, FN_I2C1_SCL, 5437077365a9SGeert Uytterhoeven /* IP5_2_0 [3] */ 5438077365a9SGeert Uytterhoeven FN_EX_CS3_N, FN_GPS_MAG, FN_VI3_FIELD, FN_VI1_G1, FN_VI1_G1_B, 5439077365a9SGeert Uytterhoeven FN_VI2_R3, 0, 0, )) 5440077365a9SGeert Uytterhoeven }, 5441077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060038, 32, 5442077365a9SGeert Uytterhoeven GROUP(3, 3, 3, 3, 3, 3, 3, 2, 3, 3, 3), 5443077365a9SGeert Uytterhoeven GROUP( 5444077365a9SGeert Uytterhoeven /* IP6_31_29 [3] */ 5445077365a9SGeert Uytterhoeven FN_ETH_REF_CLK, 0, FN_HCTS0_N_E, 5446077365a9SGeert Uytterhoeven FN_STP_IVCXO27_1_B, FN_HRX0_F, 0, 0, 0, 5447077365a9SGeert Uytterhoeven /* IP6_28_26 [3] */ 5448077365a9SGeert Uytterhoeven FN_ETH_LINK, 0, FN_HTX0_E, 5449077365a9SGeert Uytterhoeven FN_STP_IVCXO27_0_B, FN_SCIFB1_TXD_G, FN_TX1_E, 0, 0, 5450077365a9SGeert Uytterhoeven /* IP6_25_23 [3] */ 5451077365a9SGeert Uytterhoeven FN_ETH_RXD1, 0, FN_HRX0_E, FN_STP_ISSYNC_0_B, 5452077365a9SGeert Uytterhoeven FN_TS_SCK0_D, FN_GLO_I1_C, FN_SCIFB1_RXD_G, FN_RX1_E, 5453077365a9SGeert Uytterhoeven /* IP6_22_20 [3] */ 5454077365a9SGeert Uytterhoeven FN_ETH_RXD0, 0, FN_STP_ISEN_0_B, FN_TS_SDAT0_D, 5455077365a9SGeert Uytterhoeven FN_GLO_I0_C, FN_SCIFB1_SCK_G, FN_SCK1_E, 0, 5456077365a9SGeert Uytterhoeven /* IP6_19_17 [3] */ 5457077365a9SGeert Uytterhoeven FN_ETH_RX_ER, 0, FN_STP_ISD_0_B, 5458077365a9SGeert Uytterhoeven FN_TS_SPSYNC0_D, FN_GLO_Q1_C, FN_IIC2_SDA_E, FN_I2C2_SDA_E, 0, 5459077365a9SGeert Uytterhoeven /* IP6_16_14 [3] */ 5460077365a9SGeert Uytterhoeven FN_ETH_CRS_DV, 0, FN_STP_ISCLK_0_B, 5461077365a9SGeert Uytterhoeven FN_TS_SDEN0_D, FN_GLO_Q0_C, FN_IIC2_SCL_E, 5462077365a9SGeert Uytterhoeven FN_I2C2_SCL_E, 0, 5463077365a9SGeert Uytterhoeven /* IP6_13_11 [3] */ 5464*c038a988SGeert Uytterhoeven FN_DACK2, FN_IRQ2, 0, FN_SSI_SDATA6_B, FN_HRTS0_N_B, 5465*c038a988SGeert Uytterhoeven FN_MSIOF0_RXD_B, 0, 0, 5466077365a9SGeert Uytterhoeven /* IP6_10_9 [2] */ 5467077365a9SGeert Uytterhoeven FN_DREQ2_N, FN_HSCK1_B, FN_HCTS0_N_B, FN_MSIOF0_TXD_B, 5468077365a9SGeert Uytterhoeven /* IP6_8_6 [3] */ 5469*c038a988SGeert Uytterhoeven FN_DACK1, FN_IRQ1, 0, FN_SSI_WS6_B, FN_SSI_SDATA8_C, 0, 0, 0, 5470077365a9SGeert Uytterhoeven /* IP6_5_3 [3] */ 5471077365a9SGeert Uytterhoeven FN_DREQ1_N, FN_VI1_CLKENB, FN_VI1_CLKENB_B, 5472077365a9SGeert Uytterhoeven FN_SSI_SDATA7_C, FN_SSI_SCK78_B, 0, 0, 0, 5473077365a9SGeert Uytterhoeven /* IP6_2_0 [3] */ 5474*c038a988SGeert Uytterhoeven FN_DACK0, FN_IRQ0, 0, FN_SSI_SCK6_B, FN_VI1_VSYNC_N, 5475*c038a988SGeert Uytterhoeven FN_VI1_VSYNC_N_B, FN_SSI_WS78_C, 0, )) 5476077365a9SGeert Uytterhoeven }, 5477077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR7", 0xE606003C, 32, 5478077365a9SGeert Uytterhoeven GROUP(1, 2, 2, 2, 3, 3, 3, 3, 3, 2, 2, 3, 3), 5479077365a9SGeert Uytterhoeven GROUP( 5480077365a9SGeert Uytterhoeven /* IP7_31 [1] */ 5481077365a9SGeert Uytterhoeven 0, 0, 5482077365a9SGeert Uytterhoeven /* IP7_30_29 [2] */ 5483077365a9SGeert Uytterhoeven FN_VI0_DATA0_VI0_B0, FN_ATACS10_N, FN_AVB_RXD2, 0, 5484077365a9SGeert Uytterhoeven /* IP7_28_27 [2] */ 5485077365a9SGeert Uytterhoeven FN_VI0_CLK, FN_ATACS00_N, FN_AVB_RXD1, 0, 5486077365a9SGeert Uytterhoeven /* IP7_26_25 [2] */ 5487077365a9SGeert Uytterhoeven FN_DU_DOTCLKIN1, FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, 0, 5488077365a9SGeert Uytterhoeven /* IP7_24_22 [3] */ 5489077365a9SGeert Uytterhoeven FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C, FN_PCMWE_N, FN_IECLK_C, 5490077365a9SGeert Uytterhoeven 0, 0, 0, 5491077365a9SGeert Uytterhoeven /* IP7_21_19 [3] */ 5492077365a9SGeert Uytterhoeven FN_PWM1, FN_SCIFA2_TXD_C, FN_STP_ISSYNC_1_B, FN_TS_SCK1_C, 5493077365a9SGeert Uytterhoeven FN_GLO_RFON_C, FN_PCMOE_N, 0, 0, 5494077365a9SGeert Uytterhoeven /* IP7_18_16 [3] */ 5495077365a9SGeert Uytterhoeven FN_PWM0, FN_SCIFA2_SCK_C, FN_STP_ISEN_1_B, FN_TS_SDAT1_C, 5496077365a9SGeert Uytterhoeven FN_GLO_SS_C, 0, 0, 0, 5497077365a9SGeert Uytterhoeven /* IP7_15_13 [3] */ 5498077365a9SGeert Uytterhoeven FN_ETH_MDC, 0, FN_STP_ISD_1_B, 5499077365a9SGeert Uytterhoeven FN_TS_SPSYNC1_C, FN_GLO_SDATA_C, 0, 0, 0, 5500077365a9SGeert Uytterhoeven /* IP7_12_10 [3] */ 5501077365a9SGeert Uytterhoeven FN_ETH_TXD0, 0, FN_STP_ISCLK_1_B, FN_TS_SDEN1_C, 5502077365a9SGeert Uytterhoeven FN_GLO_SCLK_C, 0, 0, 0, 5503077365a9SGeert Uytterhoeven /* IP7_9_8 [2] */ 5504077365a9SGeert Uytterhoeven FN_ETH_MAGIC, 0, FN_SIM0_RST_C, 0, 5505077365a9SGeert Uytterhoeven /* IP7_7_6 [2] */ 5506077365a9SGeert Uytterhoeven FN_ETH_TX_EN, 0, FN_SIM0_CLK_C, FN_HRTS0_N_F, 5507077365a9SGeert Uytterhoeven /* IP7_5_3 [3] */ 5508077365a9SGeert Uytterhoeven FN_ETH_TXD1, 0, FN_HTX0_F, FN_BPFCLK_G, 0, 0, 0, 0, 5509077365a9SGeert Uytterhoeven /* IP7_2_0 [3] */ 5510077365a9SGeert Uytterhoeven FN_ETH_MDIO, 0, FN_HRTS0_N_E, 5511077365a9SGeert Uytterhoeven FN_SIM0_D_C, FN_HCTS0_N_F, 0, 0, 0, )) 5512077365a9SGeert Uytterhoeven }, 5513077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR8", 0xE6060040, 32, 5514077365a9SGeert Uytterhoeven GROUP(1, 2, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 5515077365a9SGeert Uytterhoeven 2, 2, 2, 2, 2, 2), 5516077365a9SGeert Uytterhoeven GROUP( 5517077365a9SGeert Uytterhoeven /* IP8_31 [1] */ 5518077365a9SGeert Uytterhoeven 0, 0, 5519077365a9SGeert Uytterhoeven /* IP8_30_29 [2] */ 5520077365a9SGeert Uytterhoeven FN_SD0_CMD, FN_SCIFB1_SCK_B, FN_VI1_DATA1_VI1_B1_B, 0, 5521077365a9SGeert Uytterhoeven /* IP8_28 [1] */ 5522077365a9SGeert Uytterhoeven FN_SD0_CLK, FN_VI1_DATA0_VI1_B0_B, 5523077365a9SGeert Uytterhoeven /* IP8_27 [1] */ 5524077365a9SGeert Uytterhoeven FN_VI1_DATA6_VI1_B6, FN_AVB_GTXREFCLK, 5525077365a9SGeert Uytterhoeven /* IP8_26 [1] */ 5526077365a9SGeert Uytterhoeven FN_VI1_DATA5_VI1_B5, FN_AVB_PHY_INT, 5527077365a9SGeert Uytterhoeven /* IP8_25_24 [2] */ 5528077365a9SGeert Uytterhoeven FN_VI1_DATA4_VI1_B4, FN_SCIFA1_RTS_N_D, 5529077365a9SGeert Uytterhoeven FN_AVB_MAGIC, 0, 5530077365a9SGeert Uytterhoeven /* IP8_23_22 [2] */ 5531077365a9SGeert Uytterhoeven FN_VI1_DATA3_VI1_B3, FN_SCIFA1_CTS_N_D, FN_AVB_GTX_CLK, 0, 5532077365a9SGeert Uytterhoeven /* IP8_21_20 [2] */ 5533077365a9SGeert Uytterhoeven FN_VI1_DATA2_VI1_B2, FN_SCIFA1_TXD_D, FN_AVB_MDIO, 0, 5534077365a9SGeert Uytterhoeven /* IP8_19_18 [2] */ 5535077365a9SGeert Uytterhoeven FN_VI1_DATA1_VI1_B1, FN_SCIFA1_RXD_D, FN_AVB_MDC, 0, 5536077365a9SGeert Uytterhoeven /* IP8_17_16 [2] */ 5537077365a9SGeert Uytterhoeven FN_VI1_DATA0_VI1_B0, FN_SCIFA1_SCK_D, FN_AVB_CRS, 0, 5538077365a9SGeert Uytterhoeven /* IP8_15_14 [2] */ 5539077365a9SGeert Uytterhoeven FN_VI1_CLK, FN_AVB_RX_DV, 0, 0, 5540077365a9SGeert Uytterhoeven /* IP8_13_12 [2] */ 5541077365a9SGeert Uytterhoeven FN_VI0_DATA7_VI0_B7, FN_AVB_RX_CLK, 0, 0, 5542077365a9SGeert Uytterhoeven /* IP8_11_10 [2] */ 5543077365a9SGeert Uytterhoeven FN_VI0_DATA6_VI0_B6, FN_AVB_RX_ER, 0, 0, 5544077365a9SGeert Uytterhoeven /* IP8_9_8 [2] */ 5545077365a9SGeert Uytterhoeven FN_VI0_DATA5_VI0_B5, FN_EX_WAIT1, FN_AVB_RXD7, 0, 5546077365a9SGeert Uytterhoeven /* IP8_7_6 [2] */ 5547077365a9SGeert Uytterhoeven FN_VI0_DATA4_VI0_B4, FN_ATAG0_N, FN_AVB_RXD6, 0, 5548077365a9SGeert Uytterhoeven /* IP8_5_4 [2] */ 5549077365a9SGeert Uytterhoeven FN_VI0_DATA3_VI0_B3, FN_ATADIR0_N, FN_AVB_RXD5, 0, 5550077365a9SGeert Uytterhoeven /* IP8_3_2 [2] */ 5551077365a9SGeert Uytterhoeven FN_VI0_DATA2_VI0_B2, FN_ATAWR0_N, FN_AVB_RXD4, 0, 5552077365a9SGeert Uytterhoeven /* IP8_1_0 [2] */ 5553077365a9SGeert Uytterhoeven FN_VI0_DATA1_VI0_B1, FN_ATARD0_N, FN_AVB_RXD3, 0, )) 5554077365a9SGeert Uytterhoeven }, 5555077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR9", 0xE6060044, 32, 5556077365a9SGeert Uytterhoeven GROUP(4, 2, 2, 2, 2, 2, 2, 4, 4, 2, 2, 2, 2), 5557077365a9SGeert Uytterhoeven GROUP( 5558077365a9SGeert Uytterhoeven /* IP9_31_28 [4] */ 5559077365a9SGeert Uytterhoeven FN_SD1_CD, FN_MMC1_D6, FN_TS_SDEN1, FN_USB1_EXTP, 5560077365a9SGeert Uytterhoeven FN_GLO_SS, FN_VI0_CLK_B, FN_IIC2_SCL_D, FN_I2C2_SCL_D, 5561077365a9SGeert Uytterhoeven FN_SIM0_CLK_B, FN_VI3_CLK_B, 0, 0, 0, 0, 0, 0, 5562077365a9SGeert Uytterhoeven /* IP9_27_26 [2] */ 5563077365a9SGeert Uytterhoeven FN_SD1_DAT3, FN_AVB_RXD0, 0, FN_SCIFB0_RTS_N_B, 5564077365a9SGeert Uytterhoeven /* IP9_25_24 [2] */ 5565077365a9SGeert Uytterhoeven FN_SD1_DAT2, FN_AVB_COL, 0, FN_SCIFB0_CTS_N_B, 5566077365a9SGeert Uytterhoeven /* IP9_23_22 [2] */ 5567077365a9SGeert Uytterhoeven FN_SD1_DAT1, FN_AVB_LINK, 0, FN_SCIFB0_TXD_B, 5568077365a9SGeert Uytterhoeven /* IP9_21_20 [2] */ 5569077365a9SGeert Uytterhoeven FN_SD1_DAT0, FN_AVB_TX_CLK, 0, FN_SCIFB0_RXD_B, 5570077365a9SGeert Uytterhoeven /* IP9_19_18 [2] */ 5571077365a9SGeert Uytterhoeven FN_SD1_CMD, FN_AVB_TX_ER, 0, FN_SCIFB0_SCK_B, 5572077365a9SGeert Uytterhoeven /* IP9_17_16 [2] */ 5573077365a9SGeert Uytterhoeven FN_SD1_CLK, FN_AVB_TX_EN, 0, 0, 5574077365a9SGeert Uytterhoeven /* IP9_15_12 [4] */ 5575077365a9SGeert Uytterhoeven FN_SD0_WP, FN_MMC0_D7, FN_TS_SPSYNC0_B, FN_USB0_IDIN, 5576077365a9SGeert Uytterhoeven FN_GLO_SDATA, FN_VI1_DATA7_VI1_B7_B, FN_IIC1_SDA_B, 5577077365a9SGeert Uytterhoeven FN_I2C1_SDA_B, FN_VI2_DATA7_VI2_B7_B, 0, 0, 0, 0, 0, 0, 0, 5578077365a9SGeert Uytterhoeven /* IP9_11_8 [4] */ 5579077365a9SGeert Uytterhoeven FN_SD0_CD, FN_MMC0_D6, FN_TS_SDEN0_B, FN_USB0_EXTP, 5580077365a9SGeert Uytterhoeven FN_GLO_SCLK, FN_VI1_DATA6_VI1_B6_B, FN_IIC1_SCL_B, 5581077365a9SGeert Uytterhoeven FN_I2C1_SCL_B, FN_VI2_DATA6_VI2_B6_B, 0, 0, 0, 0, 0, 0, 0, 5582077365a9SGeert Uytterhoeven /* IP9_7_6 [2] */ 5583077365a9SGeert Uytterhoeven FN_SD0_DAT3, FN_SCIFB1_RTS_N_B, FN_VI1_DATA5_VI1_B5_B, 0, 5584077365a9SGeert Uytterhoeven /* IP9_5_4 [2] */ 5585077365a9SGeert Uytterhoeven FN_SD0_DAT2, FN_SCIFB1_CTS_N_B, FN_VI1_DATA4_VI1_B4_B, 0, 5586077365a9SGeert Uytterhoeven /* IP9_3_2 [2] */ 5587077365a9SGeert Uytterhoeven FN_SD0_DAT1, FN_SCIFB1_TXD_B, FN_VI1_DATA3_VI1_B3_B, 0, 5588077365a9SGeert Uytterhoeven /* IP9_1_0 [2] */ 5589077365a9SGeert Uytterhoeven FN_SD0_DAT0, FN_SCIFB1_RXD_B, FN_VI1_DATA2_VI1_B2_B, 0, )) 5590077365a9SGeert Uytterhoeven }, 5591077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR10", 0xE6060048, 32, 5592077365a9SGeert Uytterhoeven GROUP(2, 4, 3, 4, 4, 4, 4, 3, 4), 5593077365a9SGeert Uytterhoeven GROUP( 5594077365a9SGeert Uytterhoeven /* IP10_31_30 [2] */ 5595077365a9SGeert Uytterhoeven 0, 0, 0, 0, 5596077365a9SGeert Uytterhoeven /* IP10_29_26 [4] */ 5597077365a9SGeert Uytterhoeven FN_SD2_CD, FN_MMC0_D4, FN_TS_SDAT0_B, FN_USB2_EXTP, FN_GLO_I0, 5598077365a9SGeert Uytterhoeven FN_VI0_DATA6_VI0_B6_B, FN_HCTS0_N_D, FN_TS_SDAT1_B, 5599077365a9SGeert Uytterhoeven FN_GLO_I0_B, FN_VI3_DATA6_B, 0, 0, 0, 0, 0, 0, 5600077365a9SGeert Uytterhoeven /* IP10_25_23 [3] */ 5601077365a9SGeert Uytterhoeven FN_SD2_DAT3, FN_MMC0_D3, FN_SIM0_RST, FN_VI0_DATA5_VI0_B5_B, 5602077365a9SGeert Uytterhoeven FN_HTX0_D, FN_TS_SPSYNC1_B, FN_GLO_Q1_B, FN_VI3_DATA5_B, 5603077365a9SGeert Uytterhoeven /* IP10_22_19 [4] */ 5604077365a9SGeert Uytterhoeven FN_SD2_DAT2, FN_MMC0_D2, FN_BPFCLK_B, 0, 5605077365a9SGeert Uytterhoeven FN_VI0_DATA4_VI0_B4_B, FN_HRX0_D, FN_TS_SDEN1_B, 5606077365a9SGeert Uytterhoeven FN_GLO_Q0_B, FN_VI3_DATA4_B, 0, 0, 0, 0, 0, 0, 0, 5607077365a9SGeert Uytterhoeven /* IP10_18_15 [4] */ 5608077365a9SGeert Uytterhoeven FN_SD2_DAT1, FN_MMC0_D1, FN_FMIN_B, 0, 5609077365a9SGeert Uytterhoeven FN_VI0_DATA3_VI0_B3_B, FN_SCIFB1_TXD_E, FN_TX1_D, 5610077365a9SGeert Uytterhoeven FN_TS_SCK0_C, FN_GLO_RFON_B, FN_VI3_DATA3_B, 5611077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 5612077365a9SGeert Uytterhoeven /* IP10_14_11 [4] */ 5613077365a9SGeert Uytterhoeven FN_SD2_DAT0, FN_MMC0_D0, FN_FMCLK_B, 5614077365a9SGeert Uytterhoeven FN_VI0_DATA2_VI0_B2_B, FN_SCIFB1_RXD_E, FN_RX1_D, 5615077365a9SGeert Uytterhoeven FN_TS_SDAT0_C, FN_GLO_SS_B, FN_VI3_DATA2_B, 5616077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 5617077365a9SGeert Uytterhoeven /* IP10_10_7 [4] */ 5618077365a9SGeert Uytterhoeven FN_SD2_CMD, FN_MMC0_CMD, FN_SIM0_D, 5619077365a9SGeert Uytterhoeven FN_VI0_DATA1_VI0_B1_B, FN_SCIFB1_SCK_E, FN_SCK1_D, 5620077365a9SGeert Uytterhoeven FN_TS_SPSYNC0_C, FN_GLO_SDATA_B, FN_VI3_DATA1_B, 5621077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 5622077365a9SGeert Uytterhoeven /* IP10_6_4 [3] */ 5623077365a9SGeert Uytterhoeven FN_SD2_CLK, FN_MMC0_CLK, FN_SIM0_CLK, 5624077365a9SGeert Uytterhoeven FN_VI0_DATA0_VI0_B0_B, FN_TS_SDEN0_C, FN_GLO_SCLK_B, 5625077365a9SGeert Uytterhoeven FN_VI3_DATA0_B, 0, 5626077365a9SGeert Uytterhoeven /* IP10_3_0 [4] */ 5627077365a9SGeert Uytterhoeven FN_SD1_WP, FN_MMC1_D7, FN_TS_SPSYNC1, FN_USB1_IDIN, 5628077365a9SGeert Uytterhoeven FN_GLO_RFON, FN_VI1_CLK_B, FN_IIC2_SDA_D, FN_I2C2_SDA_D, 5629077365a9SGeert Uytterhoeven FN_SIM0_D_B, 0, 0, 0, 0, 0, 0, 0, )) 5630077365a9SGeert Uytterhoeven }, 5631077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR11", 0xE606004C, 32, 5632077365a9SGeert Uytterhoeven GROUP(2, 3, 3, 2, 4, 3, 2, 2, 2, 2, 2, 1, 4), 5633077365a9SGeert Uytterhoeven GROUP( 5634077365a9SGeert Uytterhoeven /* IP11_31_30 [2] */ 5635077365a9SGeert Uytterhoeven FN_SSI_SCK0129, FN_CAN_CLK_B, FN_MOUT0, 0, 5636077365a9SGeert Uytterhoeven /* IP11_29_27 [3] */ 5637077365a9SGeert Uytterhoeven FN_MLB_DAT, 0, FN_SCIFB1_TXD_D, FN_TX1_C, FN_BPFCLK_C, 5638077365a9SGeert Uytterhoeven 0, 0, 0, 5639077365a9SGeert Uytterhoeven /* IP11_26_24 [3] */ 5640077365a9SGeert Uytterhoeven FN_MLB_SIG, FN_SCIFB1_RXD_D, FN_RX1_C, FN_IIC2_SDA_B, FN_I2C2_SDA_B, 5641077365a9SGeert Uytterhoeven 0, 0, 0, 5642077365a9SGeert Uytterhoeven /* IP11_23_22 [2] */ 5643077365a9SGeert Uytterhoeven FN_MLB_CLK, FN_IIC2_SCL_B, FN_I2C2_SCL_B, 0, 5644077365a9SGeert Uytterhoeven /* IP11_21_18 [4] */ 5645077365a9SGeert Uytterhoeven FN_SD3_WP, FN_MMC1_D5, FN_TS_SCK1, FN_GLO_Q1, FN_FMIN_C, 5646077365a9SGeert Uytterhoeven 0, FN_FMIN_E, 0, FN_FMIN_F, 0, 0, 0, 0, 0, 0, 0, 5647077365a9SGeert Uytterhoeven /* IP11_17_15 [3] */ 5648077365a9SGeert Uytterhoeven FN_SD3_CD, FN_MMC1_D4, FN_TS_SDAT1, 5649077365a9SGeert Uytterhoeven FN_VSP, FN_GLO_Q0, FN_SIM0_RST_B, 0, 0, 5650077365a9SGeert Uytterhoeven /* IP11_14_13 [2] */ 5651077365a9SGeert Uytterhoeven FN_SD3_DAT3, FN_MMC1_D3, FN_SCKZ, 0, 5652077365a9SGeert Uytterhoeven /* IP11_12_11 [2] */ 5653077365a9SGeert Uytterhoeven FN_SD3_DAT2, FN_MMC1_D2, FN_SDATA, 0, 5654077365a9SGeert Uytterhoeven /* IP11_10_9 [2] */ 5655077365a9SGeert Uytterhoeven FN_SD3_DAT1, FN_MMC1_D1, FN_MDATA, 0, 5656077365a9SGeert Uytterhoeven /* IP11_8_7 [2] */ 5657077365a9SGeert Uytterhoeven FN_SD3_DAT0, FN_MMC1_D0, FN_STM_N, 0, 5658077365a9SGeert Uytterhoeven /* IP11_6_5 [2] */ 5659077365a9SGeert Uytterhoeven FN_SD3_CMD, FN_MMC1_CMD, FN_MTS_N, 0, 5660077365a9SGeert Uytterhoeven /* IP11_4 [1] */ 5661077365a9SGeert Uytterhoeven FN_SD3_CLK, FN_MMC1_CLK, 5662077365a9SGeert Uytterhoeven /* IP11_3_0 [4] */ 5663077365a9SGeert Uytterhoeven FN_SD2_WP, FN_MMC0_D5, FN_TS_SCK0_B, FN_USB2_IDIN, 5664077365a9SGeert Uytterhoeven FN_GLO_I1, FN_VI0_DATA7_VI0_B7_B, FN_HRTS0_N_D, 5665077365a9SGeert Uytterhoeven FN_TS_SCK1_B, FN_GLO_I1_B, FN_VI3_DATA7_B, 0, 0, 0, 0, 0, 0, )) 5666077365a9SGeert Uytterhoeven }, 5667077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR12", 0xE6060050, 32, 5668077365a9SGeert Uytterhoeven GROUP(1, 3, 3, 2, 3, 3, 3, 3, 3, 2, 2, 2, 2), 5669077365a9SGeert Uytterhoeven GROUP( 5670077365a9SGeert Uytterhoeven /* IP12_31 [1] */ 5671077365a9SGeert Uytterhoeven 0, 0, 5672077365a9SGeert Uytterhoeven /* IP12_30_28 [3] */ 5673077365a9SGeert Uytterhoeven FN_SSI_WS5, FN_SCIFB1_RXD, FN_IECLK_B, 5674077365a9SGeert Uytterhoeven FN_DU2_EXVSYNC_DU2_VSYNC, FN_QSTB_QHE, 5675077365a9SGeert Uytterhoeven FN_CAN_DEBUGOUT4, 0, 0, 5676077365a9SGeert Uytterhoeven /* IP12_27_25 [3] */ 5677077365a9SGeert Uytterhoeven FN_SSI_SCK5, FN_SCIFB1_SCK, 5678077365a9SGeert Uytterhoeven FN_IERX_B, FN_DU2_EXHSYNC_DU2_HSYNC, FN_QSTH_QHS, 5679077365a9SGeert Uytterhoeven FN_CAN_DEBUGOUT3, 0, 0, 5680077365a9SGeert Uytterhoeven /* IP12_24_23 [2] */ 5681077365a9SGeert Uytterhoeven FN_SSI_SDATA4, FN_STP_ISSYNC_0, FN_MSIOF1_RXD, 5682077365a9SGeert Uytterhoeven FN_CAN_DEBUGOUT2, 5683077365a9SGeert Uytterhoeven /* IP12_22_20 [3] */ 5684077365a9SGeert Uytterhoeven FN_SSI_WS4, FN_STP_ISEN_0, FN_SCIFB0_RTS_N, 5685077365a9SGeert Uytterhoeven FN_MSIOF1_TXD, FN_SSI_WS5_C, FN_CAN_DEBUGOUT1, 0, 0, 5686077365a9SGeert Uytterhoeven /* IP12_19_17 [3] */ 5687077365a9SGeert Uytterhoeven FN_SSI_SCK4, FN_STP_ISD_0, FN_SCIFB0_CTS_N, 5688077365a9SGeert Uytterhoeven FN_MSIOF1_SS2, FN_SSI_SCK5_C, FN_CAN_DEBUGOUT0, 0, 0, 5689077365a9SGeert Uytterhoeven /* IP12_16_14 [3] */ 5690077365a9SGeert Uytterhoeven FN_SSI_SDATA3, FN_STP_ISCLK_0, 5691077365a9SGeert Uytterhoeven FN_SCIFB0_TXD, FN_MSIOF1_SS1, FN_CAN_TXCLK, 0, 0, 0, 5692077365a9SGeert Uytterhoeven /* IP12_13_11 [3] */ 5693077365a9SGeert Uytterhoeven FN_SSI_WS34, FN_STP_IVCXO27_0, FN_SCIFB0_RXD, FN_MSIOF1_SYNC, 5694077365a9SGeert Uytterhoeven FN_CAN_STEP0, 0, 0, 0, 5695077365a9SGeert Uytterhoeven /* IP12_10_8 [3] */ 5696077365a9SGeert Uytterhoeven FN_SSI_SCK34, FN_STP_OPWM_0, FN_SCIFB0_SCK, 5697077365a9SGeert Uytterhoeven FN_MSIOF1_SCK, FN_CAN_DEBUG_HW_TRIGGER, 0, 0, 0, 5698077365a9SGeert Uytterhoeven /* IP12_7_6 [2] */ 5699077365a9SGeert Uytterhoeven FN_SSI_SDATA2, FN_CAN1_RX_B, FN_SSI_SCK1, FN_MOUT6, 5700077365a9SGeert Uytterhoeven /* IP12_5_4 [2] */ 5701077365a9SGeert Uytterhoeven FN_SSI_SDATA1, FN_CAN1_TX_B, FN_MOUT5, 0, 5702077365a9SGeert Uytterhoeven /* IP12_3_2 [2] */ 5703077365a9SGeert Uytterhoeven FN_SSI_SDATA0, FN_CAN0_RX_B, FN_MOUT2, 0, 5704077365a9SGeert Uytterhoeven /* IP12_1_0 [2] */ 5705077365a9SGeert Uytterhoeven FN_SSI_WS0129, FN_CAN0_TX_B, FN_MOUT1, 0, )) 5706077365a9SGeert Uytterhoeven }, 5707077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR13", 0xE6060054, 32, 5708077365a9SGeert Uytterhoeven GROUP(1, 2, 3, 3, 4, 3, 3, 3, 3, 4, 3), 5709077365a9SGeert Uytterhoeven GROUP( 5710077365a9SGeert Uytterhoeven /* IP13_31 [1] */ 5711077365a9SGeert Uytterhoeven 0, 0, 5712077365a9SGeert Uytterhoeven /* IP13_30_29 [2] */ 5713077365a9SGeert Uytterhoeven FN_AUDIO_CLKA, FN_SCIFB2_RTS_N, FN_CAN_DEBUGOUT14, 0, 5714077365a9SGeert Uytterhoeven /* IP13_28_26 [3] */ 5715077365a9SGeert Uytterhoeven FN_SSI_SDATA9, FN_STP_ISSYNC_1, FN_SCIFB2_CTS_N, FN_SSI_WS1, 5716077365a9SGeert Uytterhoeven FN_SSI_SDATA5_C, FN_CAN_DEBUGOUT13, 0, 0, 5717077365a9SGeert Uytterhoeven /* IP13_25_23 [3] */ 5718077365a9SGeert Uytterhoeven FN_SSI_SDATA8, FN_STP_ISEN_1, FN_SCIFB2_TXD, FN_CAN0_TX_C, 5719077365a9SGeert Uytterhoeven FN_CAN_DEBUGOUT12, FN_SSI_SDATA8_B, 0, 0, 5720077365a9SGeert Uytterhoeven /* IP13_22_19 [4] */ 5721077365a9SGeert Uytterhoeven FN_SSI_SDATA7, FN_STP_ISD_1, FN_SCIFB2_RXD, FN_SCIFA2_RTS_N, 5722077365a9SGeert Uytterhoeven FN_TCLK2, FN_QSTVA_QVS, FN_CAN_DEBUGOUT11, FN_BPFCLK_E, 5723077365a9SGeert Uytterhoeven 0, FN_SSI_SDATA7_B, FN_FMIN_G, 0, 0, 0, 0, 0, 5724077365a9SGeert Uytterhoeven /* IP13_18_16 [3] */ 5725077365a9SGeert Uytterhoeven FN_SSI_WS78, FN_STP_ISCLK_1, FN_SCIFB2_SCK, FN_SCIFA2_CTS_N, 5726077365a9SGeert Uytterhoeven FN_DU2_DR7, FN_LCDOUT7, FN_CAN_DEBUGOUT10, 0, 5727077365a9SGeert Uytterhoeven /* IP13_15_13 [3] */ 5728077365a9SGeert Uytterhoeven FN_SSI_SCK78, FN_STP_IVCXO27_1, FN_SCK1, FN_SCIFA1_SCK, 5729077365a9SGeert Uytterhoeven FN_DU2_DR6, FN_LCDOUT6, FN_CAN_DEBUGOUT9, 0, 5730077365a9SGeert Uytterhoeven /* IP13_12_10 [3] */ 5731077365a9SGeert Uytterhoeven FN_SSI_SDATA6, FN_FMIN_D, 0, FN_DU2_DR5, FN_LCDOUT5, 5732077365a9SGeert Uytterhoeven FN_CAN_DEBUGOUT8, 0, 0, 5733077365a9SGeert Uytterhoeven /* IP13_9_7 [3] */ 5734077365a9SGeert Uytterhoeven FN_SSI_WS6, FN_SCIFB1_RTS_N, FN_CAN0_TX_D, FN_DU2_DR4, 5735077365a9SGeert Uytterhoeven FN_LCDOUT4, FN_CAN_DEBUGOUT7, 0, 0, 5736077365a9SGeert Uytterhoeven /* IP13_6_3 [4] */ 5737077365a9SGeert Uytterhoeven FN_SSI_SCK6, FN_SCIFB1_CTS_N, FN_BPFCLK_D, 0, 5738077365a9SGeert Uytterhoeven FN_DU2_DR3, FN_LCDOUT3, FN_CAN_DEBUGOUT6, 5739077365a9SGeert Uytterhoeven FN_BPFCLK_F, 0, 0, 0, 0, 0, 0, 0, 0, 5740077365a9SGeert Uytterhoeven /* IP13_2_0 [3] */ 5741077365a9SGeert Uytterhoeven FN_SSI_SDATA5, FN_SCIFB1_TXD, FN_IETX_B, FN_DU2_DR2, 5742077365a9SGeert Uytterhoeven FN_LCDOUT2, FN_CAN_DEBUGOUT5, 0, 0, )) 5743077365a9SGeert Uytterhoeven }, 5744077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR14", 0xE6060058, 32, 5745077365a9SGeert Uytterhoeven GROUP(1, 3, 3, 3, 3, 3, 4, 3, 3, 3, 3), 5746077365a9SGeert Uytterhoeven GROUP( 5747077365a9SGeert Uytterhoeven /* IP14_30 [1] */ 5748077365a9SGeert Uytterhoeven 0, 0, 5749077365a9SGeert Uytterhoeven /* IP14_30_28 [3] */ 5750077365a9SGeert Uytterhoeven FN_SCIFA1_RTS_N, FN_AD_NCS_N, FN_RTS1_N, 5751077365a9SGeert Uytterhoeven FN_MSIOF3_TXD, FN_DU1_DOTCLKOUT, FN_QSTVB_QVE, 5752077365a9SGeert Uytterhoeven FN_HRTS0_N_C, 0, 5753077365a9SGeert Uytterhoeven /* IP14_27_25 [3] */ 5754077365a9SGeert Uytterhoeven FN_SCIFA1_CTS_N, FN_AD_CLK, FN_CTS1_N, FN_MSIOF3_RXD, 5755077365a9SGeert Uytterhoeven FN_DU0_DOTCLKOUT, FN_QCLK, 0, 0, 5756077365a9SGeert Uytterhoeven /* IP14_24_22 [3] */ 5757077365a9SGeert Uytterhoeven FN_SCIFA1_TXD, FN_AD_DO, FN_TX1, FN_DU2_DG1, 5758077365a9SGeert Uytterhoeven FN_LCDOUT9, 0, 0, 0, 5759077365a9SGeert Uytterhoeven /* IP14_21_19 [3] */ 5760077365a9SGeert Uytterhoeven FN_SCIFA1_RXD, FN_AD_DI, FN_RX1, 5761077365a9SGeert Uytterhoeven FN_DU2_EXODDF_DU2_ODDF_DISP_CDE, FN_QCPV_QDE, 0, 0, 0, 5762077365a9SGeert Uytterhoeven /* IP14_18_16 [3] */ 5763077365a9SGeert Uytterhoeven FN_SCIFA0_RTS_N, FN_HRTS1_N, FN_RTS0_N, 5764077365a9SGeert Uytterhoeven FN_MSIOF3_SS1, FN_DU2_DG0, FN_LCDOUT8, FN_PWM1_B, 0, 5765077365a9SGeert Uytterhoeven /* IP14_15_12 [4] */ 5766077365a9SGeert Uytterhoeven FN_SCIFA0_CTS_N, FN_HCTS1_N, FN_CTS0_N, FN_MSIOF3_SYNC, 5767077365a9SGeert Uytterhoeven FN_DU2_DG3, FN_LCDOUT11, FN_PWM0_B, FN_IIC1_SCL_C, FN_I2C1_SCL_C, 5768077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 5769077365a9SGeert Uytterhoeven /* IP14_11_9 [3] */ 5770077365a9SGeert Uytterhoeven FN_SCIFA0_TXD, FN_HTX1, FN_TX0, FN_DU2_DR1, FN_LCDOUT1, 5771077365a9SGeert Uytterhoeven 0, 0, 0, 5772077365a9SGeert Uytterhoeven /* IP14_8_6 [3] */ 5773077365a9SGeert Uytterhoeven FN_SCIFA0_RXD, FN_HRX1, FN_RX0, FN_DU2_DR0, FN_LCDOUT0, 5774077365a9SGeert Uytterhoeven 0, 0, 0, 5775077365a9SGeert Uytterhoeven /* IP14_5_3 [3] */ 5776077365a9SGeert Uytterhoeven FN_SCIFA0_SCK, FN_HSCK1, FN_SCK0, FN_MSIOF3_SS2, FN_DU2_DG2, 5777077365a9SGeert Uytterhoeven FN_LCDOUT10, FN_IIC1_SDA_C, FN_I2C1_SDA_C, 5778077365a9SGeert Uytterhoeven /* IP14_2_0 [3] */ 5779077365a9SGeert Uytterhoeven FN_AUDIO_CLKB, FN_SCIF_CLK, FN_CAN0_RX_D, 5780077365a9SGeert Uytterhoeven FN_DVC_MUTE, FN_CAN0_RX_C, FN_CAN_DEBUGOUT15, 5781077365a9SGeert Uytterhoeven FN_REMOCON, 0, )) 5782077365a9SGeert Uytterhoeven }, 5783077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR15", 0xE606005C, 32, 5784077365a9SGeert Uytterhoeven GROUP(2, 2, 2, 3, 3, 2, 2, 2, 2, 3, 3, 3, 3), 5785077365a9SGeert Uytterhoeven GROUP( 5786077365a9SGeert Uytterhoeven /* IP15_31_30 [2] */ 5787077365a9SGeert Uytterhoeven 0, 0, 0, 0, 5788077365a9SGeert Uytterhoeven /* IP15_29_28 [2] */ 5789077365a9SGeert Uytterhoeven FN_MSIOF0_TXD, FN_ADICHS1, FN_DU2_DG6, FN_LCDOUT14, 5790077365a9SGeert Uytterhoeven /* IP15_27_26 [2] */ 5791077365a9SGeert Uytterhoeven FN_MSIOF0_SS1, FN_ADICHS0, FN_DU2_DG5, FN_LCDOUT13, 5792077365a9SGeert Uytterhoeven /* IP15_25_23 [3] */ 5793077365a9SGeert Uytterhoeven FN_MSIOF0_SYNC, FN_TS_SCK0, FN_SSI_SCK2, FN_ADIDATA, 5794077365a9SGeert Uytterhoeven FN_DU2_DB7, FN_LCDOUT23, FN_HRX0_C, 0, 5795077365a9SGeert Uytterhoeven /* IP15_22_20 [3] */ 5796077365a9SGeert Uytterhoeven FN_MSIOF0_SCK, FN_TS_SDAT0, FN_ADICLK, 5797077365a9SGeert Uytterhoeven FN_DU2_DB6, FN_LCDOUT22, 0, 0, 0, 5798077365a9SGeert Uytterhoeven /* IP15_19_18 [2] */ 5799077365a9SGeert Uytterhoeven FN_HRTS0_N, FN_SSI_WS9, FN_DU2_DB5, FN_LCDOUT21, 5800077365a9SGeert Uytterhoeven /* IP15_17_16 [2] */ 5801077365a9SGeert Uytterhoeven FN_HCTS0_N, FN_SSI_SCK9, FN_DU2_DB4, FN_LCDOUT20, 5802077365a9SGeert Uytterhoeven /* IP15_15_14 [2] */ 5803077365a9SGeert Uytterhoeven FN_HTX0, FN_DU2_DB3, FN_LCDOUT19, 0, 5804077365a9SGeert Uytterhoeven /* IP15_13_12 [2] */ 5805077365a9SGeert Uytterhoeven FN_HRX0, FN_DU2_DB2, FN_LCDOUT18, 0, 5806077365a9SGeert Uytterhoeven /* IP15_11_9 [3] */ 5807077365a9SGeert Uytterhoeven FN_HSCK0, FN_TS_SDEN0, FN_DU2_DG4, FN_LCDOUT12, FN_HCTS0_N_C, 5808077365a9SGeert Uytterhoeven 0, 0, 0, 5809077365a9SGeert Uytterhoeven /* IP15_8_6 [3] */ 5810077365a9SGeert Uytterhoeven FN_SCIFA2_TXD, FN_BPFCLK, FN_RX2, FN_DU2_DB1, FN_LCDOUT17, 5811077365a9SGeert Uytterhoeven FN_IIC2_SDA, FN_I2C2_SDA, 0, 5812077365a9SGeert Uytterhoeven /* IP15_5_3 [3] */ 5813077365a9SGeert Uytterhoeven FN_SCIFA2_RXD, FN_FMIN, FN_TX2, FN_DU2_DB0, FN_LCDOUT16, 5814077365a9SGeert Uytterhoeven FN_IIC2_SCL, FN_I2C2_SCL, 0, 5815077365a9SGeert Uytterhoeven /* IP15_2_0 [3] */ 5816077365a9SGeert Uytterhoeven FN_SCIFA2_SCK, FN_FMCLK, FN_SCK2, FN_MSIOF3_SCK, FN_DU2_DG7, 5817077365a9SGeert Uytterhoeven FN_LCDOUT15, FN_SCIF_CLK_B, 0, )) 5818077365a9SGeert Uytterhoeven }, 5819077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("IPSR16", 0xE6060160, 32, 5820077365a9SGeert Uytterhoeven GROUP(4, 4, 4, 4, 4, 4, 1, 1, 3, 3), 5821077365a9SGeert Uytterhoeven GROUP( 5822077365a9SGeert Uytterhoeven /* IP16_31_28 [4] */ 5823077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5824077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5825077365a9SGeert Uytterhoeven /* IP16_27_24 [4] */ 5826077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5827077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5828077365a9SGeert Uytterhoeven /* IP16_23_20 [4] */ 5829077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5830077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5831077365a9SGeert Uytterhoeven /* IP16_19_16 [4] */ 5832077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5833077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5834077365a9SGeert Uytterhoeven /* IP16_15_12 [4] */ 5835077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5836077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5837077365a9SGeert Uytterhoeven /* IP16_11_8 [4] */ 5838077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5839077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5840077365a9SGeert Uytterhoeven /* IP16_7 [1] */ 5841077365a9SGeert Uytterhoeven FN_USB1_OVC, FN_TCLK1_B, 5842077365a9SGeert Uytterhoeven /* IP16_6 [1] */ 5843077365a9SGeert Uytterhoeven FN_USB1_PWEN, FN_AUDIO_CLKOUT_D, 5844077365a9SGeert Uytterhoeven /* IP16_5_3 [3] */ 5845077365a9SGeert Uytterhoeven FN_MSIOF0_RXD, FN_TS_SPSYNC0, FN_SSI_WS2, 5846077365a9SGeert Uytterhoeven FN_ADICS_SAMP, FN_DU2_CDE, FN_QPOLB, FN_SCIFA2_RXD_B, 0, 5847077365a9SGeert Uytterhoeven /* IP16_2_0 [3] */ 5848077365a9SGeert Uytterhoeven FN_MSIOF0_SS2, FN_AUDIO_CLKOUT, FN_ADICHS2, 5849077365a9SGeert Uytterhoeven FN_DU2_DISP, FN_QPOLA, FN_HTX0_C, FN_SCIFA2_TXD_B, 0, )) 5850077365a9SGeert Uytterhoeven }, 5851077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("MOD_SEL", 0xE6060090, 32, 5852077365a9SGeert Uytterhoeven GROUP(3, 2, 2, 3, 2, 1, 1, 1, 2, 1, 2, 1, 5853077365a9SGeert Uytterhoeven 1, 1, 1, 2, 1, 1, 2, 1, 1), 5854077365a9SGeert Uytterhoeven GROUP( 5855077365a9SGeert Uytterhoeven /* SEL_SCIF1 [3] */ 5856077365a9SGeert Uytterhoeven FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3, 5857077365a9SGeert Uytterhoeven FN_SEL_SCIF1_4, 0, 0, 0, 5858077365a9SGeert Uytterhoeven /* SEL_SCIFB [2] */ 5859077365a9SGeert Uytterhoeven FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, 0, 5860077365a9SGeert Uytterhoeven /* SEL_SCIFB2 [2] */ 5861077365a9SGeert Uytterhoeven FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2, 0, 5862077365a9SGeert Uytterhoeven /* SEL_SCIFB1 [3] */ 5863077365a9SGeert Uytterhoeven FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, 5864077365a9SGeert Uytterhoeven FN_SEL_SCIFB1_3, FN_SEL_SCIFB1_4, FN_SEL_SCIFB1_5, 5865077365a9SGeert Uytterhoeven FN_SEL_SCIFB1_6, 0, 5866077365a9SGeert Uytterhoeven /* SEL_SCIFA1 [2] */ 5867077365a9SGeert Uytterhoeven FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, 5868077365a9SGeert Uytterhoeven FN_SEL_SCIFA1_3, 5869077365a9SGeert Uytterhoeven /* SEL_SCIF0 [1] */ 5870077365a9SGeert Uytterhoeven FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, 5871077365a9SGeert Uytterhoeven /* SEL_SCIFA [1] */ 5872077365a9SGeert Uytterhoeven FN_SEL_SCFA_0, FN_SEL_SCFA_1, 5873077365a9SGeert Uytterhoeven /* SEL_SOF1 [1] */ 5874077365a9SGeert Uytterhoeven FN_SEL_SOF1_0, FN_SEL_SOF1_1, 5875077365a9SGeert Uytterhoeven /* SEL_SSI7 [2] */ 5876077365a9SGeert Uytterhoeven FN_SEL_SSI7_0, FN_SEL_SSI7_1, FN_SEL_SSI7_2, 0, 5877077365a9SGeert Uytterhoeven /* SEL_SSI6 [1] */ 5878077365a9SGeert Uytterhoeven FN_SEL_SSI6_0, FN_SEL_SSI6_1, 5879077365a9SGeert Uytterhoeven /* SEL_SSI5 [2] */ 5880077365a9SGeert Uytterhoeven FN_SEL_SSI5_0, FN_SEL_SSI5_1, FN_SEL_SSI5_2, 0, 5881077365a9SGeert Uytterhoeven /* SEL_VI3 [1] */ 5882077365a9SGeert Uytterhoeven FN_SEL_VI3_0, FN_SEL_VI3_1, 5883077365a9SGeert Uytterhoeven /* SEL_VI2 [1] */ 5884077365a9SGeert Uytterhoeven FN_SEL_VI2_0, FN_SEL_VI2_1, 5885077365a9SGeert Uytterhoeven /* SEL_VI1 [1] */ 5886077365a9SGeert Uytterhoeven FN_SEL_VI1_0, FN_SEL_VI1_1, 5887077365a9SGeert Uytterhoeven /* SEL_VI0 [1] */ 5888077365a9SGeert Uytterhoeven FN_SEL_VI0_0, FN_SEL_VI0_1, 5889077365a9SGeert Uytterhoeven /* SEL_TSIF1 [2] */ 5890077365a9SGeert Uytterhoeven FN_SEL_TSIF1_0, FN_SEL_TSIF1_1, FN_SEL_TSIF1_2, 0, 5891077365a9SGeert Uytterhoeven /* RESERVED [1] */ 5892077365a9SGeert Uytterhoeven 0, 0, 5893077365a9SGeert Uytterhoeven /* SEL_LBS [1] */ 5894077365a9SGeert Uytterhoeven FN_SEL_LBS_0, FN_SEL_LBS_1, 5895077365a9SGeert Uytterhoeven /* SEL_TSIF0 [2] */ 5896077365a9SGeert Uytterhoeven FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3, 5897077365a9SGeert Uytterhoeven /* SEL_SOF3 [1] */ 5898077365a9SGeert Uytterhoeven FN_SEL_SOF3_0, FN_SEL_SOF3_1, 5899077365a9SGeert Uytterhoeven /* SEL_SOF0 [1] */ 5900077365a9SGeert Uytterhoeven FN_SEL_SOF0_0, FN_SEL_SOF0_1, )) 5901077365a9SGeert Uytterhoeven }, 5902077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060094, 32, 5903077365a9SGeert Uytterhoeven GROUP(3, 1, 1, 1, 2, 1, 2, 1, 2, 1, 1, 1, 5904077365a9SGeert Uytterhoeven 3, 3, 2, 3, 2, 2), 5905077365a9SGeert Uytterhoeven GROUP( 5906077365a9SGeert Uytterhoeven /* RESERVED [3] */ 5907077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5908077365a9SGeert Uytterhoeven /* SEL_TMU1 [1] */ 5909077365a9SGeert Uytterhoeven FN_SEL_TMU1_0, FN_SEL_TMU1_1, 5910077365a9SGeert Uytterhoeven /* SEL_HSCIF1 [1] */ 5911077365a9SGeert Uytterhoeven FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, 5912077365a9SGeert Uytterhoeven /* SEL_SCIFCLK [1] */ 5913077365a9SGeert Uytterhoeven FN_SEL_SCIFCLK_0, FN_SEL_SCIFCLK_1, 5914077365a9SGeert Uytterhoeven /* SEL_CAN0 [2] */ 5915077365a9SGeert Uytterhoeven FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3, 5916077365a9SGeert Uytterhoeven /* SEL_CANCLK [1] */ 5917077365a9SGeert Uytterhoeven FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, 5918077365a9SGeert Uytterhoeven /* SEL_SCIFA2 [2] */ 5919077365a9SGeert Uytterhoeven FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, FN_SEL_SCIFA2_2, 0, 5920077365a9SGeert Uytterhoeven /* SEL_CAN1 [1] */ 5921077365a9SGeert Uytterhoeven FN_SEL_CAN1_0, FN_SEL_CAN1_1, 5922077365a9SGeert Uytterhoeven /* RESERVED [2] */ 5923077365a9SGeert Uytterhoeven 0, 0, 0, 0, 5924077365a9SGeert Uytterhoeven /* SEL_SCIF2 [1] */ 5925077365a9SGeert Uytterhoeven FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, 5926077365a9SGeert Uytterhoeven /* SEL_ADI [1] */ 5927077365a9SGeert Uytterhoeven FN_SEL_ADI_0, FN_SEL_ADI_1, 5928077365a9SGeert Uytterhoeven /* SEL_SSP [1] */ 5929077365a9SGeert Uytterhoeven FN_SEL_SSP_0, FN_SEL_SSP_1, 5930077365a9SGeert Uytterhoeven /* SEL_FM [3] */ 5931077365a9SGeert Uytterhoeven FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3, 5932077365a9SGeert Uytterhoeven FN_SEL_FM_4, FN_SEL_FM_5, FN_SEL_FM_6, 0, 5933077365a9SGeert Uytterhoeven /* SEL_HSCIF0 [3] */ 5934077365a9SGeert Uytterhoeven FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, 5935077365a9SGeert Uytterhoeven FN_SEL_HSCIF0_3, FN_SEL_HSCIF0_4, FN_SEL_HSCIF0_5, 0, 0, 5936077365a9SGeert Uytterhoeven /* SEL_GPS [2] */ 5937077365a9SGeert Uytterhoeven FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, 0, 5938077365a9SGeert Uytterhoeven /* RESERVED [3] */ 5939077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5940077365a9SGeert Uytterhoeven /* SEL_SIM [2] */ 5941077365a9SGeert Uytterhoeven FN_SEL_SIM_0, FN_SEL_SIM_1, FN_SEL_SIM_2, 0, 5942077365a9SGeert Uytterhoeven /* SEL_SSI8 [2] */ 5943077365a9SGeert Uytterhoeven FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI8_2, 0, )) 5944077365a9SGeert Uytterhoeven }, 5945077365a9SGeert Uytterhoeven { PINMUX_CFG_REG_VAR("MOD_SEL3", 0xE6060098, 32, 5946077365a9SGeert Uytterhoeven GROUP(1, 1, 2, 4, 4, 2, 2, 4, 2, 3, 2, 3, 2), 5947077365a9SGeert Uytterhoeven GROUP( 5948077365a9SGeert Uytterhoeven /* SEL_IICDVFS [1] */ 5949077365a9SGeert Uytterhoeven FN_SEL_IICDVFS_0, FN_SEL_IICDVFS_1, 5950077365a9SGeert Uytterhoeven /* SEL_IIC0 [1] */ 5951077365a9SGeert Uytterhoeven FN_SEL_IIC0_0, FN_SEL_IIC0_1, 5952077365a9SGeert Uytterhoeven /* RESERVED [2] */ 5953077365a9SGeert Uytterhoeven 0, 0, 0, 0, 5954077365a9SGeert Uytterhoeven /* RESERVED [4] */ 5955077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5956077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5957077365a9SGeert Uytterhoeven /* RESERVED [4] */ 5958077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5959077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5960077365a9SGeert Uytterhoeven /* RESERVED [2] */ 5961077365a9SGeert Uytterhoeven 0, 0, 0, 0, 5962077365a9SGeert Uytterhoeven /* SEL_IEB [2] */ 5963077365a9SGeert Uytterhoeven FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, 0, 5964077365a9SGeert Uytterhoeven /* RESERVED [4] */ 5965077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5966077365a9SGeert Uytterhoeven 0, 0, 0, 0, 0, 0, 0, 0, 5967077365a9SGeert Uytterhoeven /* RESERVED [2] */ 5968077365a9SGeert Uytterhoeven 0, 0, 0, 0, 5969077365a9SGeert Uytterhoeven /* SEL_IIC2 [3] */ 5970077365a9SGeert Uytterhoeven FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3, 5971077365a9SGeert Uytterhoeven FN_SEL_IIC2_4, 0, 0, 0, 5972077365a9SGeert Uytterhoeven /* SEL_IIC1 [2] */ 5973077365a9SGeert Uytterhoeven FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, 0, 5974077365a9SGeert Uytterhoeven /* SEL_I2C2 [3] */ 5975077365a9SGeert Uytterhoeven FN_SEL_I2C2_0, FN_SEL_I2C2_1, FN_SEL_I2C2_2, FN_SEL_I2C2_3, 5976077365a9SGeert Uytterhoeven FN_SEL_I2C2_4, 0, 0, 0, 5977077365a9SGeert Uytterhoeven /* SEL_I2C1 [2] */ 5978077365a9SGeert Uytterhoeven FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2, 0, )) 5979077365a9SGeert Uytterhoeven }, 5980077365a9SGeert Uytterhoeven { }, 5981077365a9SGeert Uytterhoeven }; 5982077365a9SGeert Uytterhoeven 5983077365a9SGeert Uytterhoeven static int r8a7790_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl) 5984077365a9SGeert Uytterhoeven { 5985077365a9SGeert Uytterhoeven if (pin < RCAR_GP_PIN(3, 0) || pin > RCAR_GP_PIN(3, 31)) 5986077365a9SGeert Uytterhoeven return -EINVAL; 5987077365a9SGeert Uytterhoeven 5988077365a9SGeert Uytterhoeven *pocctrl = 0xe606008c; 5989077365a9SGeert Uytterhoeven 5990077365a9SGeert Uytterhoeven return 31 - (pin & 0x1f); 5991077365a9SGeert Uytterhoeven } 5992077365a9SGeert Uytterhoeven 59932be3d602SGeert Uytterhoeven static const struct pinmux_bias_reg pinmux_bias_regs[] = { 59942be3d602SGeert Uytterhoeven { PINMUX_BIAS_REG("PUPR0", 0xe6060100, "N/A", 0) { 59952be3d602SGeert Uytterhoeven [ 0] = RCAR_GP_PIN(0, 16), /* A0 */ 59962be3d602SGeert Uytterhoeven [ 1] = RCAR_GP_PIN(0, 17), /* A1 */ 59972be3d602SGeert Uytterhoeven [ 2] = RCAR_GP_PIN(0, 18), /* A2 */ 59982be3d602SGeert Uytterhoeven [ 3] = RCAR_GP_PIN(0, 19), /* A3 */ 59992be3d602SGeert Uytterhoeven [ 4] = RCAR_GP_PIN(0, 20), /* A4 */ 60002be3d602SGeert Uytterhoeven [ 5] = RCAR_GP_PIN(0, 21), /* A5 */ 60012be3d602SGeert Uytterhoeven [ 6] = RCAR_GP_PIN(0, 22), /* A6 */ 60022be3d602SGeert Uytterhoeven [ 7] = RCAR_GP_PIN(0, 23), /* A7 */ 60032be3d602SGeert Uytterhoeven [ 8] = RCAR_GP_PIN(0, 24), /* A8 */ 60042be3d602SGeert Uytterhoeven [ 9] = RCAR_GP_PIN(0, 25), /* A9 */ 60052be3d602SGeert Uytterhoeven [10] = RCAR_GP_PIN(0, 26), /* A10 */ 60062be3d602SGeert Uytterhoeven [11] = RCAR_GP_PIN(0, 27), /* A11 */ 60072be3d602SGeert Uytterhoeven [12] = RCAR_GP_PIN(0, 28), /* A12 */ 60082be3d602SGeert Uytterhoeven [13] = RCAR_GP_PIN(0, 29), /* A13 */ 60092be3d602SGeert Uytterhoeven [14] = RCAR_GP_PIN(0, 30), /* A14 */ 60102be3d602SGeert Uytterhoeven [15] = RCAR_GP_PIN(0, 31), /* A15 */ 60112be3d602SGeert Uytterhoeven [16] = RCAR_GP_PIN(1, 0), /* A16 */ 60122be3d602SGeert Uytterhoeven [17] = RCAR_GP_PIN(1, 1), /* A17 */ 60132be3d602SGeert Uytterhoeven [18] = RCAR_GP_PIN(1, 2), /* A18 */ 60142be3d602SGeert Uytterhoeven [19] = RCAR_GP_PIN(1, 3), /* A19 */ 60152be3d602SGeert Uytterhoeven [20] = RCAR_GP_PIN(1, 4), /* A20 */ 60162be3d602SGeert Uytterhoeven [21] = RCAR_GP_PIN(1, 5), /* A21 */ 60172be3d602SGeert Uytterhoeven [22] = RCAR_GP_PIN(1, 6), /* A22 */ 60182be3d602SGeert Uytterhoeven [23] = RCAR_GP_PIN(1, 7), /* A23 */ 60192be3d602SGeert Uytterhoeven [24] = RCAR_GP_PIN(1, 8), /* A24 */ 60202be3d602SGeert Uytterhoeven [25] = RCAR_GP_PIN(1, 9), /* A25 */ 60212be3d602SGeert Uytterhoeven [26] = RCAR_GP_PIN(1, 12), /* EX_CS0# */ 60222be3d602SGeert Uytterhoeven [27] = RCAR_GP_PIN(1, 13), /* EX_CS1# */ 60232be3d602SGeert Uytterhoeven [28] = RCAR_GP_PIN(1, 14), /* EX_CS2# */ 60242be3d602SGeert Uytterhoeven [29] = RCAR_GP_PIN(1, 15), /* EX_CS3# */ 60252be3d602SGeert Uytterhoeven [30] = RCAR_GP_PIN(1, 16), /* EX_CS4# */ 60262be3d602SGeert Uytterhoeven [31] = RCAR_GP_PIN(1, 17), /* EX_CS5# */ 60272be3d602SGeert Uytterhoeven } }, 60282be3d602SGeert Uytterhoeven { PINMUX_BIAS_REG("PUPR1", 0xe6060104, "N/A", 0) { 60292be3d602SGeert Uytterhoeven /* PUPR1 pull-up pins */ 60302be3d602SGeert Uytterhoeven [ 0] = RCAR_GP_PIN(1, 18), /* BS# */ 60312be3d602SGeert Uytterhoeven [ 1] = RCAR_GP_PIN(1, 19), /* RD# */ 60322be3d602SGeert Uytterhoeven [ 2] = RCAR_GP_PIN(1, 20), /* RD/WR# */ 60332be3d602SGeert Uytterhoeven [ 3] = RCAR_GP_PIN(1, 21), /* WE0# */ 60342be3d602SGeert Uytterhoeven [ 4] = RCAR_GP_PIN(1, 22), /* WE1# */ 60352be3d602SGeert Uytterhoeven [ 5] = RCAR_GP_PIN(1, 23), /* EX_WAIT0 */ 60362be3d602SGeert Uytterhoeven [ 6] = RCAR_GP_PIN(5, 24), /* AVS1 */ 60372be3d602SGeert Uytterhoeven [ 7] = RCAR_GP_PIN(5, 25), /* AVS2 */ 60382be3d602SGeert Uytterhoeven [ 8] = RCAR_GP_PIN(1, 10), /* CS0# */ 60392be3d602SGeert Uytterhoeven [ 9] = RCAR_GP_PIN(1, 11), /* CS1#/A26 */ 60402be3d602SGeert Uytterhoeven [10] = PIN_TRST_N, /* TRST# */ 60412be3d602SGeert Uytterhoeven [11] = PIN_TCK, /* TCK */ 60422be3d602SGeert Uytterhoeven [12] = PIN_TMS, /* TMS */ 60432be3d602SGeert Uytterhoeven [13] = PIN_TDI, /* TDI */ 60442be3d602SGeert Uytterhoeven [14] = SH_PFC_PIN_NONE, 60452be3d602SGeert Uytterhoeven [15] = SH_PFC_PIN_NONE, 60462be3d602SGeert Uytterhoeven [16] = RCAR_GP_PIN(0, 0), /* D0 */ 60472be3d602SGeert Uytterhoeven [17] = RCAR_GP_PIN(0, 1), /* D1 */ 60482be3d602SGeert Uytterhoeven [18] = RCAR_GP_PIN(0, 2), /* D2 */ 60492be3d602SGeert Uytterhoeven [19] = RCAR_GP_PIN(0, 3), /* D3 */ 60502be3d602SGeert Uytterhoeven [20] = RCAR_GP_PIN(0, 4), /* D4 */ 60512be3d602SGeert Uytterhoeven [21] = RCAR_GP_PIN(0, 5), /* D5 */ 60522be3d602SGeert Uytterhoeven [22] = RCAR_GP_PIN(0, 6), /* D6 */ 60532be3d602SGeert Uytterhoeven [23] = RCAR_GP_PIN(0, 7), /* D7 */ 60542be3d602SGeert Uytterhoeven [24] = RCAR_GP_PIN(0, 8), /* D8 */ 60552be3d602SGeert Uytterhoeven [25] = RCAR_GP_PIN(0, 9), /* D9 */ 60562be3d602SGeert Uytterhoeven [26] = RCAR_GP_PIN(0, 10), /* D10 */ 60572be3d602SGeert Uytterhoeven [27] = RCAR_GP_PIN(0, 11), /* D11 */ 60582be3d602SGeert Uytterhoeven [28] = RCAR_GP_PIN(0, 12), /* D12 */ 60592be3d602SGeert Uytterhoeven [29] = RCAR_GP_PIN(0, 13), /* D13 */ 60602be3d602SGeert Uytterhoeven [30] = RCAR_GP_PIN(0, 14), /* D14 */ 60612be3d602SGeert Uytterhoeven [31] = RCAR_GP_PIN(0, 15), /* D15 */ 60622be3d602SGeert Uytterhoeven } }, 60632be3d602SGeert Uytterhoeven { PINMUX_BIAS_REG("N/A", 0, "PUPR1", 0xe6060104) { 60642be3d602SGeert Uytterhoeven /* PUPR1 pull-down pins */ 60652be3d602SGeert Uytterhoeven [ 0] = SH_PFC_PIN_NONE, 60662be3d602SGeert Uytterhoeven [ 1] = SH_PFC_PIN_NONE, 60672be3d602SGeert Uytterhoeven [ 2] = SH_PFC_PIN_NONE, 60682be3d602SGeert Uytterhoeven [ 3] = SH_PFC_PIN_NONE, 60692be3d602SGeert Uytterhoeven [ 4] = SH_PFC_PIN_NONE, 60702be3d602SGeert Uytterhoeven [ 5] = SH_PFC_PIN_NONE, 60712be3d602SGeert Uytterhoeven [ 6] = SH_PFC_PIN_NONE, 60722be3d602SGeert Uytterhoeven [ 7] = SH_PFC_PIN_NONE, 60732be3d602SGeert Uytterhoeven [ 8] = SH_PFC_PIN_NONE, 60742be3d602SGeert Uytterhoeven [ 9] = SH_PFC_PIN_NONE, 60752be3d602SGeert Uytterhoeven [10] = SH_PFC_PIN_NONE, 60762be3d602SGeert Uytterhoeven [11] = SH_PFC_PIN_NONE, 60772be3d602SGeert Uytterhoeven [12] = SH_PFC_PIN_NONE, 60782be3d602SGeert Uytterhoeven [13] = SH_PFC_PIN_NONE, 60792be3d602SGeert Uytterhoeven [14] = SH_PFC_PIN_NONE, 60802be3d602SGeert Uytterhoeven [15] = PIN_ASEBRK_N_ACK, /* ASEBRK#/ACK */ 60812be3d602SGeert Uytterhoeven [16] = SH_PFC_PIN_NONE, 60822be3d602SGeert Uytterhoeven [17] = SH_PFC_PIN_NONE, 60832be3d602SGeert Uytterhoeven [18] = SH_PFC_PIN_NONE, 60842be3d602SGeert Uytterhoeven [19] = SH_PFC_PIN_NONE, 60852be3d602SGeert Uytterhoeven [20] = SH_PFC_PIN_NONE, 60862be3d602SGeert Uytterhoeven [21] = SH_PFC_PIN_NONE, 60872be3d602SGeert Uytterhoeven [22] = SH_PFC_PIN_NONE, 60882be3d602SGeert Uytterhoeven [23] = SH_PFC_PIN_NONE, 60892be3d602SGeert Uytterhoeven [24] = SH_PFC_PIN_NONE, 60902be3d602SGeert Uytterhoeven [25] = SH_PFC_PIN_NONE, 60912be3d602SGeert Uytterhoeven [26] = SH_PFC_PIN_NONE, 60922be3d602SGeert Uytterhoeven [27] = SH_PFC_PIN_NONE, 60932be3d602SGeert Uytterhoeven [28] = SH_PFC_PIN_NONE, 60942be3d602SGeert Uytterhoeven [29] = SH_PFC_PIN_NONE, 60952be3d602SGeert Uytterhoeven [30] = SH_PFC_PIN_NONE, 60962be3d602SGeert Uytterhoeven [31] = SH_PFC_PIN_NONE, 60972be3d602SGeert Uytterhoeven } }, 60982be3d602SGeert Uytterhoeven { PINMUX_BIAS_REG("PUPR2", 0xe6060108, "N/A", 0) { 60992be3d602SGeert Uytterhoeven [ 0] = RCAR_GP_PIN(5, 28), /* DU_DOTCLKIN2 */ 61002be3d602SGeert Uytterhoeven [ 1] = SH_PFC_PIN_NONE, 61012be3d602SGeert Uytterhoeven [ 2] = SH_PFC_PIN_NONE, 61022be3d602SGeert Uytterhoeven [ 3] = SH_PFC_PIN_NONE, 61032be3d602SGeert Uytterhoeven [ 4] = SH_PFC_PIN_NONE, 61042be3d602SGeert Uytterhoeven [ 5] = RCAR_GP_PIN(2, 0), /* VI0_CLK */ 61052be3d602SGeert Uytterhoeven [ 6] = RCAR_GP_PIN(2, 1), /* VI0_DATA0_VI0_B0 */ 61062be3d602SGeert Uytterhoeven [ 7] = RCAR_GP_PIN(2, 2), /* VI0_DATA1_VI0_B1 */ 61072be3d602SGeert Uytterhoeven [ 8] = RCAR_GP_PIN(2, 3), /* VI0_DATA2_VI0_B2 */ 61082be3d602SGeert Uytterhoeven [ 9] = RCAR_GP_PIN(2, 4), /* VI0_DATA3_VI0_B3 */ 61092be3d602SGeert Uytterhoeven [10] = RCAR_GP_PIN(2, 5), /* VI0_DATA4_VI0_B4 */ 61102be3d602SGeert Uytterhoeven [11] = RCAR_GP_PIN(2, 6), /* VI0_DATA5_VI0_B5 */ 61112be3d602SGeert Uytterhoeven [12] = RCAR_GP_PIN(2, 7), /* VI0_DATA6_VI0_B6 */ 61122be3d602SGeert Uytterhoeven [13] = RCAR_GP_PIN(2, 8), /* VI0_DATA7_VI0_B7 */ 61132be3d602SGeert Uytterhoeven [14] = RCAR_GP_PIN(2, 9), /* VI1_CLK */ 61142be3d602SGeert Uytterhoeven [15] = RCAR_GP_PIN(2, 10), /* VI1_DATA0_VI1_B0 */ 61152be3d602SGeert Uytterhoeven [16] = RCAR_GP_PIN(2, 11), /* VI1_DATA1_VI1_B1 */ 61162be3d602SGeert Uytterhoeven [17] = RCAR_GP_PIN(2, 12), /* VI1_DATA2_VI1_B2 */ 61172be3d602SGeert Uytterhoeven [18] = RCAR_GP_PIN(2, 13), /* VI1_DATA3_VI1_B3 */ 61182be3d602SGeert Uytterhoeven [19] = RCAR_GP_PIN(2, 14), /* VI1_DATA4_VI1_B4 */ 61192be3d602SGeert Uytterhoeven [20] = RCAR_GP_PIN(2, 15), /* VI1_DATA5_VI1_B5 */ 61202be3d602SGeert Uytterhoeven [21] = RCAR_GP_PIN(2, 16), /* VI1_DATA6_VI1_B6 */ 61212be3d602SGeert Uytterhoeven [22] = RCAR_GP_PIN(2, 17), /* VI1_DATA7_VI1_B7 */ 61222be3d602SGeert Uytterhoeven [23] = RCAR_GP_PIN(5, 27), /* DU_DOTCLKIN1 */ 61232be3d602SGeert Uytterhoeven [24] = SH_PFC_PIN_NONE, 61242be3d602SGeert Uytterhoeven [25] = SH_PFC_PIN_NONE, 61252be3d602SGeert Uytterhoeven [26] = SH_PFC_PIN_NONE, 61262be3d602SGeert Uytterhoeven [27] = RCAR_GP_PIN(4, 0), /* MLB_CLK */ 61272be3d602SGeert Uytterhoeven [28] = RCAR_GP_PIN(4, 1), /* MLB_SIG */ 61282be3d602SGeert Uytterhoeven [29] = RCAR_GP_PIN(4, 2), /* MLB_DAT */ 61292be3d602SGeert Uytterhoeven [30] = SH_PFC_PIN_NONE, 61302be3d602SGeert Uytterhoeven [31] = RCAR_GP_PIN(5, 26), /* DU_DOTCLKIN0 */ 61312be3d602SGeert Uytterhoeven } }, 61322be3d602SGeert Uytterhoeven { PINMUX_BIAS_REG("PUPR3", 0xe606010c, "N/A", 0) { 61332be3d602SGeert Uytterhoeven [ 0] = RCAR_GP_PIN(3, 0), /* SD0_CLK */ 61342be3d602SGeert Uytterhoeven [ 1] = RCAR_GP_PIN(3, 1), /* SD0_CMD */ 61352be3d602SGeert Uytterhoeven [ 2] = RCAR_GP_PIN(3, 2), /* SD0_DAT0 */ 61362be3d602SGeert Uytterhoeven [ 3] = RCAR_GP_PIN(3, 3), /* SD0_DAT1 */ 61372be3d602SGeert Uytterhoeven [ 4] = RCAR_GP_PIN(3, 4), /* SD0_DAT2 */ 61382be3d602SGeert Uytterhoeven [ 5] = RCAR_GP_PIN(3, 5), /* SD0_DAT3 */ 61392be3d602SGeert Uytterhoeven [ 6] = RCAR_GP_PIN(3, 6), /* SD0_CD */ 61402be3d602SGeert Uytterhoeven [ 7] = RCAR_GP_PIN(3, 7), /* SD0_WP */ 61412be3d602SGeert Uytterhoeven [ 8] = RCAR_GP_PIN(3, 8), /* SD1_CLK */ 61422be3d602SGeert Uytterhoeven [ 9] = RCAR_GP_PIN(3, 9), /* SD1_CMD */ 61432be3d602SGeert Uytterhoeven [10] = RCAR_GP_PIN(3, 10), /* SD1_DAT0 */ 61442be3d602SGeert Uytterhoeven [11] = RCAR_GP_PIN(3, 11), /* SD1_DAT1 */ 61452be3d602SGeert Uytterhoeven [12] = RCAR_GP_PIN(3, 12), /* SD1_DAT2 */ 61462be3d602SGeert Uytterhoeven [13] = RCAR_GP_PIN(3, 13), /* SD1_DAT3 */ 61472be3d602SGeert Uytterhoeven [14] = RCAR_GP_PIN(3, 14), /* SD1_CD */ 61482be3d602SGeert Uytterhoeven [15] = RCAR_GP_PIN(3, 15), /* SD1_WP */ 61492be3d602SGeert Uytterhoeven [16] = RCAR_GP_PIN(3, 16), /* SD2_CLK */ 61502be3d602SGeert Uytterhoeven [17] = RCAR_GP_PIN(3, 17), /* SD2_CMD */ 61512be3d602SGeert Uytterhoeven [18] = RCAR_GP_PIN(3, 18), /* SD2_DAT0 */ 61522be3d602SGeert Uytterhoeven [19] = RCAR_GP_PIN(3, 19), /* SD2_DAT1 */ 61532be3d602SGeert Uytterhoeven [20] = RCAR_GP_PIN(3, 20), /* SD2_DAT2 */ 61542be3d602SGeert Uytterhoeven [21] = RCAR_GP_PIN(3, 21), /* SD2_DAT3 */ 61552be3d602SGeert Uytterhoeven [22] = RCAR_GP_PIN(3, 22), /* SD2_CD */ 61562be3d602SGeert Uytterhoeven [23] = RCAR_GP_PIN(3, 23), /* SD2_WP */ 61572be3d602SGeert Uytterhoeven [24] = RCAR_GP_PIN(3, 24), /* SD3_CLK */ 61582be3d602SGeert Uytterhoeven [25] = RCAR_GP_PIN(3, 25), /* SD3_CMD */ 61592be3d602SGeert Uytterhoeven [26] = RCAR_GP_PIN(3, 26), /* SD3_DAT0 */ 61602be3d602SGeert Uytterhoeven [27] = RCAR_GP_PIN(3, 27), /* SD3_DAT1 */ 61612be3d602SGeert Uytterhoeven [28] = RCAR_GP_PIN(3, 28), /* SD3_DAT2 */ 61622be3d602SGeert Uytterhoeven [29] = RCAR_GP_PIN(3, 29), /* SD3_DAT3 */ 61632be3d602SGeert Uytterhoeven [30] = RCAR_GP_PIN(3, 30), /* SD3_CD */ 61642be3d602SGeert Uytterhoeven [31] = RCAR_GP_PIN(3, 31), /* SD3_WP */ 61652be3d602SGeert Uytterhoeven } }, 61662be3d602SGeert Uytterhoeven { PINMUX_BIAS_REG("PUPR4", 0xe6060110, "N/A", 0) { 61672be3d602SGeert Uytterhoeven [ 0] = RCAR_GP_PIN(4, 3), /* SSI_SCK0129 */ 61682be3d602SGeert Uytterhoeven [ 1] = RCAR_GP_PIN(4, 4), /* SSI_WS0129 */ 61692be3d602SGeert Uytterhoeven [ 2] = RCAR_GP_PIN(4, 5), /* SSI_SDATA0 */ 61702be3d602SGeert Uytterhoeven [ 3] = RCAR_GP_PIN(4, 6), /* SSI_SDATA1 */ 61712be3d602SGeert Uytterhoeven [ 4] = RCAR_GP_PIN(4, 7), /* SSI_SDATA2 */ 61722be3d602SGeert Uytterhoeven [ 5] = RCAR_GP_PIN(4, 8), /* SSI_SCK34 */ 61732be3d602SGeert Uytterhoeven [ 6] = RCAR_GP_PIN(4, 9), /* SSI_WS34 */ 61742be3d602SGeert Uytterhoeven [ 7] = RCAR_GP_PIN(4, 10), /* SSI_SDATA3 */ 61752be3d602SGeert Uytterhoeven [ 8] = RCAR_GP_PIN(4, 11), /* SSI_SCK4 */ 61762be3d602SGeert Uytterhoeven [ 9] = RCAR_GP_PIN(4, 12), /* SSI_WS4 */ 61772be3d602SGeert Uytterhoeven [10] = RCAR_GP_PIN(4, 13), /* SSI_SDATA4 */ 61782be3d602SGeert Uytterhoeven [11] = RCAR_GP_PIN(4, 14), /* SSI_SCK5 */ 61792be3d602SGeert Uytterhoeven [12] = RCAR_GP_PIN(4, 15), /* SSI_WS5 */ 61802be3d602SGeert Uytterhoeven [13] = RCAR_GP_PIN(4, 16), /* SSI_SDATA5 */ 61812be3d602SGeert Uytterhoeven [14] = RCAR_GP_PIN(4, 17), /* SSI_SCK6 */ 61822be3d602SGeert Uytterhoeven [15] = RCAR_GP_PIN(4, 18), /* SSI_WS6 */ 61832be3d602SGeert Uytterhoeven [16] = RCAR_GP_PIN(4, 19), /* SSI_SDATA6 */ 61842be3d602SGeert Uytterhoeven [17] = RCAR_GP_PIN(4, 20), /* SSI_SCK78 */ 61852be3d602SGeert Uytterhoeven [18] = RCAR_GP_PIN(4, 21), /* SSI_WS78 */ 61862be3d602SGeert Uytterhoeven [19] = RCAR_GP_PIN(4, 22), /* SSI_SDATA7 */ 61872be3d602SGeert Uytterhoeven [20] = RCAR_GP_PIN(4, 23), /* SSI_SDATA8 */ 61882be3d602SGeert Uytterhoeven [21] = RCAR_GP_PIN(4, 24), /* SSI_SDATA9 */ 61892be3d602SGeert Uytterhoeven [22] = RCAR_GP_PIN(4, 25), /* AUDIO_CLKA */ 61902be3d602SGeert Uytterhoeven [23] = RCAR_GP_PIN(4, 26), /* AUDIO_CLKB */ 61912be3d602SGeert Uytterhoeven [24] = RCAR_GP_PIN(1, 24), /* DREQ0 */ 61922be3d602SGeert Uytterhoeven [25] = RCAR_GP_PIN(1, 25), /* DACK0 */ 61932be3d602SGeert Uytterhoeven [26] = RCAR_GP_PIN(1, 26), /* DREQ1 */ 61942be3d602SGeert Uytterhoeven [27] = RCAR_GP_PIN(1, 27), /* DACK1 */ 61952be3d602SGeert Uytterhoeven [28] = RCAR_GP_PIN(1, 28), /* DREQ2 */ 61962be3d602SGeert Uytterhoeven [29] = RCAR_GP_PIN(1, 29), /* DACK2 */ 61972be3d602SGeert Uytterhoeven [30] = RCAR_GP_PIN(2, 18), /* ETH_CRS_DV */ 61982be3d602SGeert Uytterhoeven [31] = RCAR_GP_PIN(2, 19), /* ETH_RX_ER */ 61992be3d602SGeert Uytterhoeven } }, 62002be3d602SGeert Uytterhoeven { PINMUX_BIAS_REG("PUPR5", 0xe6060114, "N/A", 0) { 62012be3d602SGeert Uytterhoeven [ 0] = RCAR_GP_PIN(4, 27), /* SCIFA0_SCK */ 62022be3d602SGeert Uytterhoeven [ 1] = RCAR_GP_PIN(4, 28), /* SCIFA0_RXD */ 62032be3d602SGeert Uytterhoeven [ 2] = RCAR_GP_PIN(4, 29), /* SCIFA0_TXD */ 62042be3d602SGeert Uytterhoeven [ 3] = RCAR_GP_PIN(4, 30), /* SCIFA0_CTS# */ 62052be3d602SGeert Uytterhoeven [ 4] = RCAR_GP_PIN(4, 31), /* SCIFA0_RTS# */ 62062be3d602SGeert Uytterhoeven [ 5] = RCAR_GP_PIN(5, 0), /* SCIFA1_RXD */ 62072be3d602SGeert Uytterhoeven [ 6] = RCAR_GP_PIN(5, 1), /* SCIFA1_TXD */ 62082be3d602SGeert Uytterhoeven [ 7] = RCAR_GP_PIN(5, 2), /* SCIFA1_CTS# */ 62092be3d602SGeert Uytterhoeven [ 8] = RCAR_GP_PIN(5, 3), /* SCIFA1_RTS# */ 62102be3d602SGeert Uytterhoeven [ 9] = RCAR_GP_PIN(5, 4), /* SCIFA2_SCK */ 62112be3d602SGeert Uytterhoeven [10] = RCAR_GP_PIN(5, 5), /* SCIFA2_RXD */ 62122be3d602SGeert Uytterhoeven [11] = RCAR_GP_PIN(5, 6), /* SCIFA2_TXD */ 62132be3d602SGeert Uytterhoeven [12] = RCAR_GP_PIN(5, 7), /* HSCK0 */ 62142be3d602SGeert Uytterhoeven [13] = RCAR_GP_PIN(5, 8), /* HRX0 */ 62152be3d602SGeert Uytterhoeven [14] = RCAR_GP_PIN(5, 9), /* HTX0 */ 62162be3d602SGeert Uytterhoeven [15] = RCAR_GP_PIN(5, 10), /* HCTS0# */ 62172be3d602SGeert Uytterhoeven [16] = RCAR_GP_PIN(5, 11), /* HRTS0# */ 62182be3d602SGeert Uytterhoeven [17] = RCAR_GP_PIN(5, 12), /* MSIOF0_SCK */ 62192be3d602SGeert Uytterhoeven [18] = RCAR_GP_PIN(5, 13), /* MSIOF0_SYNC */ 62202be3d602SGeert Uytterhoeven [19] = RCAR_GP_PIN(5, 14), /* MSIOF0_SS1 */ 62212be3d602SGeert Uytterhoeven [20] = RCAR_GP_PIN(5, 15), /* MSIOF0_TXD */ 62222be3d602SGeert Uytterhoeven [21] = RCAR_GP_PIN(5, 16), /* MSIOF0_SS2 */ 62232be3d602SGeert Uytterhoeven [22] = RCAR_GP_PIN(5, 17), /* MSIOF0_RXD */ 62242be3d602SGeert Uytterhoeven [23] = RCAR_GP_PIN(5, 18), /* USB0_PWEN */ 62252be3d602SGeert Uytterhoeven [24] = RCAR_GP_PIN(5, 19), /* USB0_OVC_VBUS */ 62262be3d602SGeert Uytterhoeven [25] = RCAR_GP_PIN(5, 20), /* USB1_PWEN */ 62272be3d602SGeert Uytterhoeven [26] = RCAR_GP_PIN(5, 21), /* USB1_OVC */ 62282be3d602SGeert Uytterhoeven [27] = RCAR_GP_PIN(5, 22), /* USB2_PWEN */ 62292be3d602SGeert Uytterhoeven [28] = RCAR_GP_PIN(5, 23), /* USB2_OVC */ 62302be3d602SGeert Uytterhoeven [29] = RCAR_GP_PIN(2, 20), /* ETH_RXD0 */ 62312be3d602SGeert Uytterhoeven [30] = RCAR_GP_PIN(2, 21), /* ETH_RXD1 */ 62322be3d602SGeert Uytterhoeven [31] = RCAR_GP_PIN(2, 22), /* ETH_LINK */ 62332be3d602SGeert Uytterhoeven } }, 62342be3d602SGeert Uytterhoeven { PINMUX_BIAS_REG("PUPR6", 0xe6060118, "N/A", 0) { 62352be3d602SGeert Uytterhoeven [ 0] = RCAR_GP_PIN(2, 23), /* ETH_REF_CLK */ 62362be3d602SGeert Uytterhoeven [ 1] = RCAR_GP_PIN(2, 24), /* ETH_MDIO */ 62372be3d602SGeert Uytterhoeven [ 2] = RCAR_GP_PIN(2, 25), /* ETH_TXD1 */ 62382be3d602SGeert Uytterhoeven [ 3] = RCAR_GP_PIN(2, 26), /* ETH_TX_EN */ 62392be3d602SGeert Uytterhoeven [ 4] = RCAR_GP_PIN(2, 27), /* ETH_MAGIC */ 62402be3d602SGeert Uytterhoeven [ 5] = RCAR_GP_PIN(2, 28), /* ETH_TXD0 */ 62412be3d602SGeert Uytterhoeven [ 6] = RCAR_GP_PIN(2, 29), /* ETH_MDC */ 62422be3d602SGeert Uytterhoeven [ 7] = RCAR_GP_PIN(5, 29), /* PWM0 */ 62432be3d602SGeert Uytterhoeven [ 8] = RCAR_GP_PIN(5, 30), /* PWM1 */ 62442be3d602SGeert Uytterhoeven [ 9] = RCAR_GP_PIN(5, 31), /* PWM2 */ 62452be3d602SGeert Uytterhoeven [10] = SH_PFC_PIN_NONE, 62462be3d602SGeert Uytterhoeven [11] = SH_PFC_PIN_NONE, 62472be3d602SGeert Uytterhoeven [12] = SH_PFC_PIN_NONE, 62482be3d602SGeert Uytterhoeven [13] = SH_PFC_PIN_NONE, 62492be3d602SGeert Uytterhoeven [14] = SH_PFC_PIN_NONE, 62502be3d602SGeert Uytterhoeven [15] = SH_PFC_PIN_NONE, 62512be3d602SGeert Uytterhoeven [16] = SH_PFC_PIN_NONE, 62522be3d602SGeert Uytterhoeven [17] = SH_PFC_PIN_NONE, 62532be3d602SGeert Uytterhoeven [18] = SH_PFC_PIN_NONE, 62542be3d602SGeert Uytterhoeven [19] = SH_PFC_PIN_NONE, 62552be3d602SGeert Uytterhoeven [20] = SH_PFC_PIN_NONE, 62562be3d602SGeert Uytterhoeven [21] = SH_PFC_PIN_NONE, 62572be3d602SGeert Uytterhoeven [22] = SH_PFC_PIN_NONE, 62582be3d602SGeert Uytterhoeven [23] = SH_PFC_PIN_NONE, 62592be3d602SGeert Uytterhoeven [24] = SH_PFC_PIN_NONE, 62602be3d602SGeert Uytterhoeven [25] = SH_PFC_PIN_NONE, 62612be3d602SGeert Uytterhoeven [26] = SH_PFC_PIN_NONE, 62622be3d602SGeert Uytterhoeven [27] = SH_PFC_PIN_NONE, 62632be3d602SGeert Uytterhoeven [28] = SH_PFC_PIN_NONE, 62642be3d602SGeert Uytterhoeven [29] = SH_PFC_PIN_NONE, 62652be3d602SGeert Uytterhoeven [30] = SH_PFC_PIN_NONE, 62662be3d602SGeert Uytterhoeven [31] = SH_PFC_PIN_NONE, 62672be3d602SGeert Uytterhoeven } }, 62682be3d602SGeert Uytterhoeven { /* sentinel */ } 62692be3d602SGeert Uytterhoeven }; 62702be3d602SGeert Uytterhoeven 6271077365a9SGeert Uytterhoeven static const struct soc_device_attribute r8a7790_tdsel[] = { 6272077365a9SGeert Uytterhoeven { .soc_id = "r8a7790", .revision = "ES1.0" }, 6273077365a9SGeert Uytterhoeven { /* sentinel */ } 6274077365a9SGeert Uytterhoeven }; 6275077365a9SGeert Uytterhoeven 6276077365a9SGeert Uytterhoeven static int r8a7790_pinmux_soc_init(struct sh_pfc *pfc) 6277077365a9SGeert Uytterhoeven { 6278077365a9SGeert Uytterhoeven /* Initialize TDSEL on old revisions */ 6279077365a9SGeert Uytterhoeven if (soc_device_match(r8a7790_tdsel)) 6280077365a9SGeert Uytterhoeven sh_pfc_write(pfc, 0xe6060088, 0x00155554); 6281077365a9SGeert Uytterhoeven 6282077365a9SGeert Uytterhoeven return 0; 6283077365a9SGeert Uytterhoeven } 6284077365a9SGeert Uytterhoeven 6285077365a9SGeert Uytterhoeven static const struct sh_pfc_soc_operations r8a7790_pinmux_ops = { 6286077365a9SGeert Uytterhoeven .init = r8a7790_pinmux_soc_init, 6287077365a9SGeert Uytterhoeven .pin_to_pocctrl = r8a7790_pin_to_pocctrl, 62882be3d602SGeert Uytterhoeven .get_bias = rcar_pinmux_get_bias, 62892be3d602SGeert Uytterhoeven .set_bias = rcar_pinmux_set_bias, 6290077365a9SGeert Uytterhoeven }; 6291077365a9SGeert Uytterhoeven 6292077365a9SGeert Uytterhoeven #ifdef CONFIG_PINCTRL_PFC_R8A7742 6293077365a9SGeert Uytterhoeven const struct sh_pfc_soc_info r8a7742_pinmux_info = { 6294077365a9SGeert Uytterhoeven .name = "r8a77420_pfc", 6295077365a9SGeert Uytterhoeven .ops = &r8a7790_pinmux_ops, 6296077365a9SGeert Uytterhoeven .unlock_reg = 0xe6060000, /* PMMR */ 6297077365a9SGeert Uytterhoeven 6298077365a9SGeert Uytterhoeven .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, 6299077365a9SGeert Uytterhoeven 6300077365a9SGeert Uytterhoeven .pins = pinmux_pins, 6301077365a9SGeert Uytterhoeven .nr_pins = ARRAY_SIZE(pinmux_pins), 6302077365a9SGeert Uytterhoeven .groups = pinmux_groups.common, 6303077365a9SGeert Uytterhoeven .nr_groups = ARRAY_SIZE(pinmux_groups.common), 6304077365a9SGeert Uytterhoeven .functions = pinmux_functions.common, 6305077365a9SGeert Uytterhoeven .nr_functions = ARRAY_SIZE(pinmux_functions.common), 6306077365a9SGeert Uytterhoeven 6307077365a9SGeert Uytterhoeven .cfg_regs = pinmux_config_regs, 63082be3d602SGeert Uytterhoeven .bias_regs = pinmux_bias_regs, 6309077365a9SGeert Uytterhoeven 6310077365a9SGeert Uytterhoeven .pinmux_data = pinmux_data, 6311077365a9SGeert Uytterhoeven .pinmux_data_size = ARRAY_SIZE(pinmux_data), 6312077365a9SGeert Uytterhoeven }; 6313077365a9SGeert Uytterhoeven #endif 6314077365a9SGeert Uytterhoeven 6315077365a9SGeert Uytterhoeven #ifdef CONFIG_PINCTRL_PFC_R8A7790 6316077365a9SGeert Uytterhoeven const struct sh_pfc_soc_info r8a7790_pinmux_info = { 6317077365a9SGeert Uytterhoeven .name = "r8a77900_pfc", 6318077365a9SGeert Uytterhoeven .ops = &r8a7790_pinmux_ops, 6319077365a9SGeert Uytterhoeven .unlock_reg = 0xe6060000, /* PMMR */ 6320077365a9SGeert Uytterhoeven 6321077365a9SGeert Uytterhoeven .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, 6322077365a9SGeert Uytterhoeven 6323077365a9SGeert Uytterhoeven .pins = pinmux_pins, 6324077365a9SGeert Uytterhoeven .nr_pins = ARRAY_SIZE(pinmux_pins), 6325077365a9SGeert Uytterhoeven .groups = pinmux_groups.common, 6326077365a9SGeert Uytterhoeven .nr_groups = ARRAY_SIZE(pinmux_groups.common) + 6327077365a9SGeert Uytterhoeven ARRAY_SIZE(pinmux_groups.automotive), 6328077365a9SGeert Uytterhoeven .functions = pinmux_functions.common, 6329077365a9SGeert Uytterhoeven .nr_functions = ARRAY_SIZE(pinmux_functions.common) + 6330077365a9SGeert Uytterhoeven ARRAY_SIZE(pinmux_functions.automotive), 6331077365a9SGeert Uytterhoeven 6332077365a9SGeert Uytterhoeven .cfg_regs = pinmux_config_regs, 63332be3d602SGeert Uytterhoeven .bias_regs = pinmux_bias_regs, 6334077365a9SGeert Uytterhoeven 6335077365a9SGeert Uytterhoeven .pinmux_data = pinmux_data, 6336077365a9SGeert Uytterhoeven .pinmux_data_size = ARRAY_SIZE(pinmux_data), 6337077365a9SGeert Uytterhoeven }; 6338077365a9SGeert Uytterhoeven #endif 6339