1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2021, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. 5 * Copyright (c) 2023, Linaro Limited 6 */ 7 8 #include <linux/module.h> 9 #include <linux/of.h> 10 #include <linux/platform_device.h> 11 12 #include "pinctrl-msm.h" 13 14 #define REG_SIZE 0x1000 15 16 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10) \ 17 { \ 18 .grp = PINCTRL_PINGROUP("gpio" #id, \ 19 gpio##id##_pins, \ 20 ARRAY_SIZE(gpio##id##_pins)), \ 21 .funcs = (int[]){ \ 22 msm_mux_gpio, /* gpio mode */ \ 23 msm_mux_##f1, \ 24 msm_mux_##f2, \ 25 msm_mux_##f3, \ 26 msm_mux_##f4, \ 27 msm_mux_##f5, \ 28 msm_mux_##f6, \ 29 msm_mux_##f7, \ 30 msm_mux_##f8, \ 31 msm_mux_##f9, \ 32 msm_mux_##f10 \ 33 }, \ 34 .nfuncs = 11, \ 35 .ctl_reg = REG_SIZE * id, \ 36 .io_reg = 0x4 + REG_SIZE * id, \ 37 .intr_cfg_reg = 0x8 + REG_SIZE * id, \ 38 .intr_status_reg = 0xc + REG_SIZE * id, \ 39 .mux_bit = 2, \ 40 .pull_bit = 0, \ 41 .drv_bit = 6, \ 42 .i2c_pull_bit = 13, \ 43 .egpio_enable = 12, \ 44 .egpio_present = 11, \ 45 .oe_bit = 9, \ 46 .in_bit = 0, \ 47 .out_bit = 1, \ 48 .intr_enable_bit = 0, \ 49 .intr_status_bit = 0, \ 50 .intr_wakeup_present_bit = 6, \ 51 .intr_wakeup_enable_bit = 7, \ 52 .intr_target_bit = 8, \ 53 .intr_target_kpss_val = 3, \ 54 .intr_raw_status_bit = 4, \ 55 .intr_polarity_bit = 1, \ 56 .intr_detection_bit = 2, \ 57 .intr_detection_width = 2, \ 58 } 59 60 #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \ 61 { \ 62 .grp = PINCTRL_PINGROUP(#pg_name, \ 63 pg_name##_pins, \ 64 ARRAY_SIZE(pg_name##_pins)), \ 65 .ctl_reg = ctl, \ 66 .io_reg = 0, \ 67 .intr_cfg_reg = 0, \ 68 .intr_status_reg = 0, \ 69 .mux_bit = -1, \ 70 .pull_bit = pull, \ 71 .drv_bit = drv, \ 72 .oe_bit = -1, \ 73 .in_bit = -1, \ 74 .out_bit = -1, \ 75 .intr_enable_bit = -1, \ 76 .intr_status_bit = -1, \ 77 .intr_target_bit = -1, \ 78 .intr_raw_status_bit = -1, \ 79 .intr_polarity_bit = -1, \ 80 .intr_detection_bit = -1, \ 81 .intr_detection_width = -1, \ 82 } 83 84 #define UFS_RESET(pg_name, ctl, io) \ 85 { \ 86 .grp = PINCTRL_PINGROUP(#pg_name, \ 87 pg_name##_pins, \ 88 ARRAY_SIZE(pg_name##_pins)), \ 89 .ctl_reg = ctl, \ 90 .io_reg = io, \ 91 .intr_cfg_reg = 0, \ 92 .intr_status_reg = 0, \ 93 .mux_bit = -1, \ 94 .pull_bit = 3, \ 95 .drv_bit = 0, \ 96 .oe_bit = -1, \ 97 .in_bit = -1, \ 98 .out_bit = 0, \ 99 .intr_enable_bit = -1, \ 100 .intr_status_bit = -1, \ 101 .intr_target_bit = -1, \ 102 .intr_raw_status_bit = -1, \ 103 .intr_polarity_bit = -1, \ 104 .intr_detection_bit = -1, \ 105 .intr_detection_width = -1, \ 106 } 107 108 static const struct pinctrl_pin_desc sm8650_pins[] = { 109 PINCTRL_PIN(0, "GPIO_0"), 110 PINCTRL_PIN(1, "GPIO_1"), 111 PINCTRL_PIN(2, "GPIO_2"), 112 PINCTRL_PIN(3, "GPIO_3"), 113 PINCTRL_PIN(4, "GPIO_4"), 114 PINCTRL_PIN(5, "GPIO_5"), 115 PINCTRL_PIN(6, "GPIO_6"), 116 PINCTRL_PIN(7, "GPIO_7"), 117 PINCTRL_PIN(8, "GPIO_8"), 118 PINCTRL_PIN(9, "GPIO_9"), 119 PINCTRL_PIN(10, "GPIO_10"), 120 PINCTRL_PIN(11, "GPIO_11"), 121 PINCTRL_PIN(12, "GPIO_12"), 122 PINCTRL_PIN(13, "GPIO_13"), 123 PINCTRL_PIN(14, "GPIO_14"), 124 PINCTRL_PIN(15, "GPIO_15"), 125 PINCTRL_PIN(16, "GPIO_16"), 126 PINCTRL_PIN(17, "GPIO_17"), 127 PINCTRL_PIN(18, "GPIO_18"), 128 PINCTRL_PIN(19, "GPIO_19"), 129 PINCTRL_PIN(20, "GPIO_20"), 130 PINCTRL_PIN(21, "GPIO_21"), 131 PINCTRL_PIN(22, "GPIO_22"), 132 PINCTRL_PIN(23, "GPIO_23"), 133 PINCTRL_PIN(24, "GPIO_24"), 134 PINCTRL_PIN(25, "GPIO_25"), 135 PINCTRL_PIN(26, "GPIO_26"), 136 PINCTRL_PIN(27, "GPIO_27"), 137 PINCTRL_PIN(28, "GPIO_28"), 138 PINCTRL_PIN(29, "GPIO_29"), 139 PINCTRL_PIN(30, "GPIO_30"), 140 PINCTRL_PIN(31, "GPIO_31"), 141 PINCTRL_PIN(32, "GPIO_32"), 142 PINCTRL_PIN(33, "GPIO_33"), 143 PINCTRL_PIN(34, "GPIO_34"), 144 PINCTRL_PIN(35, "GPIO_35"), 145 PINCTRL_PIN(36, "GPIO_36"), 146 PINCTRL_PIN(37, "GPIO_37"), 147 PINCTRL_PIN(38, "GPIO_38"), 148 PINCTRL_PIN(39, "GPIO_39"), 149 PINCTRL_PIN(40, "GPIO_40"), 150 PINCTRL_PIN(41, "GPIO_41"), 151 PINCTRL_PIN(42, "GPIO_42"), 152 PINCTRL_PIN(43, "GPIO_43"), 153 PINCTRL_PIN(44, "GPIO_44"), 154 PINCTRL_PIN(45, "GPIO_45"), 155 PINCTRL_PIN(46, "GPIO_46"), 156 PINCTRL_PIN(47, "GPIO_47"), 157 PINCTRL_PIN(48, "GPIO_48"), 158 PINCTRL_PIN(49, "GPIO_49"), 159 PINCTRL_PIN(50, "GPIO_50"), 160 PINCTRL_PIN(51, "GPIO_51"), 161 PINCTRL_PIN(52, "GPIO_52"), 162 PINCTRL_PIN(53, "GPIO_53"), 163 PINCTRL_PIN(54, "GPIO_54"), 164 PINCTRL_PIN(55, "GPIO_55"), 165 PINCTRL_PIN(56, "GPIO_56"), 166 PINCTRL_PIN(57, "GPIO_57"), 167 PINCTRL_PIN(58, "GPIO_58"), 168 PINCTRL_PIN(59, "GPIO_59"), 169 PINCTRL_PIN(60, "GPIO_60"), 170 PINCTRL_PIN(61, "GPIO_61"), 171 PINCTRL_PIN(62, "GPIO_62"), 172 PINCTRL_PIN(63, "GPIO_63"), 173 PINCTRL_PIN(64, "GPIO_64"), 174 PINCTRL_PIN(65, "GPIO_65"), 175 PINCTRL_PIN(66, "GPIO_66"), 176 PINCTRL_PIN(67, "GPIO_67"), 177 PINCTRL_PIN(68, "GPIO_68"), 178 PINCTRL_PIN(69, "GPIO_69"), 179 PINCTRL_PIN(70, "GPIO_70"), 180 PINCTRL_PIN(71, "GPIO_71"), 181 PINCTRL_PIN(72, "GPIO_72"), 182 PINCTRL_PIN(73, "GPIO_73"), 183 PINCTRL_PIN(74, "GPIO_74"), 184 PINCTRL_PIN(75, "GPIO_75"), 185 PINCTRL_PIN(76, "GPIO_76"), 186 PINCTRL_PIN(77, "GPIO_77"), 187 PINCTRL_PIN(78, "GPIO_78"), 188 PINCTRL_PIN(79, "GPIO_79"), 189 PINCTRL_PIN(80, "GPIO_80"), 190 PINCTRL_PIN(81, "GPIO_81"), 191 PINCTRL_PIN(82, "GPIO_82"), 192 PINCTRL_PIN(83, "GPIO_83"), 193 PINCTRL_PIN(84, "GPIO_84"), 194 PINCTRL_PIN(85, "GPIO_85"), 195 PINCTRL_PIN(86, "GPIO_86"), 196 PINCTRL_PIN(87, "GPIO_87"), 197 PINCTRL_PIN(88, "GPIO_88"), 198 PINCTRL_PIN(89, "GPIO_89"), 199 PINCTRL_PIN(90, "GPIO_90"), 200 PINCTRL_PIN(91, "GPIO_91"), 201 PINCTRL_PIN(92, "GPIO_92"), 202 PINCTRL_PIN(93, "GPIO_93"), 203 PINCTRL_PIN(94, "GPIO_94"), 204 PINCTRL_PIN(95, "GPIO_95"), 205 PINCTRL_PIN(96, "GPIO_96"), 206 PINCTRL_PIN(97, "GPIO_97"), 207 PINCTRL_PIN(98, "GPIO_98"), 208 PINCTRL_PIN(99, "GPIO_99"), 209 PINCTRL_PIN(100, "GPIO_100"), 210 PINCTRL_PIN(101, "GPIO_101"), 211 PINCTRL_PIN(102, "GPIO_102"), 212 PINCTRL_PIN(103, "GPIO_103"), 213 PINCTRL_PIN(104, "GPIO_104"), 214 PINCTRL_PIN(105, "GPIO_105"), 215 PINCTRL_PIN(106, "GPIO_106"), 216 PINCTRL_PIN(107, "GPIO_107"), 217 PINCTRL_PIN(108, "GPIO_108"), 218 PINCTRL_PIN(109, "GPIO_109"), 219 PINCTRL_PIN(110, "GPIO_110"), 220 PINCTRL_PIN(111, "GPIO_111"), 221 PINCTRL_PIN(112, "GPIO_112"), 222 PINCTRL_PIN(113, "GPIO_113"), 223 PINCTRL_PIN(114, "GPIO_114"), 224 PINCTRL_PIN(115, "GPIO_115"), 225 PINCTRL_PIN(116, "GPIO_116"), 226 PINCTRL_PIN(117, "GPIO_117"), 227 PINCTRL_PIN(118, "GPIO_118"), 228 PINCTRL_PIN(119, "GPIO_119"), 229 PINCTRL_PIN(120, "GPIO_120"), 230 PINCTRL_PIN(121, "GPIO_121"), 231 PINCTRL_PIN(122, "GPIO_122"), 232 PINCTRL_PIN(123, "GPIO_123"), 233 PINCTRL_PIN(124, "GPIO_124"), 234 PINCTRL_PIN(125, "GPIO_125"), 235 PINCTRL_PIN(126, "GPIO_126"), 236 PINCTRL_PIN(127, "GPIO_127"), 237 PINCTRL_PIN(128, "GPIO_128"), 238 PINCTRL_PIN(129, "GPIO_129"), 239 PINCTRL_PIN(130, "GPIO_130"), 240 PINCTRL_PIN(131, "GPIO_131"), 241 PINCTRL_PIN(132, "GPIO_132"), 242 PINCTRL_PIN(133, "GPIO_133"), 243 PINCTRL_PIN(134, "GPIO_134"), 244 PINCTRL_PIN(135, "GPIO_135"), 245 PINCTRL_PIN(136, "GPIO_136"), 246 PINCTRL_PIN(137, "GPIO_137"), 247 PINCTRL_PIN(138, "GPIO_138"), 248 PINCTRL_PIN(139, "GPIO_139"), 249 PINCTRL_PIN(140, "GPIO_140"), 250 PINCTRL_PIN(141, "GPIO_141"), 251 PINCTRL_PIN(142, "GPIO_142"), 252 PINCTRL_PIN(143, "GPIO_143"), 253 PINCTRL_PIN(144, "GPIO_144"), 254 PINCTRL_PIN(145, "GPIO_145"), 255 PINCTRL_PIN(146, "GPIO_146"), 256 PINCTRL_PIN(147, "GPIO_147"), 257 PINCTRL_PIN(148, "GPIO_148"), 258 PINCTRL_PIN(149, "GPIO_149"), 259 PINCTRL_PIN(150, "GPIO_150"), 260 PINCTRL_PIN(151, "GPIO_151"), 261 PINCTRL_PIN(152, "GPIO_152"), 262 PINCTRL_PIN(153, "GPIO_153"), 263 PINCTRL_PIN(154, "GPIO_154"), 264 PINCTRL_PIN(155, "GPIO_155"), 265 PINCTRL_PIN(156, "GPIO_156"), 266 PINCTRL_PIN(157, "GPIO_157"), 267 PINCTRL_PIN(158, "GPIO_158"), 268 PINCTRL_PIN(159, "GPIO_159"), 269 PINCTRL_PIN(160, "GPIO_160"), 270 PINCTRL_PIN(161, "GPIO_161"), 271 PINCTRL_PIN(162, "GPIO_162"), 272 PINCTRL_PIN(163, "GPIO_163"), 273 PINCTRL_PIN(164, "GPIO_164"), 274 PINCTRL_PIN(165, "GPIO_165"), 275 PINCTRL_PIN(166, "GPIO_166"), 276 PINCTRL_PIN(167, "GPIO_167"), 277 PINCTRL_PIN(168, "GPIO_168"), 278 PINCTRL_PIN(169, "GPIO_169"), 279 PINCTRL_PIN(170, "GPIO_170"), 280 PINCTRL_PIN(171, "GPIO_171"), 281 PINCTRL_PIN(172, "GPIO_172"), 282 PINCTRL_PIN(173, "GPIO_173"), 283 PINCTRL_PIN(174, "GPIO_174"), 284 PINCTRL_PIN(175, "GPIO_175"), 285 PINCTRL_PIN(176, "GPIO_176"), 286 PINCTRL_PIN(177, "GPIO_177"), 287 PINCTRL_PIN(178, "GPIO_178"), 288 PINCTRL_PIN(179, "GPIO_179"), 289 PINCTRL_PIN(180, "GPIO_180"), 290 PINCTRL_PIN(181, "GPIO_181"), 291 PINCTRL_PIN(182, "GPIO_182"), 292 PINCTRL_PIN(183, "GPIO_183"), 293 PINCTRL_PIN(184, "GPIO_184"), 294 PINCTRL_PIN(185, "GPIO_185"), 295 PINCTRL_PIN(186, "GPIO_186"), 296 PINCTRL_PIN(187, "GPIO_187"), 297 PINCTRL_PIN(188, "GPIO_188"), 298 PINCTRL_PIN(189, "GPIO_189"), 299 PINCTRL_PIN(190, "GPIO_190"), 300 PINCTRL_PIN(191, "GPIO_191"), 301 PINCTRL_PIN(192, "GPIO_192"), 302 PINCTRL_PIN(193, "GPIO_193"), 303 PINCTRL_PIN(194, "GPIO_194"), 304 PINCTRL_PIN(195, "GPIO_195"), 305 PINCTRL_PIN(196, "GPIO_196"), 306 PINCTRL_PIN(197, "GPIO_197"), 307 PINCTRL_PIN(198, "GPIO_198"), 308 PINCTRL_PIN(199, "GPIO_199"), 309 PINCTRL_PIN(200, "GPIO_200"), 310 PINCTRL_PIN(201, "GPIO_201"), 311 PINCTRL_PIN(202, "GPIO_202"), 312 PINCTRL_PIN(203, "GPIO_203"), 313 PINCTRL_PIN(204, "GPIO_204"), 314 PINCTRL_PIN(205, "GPIO_205"), 315 PINCTRL_PIN(206, "GPIO_206"), 316 PINCTRL_PIN(207, "GPIO_207"), 317 PINCTRL_PIN(208, "GPIO_208"), 318 PINCTRL_PIN(209, "GPIO_209"), 319 PINCTRL_PIN(210, "UFS_RESET"), 320 PINCTRL_PIN(211, "SDC2_CLK"), 321 PINCTRL_PIN(212, "SDC2_CMD"), 322 PINCTRL_PIN(213, "SDC2_DATA"), 323 }; 324 325 #define DECLARE_MSM_GPIO_PINS(pin) \ 326 static const unsigned int gpio##pin##_pins[] = { pin } 327 DECLARE_MSM_GPIO_PINS(0); 328 DECLARE_MSM_GPIO_PINS(1); 329 DECLARE_MSM_GPIO_PINS(2); 330 DECLARE_MSM_GPIO_PINS(3); 331 DECLARE_MSM_GPIO_PINS(4); 332 DECLARE_MSM_GPIO_PINS(5); 333 DECLARE_MSM_GPIO_PINS(6); 334 DECLARE_MSM_GPIO_PINS(7); 335 DECLARE_MSM_GPIO_PINS(8); 336 DECLARE_MSM_GPIO_PINS(9); 337 DECLARE_MSM_GPIO_PINS(10); 338 DECLARE_MSM_GPIO_PINS(11); 339 DECLARE_MSM_GPIO_PINS(12); 340 DECLARE_MSM_GPIO_PINS(13); 341 DECLARE_MSM_GPIO_PINS(14); 342 DECLARE_MSM_GPIO_PINS(15); 343 DECLARE_MSM_GPIO_PINS(16); 344 DECLARE_MSM_GPIO_PINS(17); 345 DECLARE_MSM_GPIO_PINS(18); 346 DECLARE_MSM_GPIO_PINS(19); 347 DECLARE_MSM_GPIO_PINS(20); 348 DECLARE_MSM_GPIO_PINS(21); 349 DECLARE_MSM_GPIO_PINS(22); 350 DECLARE_MSM_GPIO_PINS(23); 351 DECLARE_MSM_GPIO_PINS(24); 352 DECLARE_MSM_GPIO_PINS(25); 353 DECLARE_MSM_GPIO_PINS(26); 354 DECLARE_MSM_GPIO_PINS(27); 355 DECLARE_MSM_GPIO_PINS(28); 356 DECLARE_MSM_GPIO_PINS(29); 357 DECLARE_MSM_GPIO_PINS(30); 358 DECLARE_MSM_GPIO_PINS(31); 359 DECLARE_MSM_GPIO_PINS(32); 360 DECLARE_MSM_GPIO_PINS(33); 361 DECLARE_MSM_GPIO_PINS(34); 362 DECLARE_MSM_GPIO_PINS(35); 363 DECLARE_MSM_GPIO_PINS(36); 364 DECLARE_MSM_GPIO_PINS(37); 365 DECLARE_MSM_GPIO_PINS(38); 366 DECLARE_MSM_GPIO_PINS(39); 367 DECLARE_MSM_GPIO_PINS(40); 368 DECLARE_MSM_GPIO_PINS(41); 369 DECLARE_MSM_GPIO_PINS(42); 370 DECLARE_MSM_GPIO_PINS(43); 371 DECLARE_MSM_GPIO_PINS(44); 372 DECLARE_MSM_GPIO_PINS(45); 373 DECLARE_MSM_GPIO_PINS(46); 374 DECLARE_MSM_GPIO_PINS(47); 375 DECLARE_MSM_GPIO_PINS(48); 376 DECLARE_MSM_GPIO_PINS(49); 377 DECLARE_MSM_GPIO_PINS(50); 378 DECLARE_MSM_GPIO_PINS(51); 379 DECLARE_MSM_GPIO_PINS(52); 380 DECLARE_MSM_GPIO_PINS(53); 381 DECLARE_MSM_GPIO_PINS(54); 382 DECLARE_MSM_GPIO_PINS(55); 383 DECLARE_MSM_GPIO_PINS(56); 384 DECLARE_MSM_GPIO_PINS(57); 385 DECLARE_MSM_GPIO_PINS(58); 386 DECLARE_MSM_GPIO_PINS(59); 387 DECLARE_MSM_GPIO_PINS(60); 388 DECLARE_MSM_GPIO_PINS(61); 389 DECLARE_MSM_GPIO_PINS(62); 390 DECLARE_MSM_GPIO_PINS(63); 391 DECLARE_MSM_GPIO_PINS(64); 392 DECLARE_MSM_GPIO_PINS(65); 393 DECLARE_MSM_GPIO_PINS(66); 394 DECLARE_MSM_GPIO_PINS(67); 395 DECLARE_MSM_GPIO_PINS(68); 396 DECLARE_MSM_GPIO_PINS(69); 397 DECLARE_MSM_GPIO_PINS(70); 398 DECLARE_MSM_GPIO_PINS(71); 399 DECLARE_MSM_GPIO_PINS(72); 400 DECLARE_MSM_GPIO_PINS(73); 401 DECLARE_MSM_GPIO_PINS(74); 402 DECLARE_MSM_GPIO_PINS(75); 403 DECLARE_MSM_GPIO_PINS(76); 404 DECLARE_MSM_GPIO_PINS(77); 405 DECLARE_MSM_GPIO_PINS(78); 406 DECLARE_MSM_GPIO_PINS(79); 407 DECLARE_MSM_GPIO_PINS(80); 408 DECLARE_MSM_GPIO_PINS(81); 409 DECLARE_MSM_GPIO_PINS(82); 410 DECLARE_MSM_GPIO_PINS(83); 411 DECLARE_MSM_GPIO_PINS(84); 412 DECLARE_MSM_GPIO_PINS(85); 413 DECLARE_MSM_GPIO_PINS(86); 414 DECLARE_MSM_GPIO_PINS(87); 415 DECLARE_MSM_GPIO_PINS(88); 416 DECLARE_MSM_GPIO_PINS(89); 417 DECLARE_MSM_GPIO_PINS(90); 418 DECLARE_MSM_GPIO_PINS(91); 419 DECLARE_MSM_GPIO_PINS(92); 420 DECLARE_MSM_GPIO_PINS(93); 421 DECLARE_MSM_GPIO_PINS(94); 422 DECLARE_MSM_GPIO_PINS(95); 423 DECLARE_MSM_GPIO_PINS(96); 424 DECLARE_MSM_GPIO_PINS(97); 425 DECLARE_MSM_GPIO_PINS(98); 426 DECLARE_MSM_GPIO_PINS(99); 427 DECLARE_MSM_GPIO_PINS(100); 428 DECLARE_MSM_GPIO_PINS(101); 429 DECLARE_MSM_GPIO_PINS(102); 430 DECLARE_MSM_GPIO_PINS(103); 431 DECLARE_MSM_GPIO_PINS(104); 432 DECLARE_MSM_GPIO_PINS(105); 433 DECLARE_MSM_GPIO_PINS(106); 434 DECLARE_MSM_GPIO_PINS(107); 435 DECLARE_MSM_GPIO_PINS(108); 436 DECLARE_MSM_GPIO_PINS(109); 437 DECLARE_MSM_GPIO_PINS(110); 438 DECLARE_MSM_GPIO_PINS(111); 439 DECLARE_MSM_GPIO_PINS(112); 440 DECLARE_MSM_GPIO_PINS(113); 441 DECLARE_MSM_GPIO_PINS(114); 442 DECLARE_MSM_GPIO_PINS(115); 443 DECLARE_MSM_GPIO_PINS(116); 444 DECLARE_MSM_GPIO_PINS(117); 445 DECLARE_MSM_GPIO_PINS(118); 446 DECLARE_MSM_GPIO_PINS(119); 447 DECLARE_MSM_GPIO_PINS(120); 448 DECLARE_MSM_GPIO_PINS(121); 449 DECLARE_MSM_GPIO_PINS(122); 450 DECLARE_MSM_GPIO_PINS(123); 451 DECLARE_MSM_GPIO_PINS(124); 452 DECLARE_MSM_GPIO_PINS(125); 453 DECLARE_MSM_GPIO_PINS(126); 454 DECLARE_MSM_GPIO_PINS(127); 455 DECLARE_MSM_GPIO_PINS(128); 456 DECLARE_MSM_GPIO_PINS(129); 457 DECLARE_MSM_GPIO_PINS(130); 458 DECLARE_MSM_GPIO_PINS(131); 459 DECLARE_MSM_GPIO_PINS(132); 460 DECLARE_MSM_GPIO_PINS(133); 461 DECLARE_MSM_GPIO_PINS(134); 462 DECLARE_MSM_GPIO_PINS(135); 463 DECLARE_MSM_GPIO_PINS(136); 464 DECLARE_MSM_GPIO_PINS(137); 465 DECLARE_MSM_GPIO_PINS(138); 466 DECLARE_MSM_GPIO_PINS(139); 467 DECLARE_MSM_GPIO_PINS(140); 468 DECLARE_MSM_GPIO_PINS(141); 469 DECLARE_MSM_GPIO_PINS(142); 470 DECLARE_MSM_GPIO_PINS(143); 471 DECLARE_MSM_GPIO_PINS(144); 472 DECLARE_MSM_GPIO_PINS(145); 473 DECLARE_MSM_GPIO_PINS(146); 474 DECLARE_MSM_GPIO_PINS(147); 475 DECLARE_MSM_GPIO_PINS(148); 476 DECLARE_MSM_GPIO_PINS(149); 477 DECLARE_MSM_GPIO_PINS(150); 478 DECLARE_MSM_GPIO_PINS(151); 479 DECLARE_MSM_GPIO_PINS(152); 480 DECLARE_MSM_GPIO_PINS(153); 481 DECLARE_MSM_GPIO_PINS(154); 482 DECLARE_MSM_GPIO_PINS(155); 483 DECLARE_MSM_GPIO_PINS(156); 484 DECLARE_MSM_GPIO_PINS(157); 485 DECLARE_MSM_GPIO_PINS(158); 486 DECLARE_MSM_GPIO_PINS(159); 487 DECLARE_MSM_GPIO_PINS(160); 488 DECLARE_MSM_GPIO_PINS(161); 489 DECLARE_MSM_GPIO_PINS(162); 490 DECLARE_MSM_GPIO_PINS(163); 491 DECLARE_MSM_GPIO_PINS(164); 492 DECLARE_MSM_GPIO_PINS(165); 493 DECLARE_MSM_GPIO_PINS(166); 494 DECLARE_MSM_GPIO_PINS(167); 495 DECLARE_MSM_GPIO_PINS(168); 496 DECLARE_MSM_GPIO_PINS(169); 497 DECLARE_MSM_GPIO_PINS(170); 498 DECLARE_MSM_GPIO_PINS(171); 499 DECLARE_MSM_GPIO_PINS(172); 500 DECLARE_MSM_GPIO_PINS(173); 501 DECLARE_MSM_GPIO_PINS(174); 502 DECLARE_MSM_GPIO_PINS(175); 503 DECLARE_MSM_GPIO_PINS(176); 504 DECLARE_MSM_GPIO_PINS(177); 505 DECLARE_MSM_GPIO_PINS(178); 506 DECLARE_MSM_GPIO_PINS(179); 507 DECLARE_MSM_GPIO_PINS(180); 508 DECLARE_MSM_GPIO_PINS(181); 509 DECLARE_MSM_GPIO_PINS(182); 510 DECLARE_MSM_GPIO_PINS(183); 511 DECLARE_MSM_GPIO_PINS(184); 512 DECLARE_MSM_GPIO_PINS(185); 513 DECLARE_MSM_GPIO_PINS(186); 514 DECLARE_MSM_GPIO_PINS(187); 515 DECLARE_MSM_GPIO_PINS(188); 516 DECLARE_MSM_GPIO_PINS(189); 517 DECLARE_MSM_GPIO_PINS(190); 518 DECLARE_MSM_GPIO_PINS(191); 519 DECLARE_MSM_GPIO_PINS(192); 520 DECLARE_MSM_GPIO_PINS(193); 521 DECLARE_MSM_GPIO_PINS(194); 522 DECLARE_MSM_GPIO_PINS(195); 523 DECLARE_MSM_GPIO_PINS(196); 524 DECLARE_MSM_GPIO_PINS(197); 525 DECLARE_MSM_GPIO_PINS(198); 526 DECLARE_MSM_GPIO_PINS(199); 527 DECLARE_MSM_GPIO_PINS(200); 528 DECLARE_MSM_GPIO_PINS(201); 529 DECLARE_MSM_GPIO_PINS(202); 530 DECLARE_MSM_GPIO_PINS(203); 531 DECLARE_MSM_GPIO_PINS(204); 532 DECLARE_MSM_GPIO_PINS(205); 533 DECLARE_MSM_GPIO_PINS(206); 534 DECLARE_MSM_GPIO_PINS(207); 535 DECLARE_MSM_GPIO_PINS(208); 536 DECLARE_MSM_GPIO_PINS(209); 537 538 static const unsigned int ufs_reset_pins[] = { 210 }; 539 static const unsigned int sdc2_clk_pins[] = { 211 }; 540 static const unsigned int sdc2_cmd_pins[] = { 212 }; 541 static const unsigned int sdc2_data_pins[] = { 213 }; 542 543 enum sm8650_functions { 544 msm_mux_gpio, 545 msm_mux_aoss_cti, 546 msm_mux_atest_char, 547 msm_mux_atest_usb, 548 msm_mux_audio_ext_mclk0, 549 msm_mux_audio_ext_mclk1, 550 msm_mux_audio_ref_clk, 551 msm_mux_cam_aon_mclk2, 552 msm_mux_cam_aon_mclk4, 553 msm_mux_cam_mclk, 554 msm_mux_cci_async_in, 555 msm_mux_cci_i2c_scl, 556 msm_mux_cci_i2c_sda, 557 msm_mux_cci_timer, 558 msm_mux_cmu_rng, 559 msm_mux_coex_uart1_rx, 560 msm_mux_coex_uart1_tx, 561 msm_mux_coex_uart2_rx, 562 msm_mux_coex_uart2_tx, 563 msm_mux_cri_trng, 564 msm_mux_dbg_out_clk, 565 msm_mux_ddr_bist_complete, 566 msm_mux_ddr_bist_fail, 567 msm_mux_ddr_bist_start, 568 msm_mux_ddr_bist_stop, 569 msm_mux_ddr_pxi0, 570 msm_mux_ddr_pxi1, 571 msm_mux_ddr_pxi2, 572 msm_mux_ddr_pxi3, 573 msm_mux_do_not, 574 msm_mux_dp_hot, 575 msm_mux_egpio, 576 msm_mux_gcc_gp1, 577 msm_mux_gcc_gp2, 578 msm_mux_gcc_gp3, 579 msm_mux_gnss_adc0, 580 msm_mux_gnss_adc1, 581 msm_mux_i2chub0_se0, 582 msm_mux_i2chub0_se1, 583 msm_mux_i2chub0_se2, 584 msm_mux_i2chub0_se3, 585 msm_mux_i2chub0_se4, 586 msm_mux_i2chub0_se5, 587 msm_mux_i2chub0_se6, 588 msm_mux_i2chub0_se7, 589 msm_mux_i2chub0_se8, 590 msm_mux_i2chub0_se9, 591 msm_mux_i2s0_data0, 592 msm_mux_i2s0_data1, 593 msm_mux_i2s0_sck, 594 msm_mux_i2s0_ws, 595 msm_mux_i2s1_data0, 596 msm_mux_i2s1_data1, 597 msm_mux_i2s1_sck, 598 msm_mux_i2s1_ws, 599 msm_mux_ibi_i3c, 600 msm_mux_jitter_bist, 601 msm_mux_mdp_vsync, 602 msm_mux_mdp_vsync0_out, 603 msm_mux_mdp_vsync1_out, 604 msm_mux_mdp_vsync2_out, 605 msm_mux_mdp_vsync3_out, 606 msm_mux_mdp_vsync_e, 607 msm_mux_nav_gpio0, 608 msm_mux_nav_gpio1, 609 msm_mux_nav_gpio2, 610 msm_mux_nav_gpio3, 611 msm_mux_pcie0_clk_req_n, 612 msm_mux_pcie1_clk_req_n, 613 msm_mux_phase_flag, 614 msm_mux_pll_bist_sync, 615 msm_mux_pll_clk_aux, 616 msm_mux_prng_rosc0, 617 msm_mux_prng_rosc1, 618 msm_mux_prng_rosc2, 619 msm_mux_prng_rosc3, 620 msm_mux_qdss_cti, 621 msm_mux_qdss_gpio, 622 msm_mux_qlink_big_enable, 623 msm_mux_qlink_big_request, 624 msm_mux_qlink_little_enable, 625 msm_mux_qlink_little_request, 626 msm_mux_qlink_wmss, 627 msm_mux_qspi0, 628 msm_mux_qspi1, 629 msm_mux_qspi2, 630 msm_mux_qspi3, 631 msm_mux_qspi_clk, 632 msm_mux_qspi_cs, 633 msm_mux_qup1_se0, 634 msm_mux_qup1_se1, 635 msm_mux_qup1_se2, 636 msm_mux_qup1_se3, 637 msm_mux_qup1_se4, 638 msm_mux_qup1_se5, 639 msm_mux_qup1_se6, 640 msm_mux_qup1_se7, 641 msm_mux_qup2_se0, 642 msm_mux_qup2_se1, 643 msm_mux_qup2_se2, 644 msm_mux_qup2_se3, 645 msm_mux_qup2_se4, 646 msm_mux_qup2_se5, 647 msm_mux_qup2_se6, 648 msm_mux_qup2_se7, 649 msm_mux_sd_write_protect, 650 msm_mux_sdc40, 651 msm_mux_sdc41, 652 msm_mux_sdc42, 653 msm_mux_sdc43, 654 msm_mux_sdc4_clk, 655 msm_mux_sdc4_cmd, 656 msm_mux_tb_trig_sdc2, 657 msm_mux_tb_trig_sdc4, 658 msm_mux_tgu_ch0_trigout, 659 msm_mux_tgu_ch1_trigout, 660 msm_mux_tgu_ch2_trigout, 661 msm_mux_tgu_ch3_trigout, 662 msm_mux_tmess_prng0, 663 msm_mux_tmess_prng1, 664 msm_mux_tmess_prng2, 665 msm_mux_tmess_prng3, 666 msm_mux_tsense_pwm1, 667 msm_mux_tsense_pwm2, 668 msm_mux_tsense_pwm3, 669 msm_mux_uim0_clk, 670 msm_mux_uim0_data, 671 msm_mux_uim0_present, 672 msm_mux_uim0_reset, 673 msm_mux_uim1_clk, 674 msm_mux_uim1_data, 675 msm_mux_uim1_present, 676 msm_mux_uim1_reset, 677 msm_mux_usb1_hs, 678 msm_mux_usb_phy, 679 msm_mux_vfr_0, 680 msm_mux_vfr_1, 681 msm_mux_vsense_trigger_mirnat, 682 msm_mux__, 683 }; 684 685 static const char *const gpio_groups[] = { 686 "gpio0", "gpio1", "gpio2", "gpio3", 687 "gpio4", "gpio5", "gpio6", "gpio7", 688 "gpio8", "gpio9", "gpio10", "gpio11", 689 "gpio12", "gpio13", "gpio14", "gpio15", 690 "gpio16", "gpio17", "gpio18", "gpio19", 691 "gpio20", "gpio21", "gpio22", "gpio23", 692 "gpio24", "gpio25", "gpio26", "gpio27", 693 "gpio28", "gpio29", "gpio30", "gpio31", 694 "gpio32", "gpio33", "gpio34", "gpio35", 695 "gpio36", "gpio37", "gpio38", "gpio39", 696 "gpio40", "gpio41", "gpio42", "gpio43", 697 "gpio44", "gpio45", "gpio46", "gpio47", 698 "gpio48", "gpio49", "gpio50", "gpio51", 699 "gpio52", "gpio53", "gpio54", "gpio55", 700 "gpio56", "gpio57", "gpio58", "gpio59", 701 "gpio60", "gpio61", "gpio62", "gpio63", 702 "gpio64", "gpio65", "gpio66", "gpio67", 703 "gpio68", "gpio69", "gpio70", "gpio71", 704 "gpio72", "gpio73", "gpio74", "gpio75", 705 "gpio76", "gpio77", "gpio78", "gpio79", 706 "gpio80", "gpio81", "gpio82", "gpio83", 707 "gpio84", "gpio85", "gpio86", "gpio87", 708 "gpio88", "gpio89", "gpio90", "gpio91", 709 "gpio92", "gpio93", "gpio94", "gpio95", 710 "gpio96", "gpio97", "gpio98", "gpio99", 711 "gpio100", "gpio101", "gpio102", "gpio103", 712 "gpio104", "gpio105", "gpio106", "gpio107", 713 "gpio108", "gpio109", "gpio110", "gpio111", 714 "gpio112", "gpio113", "gpio114", "gpio115", 715 "gpio116", "gpio117", "gpio118", "gpio119", 716 "gpio120", "gpio121", "gpio122", "gpio123", 717 "gpio124", "gpio125", "gpio126", "gpio127", 718 "gpio128", "gpio129", "gpio130", "gpio131", 719 "gpio132", "gpio133", "gpio134", "gpio135", 720 "gpio136", "gpio137", "gpio138", "gpio139", 721 "gpio140", "gpio141", "gpio142", "gpio143", 722 "gpio144", "gpio145", "gpio146", "gpio147", 723 "gpio148", "gpio149", "gpio150", "gpio151", 724 "gpio152", "gpio153", "gpio154", "gpio155", 725 "gpio156", "gpio157", "gpio158", "gpio159", 726 "gpio160", "gpio161", "gpio162", "gpio163", 727 "gpio164", "gpio165", "gpio166", "gpio167", 728 "gpio168", "gpio169", "gpio170", "gpio171", 729 "gpio172", "gpio173", "gpio174", "gpio175", 730 "gpio176", "gpio177", "gpio178", "gpio179", 731 "gpio180", "gpio181", "gpio182", "gpio183", 732 "gpio184", "gpio185", "gpio186", "gpio187", 733 "gpio188", "gpio189", "gpio190", "gpio191", 734 "gpio192", "gpio193", "gpio194", "gpio195", 735 "gpio196", "gpio197", "gpio198", "gpio199", 736 "gpio200", "gpio201", "gpio202", "gpio203", 737 "gpio204", "gpio205", "gpio206", "gpio207", 738 "gpio208", "gpio209", 739 }; 740 741 static const char * const egpio_groups[] = { 742 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", 743 "gpio6", "gpio7", "gpio165", "gpio166", "gpio167", "gpio168", 744 "gpio169", "gpio170", "gpio171", "gpio172", "gpio173", "gpio174", 745 "gpio175", "gpio176", "gpio177", "gpio178", "gpio179", "gpio180", 746 "gpio181", "gpio182", "gpio183", "gpio184", "gpio185", "gpio186", 747 "gpio187", "gpio188", "gpio189", "gpio190", "gpio191", "gpio192", 748 "gpio193", "gpio194", "gpio195", "gpio196", "gpio197", "gpio198", 749 "gpio199", "gpio200", "gpio201", "gpio202", "gpio203", "gpio204", 750 "gpio205", "gpio206", "gpio207", "gpio208", "gpio209", 751 }; 752 753 static const char * const aoss_cti_groups[] = { 754 "gpio50", "gpio51", "gpio60", "gpio61", 755 }; 756 757 static const char *const atest_char_groups[] = { 758 "gpio130", "gpio131", "gpio132", "gpio133", 759 "gpio137", 760 }; 761 762 static const char *const atest_usb_groups[] = { 763 "gpio71", "gpio72", "gpio74", "gpio130", 764 "gpio131", 765 }; 766 767 static const char *const audio_ext_mclk0_groups[] = { 768 "gpio125", 769 }; 770 771 static const char *const audio_ext_mclk1_groups[] = { 772 "gpio124", 773 }; 774 775 static const char *const audio_ref_clk_groups[] = { 776 "gpio124", 777 }; 778 779 static const char *const cam_aon_mclk2_groups[] = { 780 "gpio102", 781 }; 782 783 static const char *const cam_aon_mclk4_groups[] = { 784 "gpio104", 785 }; 786 787 static const char *const cam_mclk_groups[] = { 788 "gpio100", "gpio101", "gpio103", "gpio105", 789 "gpio106", "gpio108", 790 }; 791 792 static const char *const cci_async_in_groups[] = { 793 "gpio15", "gpio163", "gpio164", 794 }; 795 796 static const char *const cci_i2c_scl_groups[] = { 797 "gpio13", "gpio114", "gpio116", "gpio118", 798 "gpio120", "gpio153", 799 }; 800 801 static const char *const cci_i2c_sda_groups[] = { 802 "gpio12", "gpio112", "gpio113", "gpio115", 803 "gpio117", "gpio119", 804 }; 805 806 static const char *const cci_timer_groups[] = { 807 "gpio10", "gpio11", "gpio109", "gpio110", 808 "gpio111", 809 }; 810 811 static const char *const cmu_rng_groups[] = { 812 "gpio95", "gpio96", "gpio112", "gpio127", 813 "gpio122", "gpio128", 814 }; 815 816 static const char *const coex_uart1_rx_groups[] = { 817 "gpio148", 818 }; 819 820 static const char *const coex_uart1_tx_groups[] = { 821 "gpio149", 822 }; 823 824 static const char *const coex_uart2_rx_groups[] = { 825 "gpio150", 826 }; 827 828 static const char *const coex_uart2_tx_groups[] = { 829 "gpio151", 830 }; 831 832 static const char *const cri_trng_groups[] = { 833 "gpio187", 834 }; 835 836 static const char *const dbg_out_clk_groups[] = { 837 "gpio92", 838 }; 839 840 static const char *const ddr_bist_complete_groups[] = { 841 "gpio44", 842 }; 843 844 static const char *const ddr_bist_fail_groups[] = { 845 "gpio40", 846 }; 847 848 static const char *const ddr_bist_start_groups[] = { 849 "gpio41", 850 }; 851 852 static const char *const ddr_bist_stop_groups[] = { 853 "gpio45", 854 }; 855 856 static const char *const ddr_pxi0_groups[] = { 857 "gpio75", "gpio76", 858 }; 859 860 static const char *const ddr_pxi1_groups[] = { 861 "gpio44", "gpio45", 862 }; 863 864 static const char *const ddr_pxi2_groups[] = { 865 "gpio51", "gpio62", 866 }; 867 868 static const char *const ddr_pxi3_groups[] = { 869 "gpio46", "gpio47", 870 }; 871 872 static const char *const do_not_groups[] = { 873 "gpio36", "gpio37", "gpio38", "gpio39", 874 "gpio134", "gpio135", "gpio136", 875 }; 876 877 static const char *const dp_hot_groups[] = { 878 "gpio47", 879 }; 880 881 static const char *const gcc_gp1_groups[] = { 882 "gpio86", "gpio134", 883 }; 884 885 static const char *const gcc_gp2_groups[] = { 886 "gpio87", "gpio135", 887 }; 888 889 static const char *const gcc_gp3_groups[] = { 890 "gpio88", "gpio136", 891 }; 892 893 static const char *const gnss_adc0_groups[] = { 894 "gpio89", "gpio91", 895 }; 896 897 static const char *const gnss_adc1_groups[] = { 898 "gpio90", "gpio92", 899 }; 900 901 static const char *const i2chub0_se0_groups[] = { 902 "gpio64", "gpio65", 903 }; 904 905 static const char *const i2chub0_se1_groups[] = { 906 "gpio66", "gpio67", 907 }; 908 909 static const char *const i2chub0_se2_groups[] = { 910 "gpio68", "gpio69", 911 }; 912 913 static const char *const i2chub0_se3_groups[] = { 914 "gpio70", "gpio71", 915 }; 916 917 static const char *const i2chub0_se4_groups[] = { 918 "gpio72", "gpio73", 919 }; 920 921 static const char *const i2chub0_se5_groups[] = { 922 "gpio74", "gpio75", 923 }; 924 925 static const char *const i2chub0_se6_groups[] = { 926 "gpio76", "gpio77", 927 }; 928 929 static const char *const i2chub0_se7_groups[] = { 930 "gpio78", "gpio79", 931 }; 932 933 static const char *const i2chub0_se8_groups[] = { 934 "gpio206", "gpio207", 935 }; 936 937 static const char *const i2chub0_se9_groups[] = { 938 "gpio80", "gpio81", 939 }; 940 941 static const char *const i2s0_data0_groups[] = { 942 "gpio127", 943 }; 944 945 static const char *const i2s0_data1_groups[] = { 946 "gpio128", 947 }; 948 949 static const char *const i2s0_sck_groups[] = { 950 "gpio126", 951 }; 952 953 static const char *const i2s0_ws_groups[] = { 954 "gpio129", 955 }; 956 957 static const char *const i2s1_data0_groups[] = { 958 "gpio122", 959 }; 960 961 static const char *const i2s1_data1_groups[] = { 962 "gpio124", 963 }; 964 965 static const char *const i2s1_sck_groups[] = { 966 "gpio121", 967 }; 968 969 static const char *const i2s1_ws_groups[] = { 970 "gpio123", 971 }; 972 973 static const char *const ibi_i3c_groups[] = { 974 "gpio0", "gpio1", "gpio4", "gpio5", 975 "gpio8", "gpio9", "gpio12", "gpio13", 976 "gpio32", "gpio33", "gpio36", "gpio37", 977 "gpio48", "gpio49", "gpio56", "gpio57", 978 }; 979 980 static const char *const jitter_bist_groups[] = { 981 "gpio73", 982 }; 983 984 static const char *const mdp_vsync_groups[] = { 985 "gpio86", "gpio87", "gpio133", "gpio137", 986 }; 987 988 static const char *const mdp_vsync0_out_groups[] = { 989 "gpio86", 990 }; 991 992 static const char *const mdp_vsync1_out_groups[] = { 993 "gpio86", 994 }; 995 996 static const char *const mdp_vsync2_out_groups[] = { 997 "gpio87", 998 }; 999 1000 static const char *const mdp_vsync3_out_groups[] = { 1001 "gpio87", 1002 }; 1003 1004 static const char *const mdp_vsync_e_groups[] = { 1005 "gpio88", 1006 }; 1007 1008 static const char *const nav_gpio0_groups[] = { 1009 "gpio154", 1010 }; 1011 1012 static const char *const nav_gpio1_groups[] = { 1013 "gpio155", 1014 }; 1015 1016 static const char *const nav_gpio2_groups[] = { 1017 "gpio152", 1018 }; 1019 1020 static const char *const nav_gpio3_groups[] = { 1021 "gpio154", 1022 }; 1023 1024 static const char *const pcie0_clk_req_n_groups[] = { 1025 "gpio95", 1026 }; 1027 1028 static const char *const pcie1_clk_req_n_groups[] = { 1029 "gpio98", 1030 }; 1031 1032 static const char *const phase_flag_groups[] = { 1033 "gpio0", "gpio1", "gpio3", "gpio4", 1034 "gpio5", "gpio7", "gpio8", "gpio9", 1035 "gpio11", "gpio12", "gpio13", "gpio15", 1036 "gpio16", "gpio17", "gpio19", "gpio94", 1037 "gpio95", "gpio96", "gpio109", "gpio111", 1038 "gpio112", "gpio113", "gpio114", "gpio115", 1039 "gpio116", "gpio117", "gpio118", "gpio119", 1040 "gpio120", "gpio153", "gpio163", "gpio164", 1041 }; 1042 1043 static const char *const pll_bist_sync_groups[] = { 1044 "gpio68", 1045 }; 1046 1047 static const char *const pll_clk_aux_groups[] = { 1048 "gpio106", 1049 }; 1050 1051 static const char *const prng_rosc0_groups[] = { 1052 "gpio186", 1053 }; 1054 1055 static const char *const prng_rosc1_groups[] = { 1056 "gpio183", 1057 }; 1058 1059 static const char *const prng_rosc2_groups[] = { 1060 "gpio182", 1061 }; 1062 1063 static const char *const prng_rosc3_groups[] = { 1064 "gpio181", 1065 }; 1066 1067 static const char *const qdss_cti_groups[] = { 1068 "gpio27", "gpio31", "gpio78", "gpio79", 1069 "gpio82", "gpio83", "gpio159", "gpio162", 1070 }; 1071 1072 static const char *const qdss_gpio_groups[] = { 1073 "gpio3", "gpio7", "gpio8", "gpio13", 1074 "gpio15", "gpio100", "gpio101", "gpio102", 1075 "gpio103", "gpio104", "gpio105", "gpio113", 1076 "gpio114", "gpio115", "gpio116", "gpio117", 1077 "gpio118", "gpio140", "gpio141", "gpio142", 1078 "gpio143", "gpio144", "gpio145", "gpio146", 1079 "gpio147", "gpio148", "gpio149", "gpio150", 1080 "gpio151", "gpio152", "gpio153", "gpio154", 1081 "gpio155", "gpio156", "gpio157", "gpio158", 1082 }; 1083 1084 static const char *const qlink_big_enable_groups[] = { 1085 "gpio160", 1086 }; 1087 1088 static const char *const qlink_big_request_groups[] = { 1089 "gpio159", 1090 }; 1091 1092 static const char *const qlink_little_enable_groups[] = { 1093 "gpio157", 1094 }; 1095 1096 static const char *const qlink_little_request_groups[] = { 1097 "gpio156", 1098 }; 1099 1100 static const char *const qlink_wmss_groups[] = { 1101 "gpio158", 1102 }; 1103 1104 static const char *const qspi0_groups[] = { 1105 "gpio134", 1106 }; 1107 1108 static const char *const qspi1_groups[] = { 1109 "gpio136", 1110 }; 1111 1112 static const char *const qspi2_groups[] = { 1113 "gpio56", 1114 }; 1115 1116 static const char *const qspi3_groups[] = { 1117 "gpio57", 1118 }; 1119 1120 static const char *const qspi_clk_groups[] = { 1121 "gpio135", 1122 }; 1123 1124 static const char *const qspi_cs_groups[] = { 1125 "gpio58", "gpio59", 1126 }; 1127 1128 static const char *const qup1_se0_groups[] = { 1129 "gpio32", "gpio33", "gpio34", "gpio35", 1130 }; 1131 1132 static const char *const qup1_se1_groups[] = { 1133 "gpio36", "gpio37", "gpio38", "gpio39", 1134 }; 1135 1136 static const char *const qup1_se2_groups[] = { 1137 "gpio40", "gpio41", "gpio42", "gpio43", 1138 "gpio44", "gpio45", "gpio46", 1139 }; 1140 1141 static const char *const qup1_se3_groups[] = { 1142 "gpio44", "gpio45", "gpio46", "gpio47", 1143 }; 1144 1145 static const char *const qup1_se4_groups[] = { 1146 "gpio48", "gpio49", "gpio50", "gpio51", 1147 }; 1148 1149 static const char *const qup1_se5_groups[] = { 1150 "gpio52", "gpio53", "gpio54", "gpio55", 1151 }; 1152 1153 static const char *const qup1_se6_groups[] = { 1154 "gpio56", "gpio57", "gpio58", "gpio59", 1155 }; 1156 1157 static const char *const qup1_se7_groups[] = { 1158 "gpio60", "gpio61", "gpio62", "gpio63", 1159 }; 1160 1161 static const char *const qup2_se0_groups[] = { 1162 "gpio0", "gpio1", "gpio2", "gpio3", 1163 }; 1164 1165 static const char *const qup2_se1_groups[] = { 1166 "gpio4", "gpio5", "gpio6", "gpio7", 1167 }; 1168 1169 static const char *const qup2_se2_groups[] = { 1170 "gpio8", "gpio9", "gpio10", "gpio11", 1171 "gpio13", "gpio15", "gpio12", 1172 }; 1173 1174 static const char *const qup2_se3_groups[] = { 1175 "gpio12", "gpio13", "gpio14", "gpio15", 1176 }; 1177 1178 static const char *const qup2_se4_groups[] = { 1179 "gpio16", "gpio17", "gpio18", "gpio19", 1180 }; 1181 1182 static const char *const qup2_se5_groups[] = { 1183 "gpio20", "gpio21", "gpio22", "gpio23", 1184 "gpio23", 1185 }; 1186 1187 static const char *const qup2_se6_groups[] = { 1188 "gpio24", "gpio25", "gpio26", "gpio27", 1189 }; 1190 1191 static const char *const qup2_se7_groups[] = { 1192 "gpio28", "gpio29", "gpio30", "gpio31", 1193 }; 1194 1195 static const char *const sd_write_protect_groups[] = { 1196 "gpio93", 1197 }; 1198 1199 static const char *const sdc40_groups[] = { 1200 "gpio134", 1201 }; 1202 1203 static const char *const sdc41_groups[] = { 1204 "gpio136", 1205 }; 1206 1207 static const char *const sdc42_groups[] = { 1208 "gpio56", 1209 }; 1210 1211 static const char *const sdc43_groups[] = { 1212 "gpio57", 1213 }; 1214 1215 static const char *const sdc4_clk_groups[] = { 1216 "gpio135", 1217 }; 1218 1219 static const char *const sdc4_cmd_groups[] = { 1220 "gpio59", 1221 }; 1222 1223 static const char *const tb_trig_sdc2_groups[] = { 1224 "gpio8", 1225 }; 1226 1227 static const char *const tb_trig_sdc4_groups[] = { 1228 "gpio58", 1229 }; 1230 1231 static const char *const tgu_ch0_trigout_groups[] = { 1232 "gpio8", 1233 }; 1234 1235 static const char *const tgu_ch1_trigout_groups[] = { 1236 "gpio9", 1237 }; 1238 1239 static const char *const tgu_ch2_trigout_groups[] = { 1240 "gpio10", 1241 }; 1242 1243 static const char *const tgu_ch3_trigout_groups[] = { 1244 "gpio11", 1245 }; 1246 1247 static const char *const tmess_prng0_groups[] = { 1248 "gpio94", 1249 }; 1250 1251 static const char *const tmess_prng1_groups[] = { 1252 "gpio95", 1253 }; 1254 1255 static const char *const tmess_prng2_groups[] = { 1256 "gpio96", 1257 }; 1258 1259 static const char *const tmess_prng3_groups[] = { 1260 "gpio109", 1261 }; 1262 1263 static const char *const tsense_pwm1_groups[] = { 1264 "gpio58", 1265 }; 1266 1267 static const char *const tsense_pwm2_groups[] = { 1268 "gpio58", 1269 }; 1270 1271 static const char *const tsense_pwm3_groups[] = { 1272 "gpio58", 1273 }; 1274 1275 static const char *const uim0_clk_groups[] = { 1276 "gpio131", 1277 }; 1278 1279 static const char *const uim0_data_groups[] = { 1280 "gpio130", 1281 }; 1282 1283 static const char *const uim0_present_groups[] = { 1284 "gpio47", 1285 }; 1286 1287 static const char *const uim0_reset_groups[] = { 1288 "gpio132", 1289 }; 1290 1291 static const char *const uim1_clk_groups[] = { 1292 "gpio135", 1293 }; 1294 1295 static const char *const uim1_data_groups[] = { 1296 "gpio134", 1297 }; 1298 1299 static const char *const uim1_present_groups[] = { 1300 "gpio76", 1301 }; 1302 1303 static const char *const uim1_reset_groups[] = { 1304 "gpio136", 1305 }; 1306 1307 static const char *const usb1_hs_groups[] = { 1308 "gpio89", 1309 }; 1310 1311 static const char *const usb_phy_groups[] = { 1312 "gpio29", "gpio54", 1313 }; 1314 1315 static const char *const vfr_0_groups[] = { 1316 "gpio150", 1317 }; 1318 1319 static const char *const vfr_1_groups[] = { 1320 "gpio155", 1321 }; 1322 1323 static const char *const vsense_trigger_mirnat_groups[] = { 1324 "gpio60", 1325 }; 1326 1327 static const struct pinfunction sm8650_functions[] = { 1328 MSM_GPIO_PIN_FUNCTION(gpio), 1329 MSM_PIN_FUNCTION(aoss_cti), 1330 MSM_PIN_FUNCTION(atest_char), 1331 MSM_PIN_FUNCTION(atest_usb), 1332 MSM_PIN_FUNCTION(audio_ext_mclk0), 1333 MSM_PIN_FUNCTION(audio_ext_mclk1), 1334 MSM_PIN_FUNCTION(audio_ref_clk), 1335 MSM_PIN_FUNCTION(cam_aon_mclk2), 1336 MSM_PIN_FUNCTION(cam_aon_mclk4), 1337 MSM_PIN_FUNCTION(cam_mclk), 1338 MSM_PIN_FUNCTION(cci_async_in), 1339 MSM_PIN_FUNCTION(cci_i2c_scl), 1340 MSM_PIN_FUNCTION(cci_i2c_sda), 1341 MSM_PIN_FUNCTION(cci_timer), 1342 MSM_PIN_FUNCTION(cmu_rng), 1343 MSM_PIN_FUNCTION(coex_uart1_rx), 1344 MSM_PIN_FUNCTION(coex_uart1_tx), 1345 MSM_PIN_FUNCTION(coex_uart2_rx), 1346 MSM_PIN_FUNCTION(coex_uart2_tx), 1347 MSM_PIN_FUNCTION(cri_trng), 1348 MSM_PIN_FUNCTION(dbg_out_clk), 1349 MSM_PIN_FUNCTION(ddr_bist_complete), 1350 MSM_PIN_FUNCTION(ddr_bist_fail), 1351 MSM_PIN_FUNCTION(ddr_bist_start), 1352 MSM_PIN_FUNCTION(ddr_bist_stop), 1353 MSM_PIN_FUNCTION(ddr_pxi0), 1354 MSM_PIN_FUNCTION(ddr_pxi1), 1355 MSM_PIN_FUNCTION(ddr_pxi2), 1356 MSM_PIN_FUNCTION(ddr_pxi3), 1357 MSM_PIN_FUNCTION(do_not), 1358 MSM_PIN_FUNCTION(dp_hot), 1359 MSM_GPIO_PIN_FUNCTION(egpio), 1360 MSM_PIN_FUNCTION(gcc_gp1), 1361 MSM_PIN_FUNCTION(gcc_gp2), 1362 MSM_PIN_FUNCTION(gcc_gp3), 1363 MSM_PIN_FUNCTION(gnss_adc0), 1364 MSM_PIN_FUNCTION(gnss_adc1), 1365 MSM_PIN_FUNCTION(i2chub0_se0), 1366 MSM_PIN_FUNCTION(i2chub0_se1), 1367 MSM_PIN_FUNCTION(i2chub0_se2), 1368 MSM_PIN_FUNCTION(i2chub0_se3), 1369 MSM_PIN_FUNCTION(i2chub0_se4), 1370 MSM_PIN_FUNCTION(i2chub0_se5), 1371 MSM_PIN_FUNCTION(i2chub0_se6), 1372 MSM_PIN_FUNCTION(i2chub0_se7), 1373 MSM_PIN_FUNCTION(i2chub0_se8), 1374 MSM_PIN_FUNCTION(i2chub0_se9), 1375 MSM_PIN_FUNCTION(i2s0_data0), 1376 MSM_PIN_FUNCTION(i2s0_data1), 1377 MSM_PIN_FUNCTION(i2s0_sck), 1378 MSM_PIN_FUNCTION(i2s0_ws), 1379 MSM_PIN_FUNCTION(i2s1_data0), 1380 MSM_PIN_FUNCTION(i2s1_data1), 1381 MSM_PIN_FUNCTION(i2s1_sck), 1382 MSM_PIN_FUNCTION(i2s1_ws), 1383 MSM_PIN_FUNCTION(ibi_i3c), 1384 MSM_PIN_FUNCTION(jitter_bist), 1385 MSM_PIN_FUNCTION(mdp_vsync), 1386 MSM_PIN_FUNCTION(mdp_vsync0_out), 1387 MSM_PIN_FUNCTION(mdp_vsync1_out), 1388 MSM_PIN_FUNCTION(mdp_vsync2_out), 1389 MSM_PIN_FUNCTION(mdp_vsync3_out), 1390 MSM_PIN_FUNCTION(mdp_vsync_e), 1391 MSM_PIN_FUNCTION(nav_gpio0), 1392 MSM_PIN_FUNCTION(nav_gpio1), 1393 MSM_PIN_FUNCTION(nav_gpio2), 1394 MSM_PIN_FUNCTION(nav_gpio3), 1395 MSM_PIN_FUNCTION(pcie0_clk_req_n), 1396 MSM_PIN_FUNCTION(pcie1_clk_req_n), 1397 MSM_PIN_FUNCTION(phase_flag), 1398 MSM_PIN_FUNCTION(pll_bist_sync), 1399 MSM_PIN_FUNCTION(pll_clk_aux), 1400 MSM_PIN_FUNCTION(prng_rosc0), 1401 MSM_PIN_FUNCTION(prng_rosc1), 1402 MSM_PIN_FUNCTION(prng_rosc2), 1403 MSM_PIN_FUNCTION(prng_rosc3), 1404 MSM_PIN_FUNCTION(qdss_cti), 1405 MSM_PIN_FUNCTION(qdss_gpio), 1406 MSM_PIN_FUNCTION(qlink_big_enable), 1407 MSM_PIN_FUNCTION(qlink_big_request), 1408 MSM_PIN_FUNCTION(qlink_little_enable), 1409 MSM_PIN_FUNCTION(qlink_little_request), 1410 MSM_PIN_FUNCTION(qlink_wmss), 1411 MSM_PIN_FUNCTION(qspi0), 1412 MSM_PIN_FUNCTION(qspi1), 1413 MSM_PIN_FUNCTION(qspi2), 1414 MSM_PIN_FUNCTION(qspi3), 1415 MSM_PIN_FUNCTION(qspi_clk), 1416 MSM_PIN_FUNCTION(qspi_cs), 1417 MSM_PIN_FUNCTION(qup1_se0), 1418 MSM_PIN_FUNCTION(qup1_se1), 1419 MSM_PIN_FUNCTION(qup1_se2), 1420 MSM_PIN_FUNCTION(qup1_se3), 1421 MSM_PIN_FUNCTION(qup1_se4), 1422 MSM_PIN_FUNCTION(qup1_se5), 1423 MSM_PIN_FUNCTION(qup1_se6), 1424 MSM_PIN_FUNCTION(qup1_se7), 1425 MSM_PIN_FUNCTION(qup2_se0), 1426 MSM_PIN_FUNCTION(qup2_se1), 1427 MSM_PIN_FUNCTION(qup2_se2), 1428 MSM_PIN_FUNCTION(qup2_se3), 1429 MSM_PIN_FUNCTION(qup2_se4), 1430 MSM_PIN_FUNCTION(qup2_se5), 1431 MSM_PIN_FUNCTION(qup2_se6), 1432 MSM_PIN_FUNCTION(qup2_se7), 1433 MSM_PIN_FUNCTION(sd_write_protect), 1434 MSM_PIN_FUNCTION(sdc40), 1435 MSM_PIN_FUNCTION(sdc41), 1436 MSM_PIN_FUNCTION(sdc42), 1437 MSM_PIN_FUNCTION(sdc43), 1438 MSM_PIN_FUNCTION(sdc4_clk), 1439 MSM_PIN_FUNCTION(sdc4_cmd), 1440 MSM_PIN_FUNCTION(tb_trig_sdc2), 1441 MSM_PIN_FUNCTION(tb_trig_sdc4), 1442 MSM_PIN_FUNCTION(tgu_ch0_trigout), 1443 MSM_PIN_FUNCTION(tgu_ch1_trigout), 1444 MSM_PIN_FUNCTION(tgu_ch2_trigout), 1445 MSM_PIN_FUNCTION(tgu_ch3_trigout), 1446 MSM_PIN_FUNCTION(tmess_prng0), 1447 MSM_PIN_FUNCTION(tmess_prng1), 1448 MSM_PIN_FUNCTION(tmess_prng2), 1449 MSM_PIN_FUNCTION(tmess_prng3), 1450 MSM_PIN_FUNCTION(tsense_pwm1), 1451 MSM_PIN_FUNCTION(tsense_pwm2), 1452 MSM_PIN_FUNCTION(tsense_pwm3), 1453 MSM_PIN_FUNCTION(uim0_clk), 1454 MSM_PIN_FUNCTION(uim0_data), 1455 MSM_PIN_FUNCTION(uim0_present), 1456 MSM_PIN_FUNCTION(uim0_reset), 1457 MSM_PIN_FUNCTION(uim1_clk), 1458 MSM_PIN_FUNCTION(uim1_data), 1459 MSM_PIN_FUNCTION(uim1_present), 1460 MSM_PIN_FUNCTION(uim1_reset), 1461 MSM_PIN_FUNCTION(usb1_hs), 1462 MSM_PIN_FUNCTION(usb_phy), 1463 MSM_PIN_FUNCTION(vfr_0), 1464 MSM_PIN_FUNCTION(vfr_1), 1465 MSM_PIN_FUNCTION(vsense_trigger_mirnat), 1466 }; 1467 1468 /* 1469 * Every pin is maintained as a single group, and missing or non-existing pin 1470 * would be maintained as dummy group to synchronize pin group index with 1471 * pin descriptor registered with pinctrl core. 1472 * Clients would not be able to request these dummy pin groups. 1473 */ 1474 static const struct msm_pingroup sm8650_groups[] = { 1475 [0] = PINGROUP(0, qup2_se0, ibi_i3c, phase_flag, _, _, _, _, _, _, egpio), 1476 [1] = PINGROUP(1, qup2_se0, ibi_i3c, phase_flag, _, _, _, _, _, _, egpio), 1477 [2] = PINGROUP(2, qup2_se0, _, _, _, _, _, _, _, _, egpio), 1478 [3] = PINGROUP(3, qup2_se0, phase_flag, _, qdss_gpio, _, _, _, _, _, egpio), 1479 [4] = PINGROUP(4, qup2_se1, ibi_i3c, phase_flag, _, _, _, _, _, _, egpio), 1480 [5] = PINGROUP(5, qup2_se1, ibi_i3c, phase_flag, _, _, _, _, _, _, egpio), 1481 [6] = PINGROUP(6, qup2_se1, _, _, _, _, _, _, _, _, egpio), 1482 [7] = PINGROUP(7, qup2_se1, phase_flag, _, qdss_gpio, _, _, _, _, _, egpio), 1483 [8] = PINGROUP(8, qup2_se2, ibi_i3c, tb_trig_sdc2, phase_flag, tgu_ch0_trigout, _, qdss_gpio, _, _, _), 1484 [9] = PINGROUP(9, qup2_se2, ibi_i3c, phase_flag, tgu_ch1_trigout, _, _, _, _, _, _), 1485 [10] = PINGROUP(10, qup2_se2, cci_timer, tgu_ch2_trigout, _, _, _, _, _, _, _), 1486 [11] = PINGROUP(11, qup2_se2, cci_timer, phase_flag, tgu_ch3_trigout, _, _, _, _, _, _), 1487 [12] = PINGROUP(12, qup2_se3, cci_i2c_sda, ibi_i3c, qup2_se2, phase_flag, _, _, _, _, _), 1488 [13] = PINGROUP(13, qup2_se3, cci_i2c_scl, ibi_i3c, qup2_se2, phase_flag, _, qdss_gpio, _, _, _), 1489 [14] = PINGROUP(14, qup2_se3, _, _, _, _, _, _, _, _, _), 1490 [15] = PINGROUP(15, qup2_se3, cci_async_in, qup2_se2, phase_flag, _, qdss_gpio, _, _, _, _), 1491 [16] = PINGROUP(16, qup2_se4, phase_flag, _, _, _, _, _, _, _, _), 1492 [17] = PINGROUP(17, qup2_se4, phase_flag, _, _, _, _, _, _, _, _), 1493 [18] = PINGROUP(18, qup2_se4, _, _, _, _, _, _, _, _, _), 1494 [19] = PINGROUP(19, qup2_se4, phase_flag, _, _, _, _, _, _, _, _), 1495 [20] = PINGROUP(20, qup2_se5, _, _, _, _, _, _, _, _, _), 1496 [21] = PINGROUP(21, qup2_se5, _, _, _, _, _, _, _, _, _), 1497 [22] = PINGROUP(22, qup2_se5, _, _, _, _, _, _, _, _, _), 1498 [23] = PINGROUP(23, qup2_se5, qup2_se5, _, _, _, _, _, _, _, _), 1499 [24] = PINGROUP(24, qup2_se6, _, _, _, _, _, _, _, _, _), 1500 [25] = PINGROUP(25, qup2_se6, _, _, _, _, _, _, _, _, _), 1501 [26] = PINGROUP(26, qup2_se6, _, _, _, _, _, _, _, _, _), 1502 [27] = PINGROUP(27, qup2_se6, qdss_cti, _, _, _, _, _, _, _, _), 1503 [28] = PINGROUP(28, qup2_se7, _, _, _, _, _, _, _, _, _), 1504 [29] = PINGROUP(29, qup2_se7, usb_phy, _, _, _, _, _, _, _, _), 1505 [30] = PINGROUP(30, qup2_se7, _, _, _, _, _, _, _, _, _), 1506 [31] = PINGROUP(31, qup2_se7, qdss_cti, _, _, _, _, _, _, _, _), 1507 [32] = PINGROUP(32, qup1_se0, ibi_i3c, _, _, _, _, _, _, _, _), 1508 [33] = PINGROUP(33, qup1_se0, ibi_i3c, _, _, _, _, _, _, _, _), 1509 [34] = PINGROUP(34, qup1_se0, _, _, _, _, _, _, _, _, _), 1510 [35] = PINGROUP(35, qup1_se0, _, _, _, _, _, _, _, _, _), 1511 [36] = PINGROUP(36, qup1_se1, do_not, ibi_i3c, _, _, _, _, _, _, _), 1512 [37] = PINGROUP(37, qup1_se1, do_not, ibi_i3c, _, _, _, _, _, _, _), 1513 [38] = PINGROUP(38, qup1_se1, do_not, _, _, _, _, _, _, _, _), 1514 [39] = PINGROUP(39, qup1_se1, do_not, _, _, _, _, _, _, _, _), 1515 [40] = PINGROUP(40, qup1_se2, ddr_bist_fail, _, _, _, _, _, _, _, _), 1516 [41] = PINGROUP(41, qup1_se2, ddr_bist_start, _, _, _, _, _, _, _, _), 1517 [42] = PINGROUP(42, qup1_se2, _, _, _, _, _, _, _, _, _), 1518 [43] = PINGROUP(43, qup1_se2, _, _, _, _, _, _, _, _, _), 1519 [44] = PINGROUP(44, qup1_se3, qup1_se2, ddr_bist_complete, ddr_pxi1, _, _, _, _, _, _), 1520 [45] = PINGROUP(45, qup1_se3, qup1_se2, ddr_bist_stop, ddr_pxi1, _, _, _, _, _, _), 1521 [46] = PINGROUP(46, qup1_se3, qup1_se2, ddr_pxi3, _, _, _, _, _, _, _), 1522 [47] = PINGROUP(47, qup1_se3, uim0_present, dp_hot, ddr_pxi3, _, _, _, _, _, _), 1523 [48] = PINGROUP(48, qup1_se4, ibi_i3c, _, _, _, _, _, _, _, _), 1524 [49] = PINGROUP(49, qup1_se4, ibi_i3c, _, _, _, _, _, _, _, _), 1525 [50] = PINGROUP(50, qup1_se4, aoss_cti, _, _, _, _, _, _, _, _), 1526 [51] = PINGROUP(51, qup1_se4, aoss_cti, ddr_pxi2, _, _, _, _, _, _, _), 1527 [52] = PINGROUP(52, qup1_se5, _, _, _, _, _, _, _, _, _), 1528 [53] = PINGROUP(53, qup1_se5, _, _, _, _, _, _, _, _, _), 1529 [54] = PINGROUP(54, qup1_se5, usb_phy, _, _, _, _, _, _, _, _), 1530 [55] = PINGROUP(55, qup1_se5, _, _, _, _, _, _, _, _, _), 1531 [56] = PINGROUP(56, qup1_se6, ibi_i3c, qspi2, sdc42, _, _, _, _, _, _), 1532 [57] = PINGROUP(57, qup1_se6, ibi_i3c, qspi3, sdc43, _, _, _, _, _, _), 1533 [58] = PINGROUP(58, qup1_se6, qspi_cs, tb_trig_sdc4, tsense_pwm1, tsense_pwm2, tsense_pwm3, _, _, _, _), 1534 [59] = PINGROUP(59, qup1_se6, _, qspi_cs, sdc4_cmd, _, _, _, _, _, _), 1535 [60] = PINGROUP(60, qup1_se7, aoss_cti, vsense_trigger_mirnat, _, _, _, _, _, _, _), 1536 [61] = PINGROUP(61, qup1_se7, aoss_cti, _, _, _, _, _, _, _, _), 1537 [62] = PINGROUP(62, qup1_se7, ddr_pxi2, _, _, _, _, _, _, _, _), 1538 [63] = PINGROUP(63, qup1_se7, _, _, _, _, _, _, _, _, _), 1539 [64] = PINGROUP(64, i2chub0_se0, _, _, _, _, _, _, _, _, _), 1540 [65] = PINGROUP(65, i2chub0_se0, _, _, _, _, _, _, _, _, _), 1541 [66] = PINGROUP(66, i2chub0_se1, _, _, _, _, _, _, _, _, _), 1542 [67] = PINGROUP(67, i2chub0_se1, _, _, _, _, _, _, _, _, _), 1543 [68] = PINGROUP(68, i2chub0_se2, pll_bist_sync, _, _, _, _, _, _, _, _), 1544 [69] = PINGROUP(69, i2chub0_se2, _, _, _, _, _, _, _, _, _), 1545 [70] = PINGROUP(70, i2chub0_se3, _, _, _, _, _, _, _, _, _), 1546 [71] = PINGROUP(71, i2chub0_se3, _, atest_usb, _, _, _, _, _, _, _), 1547 [72] = PINGROUP(72, i2chub0_se4, _, atest_usb, _, _, _, _, _, _, _), 1548 [73] = PINGROUP(73, i2chub0_se4, jitter_bist, _, _, _, _, _, _, _, _), 1549 [74] = PINGROUP(74, i2chub0_se5, atest_usb, _, _, _, _, _, _, _, _), 1550 [75] = PINGROUP(75, i2chub0_se5, ddr_pxi0, _, _, _, _, _, _, _, _), 1551 [76] = PINGROUP(76, i2chub0_se6, ddr_pxi0, uim1_present, _, _, _, _, _, _, _), 1552 [77] = PINGROUP(77, i2chub0_se6, _, _, _, _, _, _, _, _, _), 1553 [78] = PINGROUP(78, i2chub0_se7, qdss_cti, _, _, _, _, _, _, _, _), 1554 [79] = PINGROUP(79, i2chub0_se7, qdss_cti, _, _, _, _, _, _, _, _), 1555 [80] = PINGROUP(80, i2chub0_se9, _, _, _, _, _, _, _, _, _), 1556 [81] = PINGROUP(81, i2chub0_se9, _, _, _, _, _, _, _, _, _), 1557 [82] = PINGROUP(82, qdss_cti, _, _, _, _, _, _, _, _, _), 1558 [83] = PINGROUP(83, qdss_cti, _, _, _, _, _, _, _, _, _), 1559 [84] = PINGROUP(84, _, _, _, _, _, _, _, _, _, _), 1560 [85] = PINGROUP(85, _, _, _, _, _, _, _, _, _, _), 1561 [86] = PINGROUP(86, mdp_vsync, mdp_vsync0_out, mdp_vsync1_out, gcc_gp1, _, _, _, _, _, _), 1562 [87] = PINGROUP(87, mdp_vsync, mdp_vsync2_out, mdp_vsync3_out, gcc_gp2, _, _, _, _, _, _), 1563 [88] = PINGROUP(88, mdp_vsync_e, gcc_gp3, _, _, _, _, _, _, _, _), 1564 [89] = PINGROUP(89, usb1_hs, gnss_adc0, _, _, _, _, _, _, _, _), 1565 [90] = PINGROUP(90, gnss_adc1, _, _, _, _, _, _, _, _, _), 1566 [91] = PINGROUP(91, _, gnss_adc0, _, _, _, _, _, _, _, _), 1567 [92] = PINGROUP(92, dbg_out_clk, gnss_adc1, _, _, _, _, _, _, _, _), 1568 [93] = PINGROUP(93, sd_write_protect, _, _, _, _, _, _, _, _, _), 1569 [94] = PINGROUP(94, cmu_rng, phase_flag, tmess_prng0, _, _, _, _, _, _, _), 1570 [95] = PINGROUP(95, pcie0_clk_req_n, cmu_rng, phase_flag, tmess_prng1, _, _, _, _, _, _), 1571 [96] = PINGROUP(96, cmu_rng, phase_flag, tmess_prng2, _, _, _, _, _, _, _), 1572 [97] = PINGROUP(97, _, _, _, _, _, _, _, _, _, _), 1573 [98] = PINGROUP(98, pcie1_clk_req_n, _, _, _, _, _, _, _, _, _), 1574 [99] = PINGROUP(99, _, _, _, _, _, _, _, _, _, _), 1575 [100] = PINGROUP(100, cam_mclk, qdss_gpio, _, _, _, _, _, _, _, _), 1576 [101] = PINGROUP(101, cam_mclk, qdss_gpio, _, _, _, _, _, _, _, _), 1577 [102] = PINGROUP(102, cam_aon_mclk2, qdss_gpio, _, _, _, _, _, _, _, _), 1578 [103] = PINGROUP(103, cam_mclk, qdss_gpio, _, _, _, _, _, _, _, _), 1579 [104] = PINGROUP(104, cam_aon_mclk4, qdss_gpio, _, _, _, _, _, _, _, _), 1580 [105] = PINGROUP(105, cam_mclk, qdss_gpio, _, _, _, _, _, _, _, _), 1581 [106] = PINGROUP(106, cam_mclk, pll_clk_aux, _, _, _, _, _, _, _, _), 1582 [107] = PINGROUP(107, _, _, _, _, _, _, _, _, _, _), 1583 [108] = PINGROUP(108, cam_mclk, _, _, _, _, _, _, _, _, _), 1584 [109] = PINGROUP(109, cci_timer, phase_flag, tmess_prng3, _, _, _, _, _, _, _), 1585 [110] = PINGROUP(110, cci_timer, _, _, _, _, _, _, _, _, _), 1586 [111] = PINGROUP(111, cci_timer, phase_flag, _, _, _, _, _, _, _, _), 1587 [112] = PINGROUP(112, cci_i2c_sda, cmu_rng, phase_flag, _, _, _, _, _, _, _), 1588 [113] = PINGROUP(113, cci_i2c_sda, phase_flag, _, qdss_gpio, _, _, _, _, _, _), 1589 [114] = PINGROUP(114, cci_i2c_scl, phase_flag, _, qdss_gpio, _, _, _, _, _, _), 1590 [115] = PINGROUP(115, cci_i2c_sda, phase_flag, _, qdss_gpio, _, _, _, _, _, _), 1591 [116] = PINGROUP(116, cci_i2c_scl, phase_flag, _, qdss_gpio, _, _, _, _, _, _), 1592 [117] = PINGROUP(117, cci_i2c_sda, phase_flag, _, qdss_gpio, _, _, _, _, _, _), 1593 [118] = PINGROUP(118, cci_i2c_scl, phase_flag, _, qdss_gpio, _, _, _, _, _, _), 1594 [119] = PINGROUP(119, cci_i2c_sda, phase_flag, _, _, _, _, _, _, _, _), 1595 [120] = PINGROUP(120, cci_i2c_scl, phase_flag, _, _, _, _, _, _, _, _), 1596 [121] = PINGROUP(121, i2s1_sck, _, _, _, _, _, _, _, _, _), 1597 [122] = PINGROUP(122, i2s1_data0, cmu_rng, _, _, _, _, _, _, _, _), 1598 [123] = PINGROUP(123, i2s1_ws, _, _, _, _, _, _, _, _, _), 1599 [124] = PINGROUP(124, i2s1_data1, audio_ext_mclk1, audio_ref_clk, _, _, _, _, _, _, _), 1600 [125] = PINGROUP(125, audio_ext_mclk0, _, _, _, _, _, _, _, _, _), 1601 [126] = PINGROUP(126, i2s0_sck, _, _, _, _, _, _, _, _, _), 1602 [127] = PINGROUP(127, i2s0_data0, cmu_rng, _, _, _, _, _, _, _, _), 1603 [128] = PINGROUP(128, i2s0_data1, cmu_rng, _, _, _, _, _, _, _, _), 1604 [129] = PINGROUP(129, i2s0_ws, cmu_rng, _, _, _, _, _, _, _, _), 1605 [130] = PINGROUP(130, uim0_data, atest_usb, atest_char, _, _, _, _, _, _, _), 1606 [131] = PINGROUP(131, uim0_clk, atest_usb, atest_char, _, _, _, _, _, _, _), 1607 [132] = PINGROUP(132, uim0_reset, atest_char, _, _, _, _, _, _, _, _), 1608 [133] = PINGROUP(133, mdp_vsync, atest_char, _, _, _, _, _, _, _, _), 1609 [134] = PINGROUP(134, uim1_data, do_not, qspi0, sdc40, gcc_gp1, _, _, _, _, _), 1610 [135] = PINGROUP(135, uim1_clk, do_not, qspi_clk, sdc4_clk, gcc_gp2, _, _, _, _, _), 1611 [136] = PINGROUP(136, uim1_reset, do_not, qspi1, sdc41, gcc_gp3, _, _, _, _, _), 1612 [137] = PINGROUP(137, mdp_vsync, atest_char, _, _, _, _, _, _, _, _), 1613 [138] = PINGROUP(138, _, _, _, _, _, _, _, _, _, _), 1614 [139] = PINGROUP(139, _, _, _, _, _, _, _, _, _, _), 1615 [140] = PINGROUP(140, _, _, qdss_gpio, _, _, _, _, _, _, _), 1616 [141] = PINGROUP(141, _, _, qdss_gpio, _, _, _, _, _, _, _), 1617 [142] = PINGROUP(142, _, _, qdss_gpio, _, _, _, _, _, _, _), 1618 [143] = PINGROUP(143, _, _, qdss_gpio, _, _, _, _, _, _, _), 1619 [144] = PINGROUP(144, _, qdss_gpio, _, _, _, _, _, _, _, _), 1620 [145] = PINGROUP(145, _, qdss_gpio, _, _, _, _, _, _, _, _), 1621 [146] = PINGROUP(146, _, qdss_gpio, _, _, _, _, _, _, _, _), 1622 [147] = PINGROUP(147, _, qdss_gpio, _, _, _, _, _, _, _, _), 1623 [148] = PINGROUP(148, coex_uart1_rx, qdss_gpio, _, _, _, _, _, _, _, _), 1624 [149] = PINGROUP(149, coex_uart1_tx, qdss_gpio, _, _, _, _, _, _, _, _), 1625 [150] = PINGROUP(150, _, vfr_0, coex_uart2_rx, qdss_gpio, _, _, _, _, _, _), 1626 [151] = PINGROUP(151, _, coex_uart2_tx, qdss_gpio, _, _, _, _, _, _, _), 1627 [152] = PINGROUP(152, nav_gpio2, _, qdss_gpio, _, _, _, _, _, _, _), 1628 [153] = PINGROUP(153, cci_i2c_scl, phase_flag, _, qdss_gpio, _, _, _, _, _, _), 1629 [154] = PINGROUP(154, nav_gpio0, nav_gpio3, qdss_gpio, _, _, _, _, _, _, _), 1630 [155] = PINGROUP(155, nav_gpio1, vfr_1, qdss_gpio, _, _, _, _, _, _, _), 1631 [156] = PINGROUP(156, qlink_little_request, qdss_gpio, _, _, _, _, _, _, _, _), 1632 [157] = PINGROUP(157, qlink_little_enable, qdss_gpio, _, _, _, _, _, _, _, _), 1633 [158] = PINGROUP(158, qlink_wmss, qdss_gpio, _, _, _, _, _, _, _, _), 1634 [159] = PINGROUP(159, qlink_big_request, qdss_cti, _, _, _, _, _, _, _, _), 1635 [160] = PINGROUP(160, qlink_big_enable, _, _, _, _, _, _, _, _, _), 1636 [161] = PINGROUP(161, _, _, _, _, _, _, _, _, _, _), 1637 [162] = PINGROUP(162, qdss_cti, _, _, _, _, _, _, _, _, _), 1638 [163] = PINGROUP(163, cci_async_in, phase_flag, _, _, _, _, _, _, _, _), 1639 [164] = PINGROUP(164, cci_async_in, phase_flag, _, _, _, _, _, _, _, _), 1640 [165] = PINGROUP(165, _, _, _, _, _, _, _, _, _, egpio), 1641 [166] = PINGROUP(166, _, _, _, _, _, _, _, _, _, egpio), 1642 [167] = PINGROUP(167, _, _, _, _, _, _, _, _, _, egpio), 1643 [168] = PINGROUP(168, _, _, _, _, _, _, _, _, _, egpio), 1644 [169] = PINGROUP(169, _, _, _, _, _, _, _, _, _, egpio), 1645 [170] = PINGROUP(170, _, _, _, _, _, _, _, _, _, egpio), 1646 [171] = PINGROUP(171, _, _, _, _, _, _, _, _, _, egpio), 1647 [172] = PINGROUP(172, _, _, _, _, _, _, _, _, _, egpio), 1648 [173] = PINGROUP(173, _, _, _, _, _, _, _, _, _, egpio), 1649 [174] = PINGROUP(174, _, _, _, _, _, _, _, _, _, egpio), 1650 [175] = PINGROUP(175, _, _, _, _, _, _, _, _, _, egpio), 1651 [176] = PINGROUP(176, _, _, _, _, _, _, _, _, _, egpio), 1652 [177] = PINGROUP(177, _, _, _, _, _, _, _, _, _, egpio), 1653 [178] = PINGROUP(178, _, _, _, _, _, _, _, _, _, egpio), 1654 [179] = PINGROUP(179, _, _, _, _, _, _, _, _, _, egpio), 1655 [180] = PINGROUP(180, _, _, _, _, _, _, _, _, _, egpio), 1656 [181] = PINGROUP(181, prng_rosc3, _, _, _, _, _, _, _, _, egpio), 1657 [182] = PINGROUP(182, prng_rosc2, _, _, _, _, _, _, _, _, egpio), 1658 [183] = PINGROUP(183, prng_rosc1, _, _, _, _, _, _, _, _, egpio), 1659 [184] = PINGROUP(184, _, _, _, _, _, _, _, _, _, egpio), 1660 [185] = PINGROUP(185, _, _, _, _, _, _, _, _, _, egpio), 1661 [186] = PINGROUP(186, prng_rosc0, _, _, _, _, _, _, _, _, egpio), 1662 [187] = PINGROUP(187, cri_trng, _, _, _, _, _, _, _, _, egpio), 1663 [188] = PINGROUP(188, _, _, _, _, _, _, _, _, _, egpio), 1664 [189] = PINGROUP(189, _, _, _, _, _, _, _, _, _, egpio), 1665 [190] = PINGROUP(190, _, _, _, _, _, _, _, _, _, egpio), 1666 [191] = PINGROUP(191, _, _, _, _, _, _, _, _, _, egpio), 1667 [192] = PINGROUP(192, _, _, _, _, _, _, _, _, _, egpio), 1668 [193] = PINGROUP(193, _, _, _, _, _, _, _, _, _, egpio), 1669 [194] = PINGROUP(194, _, _, _, _, _, _, _, _, _, egpio), 1670 [195] = PINGROUP(195, _, _, _, _, _, _, _, _, _, egpio), 1671 [196] = PINGROUP(196, _, _, _, _, _, _, _, _, _, egpio), 1672 [197] = PINGROUP(197, _, _, _, _, _, _, _, _, _, egpio), 1673 [198] = PINGROUP(198, _, _, _, _, _, _, _, _, _, egpio), 1674 [199] = PINGROUP(199, _, _, _, _, _, _, _, _, _, egpio), 1675 [200] = PINGROUP(200, _, _, _, _, _, _, _, _, _, egpio), 1676 [201] = PINGROUP(201, _, _, _, _, _, _, _, _, _, egpio), 1677 [202] = PINGROUP(202, _, _, _, _, _, _, _, _, _, egpio), 1678 [203] = PINGROUP(203, _, _, _, _, _, _, _, _, _, egpio), 1679 [204] = PINGROUP(204, _, _, _, _, _, _, _, _, _, egpio), 1680 [205] = PINGROUP(205, _, _, _, _, _, _, _, _, _, egpio), 1681 [206] = PINGROUP(206, i2chub0_se8, _, _, _, _, _, _, _, _, egpio), 1682 [207] = PINGROUP(207, i2chub0_se8, _, _, _, _, _, _, _, _, egpio), 1683 [208] = PINGROUP(208, _, _, _, _, _, _, _, _, _, egpio), 1684 [209] = PINGROUP(209, _, _, _, _, _, _, _, _, _, egpio), 1685 [210] = UFS_RESET(ufs_reset, 0xde004, 0xdf000), 1686 [211] = SDC_QDSD_PINGROUP(sdc2_clk, 0xd6000, 14, 6), 1687 [212] = SDC_QDSD_PINGROUP(sdc2_cmd, 0xd6000, 11, 3), 1688 [213] = SDC_QDSD_PINGROUP(sdc2_data, 0xd6000, 9, 0), 1689 }; 1690 1691 static const struct msm_gpio_wakeirq_map sm8650_pdc_map[] = { 1692 { 0, 94 }, { 3, 105 }, { 4, 78 }, { 7, 67 }, { 8, 64 }, 1693 { 11, 121 }, { 12, 71 }, { 15, 82 }, { 18, 75 }, { 19, 63 }, 1694 { 20, 114 }, { 23, 84 }, { 27, 61 }, { 29, 112 }, { 31, 113 }, 1695 { 32, 66 }, { 35, 52 }, { 36, 123 }, { 39, 56 }, { 43, 59 }, 1696 { 46, 79 }, { 47, 124 }, { 48, 125 }, { 51, 93 }, { 54, 60 }, 1697 { 55, 104 }, { 56, 72 }, { 57, 77 }, { 59, 51 }, { 63, 85 }, 1698 { 64, 107 }, { 65, 108 }, { 66, 109 }, { 67, 83 }, { 68, 110 }, 1699 { 69, 111 }, { 75, 96 }, { 76, 97 }, { 77, 98 }, { 80, 89 }, 1700 { 81, 90 }, { 84, 106 }, { 85, 100 }, { 86, 87 }, { 87, 88 }, 1701 { 88, 65 }, { 90, 92 }, { 92, 99 }, { 95, 118 }, { 96, 119 }, 1702 { 98, 101 }, { 99, 62 }, { 112, 120 }, { 133, 80 }, { 136, 69 }, 1703 { 137, 81 }, { 148, 57 }, { 150, 58 }, { 152, 127 }, { 153, 74 }, 1704 { 154, 126 }, { 155, 73 }, { 156, 128 }, { 159, 129 }, { 162, 86 }, 1705 { 163, 122 }, { 166, 139 }, { 169, 140 }, { 171, 141 }, { 172, 142 }, 1706 { 174, 102 }, { 176, 143 }, { 177, 55 }, { 181, 144 }, { 182, 145 }, 1707 { 185, 146 }, { 187, 95 }, { 188, 130 }, { 190, 131 }, { 191, 132 }, 1708 { 192, 133 }, { 193, 134 }, { 195, 68 }, { 196, 135 }, { 197, 136 }, 1709 { 198, 54 }, { 199, 103 }, { 200, 53 }, { 201, 137 }, { 202, 70 }, 1710 { 203, 138 }, { 204, 76 }, { 205, 91 }, 1711 }; 1712 1713 static const struct msm_pinctrl_soc_data sm8650_tlmm = { 1714 .pins = sm8650_pins, 1715 .npins = ARRAY_SIZE(sm8650_pins), 1716 .functions = sm8650_functions, 1717 .nfunctions = ARRAY_SIZE(sm8650_functions), 1718 .groups = sm8650_groups, 1719 .ngroups = ARRAY_SIZE(sm8650_groups), 1720 .ngpios = 211, 1721 .wakeirq_map = sm8650_pdc_map, 1722 .nwakeirq_map = ARRAY_SIZE(sm8650_pdc_map), 1723 .egpio_func = 10, 1724 }; 1725 1726 static int sm8650_tlmm_probe(struct platform_device *pdev) 1727 { 1728 return msm_pinctrl_probe(pdev, &sm8650_tlmm); 1729 } 1730 1731 static const struct of_device_id sm8650_tlmm_of_match[] = { 1732 { .compatible = "qcom,sm8650-tlmm", }, 1733 {}, 1734 }; 1735 MODULE_DEVICE_TABLE(of, sm8650_tlmm_of_match); 1736 1737 static struct platform_driver sm8650_tlmm_driver = { 1738 .driver = { 1739 .name = "sm8650-tlmm", 1740 .of_match_table = sm8650_tlmm_of_match, 1741 }, 1742 .probe = sm8650_tlmm_probe, 1743 }; 1744 1745 static int __init sm8650_tlmm_init(void) 1746 { 1747 return platform_driver_register(&sm8650_tlmm_driver); 1748 } 1749 arch_initcall(sm8650_tlmm_init); 1750 1751 static void __exit sm8650_tlmm_exit(void) 1752 { 1753 platform_driver_unregister(&sm8650_tlmm_driver); 1754 } 1755 module_exit(sm8650_tlmm_exit); 1756 1757 MODULE_DESCRIPTION("QTI SM8650 TLMM driver"); 1758 MODULE_LICENSE("GPL"); 1759