1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2022 Linaro Ltd. 4 */ 5 6 #include <linux/gpio/driver.h> 7 #include <linux/module.h> 8 #include <linux/platform_device.h> 9 10 #include "pinctrl-lpass-lpi.h" 11 12 enum lpass_lpi_functions { 13 LPI_MUX_dmic1_clk, 14 LPI_MUX_dmic1_data, 15 LPI_MUX_dmic2_clk, 16 LPI_MUX_dmic2_data, 17 LPI_MUX_dmic3_clk, 18 LPI_MUX_dmic3_data, 19 LPI_MUX_dmic4_clk, 20 LPI_MUX_dmic4_data, 21 LPI_MUX_i2s1_clk, 22 LPI_MUX_i2s1_data, 23 LPI_MUX_i2s1_ws, 24 LPI_MUX_i2s2_clk, 25 LPI_MUX_i2s2_data, 26 LPI_MUX_i2s2_ws, 27 LPI_MUX_i2s3_clk, 28 LPI_MUX_i2s3_data, 29 LPI_MUX_i2s3_ws, 30 LPI_MUX_i2s4_clk, 31 LPI_MUX_i2s4_data, 32 LPI_MUX_i2s4_ws, 33 LPI_MUX_qua_mi2s_data, 34 LPI_MUX_qua_mi2s_sclk, 35 LPI_MUX_qua_mi2s_ws, 36 LPI_MUX_swr_rx_clk, 37 LPI_MUX_swr_rx_data, 38 LPI_MUX_swr_tx_clk, 39 LPI_MUX_swr_tx_data, 40 LPI_MUX_wsa_swr_clk, 41 LPI_MUX_wsa_swr_data, 42 LPI_MUX_wsa2_swr_clk, 43 LPI_MUX_wsa2_swr_data, 44 LPI_MUX_slimbus_clk, 45 LPI_MUX_slimbus_data, 46 LPI_MUX_ext_mclk1_a, 47 LPI_MUX_ext_mclk1_b, 48 LPI_MUX_ext_mclk1_c, 49 LPI_MUX_ext_mclk1_d, 50 LPI_MUX_ext_mclk1_e, 51 LPI_MUX_gpio, 52 LPI_MUX__, 53 }; 54 55 static const struct pinctrl_pin_desc sm8450_lpi_pins[] = { 56 PINCTRL_PIN(0, "gpio0"), 57 PINCTRL_PIN(1, "gpio1"), 58 PINCTRL_PIN(2, "gpio2"), 59 PINCTRL_PIN(3, "gpio3"), 60 PINCTRL_PIN(4, "gpio4"), 61 PINCTRL_PIN(5, "gpio5"), 62 PINCTRL_PIN(6, "gpio6"), 63 PINCTRL_PIN(7, "gpio7"), 64 PINCTRL_PIN(8, "gpio8"), 65 PINCTRL_PIN(9, "gpio9"), 66 PINCTRL_PIN(10, "gpio10"), 67 PINCTRL_PIN(11, "gpio11"), 68 PINCTRL_PIN(12, "gpio12"), 69 PINCTRL_PIN(13, "gpio13"), 70 PINCTRL_PIN(14, "gpio14"), 71 PINCTRL_PIN(15, "gpio15"), 72 PINCTRL_PIN(16, "gpio16"), 73 PINCTRL_PIN(17, "gpio17"), 74 PINCTRL_PIN(18, "gpio18"), 75 PINCTRL_PIN(19, "gpio19"), 76 PINCTRL_PIN(20, "gpio20"), 77 PINCTRL_PIN(21, "gpio21"), 78 PINCTRL_PIN(22, "gpio22"), 79 }; 80 81 static const char * const swr_tx_clk_groups[] = { "gpio0" }; 82 static const char * const swr_tx_data_groups[] = { "gpio1", "gpio2", "gpio14" }; 83 static const char * const swr_rx_clk_groups[] = { "gpio3" }; 84 static const char * const swr_rx_data_groups[] = { "gpio4", "gpio5" }; 85 static const char * const dmic1_clk_groups[] = { "gpio6" }; 86 static const char * const dmic1_data_groups[] = { "gpio7" }; 87 static const char * const dmic2_clk_groups[] = { "gpio8" }; 88 static const char * const dmic2_data_groups[] = { "gpio9" }; 89 static const char * const dmic4_clk_groups[] = { "gpio17" }; 90 static const char * const dmic4_data_groups[] = { "gpio18" }; 91 static const char * const i2s2_clk_groups[] = { "gpio10" }; 92 static const char * const i2s2_ws_groups[] = { "gpio11" }; 93 static const char * const dmic3_clk_groups[] = { "gpio12" }; 94 static const char * const dmic3_data_groups[] = { "gpio13" }; 95 static const char * const qua_mi2s_sclk_groups[] = { "gpio0" }; 96 static const char * const qua_mi2s_ws_groups[] = { "gpio1" }; 97 static const char * const qua_mi2s_data_groups[] = { "gpio2", "gpio3", "gpio4", "gpio5" }; 98 static const char * const i2s1_clk_groups[] = { "gpio6" }; 99 static const char * const i2s1_ws_groups[] = { "gpio7" }; 100 static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" }; 101 static const char * const wsa_swr_clk_groups[] = { "gpio10" }; 102 static const char * const wsa_swr_data_groups[] = { "gpio11" }; 103 static const char * const wsa2_swr_clk_groups[] = { "gpio15" }; 104 static const char * const wsa2_swr_data_groups[] = { "gpio16" }; 105 static const char * const i2s2_data_groups[] = { "gpio15", "gpio16" }; 106 static const char * const i2s4_ws_groups[] = { "gpio13" }; 107 static const char * const i2s4_clk_groups[] = { "gpio12" }; 108 static const char * const i2s4_data_groups[] = { "gpio17", "gpio18" }; 109 static const char * const slimbus_clk_groups[] = { "gpio19"}; 110 static const char * const i2s3_clk_groups[] = { "gpio19"}; 111 static const char * const i2s3_ws_groups[] = { "gpio20"}; 112 static const char * const i2s3_data_groups[] = { "gpio21", "gpio22"}; 113 static const char * const slimbus_data_groups[] = { "gpio20"}; 114 static const char * const ext_mclk1_c_groups[] = { "gpio5" }; 115 static const char * const ext_mclk1_b_groups[] = { "gpio9" }; 116 static const char * const ext_mclk1_a_groups[] = { "gpio13" }; 117 static const char * const ext_mclk1_d_groups[] = { "gpio14" }; 118 static const char * const ext_mclk1_e_groups[] = { "gpio22" }; 119 120 static const struct lpi_pingroup sm8450_groups[] = { 121 LPI_PINGROUP(0, 0, swr_tx_clk, qua_mi2s_sclk, _, _), 122 LPI_PINGROUP(1, 2, swr_tx_data, qua_mi2s_ws, _, _), 123 LPI_PINGROUP(2, 4, swr_tx_data, qua_mi2s_data, _, _), 124 LPI_PINGROUP(3, 8, swr_rx_clk, qua_mi2s_data, _, _), 125 LPI_PINGROUP(4, 10, swr_rx_data, qua_mi2s_data, _, _), 126 LPI_PINGROUP(5, 12, swr_rx_data, ext_mclk1_c, qua_mi2s_data, _), 127 LPI_PINGROUP(6, LPI_NO_SLEW, dmic1_clk, i2s1_clk, _, _), 128 LPI_PINGROUP(7, LPI_NO_SLEW, dmic1_data, i2s1_ws, _, _), 129 LPI_PINGROUP(8, LPI_NO_SLEW, dmic2_clk, i2s1_data, _, _), 130 LPI_PINGROUP(9, LPI_NO_SLEW, dmic2_data, i2s1_data, ext_mclk1_b, _), 131 LPI_PINGROUP(10, 16, i2s2_clk, wsa_swr_clk, _, _), 132 LPI_PINGROUP(11, 18, i2s2_ws, wsa_swr_data, _, _), 133 LPI_PINGROUP(12, LPI_NO_SLEW, dmic3_clk, i2s4_clk, _, _), 134 LPI_PINGROUP(13, LPI_NO_SLEW, dmic3_data, i2s4_ws, ext_mclk1_a, _), 135 LPI_PINGROUP(14, 6, swr_tx_data, ext_mclk1_d, _, _), 136 LPI_PINGROUP(15, 20, i2s2_data, wsa2_swr_clk, _, _), 137 LPI_PINGROUP(16, 22, i2s2_data, wsa2_swr_data, _, _), 138 LPI_PINGROUP(17, LPI_NO_SLEW, dmic4_clk, i2s4_data, _, _), 139 LPI_PINGROUP(18, LPI_NO_SLEW, dmic4_data, i2s4_data, _, _), 140 LPI_PINGROUP(19, LPI_NO_SLEW, i2s3_clk, slimbus_clk, _, _), 141 LPI_PINGROUP(20, LPI_NO_SLEW, i2s3_ws, slimbus_data, _, _), 142 LPI_PINGROUP(21, LPI_NO_SLEW, i2s3_data, _, _, _), 143 LPI_PINGROUP(22, LPI_NO_SLEW, i2s3_data, ext_mclk1_e, _, _), 144 }; 145 146 static const struct lpi_function sm8450_functions[] = { 147 LPI_FUNCTION(dmic1_clk), 148 LPI_FUNCTION(dmic1_data), 149 LPI_FUNCTION(dmic2_clk), 150 LPI_FUNCTION(dmic2_data), 151 LPI_FUNCTION(dmic3_clk), 152 LPI_FUNCTION(dmic3_data), 153 LPI_FUNCTION(dmic4_clk), 154 LPI_FUNCTION(dmic4_data), 155 LPI_FUNCTION(i2s1_clk), 156 LPI_FUNCTION(i2s1_data), 157 LPI_FUNCTION(i2s1_ws), 158 LPI_FUNCTION(i2s2_clk), 159 LPI_FUNCTION(i2s2_data), 160 LPI_FUNCTION(i2s2_ws), 161 LPI_FUNCTION(i2s3_clk), 162 LPI_FUNCTION(i2s3_data), 163 LPI_FUNCTION(i2s3_ws), 164 LPI_FUNCTION(i2s4_clk), 165 LPI_FUNCTION(i2s4_data), 166 LPI_FUNCTION(i2s4_ws), 167 LPI_FUNCTION(qua_mi2s_data), 168 LPI_FUNCTION(qua_mi2s_sclk), 169 LPI_FUNCTION(qua_mi2s_ws), 170 LPI_FUNCTION(swr_rx_clk), 171 LPI_FUNCTION(swr_rx_data), 172 LPI_FUNCTION(swr_tx_clk), 173 LPI_FUNCTION(swr_tx_data), 174 LPI_FUNCTION(slimbus_clk), 175 LPI_FUNCTION(slimbus_data), 176 LPI_FUNCTION(wsa_swr_clk), 177 LPI_FUNCTION(wsa_swr_data), 178 LPI_FUNCTION(wsa2_swr_clk), 179 LPI_FUNCTION(wsa2_swr_data), 180 LPI_FUNCTION(ext_mclk1_a), 181 LPI_FUNCTION(ext_mclk1_b), 182 LPI_FUNCTION(ext_mclk1_c), 183 LPI_FUNCTION(ext_mclk1_d), 184 LPI_FUNCTION(ext_mclk1_e), 185 }; 186 187 static const struct lpi_pinctrl_variant_data sm8450_lpi_data = { 188 .pins = sm8450_lpi_pins, 189 .npins = ARRAY_SIZE(sm8450_lpi_pins), 190 .groups = sm8450_groups, 191 .ngroups = ARRAY_SIZE(sm8450_groups), 192 .functions = sm8450_functions, 193 .nfunctions = ARRAY_SIZE(sm8450_functions), 194 }; 195 196 static const struct of_device_id lpi_pinctrl_of_match[] = { 197 { 198 .compatible = "qcom,sm8450-lpass-lpi-pinctrl", 199 .data = &sm8450_lpi_data, 200 }, 201 { } 202 }; 203 MODULE_DEVICE_TABLE(of, lpi_pinctrl_of_match); 204 205 static struct platform_driver lpi_pinctrl_driver = { 206 .driver = { 207 .name = "qcom-sm8450-lpass-lpi-pinctrl", 208 .of_match_table = lpi_pinctrl_of_match, 209 }, 210 .probe = lpi_pinctrl_probe, 211 .remove_new = lpi_pinctrl_remove, 212 }; 213 214 module_platform_driver(lpi_pinctrl_driver); 215 MODULE_DESCRIPTION("QTI SM8450 LPI GPIO pin control driver"); 216 MODULE_LICENSE("GPL"); 217