1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2020-2021, Linaro Limited 5 */ 6 7 #include <linux/module.h> 8 #include <linux/of.h> 9 #include <linux/platform_device.h> 10 11 #include "pinctrl-msm.h" 12 13 #define REG_SIZE 0x1000 14 15 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ 16 { \ 17 .grp = PINCTRL_PINGROUP("gpio" #id, \ 18 gpio##id##_pins, \ 19 ARRAY_SIZE(gpio##id##_pins)), \ 20 .funcs = (int[]){ \ 21 msm_mux_gpio, /* gpio mode */ \ 22 msm_mux_##f1, \ 23 msm_mux_##f2, \ 24 msm_mux_##f3, \ 25 msm_mux_##f4, \ 26 msm_mux_##f5, \ 27 msm_mux_##f6, \ 28 msm_mux_##f7, \ 29 msm_mux_##f8, \ 30 msm_mux_##f9 \ 31 }, \ 32 .nfuncs = 10, \ 33 .ctl_reg = REG_SIZE * id, \ 34 .io_reg = REG_SIZE * id + 0x4, \ 35 .intr_cfg_reg = REG_SIZE * id + 0x8, \ 36 .intr_status_reg = REG_SIZE * id + 0xc, \ 37 .mux_bit = 2, \ 38 .pull_bit = 0, \ 39 .drv_bit = 6, \ 40 .oe_bit = 9, \ 41 .in_bit = 0, \ 42 .out_bit = 1, \ 43 .intr_enable_bit = 0, \ 44 .intr_status_bit = 0, \ 45 .intr_target_bit = 5, \ 46 .intr_target_kpss_val = 3, \ 47 .intr_raw_status_bit = 4, \ 48 .intr_polarity_bit = 1, \ 49 .intr_detection_bit = 2, \ 50 .intr_detection_width = 2, \ 51 } 52 53 #define SDC_PINGROUP(pg_name, ctl, pull, drv) \ 54 { \ 55 .grp = PINCTRL_PINGROUP(#pg_name, \ 56 pg_name##_pins, \ 57 ARRAY_SIZE(pg_name##_pins)), \ 58 .ctl_reg = ctl, \ 59 .io_reg = 0, \ 60 .intr_cfg_reg = 0, \ 61 .intr_status_reg = 0, \ 62 .mux_bit = -1, \ 63 .pull_bit = pull, \ 64 .drv_bit = drv, \ 65 .oe_bit = -1, \ 66 .in_bit = -1, \ 67 .out_bit = -1, \ 68 .intr_enable_bit = -1, \ 69 .intr_status_bit = -1, \ 70 .intr_target_bit = -1, \ 71 .intr_raw_status_bit = -1, \ 72 .intr_polarity_bit = -1, \ 73 .intr_detection_bit = -1, \ 74 .intr_detection_width = -1, \ 75 } 76 77 #define UFS_RESET(pg_name, offset) \ 78 { \ 79 .grp = PINCTRL_PINGROUP(#pg_name, \ 80 pg_name##_pins, \ 81 ARRAY_SIZE(pg_name##_pins)), \ 82 .ctl_reg = offset, \ 83 .io_reg = offset + 0x4, \ 84 .intr_cfg_reg = 0, \ 85 .intr_status_reg = 0, \ 86 .mux_bit = -1, \ 87 .pull_bit = 3, \ 88 .drv_bit = 0, \ 89 .oe_bit = -1, \ 90 .in_bit = -1, \ 91 .out_bit = 0, \ 92 .intr_enable_bit = -1, \ 93 .intr_status_bit = -1, \ 94 .intr_target_bit = -1, \ 95 .intr_raw_status_bit = -1, \ 96 .intr_polarity_bit = -1, \ 97 .intr_detection_bit = -1, \ 98 .intr_detection_width = -1, \ 99 } 100 101 static const struct pinctrl_pin_desc sm8350_pins[] = { 102 PINCTRL_PIN(0, "GPIO_0"), 103 PINCTRL_PIN(1, "GPIO_1"), 104 PINCTRL_PIN(2, "GPIO_2"), 105 PINCTRL_PIN(3, "GPIO_3"), 106 PINCTRL_PIN(4, "GPIO_4"), 107 PINCTRL_PIN(5, "GPIO_5"), 108 PINCTRL_PIN(6, "GPIO_6"), 109 PINCTRL_PIN(7, "GPIO_7"), 110 PINCTRL_PIN(8, "GPIO_8"), 111 PINCTRL_PIN(9, "GPIO_9"), 112 PINCTRL_PIN(10, "GPIO_10"), 113 PINCTRL_PIN(11, "GPIO_11"), 114 PINCTRL_PIN(12, "GPIO_12"), 115 PINCTRL_PIN(13, "GPIO_13"), 116 PINCTRL_PIN(14, "GPIO_14"), 117 PINCTRL_PIN(15, "GPIO_15"), 118 PINCTRL_PIN(16, "GPIO_16"), 119 PINCTRL_PIN(17, "GPIO_17"), 120 PINCTRL_PIN(18, "GPIO_18"), 121 PINCTRL_PIN(19, "GPIO_19"), 122 PINCTRL_PIN(20, "GPIO_20"), 123 PINCTRL_PIN(21, "GPIO_21"), 124 PINCTRL_PIN(22, "GPIO_22"), 125 PINCTRL_PIN(23, "GPIO_23"), 126 PINCTRL_PIN(24, "GPIO_24"), 127 PINCTRL_PIN(25, "GPIO_25"), 128 PINCTRL_PIN(26, "GPIO_26"), 129 PINCTRL_PIN(27, "GPIO_27"), 130 PINCTRL_PIN(28, "GPIO_28"), 131 PINCTRL_PIN(29, "GPIO_29"), 132 PINCTRL_PIN(30, "GPIO_30"), 133 PINCTRL_PIN(31, "GPIO_31"), 134 PINCTRL_PIN(32, "GPIO_32"), 135 PINCTRL_PIN(33, "GPIO_33"), 136 PINCTRL_PIN(34, "GPIO_34"), 137 PINCTRL_PIN(35, "GPIO_35"), 138 PINCTRL_PIN(36, "GPIO_36"), 139 PINCTRL_PIN(37, "GPIO_37"), 140 PINCTRL_PIN(38, "GPIO_38"), 141 PINCTRL_PIN(39, "GPIO_39"), 142 PINCTRL_PIN(40, "GPIO_40"), 143 PINCTRL_PIN(41, "GPIO_41"), 144 PINCTRL_PIN(42, "GPIO_42"), 145 PINCTRL_PIN(43, "GPIO_43"), 146 PINCTRL_PIN(44, "GPIO_44"), 147 PINCTRL_PIN(45, "GPIO_45"), 148 PINCTRL_PIN(46, "GPIO_46"), 149 PINCTRL_PIN(47, "GPIO_47"), 150 PINCTRL_PIN(48, "GPIO_48"), 151 PINCTRL_PIN(49, "GPIO_49"), 152 PINCTRL_PIN(50, "GPIO_50"), 153 PINCTRL_PIN(51, "GPIO_51"), 154 PINCTRL_PIN(52, "GPIO_52"), 155 PINCTRL_PIN(53, "GPIO_53"), 156 PINCTRL_PIN(54, "GPIO_54"), 157 PINCTRL_PIN(55, "GPIO_55"), 158 PINCTRL_PIN(56, "GPIO_56"), 159 PINCTRL_PIN(57, "GPIO_57"), 160 PINCTRL_PIN(58, "GPIO_58"), 161 PINCTRL_PIN(59, "GPIO_59"), 162 PINCTRL_PIN(60, "GPIO_60"), 163 PINCTRL_PIN(61, "GPIO_61"), 164 PINCTRL_PIN(62, "GPIO_62"), 165 PINCTRL_PIN(63, "GPIO_63"), 166 PINCTRL_PIN(64, "GPIO_64"), 167 PINCTRL_PIN(65, "GPIO_65"), 168 PINCTRL_PIN(66, "GPIO_66"), 169 PINCTRL_PIN(67, "GPIO_67"), 170 PINCTRL_PIN(68, "GPIO_68"), 171 PINCTRL_PIN(69, "GPIO_69"), 172 PINCTRL_PIN(70, "GPIO_70"), 173 PINCTRL_PIN(71, "GPIO_71"), 174 PINCTRL_PIN(72, "GPIO_72"), 175 PINCTRL_PIN(73, "GPIO_73"), 176 PINCTRL_PIN(74, "GPIO_74"), 177 PINCTRL_PIN(75, "GPIO_75"), 178 PINCTRL_PIN(76, "GPIO_76"), 179 PINCTRL_PIN(77, "GPIO_77"), 180 PINCTRL_PIN(78, "GPIO_78"), 181 PINCTRL_PIN(79, "GPIO_79"), 182 PINCTRL_PIN(80, "GPIO_80"), 183 PINCTRL_PIN(81, "GPIO_81"), 184 PINCTRL_PIN(82, "GPIO_82"), 185 PINCTRL_PIN(83, "GPIO_83"), 186 PINCTRL_PIN(84, "GPIO_84"), 187 PINCTRL_PIN(85, "GPIO_85"), 188 PINCTRL_PIN(86, "GPIO_86"), 189 PINCTRL_PIN(87, "GPIO_87"), 190 PINCTRL_PIN(88, "GPIO_88"), 191 PINCTRL_PIN(89, "GPIO_89"), 192 PINCTRL_PIN(90, "GPIO_90"), 193 PINCTRL_PIN(91, "GPIO_91"), 194 PINCTRL_PIN(92, "GPIO_92"), 195 PINCTRL_PIN(93, "GPIO_93"), 196 PINCTRL_PIN(94, "GPIO_94"), 197 PINCTRL_PIN(95, "GPIO_95"), 198 PINCTRL_PIN(96, "GPIO_96"), 199 PINCTRL_PIN(97, "GPIO_97"), 200 PINCTRL_PIN(98, "GPIO_98"), 201 PINCTRL_PIN(99, "GPIO_99"), 202 PINCTRL_PIN(100, "GPIO_100"), 203 PINCTRL_PIN(101, "GPIO_101"), 204 PINCTRL_PIN(102, "GPIO_102"), 205 PINCTRL_PIN(103, "GPIO_103"), 206 PINCTRL_PIN(104, "GPIO_104"), 207 PINCTRL_PIN(105, "GPIO_105"), 208 PINCTRL_PIN(106, "GPIO_106"), 209 PINCTRL_PIN(107, "GPIO_107"), 210 PINCTRL_PIN(108, "GPIO_108"), 211 PINCTRL_PIN(109, "GPIO_109"), 212 PINCTRL_PIN(110, "GPIO_110"), 213 PINCTRL_PIN(111, "GPIO_111"), 214 PINCTRL_PIN(112, "GPIO_112"), 215 PINCTRL_PIN(113, "GPIO_113"), 216 PINCTRL_PIN(114, "GPIO_114"), 217 PINCTRL_PIN(115, "GPIO_115"), 218 PINCTRL_PIN(116, "GPIO_116"), 219 PINCTRL_PIN(117, "GPIO_117"), 220 PINCTRL_PIN(118, "GPIO_118"), 221 PINCTRL_PIN(119, "GPIO_119"), 222 PINCTRL_PIN(120, "GPIO_120"), 223 PINCTRL_PIN(121, "GPIO_121"), 224 PINCTRL_PIN(122, "GPIO_122"), 225 PINCTRL_PIN(123, "GPIO_123"), 226 PINCTRL_PIN(124, "GPIO_124"), 227 PINCTRL_PIN(125, "GPIO_125"), 228 PINCTRL_PIN(126, "GPIO_126"), 229 PINCTRL_PIN(127, "GPIO_127"), 230 PINCTRL_PIN(128, "GPIO_128"), 231 PINCTRL_PIN(129, "GPIO_129"), 232 PINCTRL_PIN(130, "GPIO_130"), 233 PINCTRL_PIN(131, "GPIO_131"), 234 PINCTRL_PIN(132, "GPIO_132"), 235 PINCTRL_PIN(133, "GPIO_133"), 236 PINCTRL_PIN(134, "GPIO_134"), 237 PINCTRL_PIN(135, "GPIO_135"), 238 PINCTRL_PIN(136, "GPIO_136"), 239 PINCTRL_PIN(137, "GPIO_137"), 240 PINCTRL_PIN(138, "GPIO_138"), 241 PINCTRL_PIN(139, "GPIO_139"), 242 PINCTRL_PIN(140, "GPIO_140"), 243 PINCTRL_PIN(141, "GPIO_141"), 244 PINCTRL_PIN(142, "GPIO_142"), 245 PINCTRL_PIN(143, "GPIO_143"), 246 PINCTRL_PIN(144, "GPIO_144"), 247 PINCTRL_PIN(145, "GPIO_145"), 248 PINCTRL_PIN(146, "GPIO_146"), 249 PINCTRL_PIN(147, "GPIO_147"), 250 PINCTRL_PIN(148, "GPIO_148"), 251 PINCTRL_PIN(149, "GPIO_149"), 252 PINCTRL_PIN(150, "GPIO_150"), 253 PINCTRL_PIN(151, "GPIO_151"), 254 PINCTRL_PIN(152, "GPIO_152"), 255 PINCTRL_PIN(153, "GPIO_153"), 256 PINCTRL_PIN(154, "GPIO_154"), 257 PINCTRL_PIN(155, "GPIO_155"), 258 PINCTRL_PIN(156, "GPIO_156"), 259 PINCTRL_PIN(157, "GPIO_157"), 260 PINCTRL_PIN(158, "GPIO_158"), 261 PINCTRL_PIN(159, "GPIO_159"), 262 PINCTRL_PIN(160, "GPIO_160"), 263 PINCTRL_PIN(161, "GPIO_161"), 264 PINCTRL_PIN(162, "GPIO_162"), 265 PINCTRL_PIN(163, "GPIO_163"), 266 PINCTRL_PIN(164, "GPIO_164"), 267 PINCTRL_PIN(165, "GPIO_165"), 268 PINCTRL_PIN(166, "GPIO_166"), 269 PINCTRL_PIN(167, "GPIO_167"), 270 PINCTRL_PIN(168, "GPIO_168"), 271 PINCTRL_PIN(169, "GPIO_169"), 272 PINCTRL_PIN(170, "GPIO_170"), 273 PINCTRL_PIN(171, "GPIO_171"), 274 PINCTRL_PIN(172, "GPIO_172"), 275 PINCTRL_PIN(173, "GPIO_173"), 276 PINCTRL_PIN(174, "GPIO_174"), 277 PINCTRL_PIN(175, "GPIO_175"), 278 PINCTRL_PIN(176, "GPIO_176"), 279 PINCTRL_PIN(177, "GPIO_177"), 280 PINCTRL_PIN(178, "GPIO_178"), 281 PINCTRL_PIN(179, "GPIO_179"), 282 PINCTRL_PIN(180, "GPIO_180"), 283 PINCTRL_PIN(181, "GPIO_181"), 284 PINCTRL_PIN(182, "GPIO_182"), 285 PINCTRL_PIN(183, "GPIO_183"), 286 PINCTRL_PIN(184, "GPIO_184"), 287 PINCTRL_PIN(185, "GPIO_185"), 288 PINCTRL_PIN(186, "GPIO_186"), 289 PINCTRL_PIN(187, "GPIO_187"), 290 PINCTRL_PIN(188, "GPIO_188"), 291 PINCTRL_PIN(189, "GPIO_189"), 292 PINCTRL_PIN(190, "GPIO_190"), 293 PINCTRL_PIN(191, "GPIO_191"), 294 PINCTRL_PIN(192, "GPIO_192"), 295 PINCTRL_PIN(193, "GPIO_193"), 296 PINCTRL_PIN(194, "GPIO_194"), 297 PINCTRL_PIN(195, "GPIO_195"), 298 PINCTRL_PIN(196, "GPIO_196"), 299 PINCTRL_PIN(197, "GPIO_197"), 300 PINCTRL_PIN(198, "GPIO_198"), 301 PINCTRL_PIN(199, "GPIO_199"), 302 PINCTRL_PIN(200, "GPIO_200"), 303 PINCTRL_PIN(201, "GPIO_201"), 304 PINCTRL_PIN(202, "GPIO_202"), 305 PINCTRL_PIN(203, "UFS_RESET"), 306 PINCTRL_PIN(204, "SDC2_CLK"), 307 PINCTRL_PIN(205, "SDC2_CMD"), 308 PINCTRL_PIN(206, "SDC2_DATA"), 309 }; 310 311 #define DECLARE_MSM_GPIO_PINS(pin) \ 312 static const unsigned int gpio##pin##_pins[] = { pin } 313 DECLARE_MSM_GPIO_PINS(0); 314 DECLARE_MSM_GPIO_PINS(1); 315 DECLARE_MSM_GPIO_PINS(2); 316 DECLARE_MSM_GPIO_PINS(3); 317 DECLARE_MSM_GPIO_PINS(4); 318 DECLARE_MSM_GPIO_PINS(5); 319 DECLARE_MSM_GPIO_PINS(6); 320 DECLARE_MSM_GPIO_PINS(7); 321 DECLARE_MSM_GPIO_PINS(8); 322 DECLARE_MSM_GPIO_PINS(9); 323 DECLARE_MSM_GPIO_PINS(10); 324 DECLARE_MSM_GPIO_PINS(11); 325 DECLARE_MSM_GPIO_PINS(12); 326 DECLARE_MSM_GPIO_PINS(13); 327 DECLARE_MSM_GPIO_PINS(14); 328 DECLARE_MSM_GPIO_PINS(15); 329 DECLARE_MSM_GPIO_PINS(16); 330 DECLARE_MSM_GPIO_PINS(17); 331 DECLARE_MSM_GPIO_PINS(18); 332 DECLARE_MSM_GPIO_PINS(19); 333 DECLARE_MSM_GPIO_PINS(20); 334 DECLARE_MSM_GPIO_PINS(21); 335 DECLARE_MSM_GPIO_PINS(22); 336 DECLARE_MSM_GPIO_PINS(23); 337 DECLARE_MSM_GPIO_PINS(24); 338 DECLARE_MSM_GPIO_PINS(25); 339 DECLARE_MSM_GPIO_PINS(26); 340 DECLARE_MSM_GPIO_PINS(27); 341 DECLARE_MSM_GPIO_PINS(28); 342 DECLARE_MSM_GPIO_PINS(29); 343 DECLARE_MSM_GPIO_PINS(30); 344 DECLARE_MSM_GPIO_PINS(31); 345 DECLARE_MSM_GPIO_PINS(32); 346 DECLARE_MSM_GPIO_PINS(33); 347 DECLARE_MSM_GPIO_PINS(34); 348 DECLARE_MSM_GPIO_PINS(35); 349 DECLARE_MSM_GPIO_PINS(36); 350 DECLARE_MSM_GPIO_PINS(37); 351 DECLARE_MSM_GPIO_PINS(38); 352 DECLARE_MSM_GPIO_PINS(39); 353 DECLARE_MSM_GPIO_PINS(40); 354 DECLARE_MSM_GPIO_PINS(41); 355 DECLARE_MSM_GPIO_PINS(42); 356 DECLARE_MSM_GPIO_PINS(43); 357 DECLARE_MSM_GPIO_PINS(44); 358 DECLARE_MSM_GPIO_PINS(45); 359 DECLARE_MSM_GPIO_PINS(46); 360 DECLARE_MSM_GPIO_PINS(47); 361 DECLARE_MSM_GPIO_PINS(48); 362 DECLARE_MSM_GPIO_PINS(49); 363 DECLARE_MSM_GPIO_PINS(50); 364 DECLARE_MSM_GPIO_PINS(51); 365 DECLARE_MSM_GPIO_PINS(52); 366 DECLARE_MSM_GPIO_PINS(53); 367 DECLARE_MSM_GPIO_PINS(54); 368 DECLARE_MSM_GPIO_PINS(55); 369 DECLARE_MSM_GPIO_PINS(56); 370 DECLARE_MSM_GPIO_PINS(57); 371 DECLARE_MSM_GPIO_PINS(58); 372 DECLARE_MSM_GPIO_PINS(59); 373 DECLARE_MSM_GPIO_PINS(60); 374 DECLARE_MSM_GPIO_PINS(61); 375 DECLARE_MSM_GPIO_PINS(62); 376 DECLARE_MSM_GPIO_PINS(63); 377 DECLARE_MSM_GPIO_PINS(64); 378 DECLARE_MSM_GPIO_PINS(65); 379 DECLARE_MSM_GPIO_PINS(66); 380 DECLARE_MSM_GPIO_PINS(67); 381 DECLARE_MSM_GPIO_PINS(68); 382 DECLARE_MSM_GPIO_PINS(69); 383 DECLARE_MSM_GPIO_PINS(70); 384 DECLARE_MSM_GPIO_PINS(71); 385 DECLARE_MSM_GPIO_PINS(72); 386 DECLARE_MSM_GPIO_PINS(73); 387 DECLARE_MSM_GPIO_PINS(74); 388 DECLARE_MSM_GPIO_PINS(75); 389 DECLARE_MSM_GPIO_PINS(76); 390 DECLARE_MSM_GPIO_PINS(77); 391 DECLARE_MSM_GPIO_PINS(78); 392 DECLARE_MSM_GPIO_PINS(79); 393 DECLARE_MSM_GPIO_PINS(80); 394 DECLARE_MSM_GPIO_PINS(81); 395 DECLARE_MSM_GPIO_PINS(82); 396 DECLARE_MSM_GPIO_PINS(83); 397 DECLARE_MSM_GPIO_PINS(84); 398 DECLARE_MSM_GPIO_PINS(85); 399 DECLARE_MSM_GPIO_PINS(86); 400 DECLARE_MSM_GPIO_PINS(87); 401 DECLARE_MSM_GPIO_PINS(88); 402 DECLARE_MSM_GPIO_PINS(89); 403 DECLARE_MSM_GPIO_PINS(90); 404 DECLARE_MSM_GPIO_PINS(91); 405 DECLARE_MSM_GPIO_PINS(92); 406 DECLARE_MSM_GPIO_PINS(93); 407 DECLARE_MSM_GPIO_PINS(94); 408 DECLARE_MSM_GPIO_PINS(95); 409 DECLARE_MSM_GPIO_PINS(96); 410 DECLARE_MSM_GPIO_PINS(97); 411 DECLARE_MSM_GPIO_PINS(98); 412 DECLARE_MSM_GPIO_PINS(99); 413 DECLARE_MSM_GPIO_PINS(100); 414 DECLARE_MSM_GPIO_PINS(101); 415 DECLARE_MSM_GPIO_PINS(102); 416 DECLARE_MSM_GPIO_PINS(103); 417 DECLARE_MSM_GPIO_PINS(104); 418 DECLARE_MSM_GPIO_PINS(105); 419 DECLARE_MSM_GPIO_PINS(106); 420 DECLARE_MSM_GPIO_PINS(107); 421 DECLARE_MSM_GPIO_PINS(108); 422 DECLARE_MSM_GPIO_PINS(109); 423 DECLARE_MSM_GPIO_PINS(110); 424 DECLARE_MSM_GPIO_PINS(111); 425 DECLARE_MSM_GPIO_PINS(112); 426 DECLARE_MSM_GPIO_PINS(113); 427 DECLARE_MSM_GPIO_PINS(114); 428 DECLARE_MSM_GPIO_PINS(115); 429 DECLARE_MSM_GPIO_PINS(116); 430 DECLARE_MSM_GPIO_PINS(117); 431 DECLARE_MSM_GPIO_PINS(118); 432 DECLARE_MSM_GPIO_PINS(119); 433 DECLARE_MSM_GPIO_PINS(120); 434 DECLARE_MSM_GPIO_PINS(121); 435 DECLARE_MSM_GPIO_PINS(122); 436 DECLARE_MSM_GPIO_PINS(123); 437 DECLARE_MSM_GPIO_PINS(124); 438 DECLARE_MSM_GPIO_PINS(125); 439 DECLARE_MSM_GPIO_PINS(126); 440 DECLARE_MSM_GPIO_PINS(127); 441 DECLARE_MSM_GPIO_PINS(128); 442 DECLARE_MSM_GPIO_PINS(129); 443 DECLARE_MSM_GPIO_PINS(130); 444 DECLARE_MSM_GPIO_PINS(131); 445 DECLARE_MSM_GPIO_PINS(132); 446 DECLARE_MSM_GPIO_PINS(133); 447 DECLARE_MSM_GPIO_PINS(134); 448 DECLARE_MSM_GPIO_PINS(135); 449 DECLARE_MSM_GPIO_PINS(136); 450 DECLARE_MSM_GPIO_PINS(137); 451 DECLARE_MSM_GPIO_PINS(138); 452 DECLARE_MSM_GPIO_PINS(139); 453 DECLARE_MSM_GPIO_PINS(140); 454 DECLARE_MSM_GPIO_PINS(141); 455 DECLARE_MSM_GPIO_PINS(142); 456 DECLARE_MSM_GPIO_PINS(143); 457 DECLARE_MSM_GPIO_PINS(144); 458 DECLARE_MSM_GPIO_PINS(145); 459 DECLARE_MSM_GPIO_PINS(146); 460 DECLARE_MSM_GPIO_PINS(147); 461 DECLARE_MSM_GPIO_PINS(148); 462 DECLARE_MSM_GPIO_PINS(149); 463 DECLARE_MSM_GPIO_PINS(150); 464 DECLARE_MSM_GPIO_PINS(151); 465 DECLARE_MSM_GPIO_PINS(152); 466 DECLARE_MSM_GPIO_PINS(153); 467 DECLARE_MSM_GPIO_PINS(154); 468 DECLARE_MSM_GPIO_PINS(155); 469 DECLARE_MSM_GPIO_PINS(156); 470 DECLARE_MSM_GPIO_PINS(157); 471 DECLARE_MSM_GPIO_PINS(158); 472 DECLARE_MSM_GPIO_PINS(159); 473 DECLARE_MSM_GPIO_PINS(160); 474 DECLARE_MSM_GPIO_PINS(161); 475 DECLARE_MSM_GPIO_PINS(162); 476 DECLARE_MSM_GPIO_PINS(163); 477 DECLARE_MSM_GPIO_PINS(164); 478 DECLARE_MSM_GPIO_PINS(165); 479 DECLARE_MSM_GPIO_PINS(166); 480 DECLARE_MSM_GPIO_PINS(167); 481 DECLARE_MSM_GPIO_PINS(168); 482 DECLARE_MSM_GPIO_PINS(169); 483 DECLARE_MSM_GPIO_PINS(170); 484 DECLARE_MSM_GPIO_PINS(171); 485 DECLARE_MSM_GPIO_PINS(172); 486 DECLARE_MSM_GPIO_PINS(173); 487 DECLARE_MSM_GPIO_PINS(174); 488 DECLARE_MSM_GPIO_PINS(175); 489 DECLARE_MSM_GPIO_PINS(176); 490 DECLARE_MSM_GPIO_PINS(177); 491 DECLARE_MSM_GPIO_PINS(178); 492 DECLARE_MSM_GPIO_PINS(179); 493 DECLARE_MSM_GPIO_PINS(180); 494 DECLARE_MSM_GPIO_PINS(181); 495 DECLARE_MSM_GPIO_PINS(182); 496 DECLARE_MSM_GPIO_PINS(183); 497 DECLARE_MSM_GPIO_PINS(184); 498 DECLARE_MSM_GPIO_PINS(185); 499 DECLARE_MSM_GPIO_PINS(186); 500 DECLARE_MSM_GPIO_PINS(187); 501 DECLARE_MSM_GPIO_PINS(188); 502 DECLARE_MSM_GPIO_PINS(189); 503 DECLARE_MSM_GPIO_PINS(190); 504 DECLARE_MSM_GPIO_PINS(191); 505 DECLARE_MSM_GPIO_PINS(192); 506 DECLARE_MSM_GPIO_PINS(193); 507 DECLARE_MSM_GPIO_PINS(194); 508 DECLARE_MSM_GPIO_PINS(195); 509 DECLARE_MSM_GPIO_PINS(196); 510 DECLARE_MSM_GPIO_PINS(197); 511 DECLARE_MSM_GPIO_PINS(198); 512 DECLARE_MSM_GPIO_PINS(199); 513 DECLARE_MSM_GPIO_PINS(200); 514 DECLARE_MSM_GPIO_PINS(201); 515 DECLARE_MSM_GPIO_PINS(202); 516 517 static const unsigned int ufs_reset_pins[] = { 203 }; 518 static const unsigned int sdc2_clk_pins[] = { 204 }; 519 static const unsigned int sdc2_cmd_pins[] = { 205 }; 520 static const unsigned int sdc2_data_pins[] = { 206 }; 521 522 enum sm8350_functions { 523 msm_mux_atest_char, 524 msm_mux_atest_usb, 525 msm_mux_audio_ref, 526 msm_mux_cam_mclk, 527 msm_mux_cci_async, 528 msm_mux_cci_i2c, 529 msm_mux_cci_timer, 530 msm_mux_cmu_rng, 531 msm_mux_coex_uart1, 532 msm_mux_coex_uart2, 533 msm_mux_cri_trng, 534 msm_mux_cri_trng0, 535 msm_mux_cri_trng1, 536 msm_mux_dbg_out, 537 msm_mux_ddr_bist, 538 msm_mux_ddr_pxi0, 539 msm_mux_ddr_pxi1, 540 msm_mux_ddr_pxi2, 541 msm_mux_ddr_pxi3, 542 msm_mux_dp_hot, 543 msm_mux_dp_lcd, 544 msm_mux_gcc_gp1, 545 msm_mux_gcc_gp2, 546 msm_mux_gcc_gp3, 547 msm_mux_gpio, 548 msm_mux_ibi_i3c, 549 msm_mux_jitter_bist, 550 msm_mux_lpass_slimbus, 551 msm_mux_mdp_vsync, 552 msm_mux_mdp_vsync0, 553 msm_mux_mdp_vsync1, 554 msm_mux_mdp_vsync2, 555 msm_mux_mdp_vsync3, 556 msm_mux_mi2s0_data0, 557 msm_mux_mi2s0_data1, 558 msm_mux_mi2s0_sck, 559 msm_mux_mi2s0_ws, 560 msm_mux_mi2s1_data0, 561 msm_mux_mi2s1_data1, 562 msm_mux_mi2s1_sck, 563 msm_mux_mi2s1_ws, 564 msm_mux_mi2s2_data0, 565 msm_mux_mi2s2_data1, 566 msm_mux_mi2s2_sck, 567 msm_mux_mi2s2_ws, 568 msm_mux_mss_grfc0, 569 msm_mux_mss_grfc1, 570 msm_mux_mss_grfc10, 571 msm_mux_mss_grfc11, 572 msm_mux_mss_grfc12, 573 msm_mux_mss_grfc2, 574 msm_mux_mss_grfc3, 575 msm_mux_mss_grfc4, 576 msm_mux_mss_grfc5, 577 msm_mux_mss_grfc6, 578 msm_mux_mss_grfc7, 579 msm_mux_mss_grfc8, 580 msm_mux_mss_grfc9, 581 msm_mux_nav_gpio, 582 msm_mux_pa_indicator, 583 msm_mux_pcie0_clkreqn, 584 msm_mux_pcie1_clkreqn, 585 msm_mux_phase_flag, 586 msm_mux_pll_bist, 587 msm_mux_pll_clk, 588 msm_mux_pri_mi2s, 589 msm_mux_prng_rosc, 590 msm_mux_qdss_cti, 591 msm_mux_qdss_gpio, 592 msm_mux_qlink0_enable, 593 msm_mux_qlink0_request, 594 msm_mux_qlink0_wmss, 595 msm_mux_qlink1_enable, 596 msm_mux_qlink1_request, 597 msm_mux_qlink1_wmss, 598 msm_mux_qlink2_enable, 599 msm_mux_qlink2_request, 600 msm_mux_qlink2_wmss, 601 msm_mux_qspi0, 602 msm_mux_qspi1, 603 msm_mux_qspi2, 604 msm_mux_qspi3, 605 msm_mux_qspi_clk, 606 msm_mux_qspi_cs, 607 msm_mux_qup0, 608 msm_mux_qup1, 609 msm_mux_qup10, 610 msm_mux_qup11, 611 msm_mux_qup12, 612 msm_mux_qup13, 613 msm_mux_qup14, 614 msm_mux_qup15, 615 msm_mux_qup16, 616 msm_mux_qup17, 617 msm_mux_qup18, 618 msm_mux_qup19, 619 msm_mux_qup2, 620 msm_mux_qup3, 621 msm_mux_qup4, 622 msm_mux_qup5, 623 msm_mux_qup6, 624 msm_mux_qup7, 625 msm_mux_qup8, 626 msm_mux_qup9, 627 msm_mux_qup_l4, 628 msm_mux_qup_l5, 629 msm_mux_qup_l6, 630 msm_mux_sd_write, 631 msm_mux_sdc40, 632 msm_mux_sdc41, 633 msm_mux_sdc42, 634 msm_mux_sdc43, 635 msm_mux_sdc4_clk, 636 msm_mux_sdc4_cmd, 637 msm_mux_sec_mi2s, 638 msm_mux_tb_trig, 639 msm_mux_tgu_ch0, 640 msm_mux_tgu_ch1, 641 msm_mux_tgu_ch2, 642 msm_mux_tgu_ch3, 643 msm_mux_tsense_pwm1, 644 msm_mux_tsense_pwm2, 645 msm_mux_uim0_clk, 646 msm_mux_uim0_data, 647 msm_mux_uim0_present, 648 msm_mux_uim0_reset, 649 msm_mux_uim1_clk, 650 msm_mux_uim1_data, 651 msm_mux_uim1_present, 652 msm_mux_uim1_reset, 653 msm_mux_usb2phy_ac, 654 msm_mux_usb_phy, 655 msm_mux_vfr_0, 656 msm_mux_vfr_1, 657 msm_mux_vsense_trigger, 658 msm_mux__, 659 }; 660 661 static const char * const gpio_groups[] = { 662 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 663 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", 664 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", 665 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", 666 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 667 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", 668 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", 669 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", 670 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", 671 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", 672 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", 673 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84", 674 "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91", 675 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98", 676 "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104", 677 "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110", 678 "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116", 679 "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122", 680 "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128", 681 "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134", 682 "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140", 683 "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", "gpio146", 684 "gpio147", "gpio148", "gpio149", "gpio150", "gpio151", "gpio152", 685 "gpio153", "gpio154", "gpio155", "gpio156", "gpio157", "gpio158", 686 "gpio159", "gpio160", "gpio161", "gpio162", "gpio163", "gpio164", 687 "gpio165", "gpio166", "gpio167", "gpio168", "gpio169", "gpio170", 688 "gpio171", "gpio172", "gpio173", "gpio174", "gpio175", "gpio176", 689 "gpio177", "gpio178", "gpio179", "gpio180", "gpio181", "gpio182", 690 "gpio183", "gpio184", "gpio185", "gpio186", "gpio187", "gpio188", 691 "gpio189", "gpio190", "gpio191", "gpio192", "gpio193", "gpio194", 692 "gpio195", "gpio196", "gpio197", "gpio198", "gpio199", "gpio200", 693 "gpio201", "gpio202", 694 }; 695 696 static const char * const atest_char_groups[] = { 697 "gpio85", "gpio86", "gpio87", "gpio115", "gpio117", 698 }; 699 700 static const char * const atest_usb_groups[] = { 701 "gpio55", "gpio80", "gpio81", "gpio151", "gpio152", 702 "gpio153", "gpio154", "gpio158", "gpio159", "gpio161", 703 }; 704 705 static const char * const audio_ref_groups[] = { 706 "gpio124", 707 }; 708 709 static const char * const cam_mclk_groups[] = { 710 "gpio100", "gpio101", "gpio102", "gpio103", "gpio104", "gpio105", 711 }; 712 713 static const char * const cci_async_groups[] = { 714 "gpio106", "gpio118", "gpio119", 715 }; 716 717 static const char * const cci_i2c_groups[] = { 718 "gpio107", "gpio108", "gpio109", "gpio110", "gpio111", "gpio112", 719 "gpio113", "gpio114", 720 }; 721 722 static const char * const cci_timer_groups[] = { 723 "gpio115", "gpio116", "gpio117", "gpio118", "gpio119", 724 }; 725 726 static const char * const cmu_rng_groups[] = { 727 "gpio174", "gpio175", "gpio176", "gpio177", 728 }; 729 730 static const char * const coex_uart1_groups[] = { 731 "gpio151", "gpio152", 732 }; 733 734 static const char * const coex_uart2_groups[] = { 735 "gpio153", "gpio154", 736 }; 737 738 static const char * const cri_trng_groups[] = { 739 "gpio186", 740 }; 741 742 static const char * const cri_trng0_groups[] = { 743 "gpio183", 744 }; 745 746 static const char * const cri_trng1_groups[] = { 747 "gpio184", 748 }; 749 750 static const char * const dbg_out_groups[] = { 751 "gpio14", 752 }; 753 754 static const char * const ddr_bist_groups[] = { 755 "gpio36", "gpio37", "gpio40", "gpio41", 756 }; 757 758 static const char * const ddr_pxi0_groups[] = { 759 "gpio51", "gpio52", 760 }; 761 762 static const char * const ddr_pxi1_groups[] = { 763 "gpio48", "gpio49", 764 }; 765 766 static const char * const ddr_pxi2_groups[] = { 767 "gpio45", "gpio47", 768 }; 769 770 static const char * const ddr_pxi3_groups[] = { 771 "gpio43", "gpio44", 772 }; 773 774 static const char * const dp_hot_groups[] = { 775 "gpio87", 776 }; 777 778 static const char * const dp_lcd_groups[] = { 779 "gpio83", 780 }; 781 782 static const char * const gcc_gp1_groups[] = { 783 "gpio115", "gpio129", 784 }; 785 786 static const char * const gcc_gp2_groups[] = { 787 "gpio116", "gpio130", 788 }; 789 790 static const char * const gcc_gp3_groups[] = { 791 "gpio117", "gpio131", 792 }; 793 794 static const char * const ibi_i3c_groups[] = { 795 "gpio36", "gpio37", "gpio56", "gpio57", "gpio60", "gpio61", 796 }; 797 798 static const char * const jitter_bist_groups[] = { 799 "gpio80", 800 }; 801 802 static const char * const lpass_slimbus_groups[] = { 803 "gpio129", "gpio130", 804 }; 805 806 static const char * const mdp_vsync_groups[] = { 807 "gpio15", "gpio26", "gpio82", "gpio83", "gpio84", 808 }; 809 810 static const char * const mdp_vsync0_groups[] = { 811 "gpio86", 812 }; 813 814 static const char * const mdp_vsync1_groups[] = { 815 "gpio86", 816 }; 817 818 static const char * const mdp_vsync2_groups[] = { 819 "gpio87", 820 }; 821 822 static const char * const mdp_vsync3_groups[] = { 823 "gpio87", 824 }; 825 826 static const char * const mi2s0_data0_groups[] = { 827 "gpio126", 828 }; 829 830 static const char * const mi2s0_data1_groups[] = { 831 "gpio127", 832 }; 833 834 static const char * const mi2s0_sck_groups[] = { 835 "gpio125", 836 }; 837 838 static const char * const mi2s0_ws_groups[] = { 839 "gpio128", 840 }; 841 842 static const char * const mi2s1_data0_groups[] = { 843 "gpio130", 844 }; 845 846 static const char * const mi2s1_data1_groups[] = { 847 "gpio131", 848 }; 849 850 static const char * const mi2s1_sck_groups[] = { 851 "gpio129", 852 }; 853 854 static const char * const mi2s1_ws_groups[] = { 855 "gpio132", 856 }; 857 858 static const char * const mi2s2_data0_groups[] = { 859 "gpio121", 860 }; 861 862 static const char * const mi2s2_data1_groups[] = { 863 "gpio124", 864 }; 865 866 static const char * const mi2s2_sck_groups[] = { 867 "gpio120", 868 }; 869 870 static const char * const mi2s2_ws_groups[] = { 871 "gpio122", 872 }; 873 874 static const char * const mss_grfc0_groups[] = { 875 "gpio141", "gpio158", 876 }; 877 878 static const char * const mss_grfc1_groups[] = { 879 "gpio142", 880 }; 881 882 static const char * const mss_grfc10_groups[] = { 883 "gpio153", 884 }; 885 886 static const char * const mss_grfc11_groups[] = { 887 "gpio154", 888 }; 889 890 static const char * const mss_grfc12_groups[] = { 891 "gpio157", 892 }; 893 894 static const char * const mss_grfc2_groups[] = { 895 "gpio143", 896 }; 897 898 static const char * const mss_grfc3_groups[] = { 899 "gpio144", 900 }; 901 902 static const char * const mss_grfc4_groups[] = { 903 "gpio145", 904 }; 905 906 static const char * const mss_grfc5_groups[] = { 907 "gpio146", 908 }; 909 910 static const char * const mss_grfc6_groups[] = { 911 "gpio147", 912 }; 913 914 static const char * const mss_grfc7_groups[] = { 915 "gpio148", 916 }; 917 918 static const char * const mss_grfc8_groups[] = { 919 "gpio149", 920 }; 921 922 static const char * const mss_grfc9_groups[] = { 923 "gpio150", 924 }; 925 926 static const char * const nav_gpio_groups[] = { 927 "gpio155", "gpio156", "gpio157", 928 }; 929 930 static const char * const pa_indicator_groups[] = { 931 "gpio157", 932 }; 933 934 static const char * const pcie0_clkreqn_groups[] = { 935 "gpio95", 936 }; 937 938 static const char * const pcie1_clkreqn_groups[] = { 939 "gpio98", 940 }; 941 942 static const char * const phase_flag_groups[] = { 943 "gpio12", "gpio13", "gpio16", "gpio17", "gpio28", "gpio29", "gpio30", 944 "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", "gpio72", "gpio73", 945 "gpio74", "gpio75", "gpio76", "gpio77", "gpio78", "gpio79", "gpio103", 946 "gpio104", "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", 947 "gpio110", "gpio111", "gpio112", "gpio113", "gpio114", 948 }; 949 950 static const char * const pll_bist_groups[] = { 951 "gpio81", 952 }; 953 954 static const char * const pll_clk_groups[] = { 955 "gpio81", 956 }; 957 958 static const char * const pri_mi2s_groups[] = { 959 "gpio123", 960 }; 961 962 static const char * const prng_rosc_groups[] = { 963 "gpio185", 964 }; 965 966 static const char * const qdss_cti_groups[] = { 967 "gpio14", "gpio27", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91", "gpio92", 968 }; 969 970 static const char * const qdss_gpio_groups[] = { 971 "gpio100", "gpio101", "gpio102", "gpio103", "gpio104", "gpio105", "gpio106", "gpio107", 972 "gpio108", "gpio109", "gpio110", "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", 973 "gpio116", "gpio117", "gpio183", "gpio184", "gpio185", "gpio186", "gpio187", "gpio188", 974 "gpio189", "gpio190", "gpio191", "gpio192", "gpio193", "gpio194", "gpio195", "gpio196", 975 "gpio197", "gpio198", "gpio199", "gpio200", 976 }; 977 978 static const char * const qlink0_enable_groups[] = { 979 "gpio160", 980 }; 981 982 static const char * const qlink0_request_groups[] = { 983 "gpio159", 984 }; 985 986 static const char * const qlink0_wmss_groups[] = { 987 "gpio161", 988 }; 989 990 static const char * const qlink1_enable_groups[] = { 991 "gpio163", 992 }; 993 994 static const char * const qlink1_request_groups[] = { 995 "gpio162", 996 }; 997 998 static const char * const qlink1_wmss_groups[] = { 999 "gpio164", 1000 }; 1001 1002 static const char * const qlink2_enable_groups[] = { 1003 "gpio166", 1004 }; 1005 1006 static const char * const qlink2_request_groups[] = { 1007 "gpio165", 1008 }; 1009 1010 static const char * const qlink2_wmss_groups[] = { 1011 "gpio167", 1012 }; 1013 1014 static const char * const qspi0_groups[] = { 1015 "gpio44", 1016 }; 1017 1018 static const char * const qspi1_groups[] = { 1019 "gpio45", 1020 }; 1021 1022 static const char * const qspi2_groups[] = { 1023 "gpio48", 1024 }; 1025 1026 static const char * const qspi3_groups[] = { 1027 "gpio49", 1028 }; 1029 1030 static const char * const qspi_clk_groups[] = { 1031 "gpio50", 1032 }; 1033 1034 static const char * const qspi_cs_groups[] = { 1035 "gpio47", "gpio51", 1036 }; 1037 1038 static const char * const qup0_groups[] = { 1039 "gpio4", "gpio5", "gpio6", "gpio7", 1040 }; 1041 1042 static const char * const qup1_groups[] = { 1043 "gpio8", "gpio9", "gpio10", "gpio11", 1044 }; 1045 1046 static const char * const qup10_groups[] = { 1047 "gpio44", "gpio45", "gpio46", "gpio47", 1048 }; 1049 1050 static const char * const qup11_groups[] = { 1051 "gpio48", "gpio49", "gpio50", "gpio51", 1052 }; 1053 1054 static const char * const qup12_groups[] = { 1055 "gpio52", "gpio53", "gpio54", "gpio55", 1056 }; 1057 1058 static const char * const qup13_groups[] = { 1059 "gpio0", "gpio1", "gpio2", "gpio3", 1060 }; 1061 1062 static const char * const qup14_groups[] = { 1063 "gpio56", "gpio57", "gpio58", "gpio59", 1064 }; 1065 1066 static const char * const qup15_groups[] = { 1067 "gpio60", "gpio61", "gpio62", "gpio63", 1068 }; 1069 1070 static const char * const qup16_groups[] = { 1071 "gpio64", "gpio65", "gpio66", "gpio67", 1072 }; 1073 1074 static const char * const qup17_groups[] = { 1075 "gpio72", "gpio73", "gpio74", "gpio75", 1076 }; 1077 1078 static const char * const qup18_groups[] = { 1079 "gpio68", "gpio69", "gpio70", "gpio71", 1080 }; 1081 1082 static const char * const qup19_groups[] = { 1083 "gpio76", "gpio77", "gpio78", "gpio79", 1084 }; 1085 1086 static const char * const qup2_groups[] = { 1087 "gpio12", "gpio13", "gpio14", "gpio15", 1088 }; 1089 1090 static const char * const qup3_groups[] = { 1091 "gpio16", "gpio17", "gpio18", "gpio19", 1092 }; 1093 1094 static const char * const qup4_groups[] = { 1095 "gpio20", "gpio21", "gpio22", "gpio23", 1096 }; 1097 1098 static const char * const qup5_groups[] = { 1099 "gpio24", "gpio25", "gpio26", "gpio27", 1100 }; 1101 1102 static const char * const qup6_groups[] = { 1103 "gpio28", "gpio29", "gpio30", "gpio31", 1104 }; 1105 1106 static const char * const qup7_groups[] = { 1107 "gpio32", "gpio33", "gpio34", "gpio35", 1108 }; 1109 1110 static const char * const qup8_groups[] = { 1111 "gpio36", "gpio37", "gpio38", "gpio39", 1112 }; 1113 1114 static const char * const qup9_groups[] = { 1115 "gpio40", "gpio41", "gpio42", "gpio43", 1116 }; 1117 1118 static const char * const qup_l4_groups[] = { 1119 "gpio2", "gpio6", "gpio58", "gpio63", 1120 }; 1121 1122 static const char * const qup_l5_groups[] = { 1123 "gpio3", "gpio7", "gpio59", "gpio66", 1124 }; 1125 1126 static const char * const qup_l6_groups[] = { 1127 "gpio10", "gpio42", "gpio62", "gpio67", 1128 }; 1129 1130 static const char * const sd_write_groups[] = { 1131 "gpio93", 1132 }; 1133 1134 static const char * const sdc40_groups[] = { 1135 "gpio44", 1136 }; 1137 1138 static const char * const sdc41_groups[] = { 1139 "gpio45", 1140 }; 1141 1142 static const char * const sdc42_groups[] = { 1143 "gpio48", 1144 }; 1145 1146 static const char * const sdc43_groups[] = { 1147 "gpio49", 1148 }; 1149 1150 static const char * const sdc4_clk_groups[] = { 1151 "gpio50", 1152 }; 1153 1154 static const char * const sdc4_cmd_groups[] = { 1155 "gpio51", 1156 }; 1157 1158 static const char * const sec_mi2s_groups[] = { 1159 "gpio124", 1160 }; 1161 1162 static const char * const tb_trig_groups[] = { 1163 "gpio64", "gpio136", 1164 }; 1165 1166 static const char * const tgu_ch0_groups[] = { 1167 "gpio99", 1168 }; 1169 1170 static const char * const tgu_ch1_groups[] = { 1171 "gpio100", 1172 }; 1173 1174 static const char * const tgu_ch2_groups[] = { 1175 "gpio101", 1176 }; 1177 1178 static const char * const tgu_ch3_groups[] = { 1179 "gpio102", 1180 }; 1181 1182 static const char * const tsense_pwm1_groups[] = { 1183 "gpio88", 1184 }; 1185 1186 static const char * const tsense_pwm2_groups[] = { 1187 "gpio88", 1188 }; 1189 1190 static const char * const uim0_clk_groups[] = { 1191 "gpio138", 1192 }; 1193 1194 static const char * const uim0_data_groups[] = { 1195 "gpio137", 1196 }; 1197 1198 static const char * const uim0_present_groups[] = { 1199 "gpio140", 1200 }; 1201 1202 static const char * const uim0_reset_groups[] = { 1203 "gpio139", 1204 }; 1205 1206 static const char * const uim1_clk_groups[] = { 1207 "gpio134", 1208 }; 1209 1210 static const char * const uim1_data_groups[] = { 1211 "gpio133", 1212 }; 1213 1214 static const char * const uim1_present_groups[] = { 1215 "gpio136", 1216 }; 1217 1218 static const char * const uim1_reset_groups[] = { 1219 "gpio135", 1220 }; 1221 1222 static const char * const usb2phy_ac_groups[] = { 1223 "gpio39", "gpio80", 1224 }; 1225 1226 static const char * const usb_phy_groups[] = { 1227 "gpio81", 1228 }; 1229 1230 static const char * const vfr_0_groups[] = { 1231 "gpio84", 1232 }; 1233 1234 static const char * const vfr_1_groups[] = { 1235 "gpio90", 1236 }; 1237 1238 static const char * const vsense_trigger_groups[] = { 1239 "gpio78", 1240 }; 1241 1242 static const struct pinfunction sm8350_functions[] = { 1243 MSM_PIN_FUNCTION(atest_char), 1244 MSM_PIN_FUNCTION(atest_usb), 1245 MSM_PIN_FUNCTION(audio_ref), 1246 MSM_PIN_FUNCTION(cam_mclk), 1247 MSM_PIN_FUNCTION(cci_async), 1248 MSM_PIN_FUNCTION(cci_i2c), 1249 MSM_PIN_FUNCTION(cci_timer), 1250 MSM_PIN_FUNCTION(cmu_rng), 1251 MSM_PIN_FUNCTION(coex_uart1), 1252 MSM_PIN_FUNCTION(coex_uart2), 1253 MSM_PIN_FUNCTION(cri_trng), 1254 MSM_PIN_FUNCTION(cri_trng0), 1255 MSM_PIN_FUNCTION(cri_trng1), 1256 MSM_PIN_FUNCTION(dbg_out), 1257 MSM_PIN_FUNCTION(ddr_bist), 1258 MSM_PIN_FUNCTION(ddr_pxi0), 1259 MSM_PIN_FUNCTION(ddr_pxi1), 1260 MSM_PIN_FUNCTION(ddr_pxi2), 1261 MSM_PIN_FUNCTION(ddr_pxi3), 1262 MSM_PIN_FUNCTION(dp_hot), 1263 MSM_PIN_FUNCTION(dp_lcd), 1264 MSM_PIN_FUNCTION(gcc_gp1), 1265 MSM_PIN_FUNCTION(gcc_gp2), 1266 MSM_PIN_FUNCTION(gcc_gp3), 1267 MSM_GPIO_PIN_FUNCTION(gpio), 1268 MSM_PIN_FUNCTION(ibi_i3c), 1269 MSM_PIN_FUNCTION(jitter_bist), 1270 MSM_PIN_FUNCTION(lpass_slimbus), 1271 MSM_PIN_FUNCTION(mdp_vsync), 1272 MSM_PIN_FUNCTION(mdp_vsync0), 1273 MSM_PIN_FUNCTION(mdp_vsync1), 1274 MSM_PIN_FUNCTION(mdp_vsync2), 1275 MSM_PIN_FUNCTION(mdp_vsync3), 1276 MSM_PIN_FUNCTION(mi2s0_data0), 1277 MSM_PIN_FUNCTION(mi2s0_data1), 1278 MSM_PIN_FUNCTION(mi2s0_sck), 1279 MSM_PIN_FUNCTION(mi2s0_ws), 1280 MSM_PIN_FUNCTION(mi2s1_data0), 1281 MSM_PIN_FUNCTION(mi2s1_data1), 1282 MSM_PIN_FUNCTION(mi2s1_sck), 1283 MSM_PIN_FUNCTION(mi2s1_ws), 1284 MSM_PIN_FUNCTION(mi2s2_data0), 1285 MSM_PIN_FUNCTION(mi2s2_data1), 1286 MSM_PIN_FUNCTION(mi2s2_sck), 1287 MSM_PIN_FUNCTION(mi2s2_ws), 1288 MSM_PIN_FUNCTION(mss_grfc0), 1289 MSM_PIN_FUNCTION(mss_grfc1), 1290 MSM_PIN_FUNCTION(mss_grfc10), 1291 MSM_PIN_FUNCTION(mss_grfc11), 1292 MSM_PIN_FUNCTION(mss_grfc12), 1293 MSM_PIN_FUNCTION(mss_grfc2), 1294 MSM_PIN_FUNCTION(mss_grfc3), 1295 MSM_PIN_FUNCTION(mss_grfc4), 1296 MSM_PIN_FUNCTION(mss_grfc5), 1297 MSM_PIN_FUNCTION(mss_grfc6), 1298 MSM_PIN_FUNCTION(mss_grfc7), 1299 MSM_PIN_FUNCTION(mss_grfc8), 1300 MSM_PIN_FUNCTION(mss_grfc9), 1301 MSM_PIN_FUNCTION(nav_gpio), 1302 MSM_PIN_FUNCTION(pa_indicator), 1303 MSM_PIN_FUNCTION(pcie0_clkreqn), 1304 MSM_PIN_FUNCTION(pcie1_clkreqn), 1305 MSM_PIN_FUNCTION(phase_flag), 1306 MSM_PIN_FUNCTION(pll_bist), 1307 MSM_PIN_FUNCTION(pll_clk), 1308 MSM_PIN_FUNCTION(pri_mi2s), 1309 MSM_PIN_FUNCTION(prng_rosc), 1310 MSM_PIN_FUNCTION(qdss_cti), 1311 MSM_PIN_FUNCTION(qdss_gpio), 1312 MSM_PIN_FUNCTION(qlink0_enable), 1313 MSM_PIN_FUNCTION(qlink0_request), 1314 MSM_PIN_FUNCTION(qlink0_wmss), 1315 MSM_PIN_FUNCTION(qlink1_enable), 1316 MSM_PIN_FUNCTION(qlink1_request), 1317 MSM_PIN_FUNCTION(qlink1_wmss), 1318 MSM_PIN_FUNCTION(qlink2_enable), 1319 MSM_PIN_FUNCTION(qlink2_request), 1320 MSM_PIN_FUNCTION(qlink2_wmss), 1321 MSM_PIN_FUNCTION(qspi0), 1322 MSM_PIN_FUNCTION(qspi1), 1323 MSM_PIN_FUNCTION(qspi2), 1324 MSM_PIN_FUNCTION(qspi3), 1325 MSM_PIN_FUNCTION(qspi_clk), 1326 MSM_PIN_FUNCTION(qspi_cs), 1327 MSM_PIN_FUNCTION(qup0), 1328 MSM_PIN_FUNCTION(qup1), 1329 MSM_PIN_FUNCTION(qup10), 1330 MSM_PIN_FUNCTION(qup11), 1331 MSM_PIN_FUNCTION(qup12), 1332 MSM_PIN_FUNCTION(qup13), 1333 MSM_PIN_FUNCTION(qup14), 1334 MSM_PIN_FUNCTION(qup15), 1335 MSM_PIN_FUNCTION(qup16), 1336 MSM_PIN_FUNCTION(qup17), 1337 MSM_PIN_FUNCTION(qup18), 1338 MSM_PIN_FUNCTION(qup19), 1339 MSM_PIN_FUNCTION(qup2), 1340 MSM_PIN_FUNCTION(qup3), 1341 MSM_PIN_FUNCTION(qup4), 1342 MSM_PIN_FUNCTION(qup5), 1343 MSM_PIN_FUNCTION(qup6), 1344 MSM_PIN_FUNCTION(qup7), 1345 MSM_PIN_FUNCTION(qup8), 1346 MSM_PIN_FUNCTION(qup9), 1347 MSM_PIN_FUNCTION(qup_l4), 1348 MSM_PIN_FUNCTION(qup_l5), 1349 MSM_PIN_FUNCTION(qup_l6), 1350 MSM_PIN_FUNCTION(sd_write), 1351 MSM_PIN_FUNCTION(sdc40), 1352 MSM_PIN_FUNCTION(sdc41), 1353 MSM_PIN_FUNCTION(sdc42), 1354 MSM_PIN_FUNCTION(sdc43), 1355 MSM_PIN_FUNCTION(sdc4_clk), 1356 MSM_PIN_FUNCTION(sdc4_cmd), 1357 MSM_PIN_FUNCTION(sec_mi2s), 1358 MSM_PIN_FUNCTION(tb_trig), 1359 MSM_PIN_FUNCTION(tgu_ch0), 1360 MSM_PIN_FUNCTION(tgu_ch1), 1361 MSM_PIN_FUNCTION(tgu_ch2), 1362 MSM_PIN_FUNCTION(tgu_ch3), 1363 MSM_PIN_FUNCTION(tsense_pwm1), 1364 MSM_PIN_FUNCTION(tsense_pwm2), 1365 MSM_PIN_FUNCTION(uim0_clk), 1366 MSM_PIN_FUNCTION(uim0_data), 1367 MSM_PIN_FUNCTION(uim0_present), 1368 MSM_PIN_FUNCTION(uim0_reset), 1369 MSM_PIN_FUNCTION(uim1_clk), 1370 MSM_PIN_FUNCTION(uim1_data), 1371 MSM_PIN_FUNCTION(uim1_present), 1372 MSM_PIN_FUNCTION(uim1_reset), 1373 MSM_PIN_FUNCTION(usb2phy_ac), 1374 MSM_PIN_FUNCTION(usb_phy), 1375 MSM_PIN_FUNCTION(vfr_0), 1376 MSM_PIN_FUNCTION(vfr_1), 1377 MSM_PIN_FUNCTION(vsense_trigger), 1378 }; 1379 1380 /* Every pin is maintained as a single group, and missing or non-existing pin 1381 * would be maintained as dummy group to synchronize pin group index with 1382 * pin descriptor registered with pinctrl core. 1383 * Clients would not be able to request these dummy pin groups. 1384 */ 1385 static const struct msm_pingroup sm8350_groups[] = { 1386 [0] = PINGROUP(0, qup13, _, _, _, _, _, _, _, _), 1387 [1] = PINGROUP(1, qup13, _, _, _, _, _, _, _, _), 1388 [2] = PINGROUP(2, qup13, qup_l4, _, _, _, _, _, _, _), 1389 [3] = PINGROUP(3, qup13, qup_l5, _, _, _, _, _, _, _), 1390 [4] = PINGROUP(4, qup0, _, _, _, _, _, _, _, _), 1391 [5] = PINGROUP(5, qup0, _, _, _, _, _, _, _, _), 1392 [6] = PINGROUP(6, qup0, qup_l4, _, _, _, _, _, _, _), 1393 [7] = PINGROUP(7, qup0, qup_l5, _, _, _, _, _, _, _), 1394 [8] = PINGROUP(8, qup1, _, _, _, _, _, _, _, _), 1395 [9] = PINGROUP(9, qup1, _, _, _, _, _, _, _, _), 1396 [10] = PINGROUP(10, qup1, qup_l6, _, _, _, _, _, _, _), 1397 [11] = PINGROUP(11, qup1, _, _, _, _, _, _, _, _), 1398 [12] = PINGROUP(12, qup2, phase_flag, _, _, _, _, _, _, _), 1399 [13] = PINGROUP(13, qup2, phase_flag, _, _, _, _, _, _, _), 1400 [14] = PINGROUP(14, qup2, qdss_cti, dbg_out, _, _, _, _, _, _), 1401 [15] = PINGROUP(15, qup2, mdp_vsync, _, _, _, _, _, _, _), 1402 [16] = PINGROUP(16, qup3, phase_flag, _, _, _, _, _, _, _), 1403 [17] = PINGROUP(17, qup3, phase_flag, _, _, _, _, _, _, _), 1404 [18] = PINGROUP(18, qup3, _, _, _, _, _, _, _, _), 1405 [19] = PINGROUP(19, qup3, _, _, _, _, _, _, _, _), 1406 [20] = PINGROUP(20, qup4, _, _, _, _, _, _, _, _), 1407 [21] = PINGROUP(21, qup4, _, _, _, _, _, _, _, _), 1408 [22] = PINGROUP(22, qup4, _, _, _, _, _, _, _, _), 1409 [23] = PINGROUP(23, qup4, _, _, _, _, _, _, _, _), 1410 [24] = PINGROUP(24, qup5, _, _, _, _, _, _, _, _), 1411 [25] = PINGROUP(25, qup5, _, _, _, _, _, _, _, _), 1412 [26] = PINGROUP(26, qup5, mdp_vsync, _, _, _, _, _, _, _), 1413 [27] = PINGROUP(27, qup5, qdss_cti, _, _, _, _, _, _, _), 1414 [28] = PINGROUP(28, qup6, phase_flag, _, _, _, _, _, _, _), 1415 [29] = PINGROUP(29, qup6, phase_flag, _, _, _, _, _, _, _), 1416 [30] = PINGROUP(30, qup6, phase_flag, _, _, _, _, _, _, _), 1417 [31] = PINGROUP(31, qup6, phase_flag, _, _, _, _, _, _, _), 1418 [32] = PINGROUP(32, qup7, phase_flag, _, _, _, _, _, _, _), 1419 [33] = PINGROUP(33, qup7, phase_flag, _, _, _, _, _, _, _), 1420 [34] = PINGROUP(34, qup7, phase_flag, _, _, _, _, _, _, _), 1421 [35] = PINGROUP(35, qup7, phase_flag, _, _, _, _, _, _, _), 1422 [36] = PINGROUP(36, qup8, ibi_i3c, ddr_bist, _, _, _, _, _, _), 1423 [37] = PINGROUP(37, qup8, ibi_i3c, ddr_bist, _, _, _, _, _, _), 1424 [38] = PINGROUP(38, qup8, _, _, _, _, _, _, _, _), 1425 [39] = PINGROUP(39, qup8, usb2phy_ac, _, _, _, _, _, _, _), 1426 [40] = PINGROUP(40, qup9, ddr_bist, _, _, _, _, _, _, _), 1427 [41] = PINGROUP(41, qup9, ddr_bist, _, _, _, _, _, _, _), 1428 [42] = PINGROUP(42, qup9, qup_l6, _, _, _, _, _, _, _), 1429 [43] = PINGROUP(43, qup9, ddr_pxi3, _, _, _, _, _, _, _), 1430 [44] = PINGROUP(44, qup10, qspi0, sdc40, ddr_pxi3, _, _, _, _, _), 1431 [45] = PINGROUP(45, qup10, qspi1, sdc41, ddr_pxi2, _, _, _, _, _), 1432 [46] = PINGROUP(46, qup10, _, _, _, _, _, _, _, _), 1433 [47] = PINGROUP(47, qup10, qspi_cs, ddr_pxi2, _, _, _, _, _, _), 1434 [48] = PINGROUP(48, qup11, qspi2, sdc42, ddr_pxi1, _, _, _, _, _), 1435 [49] = PINGROUP(49, qup11, qspi3, sdc43, ddr_pxi1, _, _, _, _, _), 1436 [50] = PINGROUP(50, qup11, qspi_clk, sdc4_clk, _, _, _, _, _, _), 1437 [51] = PINGROUP(51, qup11, qspi_cs, sdc4_cmd, ddr_pxi0, _, _, _, _, _), 1438 [52] = PINGROUP(52, qup12, ddr_pxi0, _, _, _, _, _, _, _), 1439 [53] = PINGROUP(53, qup12, _, _, _, _, _, _, _, _), 1440 [54] = PINGROUP(54, qup12, _, _, _, _, _, _, _, _), 1441 [55] = PINGROUP(55, qup12, atest_usb, _, _, _, _, _, _, _), 1442 [56] = PINGROUP(56, qup14, ibi_i3c, _, _, _, _, _, _, _), 1443 [57] = PINGROUP(57, qup14, ibi_i3c, _, _, _, _, _, _, _), 1444 [58] = PINGROUP(58, qup14, qup_l4, _, _, _, _, _, _, _), 1445 [59] = PINGROUP(59, qup14, qup_l5, _, _, _, _, _, _, _), 1446 [60] = PINGROUP(60, qup15, ibi_i3c, _, _, _, _, _, _, _), 1447 [61] = PINGROUP(61, qup15, ibi_i3c, _, _, _, _, _, _, _), 1448 [62] = PINGROUP(62, qup15, qup_l6, _, _, _, _, _, _, _), 1449 [63] = PINGROUP(63, qup15, qup_l4, _, _, _, _, _, _, _), 1450 [64] = PINGROUP(64, qup16, tb_trig, _, _, _, _, _, _, _), 1451 [65] = PINGROUP(65, qup16, _, _, _, _, _, _, _, _), 1452 [66] = PINGROUP(66, qup16, qup_l5, _, _, _, _, _, _, _), 1453 [67] = PINGROUP(67, qup16, qup_l6, _, _, _, _, _, _, _), 1454 [68] = PINGROUP(68, qup18, _, _, _, _, _, _, _, _), 1455 [69] = PINGROUP(69, qup18, _, _, _, _, _, _, _, _), 1456 [70] = PINGROUP(70, qup18, _, _, _, _, _, _, _, _), 1457 [71] = PINGROUP(71, qup18, _, _, _, _, _, _, _, _), 1458 [72] = PINGROUP(72, qup17, phase_flag, _, _, _, _, _, _, _), 1459 [73] = PINGROUP(73, qup17, phase_flag, _, _, _, _, _, _, _), 1460 [74] = PINGROUP(74, qup17, phase_flag, _, _, _, _, _, _, _), 1461 [75] = PINGROUP(75, qup17, phase_flag, _, _, _, _, _, _, _), 1462 [76] = PINGROUP(76, qup19, phase_flag, _, _, _, _, _, _, _), 1463 [77] = PINGROUP(77, qup19, phase_flag, _, _, _, _, _, _, _), 1464 [78] = PINGROUP(78, qup19, phase_flag, _, vsense_trigger, _, _, _, _, _), 1465 [79] = PINGROUP(79, qup19, phase_flag, _, _, _, _, _, _, _), 1466 [80] = PINGROUP(80, usb2phy_ac, jitter_bist, atest_usb, _, _, _, _, _, _), 1467 [81] = PINGROUP(81, usb_phy, pll_bist, pll_clk, atest_usb, _, _, _, _, _), 1468 [82] = PINGROUP(82, mdp_vsync, _, _, _, _, _, _, _, _), 1469 [83] = PINGROUP(83, mdp_vsync, dp_lcd, _, _, _, _, _, _, _), 1470 [84] = PINGROUP(84, mdp_vsync, vfr_0, _, _, _, _, _, _, _), 1471 [85] = PINGROUP(85, atest_char, _, _, _, _, _, _, _, _), 1472 [86] = PINGROUP(86, mdp_vsync0, mdp_vsync1, atest_char, _, _, _, _, _, _), 1473 [87] = PINGROUP(87, dp_hot, mdp_vsync2, mdp_vsync3, qdss_cti, atest_char, _, _, _, _), 1474 [88] = PINGROUP(88, qdss_cti, tsense_pwm1, tsense_pwm2, _, _, _, _, _, _), 1475 [89] = PINGROUP(89, qdss_cti, _, _, _, _, _, _, _, _), 1476 [90] = PINGROUP(90, vfr_1, qdss_cti, _, _, _, _, _, _, _), 1477 [91] = PINGROUP(91, qdss_cti, _, _, _, _, _, _, _, _), 1478 [92] = PINGROUP(92, qdss_cti, _, _, _, _, _, _, _, _), 1479 [93] = PINGROUP(93, sd_write, _, _, _, _, _, _, _, _), 1480 [94] = PINGROUP(94, _, _, _, _, _, _, _, _, _), 1481 [95] = PINGROUP(95, pcie0_clkreqn, _, _, _, _, _, _, _, _), 1482 [96] = PINGROUP(96, _, _, _, _, _, _, _, _, _), 1483 [97] = PINGROUP(97, _, _, _, _, _, _, _, _, _), 1484 [98] = PINGROUP(98, pcie1_clkreqn, _, _, _, _, _, _, _, _), 1485 [99] = PINGROUP(99, tgu_ch0, _, _, _, _, _, _, _, _), 1486 [100] = PINGROUP(100, cam_mclk, tgu_ch1, qdss_gpio, _, _, _, _, _, _), 1487 [101] = PINGROUP(101, cam_mclk, tgu_ch2, qdss_gpio, _, _, _, _, _, _), 1488 [102] = PINGROUP(102, cam_mclk, tgu_ch3, qdss_gpio, _, _, _, _, _, _), 1489 [103] = PINGROUP(103, cam_mclk, phase_flag, _, qdss_gpio, _, _, _, _, _), 1490 [104] = PINGROUP(104, cam_mclk, phase_flag, _, qdss_gpio, _, _, _, _, _), 1491 [105] = PINGROUP(105, cam_mclk, phase_flag, _, qdss_gpio, _, _, _, _, _), 1492 [106] = PINGROUP(106, cci_async, phase_flag, _, qdss_gpio, _, _, _, _, _), 1493 [107] = PINGROUP(107, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), 1494 [108] = PINGROUP(108, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), 1495 [109] = PINGROUP(109, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), 1496 [110] = PINGROUP(110, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), 1497 [111] = PINGROUP(111, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), 1498 [112] = PINGROUP(112, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), 1499 [113] = PINGROUP(113, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), 1500 [114] = PINGROUP(114, cci_i2c, phase_flag, _, qdss_gpio, _, _, _, _, _), 1501 [115] = PINGROUP(115, cci_timer, gcc_gp1, qdss_gpio, atest_char, _, _, _, _, _), 1502 [116] = PINGROUP(116, cci_timer, gcc_gp2, qdss_gpio, _, _, _, _, _, _), 1503 [117] = PINGROUP(117, cci_timer, gcc_gp3, qdss_gpio, atest_char, _, _, _, _, _), 1504 [118] = PINGROUP(118, cci_timer, cci_async, _, _, _, _, _, _, _), 1505 [119] = PINGROUP(119, cci_timer, cci_async, _, _, _, _, _, _, _), 1506 [120] = PINGROUP(120, mi2s2_sck, _, _, _, _, _, _, _, _), 1507 [121] = PINGROUP(121, mi2s2_data0, _, _, _, _, _, _, _, _), 1508 [122] = PINGROUP(122, mi2s2_ws, _, _, _, _, _, _, _, _), 1509 [123] = PINGROUP(123, pri_mi2s, _, _, _, _, _, _, _, _), 1510 [124] = PINGROUP(124, sec_mi2s, audio_ref, mi2s2_data1, _, _, _, _, _, _), 1511 [125] = PINGROUP(125, mi2s0_sck, _, _, _, _, _, _, _, _), 1512 [126] = PINGROUP(126, mi2s0_data0, _, _, _, _, _, _, _, _), 1513 [127] = PINGROUP(127, mi2s0_data1, _, _, _, _, _, _, _, _), 1514 [128] = PINGROUP(128, mi2s0_ws, _, _, _, _, _, _, _, _), 1515 [129] = PINGROUP(129, lpass_slimbus, mi2s1_sck, gcc_gp1, _, _, _, _, _, _), 1516 [130] = PINGROUP(130, lpass_slimbus, mi2s1_data0, gcc_gp2, _, _, _, _, _, _), 1517 [131] = PINGROUP(131, mi2s1_data1, gcc_gp3, _, _, _, _, _, _, _), 1518 [132] = PINGROUP(132, mi2s1_ws, _, _, _, _, _, _, _, _), 1519 [133] = PINGROUP(133, uim1_data, _, _, _, _, _, _, _, _), 1520 [134] = PINGROUP(134, uim1_clk, _, _, _, _, _, _, _, _), 1521 [135] = PINGROUP(135, uim1_reset, _, _, _, _, _, _, _, _), 1522 [136] = PINGROUP(136, uim1_present, tb_trig, _, _, _, _, _, _, _), 1523 [137] = PINGROUP(137, uim0_data, _, _, _, _, _, _, _, _), 1524 [138] = PINGROUP(138, uim0_clk, _, _, _, _, _, _, _, _), 1525 [139] = PINGROUP(139, uim0_reset, _, _, _, _, _, _, _, _), 1526 [140] = PINGROUP(140, uim0_present, _, _, _, _, _, _, _, _), 1527 [141] = PINGROUP(141, _, mss_grfc0, _, _, _, _, _, _, _), 1528 [142] = PINGROUP(142, _, mss_grfc1, _, _, _, _, _, _, _), 1529 [143] = PINGROUP(143, _, mss_grfc2, _, _, _, _, _, _, _), 1530 [144] = PINGROUP(144, _, mss_grfc3, _, _, _, _, _, _, _), 1531 [145] = PINGROUP(145, _, mss_grfc4, _, _, _, _, _, _, _), 1532 [146] = PINGROUP(146, _, mss_grfc5, _, _, _, _, _, _, _), 1533 [147] = PINGROUP(147, _, mss_grfc6, _, _, _, _, _, _, _), 1534 [148] = PINGROUP(148, _, mss_grfc7, _, _, _, _, _, _, _), 1535 [149] = PINGROUP(149, _, mss_grfc8, _, _, _, _, _, _, _), 1536 [150] = PINGROUP(150, _, mss_grfc9, _, _, _, _, _, _, _), 1537 [151] = PINGROUP(151, coex_uart1, atest_usb, _, _, _, _, _, _, _), 1538 [152] = PINGROUP(152, coex_uart1, atest_usb, _, _, _, _, _, _, _), 1539 [153] = PINGROUP(153, coex_uart2, mss_grfc10, atest_usb, _, _, _, _, _, _), 1540 [154] = PINGROUP(154, coex_uart2, mss_grfc11, atest_usb, _, _, _, _, _, _), 1541 [155] = PINGROUP(155, nav_gpio, _, _, _, _, _, _, _, _), 1542 [156] = PINGROUP(156, nav_gpio, _, _, _, _, _, _, _, _), 1543 [157] = PINGROUP(157, mss_grfc12, pa_indicator, nav_gpio, _, _, _, _, _, _), 1544 [158] = PINGROUP(158, mss_grfc0, atest_usb, _, _, _, _, _, _, _), 1545 [159] = PINGROUP(159, qlink0_request, atest_usb, _, _, _, _, _, _, _), 1546 [160] = PINGROUP(160, qlink0_enable, _, _, _, _, _, _, _, _), 1547 [161] = PINGROUP(161, qlink0_wmss, atest_usb, _, _, _, _, _, _, _), 1548 [162] = PINGROUP(162, qlink1_request, _, _, _, _, _, _, _, _), 1549 [163] = PINGROUP(163, qlink1_enable, _, _, _, _, _, _, _, _), 1550 [164] = PINGROUP(164, qlink1_wmss, _, _, _, _, _, _, _, _), 1551 [165] = PINGROUP(165, qlink2_request, _, _, _, _, _, _, _, _), 1552 [166] = PINGROUP(166, qlink2_enable, _, _, _, _, _, _, _, _), 1553 [167] = PINGROUP(167, qlink2_wmss, _, _, _, _, _, _, _, _), 1554 [168] = PINGROUP(168, _, _, _, _, _, _, _, _, _), 1555 [169] = PINGROUP(169, _, _, _, _, _, _, _, _, _), 1556 [170] = PINGROUP(170, _, _, _, _, _, _, _, _, _), 1557 [171] = PINGROUP(171, _, _, _, _, _, _, _, _, _), 1558 [172] = PINGROUP(172, _, _, _, _, _, _, _, _, _), 1559 [173] = PINGROUP(173, _, _, _, _, _, _, _, _, _), 1560 [174] = PINGROUP(174, cmu_rng, _, _, _, _, _, _, _, _), 1561 [175] = PINGROUP(175, cmu_rng, _, _, _, _, _, _, _, _), 1562 [176] = PINGROUP(176, cmu_rng, _, _, _, _, _, _, _, _), 1563 [177] = PINGROUP(177, cmu_rng, _, _, _, _, _, _, _, _), 1564 [178] = PINGROUP(178, _, _, _, _, _, _, _, _, _), 1565 [179] = PINGROUP(179, _, _, _, _, _, _, _, _, _), 1566 [180] = PINGROUP(180, _, _, _, _, _, _, _, _, _), 1567 [181] = PINGROUP(181, _, _, _, _, _, _, _, _, _), 1568 [182] = PINGROUP(182, _, _, _, _, _, _, _, _, _), 1569 [183] = PINGROUP(183, cri_trng0, qdss_gpio, _, _, _, _, _, _, _), 1570 [184] = PINGROUP(184, cri_trng1, qdss_gpio, _, _, _, _, _, _, _), 1571 [185] = PINGROUP(185, prng_rosc, qdss_gpio, _, _, _, _, _, _, _), 1572 [186] = PINGROUP(186, cri_trng, qdss_gpio, _, _, _, _, _, _, _), 1573 [187] = PINGROUP(187, qdss_gpio, _, _, _, _, _, _, _, _), 1574 [188] = PINGROUP(188, qdss_gpio, _, _, _, _, _, _, _, _), 1575 [189] = PINGROUP(189, qdss_gpio, _, _, _, _, _, _, _, _), 1576 [190] = PINGROUP(190, qdss_gpio, _, _, _, _, _, _, _, _), 1577 [191] = PINGROUP(191, qdss_gpio, _, _, _, _, _, _, _, _), 1578 [192] = PINGROUP(192, qdss_gpio, _, _, _, _, _, _, _, _), 1579 [193] = PINGROUP(193, qdss_gpio, _, _, _, _, _, _, _, _), 1580 [194] = PINGROUP(194, qdss_gpio, _, _, _, _, _, _, _, _), 1581 [195] = PINGROUP(195, qdss_gpio, _, _, _, _, _, _, _, _), 1582 [196] = PINGROUP(196, qdss_gpio, _, _, _, _, _, _, _, _), 1583 [197] = PINGROUP(197, qdss_gpio, _, _, _, _, _, _, _, _), 1584 [198] = PINGROUP(198, qdss_gpio, _, _, _, _, _, _, _, _), 1585 [199] = PINGROUP(199, qdss_gpio, _, _, _, _, _, _, _, _), 1586 [200] = PINGROUP(200, qdss_gpio, _, _, _, _, _, _, _, _), 1587 [201] = PINGROUP(201, _, _, _, _, _, _, _, _, _), 1588 [202] = PINGROUP(202, _, _, _, _, _, _, _, _, _), 1589 [203] = UFS_RESET(ufs_reset, 0xd8000), 1590 [204] = SDC_PINGROUP(sdc2_clk, 0xcf000, 14, 6), 1591 [205] = SDC_PINGROUP(sdc2_cmd, 0xcf000, 11, 3), 1592 [206] = SDC_PINGROUP(sdc2_data, 0xcf000, 9, 0), 1593 }; 1594 1595 static const struct msm_gpio_wakeirq_map sm8350_pdc_map[] = { 1596 { 2, 117 }, { 7, 82 }, { 11, 83 }, { 14, 80 }, { 15, 146 }, 1597 { 19, 121 }, { 23, 84 }, { 26, 86 }, { 27, 75 }, { 31, 85 }, 1598 { 32, 97 }, { 34, 98 }, { 35, 131 }, { 36, 79 }, { 38, 99 }, 1599 { 39, 92 }, { 40, 101 }, { 43, 137 }, { 44, 102 }, { 46, 96 }, 1600 { 47, 93 }, { 50, 108 }, { 51, 127 }, { 55, 128 }, { 56, 81 }, 1601 { 59, 112 }, { 60, 119 }, { 63, 73 }, { 67, 74 }, { 71, 134 }, 1602 { 75, 103 }, { 79, 104 }, { 80, 126 }, { 81, 139 }, { 82, 140 }, 1603 { 83, 141 }, { 84, 124 }, { 85, 109 }, { 86, 143 }, { 87, 138 }, 1604 { 88, 122 }, { 89, 113 }, { 90, 114 }, { 91, 115 }, { 92, 76 }, 1605 { 95, 147 }, { 96, 148 }, { 98, 149 }, { 99, 150 }, { 115, 125 }, 1606 { 116, 106 }, { 117, 105 }, { 118, 116 }, { 119, 123 }, { 130, 145 }, 1607 { 136, 72 }, { 140, 100 }, { 151, 110 }, { 153, 95 }, { 155, 107 }, 1608 { 156, 94 }, { 157, 111 }, { 159, 118 }, { 162, 77 }, { 165, 78 }, 1609 { 169, 70 }, { 172, 132 }, { 174, 87 }, { 175, 88 }, { 177, 89 }, 1610 { 179, 120 }, { 180, 129 }, { 183, 90 }, { 185, 136 }, { 187, 142 }, 1611 { 190, 144 }, { 198, 91 }, { 200, 133 }, { 202, 135 }, 1612 }; 1613 1614 static const struct msm_pinctrl_soc_data sm8350_tlmm = { 1615 .pins = sm8350_pins, 1616 .npins = ARRAY_SIZE(sm8350_pins), 1617 .functions = sm8350_functions, 1618 .nfunctions = ARRAY_SIZE(sm8350_functions), 1619 .groups = sm8350_groups, 1620 .ngroups = ARRAY_SIZE(sm8350_groups), 1621 .ngpios = 204, 1622 .wakeirq_map = sm8350_pdc_map, 1623 .nwakeirq_map = ARRAY_SIZE(sm8350_pdc_map), 1624 }; 1625 1626 static int sm8350_tlmm_probe(struct platform_device *pdev) 1627 { 1628 return msm_pinctrl_probe(pdev, &sm8350_tlmm); 1629 } 1630 1631 static const struct of_device_id sm8350_tlmm_of_match[] = { 1632 { .compatible = "qcom,sm8350-tlmm", }, 1633 { }, 1634 }; 1635 MODULE_DEVICE_TABLE(of, sm8350_tlmm_of_match); 1636 1637 static struct platform_driver sm8350_tlmm_driver = { 1638 .driver = { 1639 .name = "sm8350-tlmm", 1640 .of_match_table = sm8350_tlmm_of_match, 1641 }, 1642 .probe = sm8350_tlmm_probe, 1643 }; 1644 1645 static int __init sm8350_tlmm_init(void) 1646 { 1647 return platform_driver_register(&sm8350_tlmm_driver); 1648 } 1649 arch_initcall(sm8350_tlmm_init); 1650 1651 static void __exit sm8350_tlmm_exit(void) 1652 { 1653 platform_driver_unregister(&sm8350_tlmm_driver); 1654 } 1655 module_exit(sm8350_tlmm_exit); 1656 1657 MODULE_DESCRIPTION("QTI SM8350 TLMM driver"); 1658 MODULE_LICENSE("GPL v2"); 1659