1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2020-2021, Linaro Ltd. 5 */ 6 7 #include <linux/module.h> 8 #include <linux/of.h> 9 #include <linux/platform_device.h> 10 #include <linux/pinctrl/pinctrl.h> 11 12 #include "pinctrl-msm.h" 13 14 static const char * const sc8180x_tiles[] = { 15 "south", 16 "east", 17 "west" 18 }; 19 20 enum { 21 SOUTH, 22 EAST, 23 WEST 24 }; 25 26 #define FUNCTION(fname) \ 27 [msm_mux_##fname] = { \ 28 .name = #fname, \ 29 .groups = fname##_groups, \ 30 .ngroups = ARRAY_SIZE(fname##_groups), \ 31 } 32 33 #define REG_SIZE 0x1000 34 #define PINGROUP_OFFSET(id, _tile, offset, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ 35 { \ 36 .name = "gpio" #id, \ 37 .pins = gpio##id##_pins, \ 38 .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \ 39 .funcs = (int[]){ \ 40 msm_mux_gpio, /* gpio mode */ \ 41 msm_mux_##f1, \ 42 msm_mux_##f2, \ 43 msm_mux_##f3, \ 44 msm_mux_##f4, \ 45 msm_mux_##f5, \ 46 msm_mux_##f6, \ 47 msm_mux_##f7, \ 48 msm_mux_##f8, \ 49 msm_mux_##f9 \ 50 }, \ 51 .nfuncs = 10, \ 52 .ctl_reg = REG_SIZE * id + offset, \ 53 .io_reg = REG_SIZE * id + 0x4 + offset, \ 54 .intr_cfg_reg = REG_SIZE * id + 0x8 + offset, \ 55 .intr_status_reg = REG_SIZE * id + 0xc + offset,\ 56 .intr_target_reg = REG_SIZE * id + 0x8 + offset,\ 57 .tile = _tile, \ 58 .mux_bit = 2, \ 59 .pull_bit = 0, \ 60 .drv_bit = 6, \ 61 .oe_bit = 9, \ 62 .in_bit = 0, \ 63 .out_bit = 1, \ 64 .intr_enable_bit = 0, \ 65 .intr_status_bit = 0, \ 66 .intr_target_bit = 5, \ 67 .intr_target_kpss_val = 3, \ 68 .intr_raw_status_bit = 4, \ 69 .intr_polarity_bit = 1, \ 70 .intr_detection_bit = 2, \ 71 .intr_detection_width = 2, \ 72 } 73 74 #define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ 75 PINGROUP_OFFSET(id, _tile, 0x0, f1, f2, f3, f4, f5, f6, f7, f8, f9) 76 77 #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \ 78 { \ 79 .name = #pg_name, \ 80 .pins = pg_name##_pins, \ 81 .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \ 82 .ctl_reg = ctl, \ 83 .io_reg = 0, \ 84 .intr_cfg_reg = 0, \ 85 .intr_status_reg = 0, \ 86 .intr_target_reg = 0, \ 87 .tile = EAST, \ 88 .mux_bit = -1, \ 89 .pull_bit = pull, \ 90 .drv_bit = drv, \ 91 .oe_bit = -1, \ 92 .in_bit = -1, \ 93 .out_bit = -1, \ 94 .intr_enable_bit = -1, \ 95 .intr_status_bit = -1, \ 96 .intr_target_bit = -1, \ 97 .intr_raw_status_bit = -1, \ 98 .intr_polarity_bit = -1, \ 99 .intr_detection_bit = -1, \ 100 .intr_detection_width = -1, \ 101 } 102 103 #define UFS_RESET(pg_name) \ 104 { \ 105 .name = #pg_name, \ 106 .pins = pg_name##_pins, \ 107 .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \ 108 .ctl_reg = 0xb6000, \ 109 .io_reg = 0xb6004, \ 110 .intr_cfg_reg = 0, \ 111 .intr_status_reg = 0, \ 112 .intr_target_reg = 0, \ 113 .tile = SOUTH, \ 114 .mux_bit = -1, \ 115 .pull_bit = 3, \ 116 .drv_bit = 0, \ 117 .oe_bit = -1, \ 118 .in_bit = -1, \ 119 .out_bit = 0, \ 120 .intr_enable_bit = -1, \ 121 .intr_status_bit = -1, \ 122 .intr_target_bit = -1, \ 123 .intr_raw_status_bit = -1, \ 124 .intr_polarity_bit = -1, \ 125 .intr_detection_bit = -1, \ 126 .intr_detection_width = -1, \ 127 } 128 static const struct pinctrl_pin_desc sc8180x_pins[] = { 129 PINCTRL_PIN(0, "GPIO_0"), 130 PINCTRL_PIN(1, "GPIO_1"), 131 PINCTRL_PIN(2, "GPIO_2"), 132 PINCTRL_PIN(3, "GPIO_3"), 133 PINCTRL_PIN(4, "GPIO_4"), 134 PINCTRL_PIN(5, "GPIO_5"), 135 PINCTRL_PIN(6, "GPIO_6"), 136 PINCTRL_PIN(7, "GPIO_7"), 137 PINCTRL_PIN(8, "GPIO_8"), 138 PINCTRL_PIN(9, "GPIO_9"), 139 PINCTRL_PIN(10, "GPIO_10"), 140 PINCTRL_PIN(11, "GPIO_11"), 141 PINCTRL_PIN(12, "GPIO_12"), 142 PINCTRL_PIN(13, "GPIO_13"), 143 PINCTRL_PIN(14, "GPIO_14"), 144 PINCTRL_PIN(15, "GPIO_15"), 145 PINCTRL_PIN(16, "GPIO_16"), 146 PINCTRL_PIN(17, "GPIO_17"), 147 PINCTRL_PIN(18, "GPIO_18"), 148 PINCTRL_PIN(19, "GPIO_19"), 149 PINCTRL_PIN(20, "GPIO_20"), 150 PINCTRL_PIN(21, "GPIO_21"), 151 PINCTRL_PIN(22, "GPIO_22"), 152 PINCTRL_PIN(23, "GPIO_23"), 153 PINCTRL_PIN(24, "GPIO_24"), 154 PINCTRL_PIN(25, "GPIO_25"), 155 PINCTRL_PIN(26, "GPIO_26"), 156 PINCTRL_PIN(27, "GPIO_27"), 157 PINCTRL_PIN(28, "GPIO_28"), 158 PINCTRL_PIN(29, "GPIO_29"), 159 PINCTRL_PIN(30, "GPIO_30"), 160 PINCTRL_PIN(31, "GPIO_31"), 161 PINCTRL_PIN(32, "GPIO_32"), 162 PINCTRL_PIN(33, "GPIO_33"), 163 PINCTRL_PIN(34, "GPIO_34"), 164 PINCTRL_PIN(35, "GPIO_35"), 165 PINCTRL_PIN(36, "GPIO_36"), 166 PINCTRL_PIN(37, "GPIO_37"), 167 PINCTRL_PIN(38, "GPIO_38"), 168 PINCTRL_PIN(39, "GPIO_39"), 169 PINCTRL_PIN(40, "GPIO_40"), 170 PINCTRL_PIN(41, "GPIO_41"), 171 PINCTRL_PIN(42, "GPIO_42"), 172 PINCTRL_PIN(43, "GPIO_43"), 173 PINCTRL_PIN(44, "GPIO_44"), 174 PINCTRL_PIN(45, "GPIO_45"), 175 PINCTRL_PIN(46, "GPIO_46"), 176 PINCTRL_PIN(47, "GPIO_47"), 177 PINCTRL_PIN(48, "GPIO_48"), 178 PINCTRL_PIN(49, "GPIO_49"), 179 PINCTRL_PIN(50, "GPIO_50"), 180 PINCTRL_PIN(51, "GPIO_51"), 181 PINCTRL_PIN(52, "GPIO_52"), 182 PINCTRL_PIN(53, "GPIO_53"), 183 PINCTRL_PIN(54, "GPIO_54"), 184 PINCTRL_PIN(55, "GPIO_55"), 185 PINCTRL_PIN(56, "GPIO_56"), 186 PINCTRL_PIN(57, "GPIO_57"), 187 PINCTRL_PIN(58, "GPIO_58"), 188 PINCTRL_PIN(59, "GPIO_59"), 189 PINCTRL_PIN(60, "GPIO_60"), 190 PINCTRL_PIN(61, "GPIO_61"), 191 PINCTRL_PIN(62, "GPIO_62"), 192 PINCTRL_PIN(63, "GPIO_63"), 193 PINCTRL_PIN(64, "GPIO_64"), 194 PINCTRL_PIN(65, "GPIO_65"), 195 PINCTRL_PIN(66, "GPIO_66"), 196 PINCTRL_PIN(67, "GPIO_67"), 197 PINCTRL_PIN(68, "GPIO_68"), 198 PINCTRL_PIN(69, "GPIO_69"), 199 PINCTRL_PIN(70, "GPIO_70"), 200 PINCTRL_PIN(71, "GPIO_71"), 201 PINCTRL_PIN(72, "GPIO_72"), 202 PINCTRL_PIN(73, "GPIO_73"), 203 PINCTRL_PIN(74, "GPIO_74"), 204 PINCTRL_PIN(75, "GPIO_75"), 205 PINCTRL_PIN(76, "GPIO_76"), 206 PINCTRL_PIN(77, "GPIO_77"), 207 PINCTRL_PIN(78, "GPIO_78"), 208 PINCTRL_PIN(79, "GPIO_79"), 209 PINCTRL_PIN(80, "GPIO_80"), 210 PINCTRL_PIN(81, "GPIO_81"), 211 PINCTRL_PIN(82, "GPIO_82"), 212 PINCTRL_PIN(83, "GPIO_83"), 213 PINCTRL_PIN(84, "GPIO_84"), 214 PINCTRL_PIN(85, "GPIO_85"), 215 PINCTRL_PIN(86, "GPIO_86"), 216 PINCTRL_PIN(87, "GPIO_87"), 217 PINCTRL_PIN(88, "GPIO_88"), 218 PINCTRL_PIN(89, "GPIO_89"), 219 PINCTRL_PIN(90, "GPIO_90"), 220 PINCTRL_PIN(91, "GPIO_91"), 221 PINCTRL_PIN(92, "GPIO_92"), 222 PINCTRL_PIN(93, "GPIO_93"), 223 PINCTRL_PIN(94, "GPIO_94"), 224 PINCTRL_PIN(95, "GPIO_95"), 225 PINCTRL_PIN(96, "GPIO_96"), 226 PINCTRL_PIN(97, "GPIO_97"), 227 PINCTRL_PIN(98, "GPIO_98"), 228 PINCTRL_PIN(99, "GPIO_99"), 229 PINCTRL_PIN(100, "GPIO_100"), 230 PINCTRL_PIN(101, "GPIO_101"), 231 PINCTRL_PIN(102, "GPIO_102"), 232 PINCTRL_PIN(103, "GPIO_103"), 233 PINCTRL_PIN(104, "GPIO_104"), 234 PINCTRL_PIN(105, "GPIO_105"), 235 PINCTRL_PIN(106, "GPIO_106"), 236 PINCTRL_PIN(107, "GPIO_107"), 237 PINCTRL_PIN(108, "GPIO_108"), 238 PINCTRL_PIN(109, "GPIO_109"), 239 PINCTRL_PIN(110, "GPIO_110"), 240 PINCTRL_PIN(111, "GPIO_111"), 241 PINCTRL_PIN(112, "GPIO_112"), 242 PINCTRL_PIN(113, "GPIO_113"), 243 PINCTRL_PIN(114, "GPIO_114"), 244 PINCTRL_PIN(115, "GPIO_115"), 245 PINCTRL_PIN(116, "GPIO_116"), 246 PINCTRL_PIN(117, "GPIO_117"), 247 PINCTRL_PIN(118, "GPIO_118"), 248 PINCTRL_PIN(119, "GPIO_119"), 249 PINCTRL_PIN(120, "GPIO_120"), 250 PINCTRL_PIN(121, "GPIO_121"), 251 PINCTRL_PIN(122, "GPIO_122"), 252 PINCTRL_PIN(123, "GPIO_123"), 253 PINCTRL_PIN(124, "GPIO_124"), 254 PINCTRL_PIN(125, "GPIO_125"), 255 PINCTRL_PIN(126, "GPIO_126"), 256 PINCTRL_PIN(127, "GPIO_127"), 257 PINCTRL_PIN(128, "GPIO_128"), 258 PINCTRL_PIN(129, "GPIO_129"), 259 PINCTRL_PIN(130, "GPIO_130"), 260 PINCTRL_PIN(131, "GPIO_131"), 261 PINCTRL_PIN(132, "GPIO_132"), 262 PINCTRL_PIN(133, "GPIO_133"), 263 PINCTRL_PIN(134, "GPIO_134"), 264 PINCTRL_PIN(135, "GPIO_135"), 265 PINCTRL_PIN(136, "GPIO_136"), 266 PINCTRL_PIN(137, "GPIO_137"), 267 PINCTRL_PIN(138, "GPIO_138"), 268 PINCTRL_PIN(139, "GPIO_139"), 269 PINCTRL_PIN(140, "GPIO_140"), 270 PINCTRL_PIN(141, "GPIO_141"), 271 PINCTRL_PIN(142, "GPIO_142"), 272 PINCTRL_PIN(143, "GPIO_143"), 273 PINCTRL_PIN(144, "GPIO_144"), 274 PINCTRL_PIN(145, "GPIO_145"), 275 PINCTRL_PIN(146, "GPIO_146"), 276 PINCTRL_PIN(147, "GPIO_147"), 277 PINCTRL_PIN(148, "GPIO_148"), 278 PINCTRL_PIN(149, "GPIO_149"), 279 PINCTRL_PIN(150, "GPIO_150"), 280 PINCTRL_PIN(151, "GPIO_151"), 281 PINCTRL_PIN(152, "GPIO_152"), 282 PINCTRL_PIN(153, "GPIO_153"), 283 PINCTRL_PIN(154, "GPIO_154"), 284 PINCTRL_PIN(155, "GPIO_155"), 285 PINCTRL_PIN(156, "GPIO_156"), 286 PINCTRL_PIN(157, "GPIO_157"), 287 PINCTRL_PIN(158, "GPIO_158"), 288 PINCTRL_PIN(159, "GPIO_159"), 289 PINCTRL_PIN(160, "GPIO_160"), 290 PINCTRL_PIN(161, "GPIO_161"), 291 PINCTRL_PIN(162, "GPIO_162"), 292 PINCTRL_PIN(163, "GPIO_163"), 293 PINCTRL_PIN(164, "GPIO_164"), 294 PINCTRL_PIN(165, "GPIO_165"), 295 PINCTRL_PIN(166, "GPIO_166"), 296 PINCTRL_PIN(167, "GPIO_167"), 297 PINCTRL_PIN(168, "GPIO_168"), 298 PINCTRL_PIN(169, "GPIO_169"), 299 PINCTRL_PIN(170, "GPIO_170"), 300 PINCTRL_PIN(171, "GPIO_171"), 301 PINCTRL_PIN(172, "GPIO_172"), 302 PINCTRL_PIN(173, "GPIO_173"), 303 PINCTRL_PIN(174, "GPIO_174"), 304 PINCTRL_PIN(175, "GPIO_175"), 305 PINCTRL_PIN(176, "GPIO_176"), 306 PINCTRL_PIN(177, "GPIO_177"), 307 PINCTRL_PIN(178, "GPIO_178"), 308 PINCTRL_PIN(179, "GPIO_179"), 309 PINCTRL_PIN(180, "GPIO_180"), 310 PINCTRL_PIN(181, "GPIO_181"), 311 PINCTRL_PIN(182, "GPIO_182"), 312 PINCTRL_PIN(183, "GPIO_183"), 313 PINCTRL_PIN(184, "GPIO_184"), 314 PINCTRL_PIN(185, "GPIO_185"), 315 PINCTRL_PIN(186, "GPIO_186"), 316 PINCTRL_PIN(187, "GPIO_187"), 317 PINCTRL_PIN(188, "GPIO_188"), 318 PINCTRL_PIN(189, "GPIO_189"), 319 PINCTRL_PIN(190, "UFS_RESET"), 320 PINCTRL_PIN(191, "SDC2_CLK"), 321 PINCTRL_PIN(192, "SDC2_CMD"), 322 PINCTRL_PIN(193, "SDC2_DATA"), 323 }; 324 325 #define DECLARE_MSM_GPIO_PINS(pin) \ 326 static const unsigned int gpio##pin##_pins[] = { pin } 327 DECLARE_MSM_GPIO_PINS(0); 328 DECLARE_MSM_GPIO_PINS(1); 329 DECLARE_MSM_GPIO_PINS(2); 330 DECLARE_MSM_GPIO_PINS(3); 331 DECLARE_MSM_GPIO_PINS(4); 332 DECLARE_MSM_GPIO_PINS(5); 333 DECLARE_MSM_GPIO_PINS(6); 334 DECLARE_MSM_GPIO_PINS(7); 335 DECLARE_MSM_GPIO_PINS(8); 336 DECLARE_MSM_GPIO_PINS(9); 337 DECLARE_MSM_GPIO_PINS(10); 338 DECLARE_MSM_GPIO_PINS(11); 339 DECLARE_MSM_GPIO_PINS(12); 340 DECLARE_MSM_GPIO_PINS(13); 341 DECLARE_MSM_GPIO_PINS(14); 342 DECLARE_MSM_GPIO_PINS(15); 343 DECLARE_MSM_GPIO_PINS(16); 344 DECLARE_MSM_GPIO_PINS(17); 345 DECLARE_MSM_GPIO_PINS(18); 346 DECLARE_MSM_GPIO_PINS(19); 347 DECLARE_MSM_GPIO_PINS(20); 348 DECLARE_MSM_GPIO_PINS(21); 349 DECLARE_MSM_GPIO_PINS(22); 350 DECLARE_MSM_GPIO_PINS(23); 351 DECLARE_MSM_GPIO_PINS(24); 352 DECLARE_MSM_GPIO_PINS(25); 353 DECLARE_MSM_GPIO_PINS(26); 354 DECLARE_MSM_GPIO_PINS(27); 355 DECLARE_MSM_GPIO_PINS(28); 356 DECLARE_MSM_GPIO_PINS(29); 357 DECLARE_MSM_GPIO_PINS(30); 358 DECLARE_MSM_GPIO_PINS(31); 359 DECLARE_MSM_GPIO_PINS(32); 360 DECLARE_MSM_GPIO_PINS(33); 361 DECLARE_MSM_GPIO_PINS(34); 362 DECLARE_MSM_GPIO_PINS(35); 363 DECLARE_MSM_GPIO_PINS(36); 364 DECLARE_MSM_GPIO_PINS(37); 365 DECLARE_MSM_GPIO_PINS(38); 366 DECLARE_MSM_GPIO_PINS(39); 367 DECLARE_MSM_GPIO_PINS(40); 368 DECLARE_MSM_GPIO_PINS(41); 369 DECLARE_MSM_GPIO_PINS(42); 370 DECLARE_MSM_GPIO_PINS(43); 371 DECLARE_MSM_GPIO_PINS(44); 372 DECLARE_MSM_GPIO_PINS(45); 373 DECLARE_MSM_GPIO_PINS(46); 374 DECLARE_MSM_GPIO_PINS(47); 375 DECLARE_MSM_GPIO_PINS(48); 376 DECLARE_MSM_GPIO_PINS(49); 377 DECLARE_MSM_GPIO_PINS(50); 378 DECLARE_MSM_GPIO_PINS(51); 379 DECLARE_MSM_GPIO_PINS(52); 380 DECLARE_MSM_GPIO_PINS(53); 381 DECLARE_MSM_GPIO_PINS(54); 382 DECLARE_MSM_GPIO_PINS(55); 383 DECLARE_MSM_GPIO_PINS(56); 384 DECLARE_MSM_GPIO_PINS(57); 385 DECLARE_MSM_GPIO_PINS(58); 386 DECLARE_MSM_GPIO_PINS(59); 387 DECLARE_MSM_GPIO_PINS(60); 388 DECLARE_MSM_GPIO_PINS(61); 389 DECLARE_MSM_GPIO_PINS(62); 390 DECLARE_MSM_GPIO_PINS(63); 391 DECLARE_MSM_GPIO_PINS(64); 392 DECLARE_MSM_GPIO_PINS(65); 393 DECLARE_MSM_GPIO_PINS(66); 394 DECLARE_MSM_GPIO_PINS(67); 395 DECLARE_MSM_GPIO_PINS(68); 396 DECLARE_MSM_GPIO_PINS(69); 397 DECLARE_MSM_GPIO_PINS(70); 398 DECLARE_MSM_GPIO_PINS(71); 399 DECLARE_MSM_GPIO_PINS(72); 400 DECLARE_MSM_GPIO_PINS(73); 401 DECLARE_MSM_GPIO_PINS(74); 402 DECLARE_MSM_GPIO_PINS(75); 403 DECLARE_MSM_GPIO_PINS(76); 404 DECLARE_MSM_GPIO_PINS(77); 405 DECLARE_MSM_GPIO_PINS(78); 406 DECLARE_MSM_GPIO_PINS(79); 407 DECLARE_MSM_GPIO_PINS(80); 408 DECLARE_MSM_GPIO_PINS(81); 409 DECLARE_MSM_GPIO_PINS(82); 410 DECLARE_MSM_GPIO_PINS(83); 411 DECLARE_MSM_GPIO_PINS(84); 412 DECLARE_MSM_GPIO_PINS(85); 413 DECLARE_MSM_GPIO_PINS(86); 414 DECLARE_MSM_GPIO_PINS(87); 415 DECLARE_MSM_GPIO_PINS(88); 416 DECLARE_MSM_GPIO_PINS(89); 417 DECLARE_MSM_GPIO_PINS(90); 418 DECLARE_MSM_GPIO_PINS(91); 419 DECLARE_MSM_GPIO_PINS(92); 420 DECLARE_MSM_GPIO_PINS(93); 421 DECLARE_MSM_GPIO_PINS(94); 422 DECLARE_MSM_GPIO_PINS(95); 423 DECLARE_MSM_GPIO_PINS(96); 424 DECLARE_MSM_GPIO_PINS(97); 425 DECLARE_MSM_GPIO_PINS(98); 426 DECLARE_MSM_GPIO_PINS(99); 427 DECLARE_MSM_GPIO_PINS(100); 428 DECLARE_MSM_GPIO_PINS(101); 429 DECLARE_MSM_GPIO_PINS(102); 430 DECLARE_MSM_GPIO_PINS(103); 431 DECLARE_MSM_GPIO_PINS(104); 432 DECLARE_MSM_GPIO_PINS(105); 433 DECLARE_MSM_GPIO_PINS(106); 434 DECLARE_MSM_GPIO_PINS(107); 435 DECLARE_MSM_GPIO_PINS(108); 436 DECLARE_MSM_GPIO_PINS(109); 437 DECLARE_MSM_GPIO_PINS(110); 438 DECLARE_MSM_GPIO_PINS(111); 439 DECLARE_MSM_GPIO_PINS(112); 440 DECLARE_MSM_GPIO_PINS(113); 441 DECLARE_MSM_GPIO_PINS(114); 442 DECLARE_MSM_GPIO_PINS(115); 443 DECLARE_MSM_GPIO_PINS(116); 444 DECLARE_MSM_GPIO_PINS(117); 445 DECLARE_MSM_GPIO_PINS(118); 446 DECLARE_MSM_GPIO_PINS(119); 447 DECLARE_MSM_GPIO_PINS(120); 448 DECLARE_MSM_GPIO_PINS(121); 449 DECLARE_MSM_GPIO_PINS(122); 450 DECLARE_MSM_GPIO_PINS(123); 451 DECLARE_MSM_GPIO_PINS(124); 452 DECLARE_MSM_GPIO_PINS(125); 453 DECLARE_MSM_GPIO_PINS(126); 454 DECLARE_MSM_GPIO_PINS(127); 455 DECLARE_MSM_GPIO_PINS(128); 456 DECLARE_MSM_GPIO_PINS(129); 457 DECLARE_MSM_GPIO_PINS(130); 458 DECLARE_MSM_GPIO_PINS(131); 459 DECLARE_MSM_GPIO_PINS(132); 460 DECLARE_MSM_GPIO_PINS(133); 461 DECLARE_MSM_GPIO_PINS(134); 462 DECLARE_MSM_GPIO_PINS(135); 463 DECLARE_MSM_GPIO_PINS(136); 464 DECLARE_MSM_GPIO_PINS(137); 465 DECLARE_MSM_GPIO_PINS(138); 466 DECLARE_MSM_GPIO_PINS(139); 467 DECLARE_MSM_GPIO_PINS(140); 468 DECLARE_MSM_GPIO_PINS(141); 469 DECLARE_MSM_GPIO_PINS(142); 470 DECLARE_MSM_GPIO_PINS(143); 471 DECLARE_MSM_GPIO_PINS(144); 472 DECLARE_MSM_GPIO_PINS(145); 473 DECLARE_MSM_GPIO_PINS(146); 474 DECLARE_MSM_GPIO_PINS(147); 475 DECLARE_MSM_GPIO_PINS(148); 476 DECLARE_MSM_GPIO_PINS(149); 477 DECLARE_MSM_GPIO_PINS(150); 478 DECLARE_MSM_GPIO_PINS(151); 479 DECLARE_MSM_GPIO_PINS(152); 480 DECLARE_MSM_GPIO_PINS(153); 481 DECLARE_MSM_GPIO_PINS(154); 482 DECLARE_MSM_GPIO_PINS(155); 483 DECLARE_MSM_GPIO_PINS(156); 484 DECLARE_MSM_GPIO_PINS(157); 485 DECLARE_MSM_GPIO_PINS(158); 486 DECLARE_MSM_GPIO_PINS(159); 487 DECLARE_MSM_GPIO_PINS(160); 488 DECLARE_MSM_GPIO_PINS(161); 489 DECLARE_MSM_GPIO_PINS(162); 490 DECLARE_MSM_GPIO_PINS(163); 491 DECLARE_MSM_GPIO_PINS(164); 492 DECLARE_MSM_GPIO_PINS(165); 493 DECLARE_MSM_GPIO_PINS(166); 494 DECLARE_MSM_GPIO_PINS(167); 495 DECLARE_MSM_GPIO_PINS(168); 496 DECLARE_MSM_GPIO_PINS(169); 497 DECLARE_MSM_GPIO_PINS(170); 498 DECLARE_MSM_GPIO_PINS(171); 499 DECLARE_MSM_GPIO_PINS(172); 500 DECLARE_MSM_GPIO_PINS(173); 501 DECLARE_MSM_GPIO_PINS(174); 502 DECLARE_MSM_GPIO_PINS(175); 503 DECLARE_MSM_GPIO_PINS(176); 504 DECLARE_MSM_GPIO_PINS(177); 505 DECLARE_MSM_GPIO_PINS(178); 506 DECLARE_MSM_GPIO_PINS(179); 507 DECLARE_MSM_GPIO_PINS(180); 508 DECLARE_MSM_GPIO_PINS(181); 509 DECLARE_MSM_GPIO_PINS(182); 510 DECLARE_MSM_GPIO_PINS(183); 511 DECLARE_MSM_GPIO_PINS(184); 512 DECLARE_MSM_GPIO_PINS(185); 513 DECLARE_MSM_GPIO_PINS(186); 514 DECLARE_MSM_GPIO_PINS(187); 515 DECLARE_MSM_GPIO_PINS(188); 516 DECLARE_MSM_GPIO_PINS(189); 517 518 static const unsigned int sdc2_clk_pins[] = { 190 }; 519 static const unsigned int sdc2_cmd_pins[] = { 191 }; 520 static const unsigned int sdc2_data_pins[] = { 192 }; 521 static const unsigned int ufs_reset_pins[] = { 193 }; 522 523 enum sc8180x_functions { 524 msm_mux_adsp_ext, 525 msm_mux_agera_pll, 526 msm_mux_aoss_cti, 527 msm_mux_atest_char, 528 msm_mux_atest_tsens, 529 msm_mux_atest_tsens2, 530 msm_mux_atest_usb0, 531 msm_mux_atest_usb1, 532 msm_mux_atest_usb2, 533 msm_mux_atest_usb3, 534 msm_mux_atest_usb4, 535 msm_mux_audio_ref, 536 msm_mux_btfm_slimbus, 537 msm_mux_cam_mclk, 538 msm_mux_cci_async, 539 msm_mux_cci_i2c, 540 msm_mux_cci_timer0, 541 msm_mux_cci_timer1, 542 msm_mux_cci_timer2, 543 msm_mux_cci_timer3, 544 msm_mux_cci_timer4, 545 msm_mux_cci_timer5, 546 msm_mux_cci_timer6, 547 msm_mux_cci_timer7, 548 msm_mux_cci_timer8, 549 msm_mux_cci_timer9, 550 msm_mux_cri_trng, 551 msm_mux_dbg_out, 552 msm_mux_ddr_bist, 553 msm_mux_ddr_pxi, 554 msm_mux_debug_hot, 555 msm_mux_dp_hot, 556 msm_mux_edp_hot, 557 msm_mux_edp_lcd, 558 msm_mux_emac_phy, 559 msm_mux_emac_pps, 560 msm_mux_gcc_gp1, 561 msm_mux_gcc_gp2, 562 msm_mux_gcc_gp3, 563 msm_mux_gcc_gp4, 564 msm_mux_gcc_gp5, 565 msm_mux_gpio, 566 msm_mux_gps, 567 msm_mux_grfc, 568 msm_mux_hs1_mi2s, 569 msm_mux_hs2_mi2s, 570 msm_mux_hs3_mi2s, 571 msm_mux_jitter_bist, 572 msm_mux_lpass_slimbus, 573 msm_mux_m_voc, 574 msm_mux_mdp_vsync, 575 msm_mux_mdp_vsync0, 576 msm_mux_mdp_vsync1, 577 msm_mux_mdp_vsync2, 578 msm_mux_mdp_vsync3, 579 msm_mux_mdp_vsync4, 580 msm_mux_mdp_vsync5, 581 msm_mux_mss_lte, 582 msm_mux_nav_pps, 583 msm_mux_pa_indicator, 584 msm_mux_pci_e0, 585 msm_mux_pci_e1, 586 msm_mux_pci_e2, 587 msm_mux_pci_e3, 588 msm_mux_phase_flag, 589 msm_mux_pll_bist, 590 msm_mux_pll_bypassnl, 591 msm_mux_pll_reset, 592 msm_mux_pri_mi2s, 593 msm_mux_pri_mi2s_ws, 594 msm_mux_prng_rosc, 595 msm_mux_qdss_cti, 596 msm_mux_qdss_gpio, 597 msm_mux_qlink, 598 msm_mux_qspi0, 599 msm_mux_qspi0_clk, 600 msm_mux_qspi0_cs, 601 msm_mux_qspi1, 602 msm_mux_qspi1_clk, 603 msm_mux_qspi1_cs, 604 msm_mux_qua_mi2s, 605 msm_mux_qup0, 606 msm_mux_qup1, 607 msm_mux_qup2, 608 msm_mux_qup3, 609 msm_mux_qup4, 610 msm_mux_qup5, 611 msm_mux_qup6, 612 msm_mux_qup7, 613 msm_mux_qup8, 614 msm_mux_qup9, 615 msm_mux_qup10, 616 msm_mux_qup11, 617 msm_mux_qup12, 618 msm_mux_qup13, 619 msm_mux_qup14, 620 msm_mux_qup15, 621 msm_mux_qup16, 622 msm_mux_qup17, 623 msm_mux_qup18, 624 msm_mux_qup19, 625 msm_mux_qup_l4, 626 msm_mux_qup_l5, 627 msm_mux_qup_l6, 628 msm_mux_rgmii, 629 msm_mux_sd_write, 630 msm_mux_sdc4, 631 msm_mux_sdc4_clk, 632 msm_mux_sdc4_cmd, 633 msm_mux_sec_mi2s, 634 msm_mux_sp_cmu, 635 msm_mux_spkr_i2s, 636 msm_mux_ter_mi2s, 637 msm_mux_tgu, 638 msm_mux_tsense_pwm1, 639 msm_mux_tsense_pwm2, 640 msm_mux_tsif1, 641 msm_mux_tsif2, 642 msm_mux_uim1, 643 msm_mux_uim2, 644 msm_mux_uim_batt, 645 msm_mux_usb0_phy, 646 msm_mux_usb1_phy, 647 msm_mux_usb2phy_ac, 648 msm_mux_vfr_1, 649 msm_mux_vsense_trigger, 650 msm_mux_wlan1_adc, 651 msm_mux_wlan2_adc, 652 msm_mux_wmss_reset, 653 msm_mux__, 654 }; 655 656 static const char * const adsp_ext_groups[] = { 657 "gpio115", 658 }; 659 660 static const char * const agera_pll_groups[] = { 661 "gpio37", 662 }; 663 664 static const char * const aoss_cti_groups[] = { 665 "gpio113", 666 }; 667 668 static const char * const atest_char_groups[] = { 669 "gpio133", "gpio134", "gpio135", "gpio140", "gpio142", 670 }; 671 672 static const char * const atest_tsens2_groups[] = { 673 "gpio62", 674 }; 675 676 static const char * const atest_tsens_groups[] = { 677 "gpio93", 678 }; 679 680 static const char * const atest_usb0_groups[] = { 681 "gpio90", "gpio91", "gpio92", "gpio93", "gpio94", 682 }; 683 684 static const char * const atest_usb1_groups[] = { 685 "gpio60", "gpio62", "gpio63", "gpio64", "gpio65", 686 }; 687 688 static const char * const atest_usb2_groups[] = { 689 "gpio34", "gpio95", "gpio102", "gpio121", "gpio122", 690 }; 691 692 static const char * const atest_usb3_groups[] = { 693 "gpio68", "gpio71", "gpio72", "gpio73", "gpio74", 694 }; 695 696 static const char * const atest_usb4_groups[] = { 697 "gpio75", "gpio76", "gpio77", "gpio78", "gpio88", 698 }; 699 700 static const char * const audio_ref_groups[] = { 701 "gpio148", 702 }; 703 704 static const char * const btfm_slimbus_groups[] = { 705 "gpio153", "gpio154", 706 }; 707 708 static const char * const cam_mclk_groups[] = { 709 "gpio13", "gpio14", "gpio15", "gpio16", "gpio25", "gpio179", "gpio180", 710 "gpio181", 711 }; 712 713 static const char * const cci_async_groups[] = { 714 "gpio24", "gpio25", "gpio26", "gpio176", "gpio185", "gpio186", 715 }; 716 717 static const char * const cci_i2c_groups[] = { 718 "gpio0", "gpio1", "gpio2", "gpio3", "gpio17", "gpio18", "gpio19", 719 "gpio20", "gpio31", "gpio32", "gpio33", "gpio34", "gpio39", "gpio40", 720 "gpio41", "gpio42", 721 }; 722 723 static const char * const cci_timer0_groups[] = { 724 "gpio21", 725 }; 726 727 static const char * const cci_timer1_groups[] = { 728 "gpio22", 729 }; 730 731 static const char * const cci_timer2_groups[] = { 732 "gpio23", 733 }; 734 735 static const char * const cci_timer3_groups[] = { 736 "gpio24", 737 }; 738 739 static const char * const cci_timer4_groups[] = { 740 "gpio178", 741 }; 742 743 static const char * const cci_timer5_groups[] = { 744 "gpio182", 745 }; 746 747 static const char * const cci_timer6_groups[] = { 748 "gpio183", 749 }; 750 751 static const char * const cci_timer7_groups[] = { 752 "gpio184", 753 }; 754 755 static const char * const cci_timer8_groups[] = { 756 "gpio185", 757 }; 758 759 static const char * const cci_timer9_groups[] = { 760 "gpio186", 761 }; 762 763 static const char * const cri_trng_groups[] = { 764 "gpio159", 765 "gpio160", 766 "gpio161", 767 }; 768 769 static const char * const dbg_out_groups[] = { 770 "gpio34", 771 }; 772 773 static const char * const ddr_bist_groups[] = { 774 "gpio98", "gpio99", "gpio145", "gpio146", 775 }; 776 777 static const char * const ddr_pxi_groups[] = { 778 "gpio60", "gpio62", "gpio63", "gpio64", "gpio65", "gpio68", "gpio71", 779 "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", "gpio78", 780 "gpio88", "gpio90", 781 }; 782 783 static const char * const debug_hot_groups[] = { 784 "gpio7", 785 }; 786 787 static const char * const dp_hot_groups[] = { 788 "gpio189", 789 }; 790 791 static const char * const edp_hot_groups[] = { 792 "gpio10", 793 }; 794 795 static const char * const edp_lcd_groups[] = { 796 "gpio11", 797 }; 798 799 static const char * const emac_phy_groups[] = { 800 "gpio124", 801 }; 802 803 static const char * const emac_pps_groups[] = { 804 "gpio81", 805 }; 806 807 static const char * const gcc_gp1_groups[] = { 808 "gpio131", "gpio136", 809 }; 810 811 static const char * const gcc_gp2_groups[] = { 812 "gpio21", "gpio137", 813 }; 814 815 static const char * const gcc_gp3_groups[] = { 816 "gpio22", "gpio138", 817 }; 818 819 static const char * const gcc_gp4_groups[] = { 820 "gpio139", "gpio182", 821 }; 822 823 static const char * const gcc_gp5_groups[] = { 824 "gpio140", "gpio183", 825 }; 826 827 static const char * const gpio_groups[] = { 828 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 829 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio12", "gpio13", 830 "gpio14", "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", 831 "gpio21", "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", 832 "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", 833 "gpio35", "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", 834 "gpio42", "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", 835 "gpio49", "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", 836 "gpio56", "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", 837 "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", 838 "gpio70", "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", 839 "gpio77", "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", 840 "gpio84", "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", 841 "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", 842 "gpio98", "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", 843 "gpio104", "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", 844 "gpio110", "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", 845 "gpio116", "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", 846 "gpio122", "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", 847 "gpio128", "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", 848 "gpio134", "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", 849 "gpio140", "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", 850 "gpio146", "gpio147", "gpio148", "gpio149", "gpio150", "gpio151", 851 "gpio152", "gpio153", "gpio154", "gpio155", "gpio156", "gpio157", 852 "gpio158", "gpio159", "gpio160", "gpio161", "gpio162", "gpio163", 853 "gpio164", "gpio165", "gpio166", "gpio167", "gpio168", "gpio169", 854 "gpio170", "gpio171", "gpio172", "gpio173", "gpio174", "gpio175", 855 "gpio176", "gpio177", "gpio177", "gpio178", "gpio179", "gpio180", 856 "gpio181", "gpio182", "gpio183", "gpio184", "gpio185", "gpio186", 857 "gpio186", "gpio187", "gpio187", "gpio188", "gpio188", "gpio189", 858 }; 859 860 static const char * const gps_groups[] = { 861 "gpio60", "gpio76", "gpio77", "gpio81", "gpio82", 862 }; 863 864 static const char * const grfc_groups[] = { 865 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio71", "gpio72", 866 "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", "gpio78", "gpio79", 867 "gpio80", "gpio81", "gpio82", 868 }; 869 870 static const char * const hs1_mi2s_groups[] = { 871 "gpio155", "gpio156", "gpio157", "gpio158", "gpio159", 872 }; 873 874 static const char * const hs2_mi2s_groups[] = { 875 "gpio160", "gpio161", "gpio162", "gpio163", "gpio164", 876 }; 877 878 static const char * const hs3_mi2s_groups[] = { 879 "gpio125", "gpio165", "gpio166", "gpio167", "gpio168", 880 }; 881 882 static const char * const jitter_bist_groups[] = { 883 "gpio129", 884 }; 885 886 static const char * const lpass_slimbus_groups[] = { 887 "gpio149", "gpio150", "gpio151", "gpio152", 888 }; 889 890 static const char * const m_voc_groups[] = { 891 "gpio10", 892 }; 893 894 static const char * const mdp_vsync0_groups[] = { 895 "gpio89", 896 }; 897 898 static const char * const mdp_vsync1_groups[] = { 899 "gpio89", 900 }; 901 902 static const char * const mdp_vsync2_groups[] = { 903 "gpio89", 904 }; 905 906 static const char * const mdp_vsync3_groups[] = { 907 "gpio89", 908 }; 909 910 static const char * const mdp_vsync4_groups[] = { 911 "gpio89", 912 }; 913 914 static const char * const mdp_vsync5_groups[] = { 915 "gpio89", 916 }; 917 918 static const char * const mdp_vsync_groups[] = { 919 "gpio8", "gpio9", "gpio10", "gpio60", "gpio82", 920 }; 921 922 static const char * const mss_lte_groups[] = { 923 "gpio69", "gpio70", 924 }; 925 926 static const char * const nav_pps_groups[] = { 927 "gpio60", "gpio60", "gpio76", "gpio76", "gpio77", "gpio77", "gpio81", 928 "gpio81", "gpio82", "gpio82", 929 }; 930 931 static const char * const pa_indicator_groups[] = { 932 "gpio68", 933 }; 934 935 static const char * const pci_e0_groups[] = { 936 "gpio35", "gpio36", 937 }; 938 939 static const char * const pci_e1_groups[] = { 940 "gpio102", "gpio103", 941 }; 942 943 static const char * const pci_e2_groups[] = { 944 "gpio175", "gpio176", 945 }; 946 947 static const char * const pci_e3_groups[] = { 948 "gpio178", "gpio179", 949 }; 950 951 static const char * const phase_flag_groups[] = { 952 "gpio4", "gpio5", "gpio6", "gpio7", "gpio33", "gpio53", "gpio54", 953 "gpio102", "gpio120", "gpio121", "gpio122", "gpio123", "gpio125", 954 "gpio148", "gpio149", "gpio150", "gpio151", "gpio152", "gpio155", 955 "gpio156", "gpio157", "gpio158", "gpio159", "gpio160", "gpio161", 956 "gpio162", "gpio163", "gpio164", "gpio165", "gpio166", "gpio167", 957 "gpio168", 958 }; 959 960 static const char * const pll_bist_groups[] = { 961 "gpio130", 962 }; 963 964 static const char * const pll_bypassnl_groups[] = { 965 "gpio100", 966 }; 967 968 static const char * const pll_reset_groups[] = { 969 "gpio101", 970 }; 971 972 static const char * const pri_mi2s_groups[] = { 973 "gpio143", "gpio144", "gpio146", "gpio147", 974 }; 975 976 static const char * const pri_mi2s_ws_groups[] = { 977 "gpio145", 978 }; 979 980 static const char * const prng_rosc_groups[] = { 981 "gpio163", 982 }; 983 984 static const char * const qdss_cti_groups[] = { 985 "gpio49", "gpio50", "gpio81", "gpio82", "gpio89", "gpio90", "gpio141", 986 "gpio142", 987 }; 988 989 static const char * const qdss_gpio_groups[] = { 990 "gpio13", "gpio14", "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", 991 "gpio20", "gpio21", "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", 992 "gpio27", "gpio28", "gpio29", "gpio30", "gpio39", "gpio40", "gpio41", 993 "gpio42", "gpio92", "gpio114", "gpio115", "gpio116", "gpio117", 994 "gpio118", "gpio119", "gpio120", "gpio121", "gpio130", "gpio132", 995 "gpio133", "gpio134", "gpio135", 996 }; 997 998 static const char * const qlink_groups[] = { 999 "gpio61", "gpio62", 1000 }; 1001 1002 static const char * const qspi0_groups[] = { 1003 "gpio89", "gpio90", "gpio91", "gpio93", 1004 }; 1005 1006 static const char * const qspi0_clk_groups[] = { 1007 "gpio92", 1008 }; 1009 1010 static const char * const qspi0_cs_groups[] = { 1011 "gpio88", "gpio94", 1012 }; 1013 1014 static const char * const qspi1_groups[] = { 1015 "gpio56", "gpio57", "gpio161", "gpio162", 1016 }; 1017 1018 static const char * const qspi1_clk_groups[] = { 1019 "gpio163", 1020 }; 1021 1022 static const char * const qspi1_cs_groups[] = { 1023 "gpio55", "gpio164", 1024 }; 1025 1026 static const char * const qua_mi2s_groups[] = { 1027 "gpio136", "gpio137", "gpio138", "gpio139", "gpio140", "gpio141", 1028 "gpio142", 1029 }; 1030 1031 static const char * const qup0_groups[] = { 1032 "gpio0", "gpio1", "gpio2", "gpio3", 1033 }; 1034 1035 static const char * const qup10_groups[] = { 1036 "gpio9", "gpio10", "gpio11", "gpio12", 1037 }; 1038 1039 static const char * const qup11_groups[] = { 1040 "gpio92", "gpio93", "gpio94", "gpio95", 1041 }; 1042 1043 static const char * const qup12_groups[] = { 1044 "gpio83", "gpio84", "gpio85", "gpio86", 1045 }; 1046 1047 static const char * const qup13_groups[] = { 1048 "gpio43", "gpio44", "gpio45", "gpio46", 1049 }; 1050 1051 static const char * const qup14_groups[] = { 1052 "gpio47", "gpio48", "gpio49", "gpio50", 1053 }; 1054 1055 static const char * const qup15_groups[] = { 1056 "gpio27", "gpio28", "gpio29", "gpio30", 1057 }; 1058 1059 static const char * const qup16_groups[] = { 1060 "gpio83", "gpio84", "gpio85", "gpio86", 1061 }; 1062 1063 static const char * const qup17_groups[] = { 1064 "gpio55", "gpio56", "gpio57", "gpio58", 1065 }; 1066 1067 static const char * const qup18_groups[] = { 1068 "gpio23", "gpio24", "gpio25", "gpio26", 1069 }; 1070 1071 static const char * const qup19_groups[] = { 1072 "gpio181", "gpio182", "gpio183", "gpio184", 1073 }; 1074 1075 static const char * const qup1_groups[] = { 1076 "gpio114", "gpio115", "gpio116", "gpio117", 1077 }; 1078 1079 static const char * const qup2_groups[] = { 1080 "gpio126", "gpio127", "gpio128", "gpio129", 1081 }; 1082 1083 static const char * const qup3_groups[] = { 1084 "gpio144", "gpio145", "gpio146", "gpio147", 1085 }; 1086 1087 static const char * const qup4_groups[] = { 1088 "gpio51", "gpio52", "gpio53", "gpio54", 1089 }; 1090 1091 static const char * const qup5_groups[] = { 1092 "gpio119", "gpio120", "gpio121", "gpio122", 1093 }; 1094 1095 static const char * const qup6_groups[] = { 1096 "gpio4", "gpio5", "gpio6", "gpio7", 1097 }; 1098 1099 static const char * const qup7_groups[] = { 1100 "gpio98", "gpio99", "gpio100", "gpio101", 1101 }; 1102 1103 static const char * const qup8_groups[] = { 1104 "gpio88", "gpio89", "gpio90", "gpio91", 1105 }; 1106 1107 static const char * const qup9_groups[] = { 1108 "gpio39", "gpio40", "gpio41", "gpio42", 1109 }; 1110 1111 static const char * const qup_l4_groups[] = { 1112 "gpio35", "gpio59", "gpio60", "gpio95", 1113 }; 1114 1115 static const char * const qup_l5_groups[] = { 1116 "gpio7", "gpio33", "gpio36", "gpio96", 1117 }; 1118 1119 static const char * const qup_l6_groups[] = { 1120 "gpio6", "gpio34", "gpio37", "gpio97", 1121 }; 1122 1123 static const char * const rgmii_groups[] = { 1124 "gpio4", "gpio5", "gpio6", "gpio7", "gpio59", "gpio114", "gpio115", 1125 "gpio116", "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", 1126 "gpio122", 1127 }; 1128 1129 static const char * const sd_write_groups[] = { 1130 "gpio97", 1131 }; 1132 1133 static const char * const sdc4_groups[] = { 1134 "gpio91", "gpio93", "gpio94", "gpio95", 1135 }; 1136 1137 static const char * const sdc4_clk_groups[] = { 1138 "gpio92", 1139 }; 1140 1141 static const char * const sdc4_cmd_groups[] = { 1142 "gpio90", 1143 }; 1144 1145 static const char * const sec_mi2s_groups[] = { 1146 "gpio126", "gpio127", "gpio128", "gpio129", "gpio130", 1147 }; 1148 1149 static const char * const sp_cmu_groups[] = { 1150 "gpio162", 1151 }; 1152 1153 static const char * const spkr_i2s_groups[] = { 1154 "gpio148", "gpio149", "gpio150", "gpio151", "gpio152", 1155 }; 1156 1157 static const char * const ter_mi2s_groups[] = { 1158 "gpio131", "gpio132", "gpio133", "gpio134", "gpio135", 1159 }; 1160 1161 static const char * const tgu_groups[] = { 1162 "gpio89", "gpio90", "gpio91", "gpio88", "gpio74", "gpio77", "gpio76", 1163 "gpio75", 1164 }; 1165 1166 static const char * const tsense_pwm1_groups[] = { 1167 "gpio150", 1168 }; 1169 1170 static const char * const tsense_pwm2_groups[] = { 1171 "gpio150", 1172 }; 1173 1174 static const char * const tsif1_groups[] = { 1175 "gpio88", "gpio89", "gpio90", "gpio91", "gpio97", 1176 }; 1177 1178 static const char * const tsif2_groups[] = { 1179 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", 1180 }; 1181 1182 static const char * const uim1_groups[] = { 1183 "gpio109", "gpio110", "gpio111", "gpio112", 1184 }; 1185 1186 static const char * const uim2_groups[] = { 1187 "gpio105", "gpio106", "gpio107", "gpio108", 1188 }; 1189 1190 static const char * const uim_batt_groups[] = { 1191 "gpio113", 1192 }; 1193 1194 static const char * const usb0_phy_groups[] = { 1195 "gpio38", 1196 }; 1197 1198 static const char * const usb1_phy_groups[] = { 1199 "gpio58", 1200 }; 1201 1202 static const char * const usb2phy_ac_groups[] = { 1203 "gpio47", "gpio48", "gpio113", "gpio123", 1204 }; 1205 1206 static const char * const vfr_1_groups[] = { 1207 "gpio91", 1208 }; 1209 1210 static const char * const vsense_trigger_groups[] = { 1211 "gpio62", 1212 }; 1213 1214 static const char * const wlan1_adc_groups[] = { 1215 "gpio64", "gpio63", 1216 }; 1217 1218 static const char * const wlan2_adc_groups[] = { 1219 "gpio68", "gpio65", 1220 }; 1221 1222 static const char * const wmss_reset_groups[] = { 1223 "gpio63", 1224 }; 1225 1226 static const struct msm_function sc8180x_functions[] = { 1227 FUNCTION(adsp_ext), 1228 FUNCTION(agera_pll), 1229 FUNCTION(aoss_cti), 1230 FUNCTION(atest_char), 1231 FUNCTION(atest_tsens), 1232 FUNCTION(atest_tsens2), 1233 FUNCTION(atest_usb0), 1234 FUNCTION(atest_usb1), 1235 FUNCTION(atest_usb2), 1236 FUNCTION(atest_usb3), 1237 FUNCTION(atest_usb4), 1238 FUNCTION(audio_ref), 1239 FUNCTION(btfm_slimbus), 1240 FUNCTION(cam_mclk), 1241 FUNCTION(cci_async), 1242 FUNCTION(cci_i2c), 1243 FUNCTION(cci_timer0), 1244 FUNCTION(cci_timer1), 1245 FUNCTION(cci_timer2), 1246 FUNCTION(cci_timer3), 1247 FUNCTION(cci_timer4), 1248 FUNCTION(cci_timer5), 1249 FUNCTION(cci_timer6), 1250 FUNCTION(cci_timer7), 1251 FUNCTION(cci_timer8), 1252 FUNCTION(cci_timer9), 1253 FUNCTION(cri_trng), 1254 FUNCTION(dbg_out), 1255 FUNCTION(ddr_bist), 1256 FUNCTION(ddr_pxi), 1257 FUNCTION(debug_hot), 1258 FUNCTION(dp_hot), 1259 FUNCTION(edp_hot), 1260 FUNCTION(edp_lcd), 1261 FUNCTION(emac_phy), 1262 FUNCTION(emac_pps), 1263 FUNCTION(gcc_gp1), 1264 FUNCTION(gcc_gp2), 1265 FUNCTION(gcc_gp3), 1266 FUNCTION(gcc_gp4), 1267 FUNCTION(gcc_gp5), 1268 FUNCTION(gpio), 1269 FUNCTION(gps), 1270 FUNCTION(grfc), 1271 FUNCTION(hs1_mi2s), 1272 FUNCTION(hs2_mi2s), 1273 FUNCTION(hs3_mi2s), 1274 FUNCTION(jitter_bist), 1275 FUNCTION(lpass_slimbus), 1276 FUNCTION(m_voc), 1277 FUNCTION(mdp_vsync), 1278 FUNCTION(mdp_vsync0), 1279 FUNCTION(mdp_vsync1), 1280 FUNCTION(mdp_vsync2), 1281 FUNCTION(mdp_vsync3), 1282 FUNCTION(mdp_vsync4), 1283 FUNCTION(mdp_vsync5), 1284 FUNCTION(mss_lte), 1285 FUNCTION(nav_pps), 1286 FUNCTION(pa_indicator), 1287 FUNCTION(pci_e0), 1288 FUNCTION(pci_e1), 1289 FUNCTION(pci_e2), 1290 FUNCTION(pci_e3), 1291 FUNCTION(phase_flag), 1292 FUNCTION(pll_bist), 1293 FUNCTION(pll_bypassnl), 1294 FUNCTION(pll_reset), 1295 FUNCTION(pri_mi2s), 1296 FUNCTION(pri_mi2s_ws), 1297 FUNCTION(prng_rosc), 1298 FUNCTION(qdss_cti), 1299 FUNCTION(qdss_gpio), 1300 FUNCTION(qlink), 1301 FUNCTION(qspi0), 1302 FUNCTION(qspi0_clk), 1303 FUNCTION(qspi0_cs), 1304 FUNCTION(qspi1), 1305 FUNCTION(qspi1_clk), 1306 FUNCTION(qspi1_cs), 1307 FUNCTION(qua_mi2s), 1308 FUNCTION(qup0), 1309 FUNCTION(qup1), 1310 FUNCTION(qup2), 1311 FUNCTION(qup3), 1312 FUNCTION(qup4), 1313 FUNCTION(qup5), 1314 FUNCTION(qup6), 1315 FUNCTION(qup7), 1316 FUNCTION(qup8), 1317 FUNCTION(qup9), 1318 FUNCTION(qup10), 1319 FUNCTION(qup11), 1320 FUNCTION(qup12), 1321 FUNCTION(qup13), 1322 FUNCTION(qup14), 1323 FUNCTION(qup15), 1324 FUNCTION(qup16), 1325 FUNCTION(qup17), 1326 FUNCTION(qup18), 1327 FUNCTION(qup19), 1328 FUNCTION(qup_l4), 1329 FUNCTION(qup_l5), 1330 FUNCTION(qup_l6), 1331 FUNCTION(rgmii), 1332 FUNCTION(sd_write), 1333 FUNCTION(sdc4), 1334 FUNCTION(sdc4_clk), 1335 FUNCTION(sdc4_cmd), 1336 FUNCTION(sec_mi2s), 1337 FUNCTION(sp_cmu), 1338 FUNCTION(spkr_i2s), 1339 FUNCTION(ter_mi2s), 1340 FUNCTION(tgu), 1341 FUNCTION(tsense_pwm1), 1342 FUNCTION(tsense_pwm2), 1343 FUNCTION(tsif1), 1344 FUNCTION(tsif2), 1345 FUNCTION(uim1), 1346 FUNCTION(uim2), 1347 FUNCTION(uim_batt), 1348 FUNCTION(usb0_phy), 1349 FUNCTION(usb1_phy), 1350 FUNCTION(usb2phy_ac), 1351 FUNCTION(vfr_1), 1352 FUNCTION(vsense_trigger), 1353 FUNCTION(wlan1_adc), 1354 FUNCTION(wlan2_adc), 1355 FUNCTION(wmss_reset), 1356 }; 1357 1358 /* Every pin is maintained as a single group, and missing or non-existing pin 1359 * would be maintained as dummy group to synchronize pin group index with 1360 * pin descriptor registered with pinctrl core. 1361 * Clients would not be able to request these dummy pin groups. 1362 */ 1363 static const struct msm_pingroup sc8180x_groups[] = { 1364 [0] = PINGROUP(0, WEST, qup0, cci_i2c, _, _, _, _, _, _, _), 1365 [1] = PINGROUP(1, WEST, qup0, cci_i2c, _, _, _, _, _, _, _), 1366 [2] = PINGROUP(2, WEST, qup0, cci_i2c, _, _, _, _, _, _, _), 1367 [3] = PINGROUP(3, WEST, qup0, cci_i2c, _, _, _, _, _, _, _), 1368 [4] = PINGROUP(4, WEST, qup6, rgmii, _, phase_flag, _, _, _, _, _), 1369 [5] = PINGROUP(5, WEST, qup6, rgmii, _, phase_flag, _, _, _, _, _), 1370 [6] = PINGROUP(6, WEST, qup6, rgmii, qup_l6, _, phase_flag, _, _, _, _), 1371 [7] = PINGROUP(7, WEST, qup6, debug_hot, rgmii, qup_l5, _, phase_flag, _, _, _), 1372 [8] = PINGROUP(8, EAST, mdp_vsync, _, _, _, _, _, _, _, _), 1373 [9] = PINGROUP(9, EAST, mdp_vsync, qup10, _, _, _, _, _, _, _), 1374 [10] = PINGROUP(10, EAST, edp_hot, m_voc, mdp_vsync, qup10, _, _, _, _, _), 1375 [11] = PINGROUP(11, EAST, edp_lcd, qup10, _, _, _, _, _, _, _), 1376 [12] = PINGROUP(12, EAST, qup10, _, _, _, _, _, _, _, _), 1377 [13] = PINGROUP(13, EAST, cam_mclk, qdss_gpio, _, _, _, _, _, _, _), 1378 [14] = PINGROUP(14, EAST, cam_mclk, qdss_gpio, _, _, _, _, _, _, _), 1379 [15] = PINGROUP(15, EAST, cam_mclk, qdss_gpio, _, _, _, _, _, _, _), 1380 [16] = PINGROUP(16, EAST, cam_mclk, qdss_gpio, _, _, _, _, _, _, _), 1381 [17] = PINGROUP(17, EAST, cci_i2c, qdss_gpio, _, _, _, _, _, _, _), 1382 [18] = PINGROUP(18, EAST, cci_i2c, qdss_gpio, _, _, _, _, _, _, _), 1383 [19] = PINGROUP(19, EAST, cci_i2c, qdss_gpio, _, _, _, _, _, _, _), 1384 [20] = PINGROUP(20, EAST, cci_i2c, qdss_gpio, _, _, _, _, _, _, _), 1385 [21] = PINGROUP(21, EAST, cci_timer0, gcc_gp2, qdss_gpio, _, _, _, _, _, _), 1386 [22] = PINGROUP(22, EAST, cci_timer1, gcc_gp3, qdss_gpio, _, _, _, _, _, _), 1387 [23] = PINGROUP(23, EAST, cci_timer2, qup18, qdss_gpio, _, _, _, _, _, _), 1388 [24] = PINGROUP(24, EAST, cci_timer3, cci_async, qup18, qdss_gpio, _, _, _, _, _), 1389 [25] = PINGROUP(25, EAST, cam_mclk, cci_async, qup18, qdss_gpio, _, _, _, _, _), 1390 [26] = PINGROUP(26, EAST, cci_async, qup18, qdss_gpio, _, _, _, _, _, _), 1391 [27] = PINGROUP(27, EAST, qup15, _, qdss_gpio, _, _, _, _, _, _), 1392 [28] = PINGROUP(28, EAST, qup15, qdss_gpio, _, _, _, _, _, _, _), 1393 [29] = PINGROUP(29, EAST, qup15, qdss_gpio, _, _, _, _, _, _, _), 1394 [30] = PINGROUP(30, EAST, qup15, qdss_gpio, _, _, _, _, _, _, _), 1395 [31] = PINGROUP(31, EAST, cci_i2c, _, _, _, _, _, _, _, _), 1396 [32] = PINGROUP(32, EAST, cci_i2c, _, _, _, _, _, _, _, _), 1397 [33] = PINGROUP(33, EAST, cci_i2c, qup_l5, _, phase_flag, _, _, _, _, _), 1398 [34] = PINGROUP(34, EAST, cci_i2c, qup_l6, dbg_out, atest_usb2, _, _, _, _, _), 1399 [35] = PINGROUP(35, SOUTH, pci_e0, qup_l4, _, _, _, _, _, _, _), 1400 [36] = PINGROUP(36, SOUTH, pci_e0, qup_l5, _, _, _, _, _, _, _), 1401 [37] = PINGROUP(37, SOUTH, qup_l6, agera_pll, _, _, _, _, _, _, _), 1402 [38] = PINGROUP(38, SOUTH, usb0_phy, _, _, _, _, _, _, _, _), 1403 [39] = PINGROUP(39, EAST, qup9, cci_i2c, qdss_gpio, _, _, _, _, _, _), 1404 [40] = PINGROUP(40, EAST, qup9, cci_i2c, qdss_gpio, _, _, _, _, _, _), 1405 [41] = PINGROUP(41, EAST, qup9, cci_i2c, qdss_gpio, _, _, _, _, _, _), 1406 [42] = PINGROUP(42, EAST, qup9, cci_i2c, qdss_gpio, _, _, _, _, _, _), 1407 [43] = PINGROUP(43, EAST, qup13, _, _, _, _, _, _, _, _), 1408 [44] = PINGROUP(44, EAST, qup13, _, _, _, _, _, _, _, _), 1409 [45] = PINGROUP(45, EAST, qup13, _, _, _, _, _, _, _, _), 1410 [46] = PINGROUP(46, EAST, qup13, _, _, _, _, _, _, _, _), 1411 [47] = PINGROUP(47, EAST, qup14, usb2phy_ac, _, _, _, _, _, _, _), 1412 [48] = PINGROUP(48, EAST, qup14, usb2phy_ac, _, _, _, _, _, _, _), 1413 [49] = PINGROUP(49, EAST, qup14, qdss_cti, _, _, _, _, _, _, _), 1414 [50] = PINGROUP(50, EAST, qup14, qdss_cti, _, _, _, _, _, _, _), 1415 [51] = PINGROUP(51, WEST, qup4, _, _, _, _, _, _, _, _), 1416 [52] = PINGROUP(52, WEST, qup4, _, _, _, _, _, _, _, _), 1417 [53] = PINGROUP(53, WEST, qup4, _, phase_flag, _, _, _, _, _, _), 1418 [54] = PINGROUP(54, WEST, qup4, _, _, phase_flag, _, _, _, _, _), 1419 [55] = PINGROUP(55, WEST, qup17, qspi1_cs, _, _, _, _, _, _, _), 1420 [56] = PINGROUP(56, WEST, qup17, qspi1, _, _, _, _, _, _, _), 1421 [57] = PINGROUP(57, WEST, qup17, qspi1, _, _, _, _, _, _, _), 1422 [58] = PINGROUP(58, WEST, usb1_phy, qup17, _, _, _, _, _, _, _), 1423 [59] = PINGROUP(59, WEST, rgmii, qup_l4, _, _, _, _, _, _, _), 1424 [60] = PINGROUP(60, EAST, gps, nav_pps, nav_pps, qup_l4, mdp_vsync, atest_usb1, ddr_pxi, _, _), 1425 [61] = PINGROUP(61, EAST, qlink, _, _, _, _, _, _, _, _), 1426 [62] = PINGROUP(62, EAST, qlink, atest_tsens2, atest_usb1, ddr_pxi, vsense_trigger, _, _, _, _), 1427 [63] = PINGROUP(63, EAST, wmss_reset, _, atest_usb1, ddr_pxi, wlan1_adc, _, _, _, _), 1428 [64] = PINGROUP(64, EAST, grfc, _, atest_usb1, ddr_pxi, wlan1_adc, _, _, _, _), 1429 [65] = PINGROUP(65, EAST, grfc, atest_usb1, ddr_pxi, wlan2_adc, _, _, _, _, _), 1430 [66] = PINGROUP(66, EAST, grfc, _, _, _, _, _, _, _, _), 1431 [67] = PINGROUP(67, EAST, grfc, _, _, _, _, _, _, _, _), 1432 [68] = PINGROUP(68, EAST, grfc, pa_indicator, atest_usb3, ddr_pxi, wlan2_adc, _, _, _, _), 1433 [69] = PINGROUP(69, EAST, mss_lte, _, _, _, _, _, _, _, _), 1434 [70] = PINGROUP(70, EAST, mss_lte, _, _, _, _, _, _, _, _), 1435 [71] = PINGROUP(71, EAST, _, grfc, atest_usb3, ddr_pxi, _, _, _, _, _), 1436 [72] = PINGROUP(72, EAST, _, grfc, atest_usb3, ddr_pxi, _, _, _, _, _), 1437 [73] = PINGROUP(73, EAST, _, grfc, atest_usb3, ddr_pxi, _, _, _, _, _), 1438 [74] = PINGROUP(74, EAST, _, grfc, tgu, atest_usb3, ddr_pxi, _, _, _, _), 1439 [75] = PINGROUP(75, EAST, _, grfc, tgu, atest_usb4, ddr_pxi, _, _, _, _), 1440 [76] = PINGROUP(76, EAST, _, grfc, gps, nav_pps, nav_pps, tgu, atest_usb4, ddr_pxi, _), 1441 [77] = PINGROUP(77, EAST, _, grfc, gps, nav_pps, nav_pps, tgu, atest_usb4, ddr_pxi, _), 1442 [78] = PINGROUP(78, EAST, _, grfc, _, atest_usb4, ddr_pxi, _, _, _, _), 1443 [79] = PINGROUP(79, EAST, _, grfc, _, _, _, _, _, _, _), 1444 [80] = PINGROUP(80, EAST, _, grfc, _, _, _, _, _, _, _), 1445 [81] = PINGROUP(81, EAST, _, grfc, gps, nav_pps, nav_pps, qdss_cti, _, emac_pps, _), 1446 [82] = PINGROUP(82, EAST, _, grfc, gps, nav_pps, nav_pps, mdp_vsync, qdss_cti, _, _), 1447 [83] = PINGROUP(83, EAST, qup12, qup16, _, _, _, _, _, _, _), 1448 [84] = PINGROUP(84, EAST, qup12, qup16, _, _, _, _, _, _, _), 1449 [85] = PINGROUP(85, EAST, qup12, qup16, _, _, _, _, _, _, _), 1450 [86] = PINGROUP(86, EAST, qup12, qup16, _, _, _, _, _, _, _), 1451 [87] = PINGROUP(87, SOUTH, _, _, _, _, _, _, _, _, _), 1452 [88] = PINGROUP(88, EAST, tsif1, qup8, qspi0_cs, tgu, atest_usb4, ddr_pxi, _, _, _), 1453 [89] = PINGROUP(89, EAST, tsif1, qup8, qspi0, mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3, mdp_vsync4, mdp_vsync5), 1454 [90] = PINGROUP(90, EAST, tsif1, qup8, qspi0, sdc4_cmd, tgu, qdss_cti, atest_usb0, ddr_pxi, _), 1455 [91] = PINGROUP(91, EAST, tsif1, qup8, qspi0, sdc4, vfr_1, tgu, atest_usb0, _, _), 1456 [92] = PINGROUP(92, EAST, tsif2, qup11, qspi0_clk, sdc4_clk, qdss_gpio, atest_usb0, _, _, _), 1457 [93] = PINGROUP(93, EAST, tsif2, qup11, qspi0, sdc4, atest_tsens, atest_usb0, _, _, _), 1458 [94] = PINGROUP(94, EAST, tsif2, qup11, qspi0_cs, sdc4, _, atest_usb0, _, _, _), 1459 [95] = PINGROUP(95, EAST, tsif2, qup11, sdc4, qup_l4, atest_usb2, _, _, _, _), 1460 [96] = PINGROUP(96, WEST, tsif2, qup_l5, _, _, _, _, _, _, _), 1461 [97] = PINGROUP(97, WEST, sd_write, tsif1, qup_l6, _, _, _, _, _, _), 1462 [98] = PINGROUP(98, WEST, qup7, ddr_bist, _, _, _, _, _, _, _), 1463 [99] = PINGROUP(99, WEST, qup7, ddr_bist, _, _, _, _, _, _, _), 1464 [100] = PINGROUP(100, WEST, qup7, pll_bypassnl, _, _, _, _, _, _, _), 1465 [101] = PINGROUP(101, WEST, qup7, pll_reset, _, _, _, _, _, _, _), 1466 [102] = PINGROUP(102, SOUTH, pci_e1, _, phase_flag, atest_usb2, _, _, _, _, _), 1467 [103] = PINGROUP(103, SOUTH, pci_e1, _, _, _, _, _, _, _, _), 1468 [104] = PINGROUP(104, SOUTH, _, _, _, _, _, _, _, _, _), 1469 [105] = PINGROUP(105, WEST, uim2, _, _, _, _, _, _, _, _), 1470 [106] = PINGROUP(106, WEST, uim2, _, _, _, _, _, _, _, _), 1471 [107] = PINGROUP(107, WEST, uim2, _, _, _, _, _, _, _, _), 1472 [108] = PINGROUP(108, WEST, uim2, _, _, _, _, _, _, _, _), 1473 [109] = PINGROUP(109, WEST, uim1, _, _, _, _, _, _, _, _), 1474 [110] = PINGROUP(110, WEST, uim1, _, _, _, _, _, _, _, _), 1475 [111] = PINGROUP(111, WEST, uim1, _, _, _, _, _, _, _, _), 1476 [112] = PINGROUP(112, WEST, uim1, _, _, _, _, _, _, _, _), 1477 [113] = PINGROUP(113, WEST, uim_batt, usb2phy_ac, aoss_cti, _, _, _, _, _, _), 1478 [114] = PINGROUP(114, WEST, qup1, rgmii, _, qdss_gpio, _, _, _, _, _), 1479 [115] = PINGROUP(115, WEST, qup1, rgmii, adsp_ext, _, qdss_gpio, _, _, _, _), 1480 [116] = PINGROUP(116, WEST, qup1, rgmii, _, qdss_gpio, _, _, _, _, _), 1481 [117] = PINGROUP(117, WEST, qup1, rgmii, _, qdss_gpio, _, _, _, _, _), 1482 [118] = PINGROUP(118, WEST, rgmii, _, qdss_gpio, _, _, _, _, _, _), 1483 [119] = PINGROUP(119, WEST, qup5, rgmii, _, qdss_gpio, _, _, _, _, _), 1484 [120] = PINGROUP(120, WEST, qup5, rgmii, _, phase_flag, qdss_gpio, _, _, _, _), 1485 [121] = PINGROUP(121, WEST, qup5, rgmii, _, phase_flag, qdss_gpio, atest_usb2, _, _, _), 1486 [122] = PINGROUP(122, WEST, qup5, rgmii, _, phase_flag, atest_usb2, _, _, _, _), 1487 [123] = PINGROUP(123, SOUTH, usb2phy_ac, _, phase_flag, _, _, _, _, _, _), 1488 [124] = PINGROUP(124, SOUTH, emac_phy, _, _, _, _, _, _, _, _), 1489 [125] = PINGROUP(125, WEST, hs3_mi2s, _, phase_flag, _, _, _, _, _, _), 1490 [126] = PINGROUP(126, WEST, sec_mi2s, qup2, _, _, _, _, _, _, _), 1491 [127] = PINGROUP(127, WEST, sec_mi2s, qup2, _, _, _, _, _, _, _), 1492 [128] = PINGROUP(128, WEST, sec_mi2s, qup2, _, _, _, _, _, _, _), 1493 [129] = PINGROUP(129, WEST, sec_mi2s, qup2, jitter_bist, _, _, _, _, _, _), 1494 [130] = PINGROUP(130, WEST, sec_mi2s, pll_bist, _, qdss_gpio, _, _, _, _, _), 1495 [131] = PINGROUP(131, WEST, ter_mi2s, gcc_gp1, _, _, _, _, _, _, _), 1496 [132] = PINGROUP(132, WEST, ter_mi2s, _, qdss_gpio, _, _, _, _, _, _), 1497 [133] = PINGROUP(133, WEST, ter_mi2s, _, qdss_gpio, atest_char, _, _, _, _, _), 1498 [134] = PINGROUP(134, WEST, ter_mi2s, _, qdss_gpio, atest_char, _, _, _, _, _), 1499 [135] = PINGROUP(135, WEST, ter_mi2s, _, qdss_gpio, atest_char, _, _, _, _, _), 1500 [136] = PINGROUP(136, WEST, qua_mi2s, gcc_gp1, _, _, _, _, _, _, _), 1501 [137] = PINGROUP(137, WEST, qua_mi2s, gcc_gp2, _, _, _, _, _, _, _), 1502 [138] = PINGROUP(138, WEST, qua_mi2s, gcc_gp3, _, _, _, _, _, _, _), 1503 [139] = PINGROUP(139, WEST, qua_mi2s, gcc_gp4, _, _, _, _, _, _, _), 1504 [140] = PINGROUP(140, WEST, qua_mi2s, gcc_gp5, _, atest_char, _, _, _, _, _), 1505 [141] = PINGROUP(141, WEST, qua_mi2s, qdss_cti, _, _, _, _, _, _, _), 1506 [142] = PINGROUP(142, WEST, qua_mi2s, _, _, qdss_cti, atest_char, _, _, _, _), 1507 [143] = PINGROUP(143, WEST, pri_mi2s, _, _, _, _, _, _, _, _), 1508 [144] = PINGROUP(144, WEST, pri_mi2s, qup3, _, _, _, _, _, _, _), 1509 [145] = PINGROUP(145, WEST, pri_mi2s_ws, qup3, ddr_bist, _, _, _, _, _, _), 1510 [146] = PINGROUP(146, WEST, pri_mi2s, qup3, ddr_bist, _, _, _, _, _, _), 1511 [147] = PINGROUP(147, WEST, pri_mi2s, qup3, _, _, _, _, _, _, _), 1512 [148] = PINGROUP(148, WEST, spkr_i2s, audio_ref, _, phase_flag, _, _, _, _, _), 1513 [149] = PINGROUP(149, WEST, lpass_slimbus, spkr_i2s, _, phase_flag, _, _, _, _, _), 1514 [150] = PINGROUP(150, WEST, lpass_slimbus, spkr_i2s, _, phase_flag, tsense_pwm1, tsense_pwm2, _, _, _), 1515 [151] = PINGROUP(151, WEST, lpass_slimbus, spkr_i2s, _, phase_flag, _, _, _, _, _), 1516 [152] = PINGROUP(152, WEST, lpass_slimbus, spkr_i2s, _, phase_flag, _, _, _, _, _), 1517 [153] = PINGROUP(153, WEST, btfm_slimbus, _, _, _, _, _, _, _, _), 1518 [154] = PINGROUP(154, WEST, btfm_slimbus, _, _, _, _, _, _, _, _), 1519 [155] = PINGROUP(155, WEST, hs1_mi2s, _, phase_flag, _, _, _, _, _, _), 1520 [156] = PINGROUP(156, WEST, hs1_mi2s, _, phase_flag, _, _, _, _, _, _), 1521 [157] = PINGROUP(157, WEST, hs1_mi2s, _, phase_flag, _, _, _, _, _, _), 1522 [158] = PINGROUP(158, WEST, hs1_mi2s, _, phase_flag, _, _, _, _, _, _), 1523 [159] = PINGROUP(159, WEST, hs1_mi2s, cri_trng, _, phase_flag, _, _, _, _, _), 1524 [160] = PINGROUP(160, WEST, hs2_mi2s, cri_trng, _, phase_flag, _, _, _, _, _), 1525 [161] = PINGROUP(161, WEST, hs2_mi2s, qspi1, cri_trng, _, phase_flag, _, _, _, _), 1526 [162] = PINGROUP(162, WEST, hs2_mi2s, qspi1, sp_cmu, _, phase_flag, _, _, _, _), 1527 [163] = PINGROUP(163, WEST, hs2_mi2s, qspi1_clk, prng_rosc, _, phase_flag, _, _, _, _), 1528 [164] = PINGROUP(164, WEST, hs2_mi2s, qspi1_cs, _, phase_flag, _, _, _, _, _), 1529 [165] = PINGROUP(165, WEST, hs3_mi2s, _, phase_flag, _, _, _, _, _, _), 1530 [166] = PINGROUP(166, WEST, hs3_mi2s, _, phase_flag, _, _, _, _, _, _), 1531 [167] = PINGROUP(167, WEST, hs3_mi2s, _, phase_flag, _, _, _, _, _, _), 1532 [168] = PINGROUP(168, WEST, hs3_mi2s, _, phase_flag, _, _, _, _, _, _), 1533 [169] = PINGROUP(169, SOUTH, _, _, _, _, _, _, _, _, _), 1534 [170] = PINGROUP(170, SOUTH, _, _, _, _, _, _, _, _, _), 1535 [171] = PINGROUP(171, SOUTH, _, _, _, _, _, _, _, _, _), 1536 [172] = PINGROUP(172, SOUTH, _, _, _, _, _, _, _, _, _), 1537 [173] = PINGROUP(173, SOUTH, _, _, _, _, _, _, _, _, _), 1538 [174] = PINGROUP(174, SOUTH, _, _, _, _, _, _, _, _, _), 1539 [175] = PINGROUP(175, SOUTH, pci_e2, _, _, _, _, _, _, _, _), 1540 [176] = PINGROUP(176, SOUTH, pci_e2, cci_async, _, _, _, _, _, _, _), 1541 [177] = PINGROUP_OFFSET(177, SOUTH, 0x1e000, _, _, _, _, _, _, _, _, _), 1542 [178] = PINGROUP_OFFSET(178, SOUTH, 0x1e000, pci_e3, cci_timer4, _, _, _, _, _, _, _), 1543 [179] = PINGROUP_OFFSET(179, SOUTH, 0x1e000, pci_e3, cam_mclk, _, _, _, _, _, _, _), 1544 [180] = PINGROUP_OFFSET(180, SOUTH, 0x1e000, cam_mclk, _, _, _, _, _, _, _, _), 1545 [181] = PINGROUP_OFFSET(181, SOUTH, 0x1e000, qup19, cam_mclk, _, _, _, _, _, _, _), 1546 [182] = PINGROUP_OFFSET(182, SOUTH, 0x1e000, qup19, cci_timer5, gcc_gp4, _, _, _, _, _, _), 1547 [183] = PINGROUP_OFFSET(183, SOUTH, 0x1e000, qup19, cci_timer6, gcc_gp5, _, _, _, _, _, _), 1548 [184] = PINGROUP_OFFSET(184, SOUTH, 0x1e000, qup19, cci_timer7, _, _, _, _, _, _, _), 1549 [185] = PINGROUP_OFFSET(185, SOUTH, 0x1e000, cci_timer8, cci_async, _, _, _, _, _, _, _), 1550 [186] = PINGROUP_OFFSET(186, SOUTH, 0x1e000, cci_timer9, cci_async, _, _, _, _, _, _, _), 1551 [187] = PINGROUP_OFFSET(187, SOUTH, 0x1e000, _, _, _, _, _, _, _, _, _), 1552 [188] = PINGROUP_OFFSET(188, SOUTH, 0x1e000, _, _, _, _, _, _, _, _, _), 1553 [189] = PINGROUP_OFFSET(189, SOUTH, 0x1e000, dp_hot, _, _, _, _, _, _, _, _), 1554 [190] = UFS_RESET(ufs_reset), 1555 [191] = SDC_QDSD_PINGROUP(sdc2_clk, 0x4b2000, 14, 6), 1556 [192] = SDC_QDSD_PINGROUP(sdc2_cmd, 0x4b2000, 11, 3), 1557 [193] = SDC_QDSD_PINGROUP(sdc2_data, 0x4b2000, 9, 0), 1558 }; 1559 1560 static const struct msm_gpio_wakeirq_map sc8180x_pdc_map[] = { 1561 { 3, 31 }, { 5, 32 }, { 8, 33 }, { 9, 34 }, { 10, 100 }, { 12, 104 }, 1562 { 24, 37 }, { 26, 38 }, { 27, 41 }, { 28, 42 }, { 30, 39 }, { 36, 43 }, 1563 { 37, 43 }, { 38, 45 }, { 39, 118 }, { 39, 125 }, { 41, 47 }, 1564 { 42, 48 }, { 46, 50 }, { 47, 49 }, { 48, 51 }, { 49, 53 }, { 50, 52 }, 1565 { 51, 116 }, { 51, 123 }, { 53, 54 }, { 54, 55 }, { 55, 56 }, 1566 { 56, 57 }, { 58, 58 }, { 60, 60 }, { 68, 62 }, { 70, 63 }, { 76, 86 }, 1567 { 77, 36 }, { 81, 64 }, { 83, 65 }, { 86, 67 }, { 87, 84 }, { 88, 117 }, 1568 { 88, 124 }, { 90, 69 }, { 91, 70 }, { 93, 75 }, { 95, 72 }, { 97, 74 }, 1569 { 101, 76 }, { 103, 77 }, { 104, 78 }, { 114, 82 }, { 117, 85 }, 1570 { 118, 101 }, { 119, 87 }, { 120, 88 }, { 121, 89 }, { 122, 90 }, 1571 { 123, 91 }, { 124, 92 }, { 125, 93 }, { 129, 94 }, { 132, 105 }, 1572 { 133, 35 }, { 134, 36 }, { 136, 97 }, { 142, 103 }, { 144, 115 }, 1573 { 144, 122 }, { 147, 106 }, { 150, 107 }, { 152, 108 }, { 153, 109 }, 1574 { 177, 111 }, { 180, 112 }, { 184, 113 }, { 189, 114 } 1575 }; 1576 1577 static struct msm_pinctrl_soc_data sc8180x_pinctrl = { 1578 .tiles = sc8180x_tiles, 1579 .ntiles = ARRAY_SIZE(sc8180x_tiles), 1580 .pins = sc8180x_pins, 1581 .npins = ARRAY_SIZE(sc8180x_pins), 1582 .functions = sc8180x_functions, 1583 .nfunctions = ARRAY_SIZE(sc8180x_functions), 1584 .groups = sc8180x_groups, 1585 .ngroups = ARRAY_SIZE(sc8180x_groups), 1586 .ngpios = 191, 1587 .wakeirq_map = sc8180x_pdc_map, 1588 .nwakeirq_map = ARRAY_SIZE(sc8180x_pdc_map), 1589 }; 1590 1591 static int sc8180x_pinctrl_probe(struct platform_device *pdev) 1592 { 1593 return msm_pinctrl_probe(pdev, &sc8180x_pinctrl); 1594 } 1595 1596 static const struct of_device_id sc8180x_pinctrl_of_match[] = { 1597 { .compatible = "qcom,sc8180x-tlmm", }, 1598 { }, 1599 }; 1600 MODULE_DEVICE_TABLE(of, sc8180x_pinctrl_of_match); 1601 1602 static struct platform_driver sc8180x_pinctrl_driver = { 1603 .driver = { 1604 .name = "sc8180x-pinctrl", 1605 .of_match_table = sc8180x_pinctrl_of_match, 1606 }, 1607 .probe = sc8180x_pinctrl_probe, 1608 .remove = msm_pinctrl_remove, 1609 }; 1610 1611 static int __init sc8180x_pinctrl_init(void) 1612 { 1613 return platform_driver_register(&sc8180x_pinctrl_driver); 1614 } 1615 arch_initcall(sc8180x_pinctrl_init); 1616 1617 static void __exit sc8180x_pinctrl_exit(void) 1618 { 1619 platform_driver_unregister(&sc8180x_pinctrl_driver); 1620 } 1621 module_exit(sc8180x_pinctrl_exit); 1622 1623 MODULE_DESCRIPTION("QTI SC8180x pinctrl driver"); 1624 MODULE_LICENSE("GPL v2"); 1625