1 /* 2 * Copyright (c) 2015, The Linux Foundation. All rights reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 and 6 * only version 2 as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 * 13 * GPIO and pin control functions on this SOC are handled by the "TLMM" 14 * device. The driver which controls this device is pinctrl-msm.c. Each 15 * SOC with a TLMM is expected to create a client driver that registers 16 * with pinctrl-msm.c. This means that all TLMM drivers are pin control 17 * drivers. 18 * 19 * This pin control driver is intended to be used only an ACPI-enabled 20 * system. As such, UEFI will handle all pin control configuration, so 21 * this driver does not provide pin control functions. It is effectively 22 * a GPIO-only driver. The alternative is to duplicate the GPIO code of 23 * pinctrl-msm.c into another driver. 24 */ 25 26 #include <linux/module.h> 27 #include <linux/platform_device.h> 28 #include <linux/pinctrl/pinctrl.h> 29 #include <linux/acpi.h> 30 31 #include "pinctrl-msm.h" 32 33 static struct msm_pinctrl_soc_data qdf2xxx_pinctrl; 34 35 /* A reasonable limit to the number of GPIOS */ 36 #define MAX_GPIOS 256 37 38 /* maximum size of each gpio name (enough room for "gpioXXX" + null) */ 39 #define NAME_SIZE 8 40 41 static int qdf2xxx_pinctrl_probe(struct platform_device *pdev) 42 { 43 struct pinctrl_pin_desc *pins; 44 struct msm_pingroup *groups; 45 char (*names)[NAME_SIZE]; 46 unsigned int i; 47 u32 num_gpios; 48 int ret; 49 50 /* Query the number of GPIOs from ACPI */ 51 ret = device_property_read_u32(&pdev->dev, "num-gpios", &num_gpios); 52 if (ret < 0) { 53 dev_warn(&pdev->dev, "missing num-gpios property\n"); 54 return ret; 55 } 56 57 if (!num_gpios || num_gpios > MAX_GPIOS) { 58 dev_warn(&pdev->dev, "invalid num-gpios property\n"); 59 return -ENODEV; 60 } 61 62 pins = devm_kcalloc(&pdev->dev, num_gpios, 63 sizeof(struct pinctrl_pin_desc), GFP_KERNEL); 64 groups = devm_kcalloc(&pdev->dev, num_gpios, 65 sizeof(struct msm_pingroup), GFP_KERNEL); 66 names = devm_kcalloc(&pdev->dev, num_gpios, NAME_SIZE, GFP_KERNEL); 67 68 if (!pins || !groups || !names) 69 return -ENOMEM; 70 71 for (i = 0; i < num_gpios; i++) { 72 snprintf(names[i], NAME_SIZE, "gpio%u", i); 73 74 pins[i].number = i; 75 pins[i].name = names[i]; 76 77 groups[i].npins = 1; 78 groups[i].name = names[i]; 79 groups[i].pins = &pins[i].number; 80 81 groups[i].ctl_reg = 0x10000 * i; 82 groups[i].io_reg = 0x04 + 0x10000 * i; 83 groups[i].intr_cfg_reg = 0x08 + 0x10000 * i; 84 groups[i].intr_status_reg = 0x0c + 0x10000 * i; 85 groups[i].intr_target_reg = 0x08 + 0x10000 * i; 86 87 groups[i].mux_bit = 2; 88 groups[i].pull_bit = 0; 89 groups[i].drv_bit = 6; 90 groups[i].oe_bit = 9; 91 groups[i].in_bit = 0; 92 groups[i].out_bit = 1; 93 groups[i].intr_enable_bit = 0; 94 groups[i].intr_status_bit = 0; 95 groups[i].intr_target_bit = 5; 96 groups[i].intr_target_kpss_val = 1; 97 groups[i].intr_raw_status_bit = 4; 98 groups[i].intr_polarity_bit = 1; 99 groups[i].intr_detection_bit = 2; 100 groups[i].intr_detection_width = 2; 101 } 102 103 qdf2xxx_pinctrl.pins = pins; 104 qdf2xxx_pinctrl.groups = groups; 105 qdf2xxx_pinctrl.npins = num_gpios; 106 qdf2xxx_pinctrl.ngroups = num_gpios; 107 qdf2xxx_pinctrl.ngpios = num_gpios; 108 109 return msm_pinctrl_probe(pdev, &qdf2xxx_pinctrl); 110 } 111 112 static const struct acpi_device_id qdf2xxx_acpi_ids[] = { 113 {"QCOM8001"}, 114 {}, 115 }; 116 MODULE_DEVICE_TABLE(acpi, qdf2xxx_acpi_ids); 117 118 static struct platform_driver qdf2xxx_pinctrl_driver = { 119 .driver = { 120 .name = "qdf2xxx-pinctrl", 121 .acpi_match_table = ACPI_PTR(qdf2xxx_acpi_ids), 122 }, 123 .probe = qdf2xxx_pinctrl_probe, 124 .remove = msm_pinctrl_remove, 125 }; 126 127 static int __init qdf2xxx_pinctrl_init(void) 128 { 129 return platform_driver_register(&qdf2xxx_pinctrl_driver); 130 } 131 arch_initcall(qdf2xxx_pinctrl_init); 132 133 static void __exit qdf2xxx_pinctrl_exit(void) 134 { 135 platform_driver_unregister(&qdf2xxx_pinctrl_driver); 136 } 137 module_exit(qdf2xxx_pinctrl_exit); 138 139 MODULE_DESCRIPTION("Qualcomm Technologies QDF2xxx pin control driver"); 140 MODULE_LICENSE("GPL v2"); 141