1 /* 2 * Copyright (c) 2015, The Linux Foundation. All rights reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 and 6 * only version 2 as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 * 13 * GPIO and pin control functions on this SOC are handled by the "TLMM" 14 * device. The driver which controls this device is pinctrl-msm.c. Each 15 * SOC with a TLMM is expected to create a client driver that registers 16 * with pinctrl-msm.c. This means that all TLMM drivers are pin control 17 * drivers. 18 * 19 * This pin control driver is intended to be used only an ACPI-enabled 20 * system. As such, UEFI will handle all pin control configuration, so 21 * this driver does not provide pin control functions. It is effectively 22 * a GPIO-only driver. The alternative is to duplicate the GPIO code of 23 * pinctrl-msm.c into another driver. 24 */ 25 26 #include <linux/module.h> 27 #include <linux/platform_device.h> 28 #include <linux/pinctrl/pinctrl.h> 29 #include <linux/acpi.h> 30 31 #include "pinctrl-msm.h" 32 33 static struct msm_pinctrl_soc_data qdf2xxx_pinctrl; 34 35 static int qdf2xxx_pinctrl_probe(struct platform_device *pdev) 36 { 37 struct pinctrl_pin_desc *pins; 38 struct msm_pingroup *groups; 39 unsigned int i; 40 u32 num_gpios; 41 int ret; 42 43 /* Query the number of GPIOs from ACPI */ 44 ret = device_property_read_u32(&pdev->dev, "num-gpios", &num_gpios); 45 if (ret < 0) 46 return ret; 47 48 if (!num_gpios) { 49 dev_warn(&pdev->dev, "missing num-gpios property\n"); 50 return -ENODEV; 51 } 52 53 pins = devm_kcalloc(&pdev->dev, num_gpios, 54 sizeof(struct pinctrl_pin_desc), GFP_KERNEL); 55 groups = devm_kcalloc(&pdev->dev, num_gpios, 56 sizeof(struct msm_pingroup), GFP_KERNEL); 57 58 for (i = 0; i < num_gpios; i++) { 59 pins[i].number = i; 60 61 groups[i].npins = 1, 62 groups[i].pins = &pins[i].number; 63 groups[i].ctl_reg = 0x10000 * i; 64 groups[i].io_reg = 0x04 + 0x10000 * i; 65 groups[i].intr_cfg_reg = 0x08 + 0x10000 * i; 66 groups[i].intr_status_reg = 0x0c + 0x10000 * i; 67 groups[i].intr_target_reg = 0x08 + 0x10000 * i; 68 69 groups[i].mux_bit = 2; 70 groups[i].pull_bit = 0; 71 groups[i].drv_bit = 6; 72 groups[i].oe_bit = 9; 73 groups[i].in_bit = 0; 74 groups[i].out_bit = 1; 75 groups[i].intr_enable_bit = 0; 76 groups[i].intr_status_bit = 0; 77 groups[i].intr_target_bit = 5; 78 groups[i].intr_target_kpss_val = 1; 79 groups[i].intr_raw_status_bit = 4; 80 groups[i].intr_polarity_bit = 1; 81 groups[i].intr_detection_bit = 2; 82 groups[i].intr_detection_width = 2; 83 } 84 85 qdf2xxx_pinctrl.pins = pins; 86 qdf2xxx_pinctrl.groups = groups; 87 qdf2xxx_pinctrl.npins = num_gpios; 88 qdf2xxx_pinctrl.ngroups = num_gpios; 89 qdf2xxx_pinctrl.ngpios = num_gpios; 90 91 return msm_pinctrl_probe(pdev, &qdf2xxx_pinctrl); 92 } 93 94 static const struct acpi_device_id qdf2xxx_acpi_ids[] = { 95 {"QCOM8001"}, 96 {}, 97 }; 98 MODULE_DEVICE_TABLE(acpi, qdf2xxx_acpi_ids); 99 100 static struct platform_driver qdf2xxx_pinctrl_driver = { 101 .driver = { 102 .name = "qdf2xxx-pinctrl", 103 .acpi_match_table = ACPI_PTR(qdf2xxx_acpi_ids), 104 }, 105 .probe = qdf2xxx_pinctrl_probe, 106 .remove = msm_pinctrl_remove, 107 }; 108 109 static int __init qdf2xxx_pinctrl_init(void) 110 { 111 return platform_driver_register(&qdf2xxx_pinctrl_driver); 112 } 113 arch_initcall(qdf2xxx_pinctrl_init); 114 115 static void __exit qdf2xxx_pinctrl_exit(void) 116 { 117 platform_driver_unregister(&qdf2xxx_pinctrl_driver); 118 } 119 module_exit(qdf2xxx_pinctrl_exit); 120 121 MODULE_DESCRIPTION("Qualcomm Technologies QDF2xxx pin control driver"); 122 MODULE_LICENSE("GPL v2"); 123