1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2013, Sony Mobile Communications AB. 4 */ 5 6 #include <linux/module.h> 7 #include <linux/of.h> 8 #include <linux/platform_device.h> 9 10 #include "pinctrl-msm.h" 11 12 static const struct pinctrl_pin_desc msm8x74_pins[] = { 13 PINCTRL_PIN(0, "GPIO_0"), 14 PINCTRL_PIN(1, "GPIO_1"), 15 PINCTRL_PIN(2, "GPIO_2"), 16 PINCTRL_PIN(3, "GPIO_3"), 17 PINCTRL_PIN(4, "GPIO_4"), 18 PINCTRL_PIN(5, "GPIO_5"), 19 PINCTRL_PIN(6, "GPIO_6"), 20 PINCTRL_PIN(7, "GPIO_7"), 21 PINCTRL_PIN(8, "GPIO_8"), 22 PINCTRL_PIN(9, "GPIO_9"), 23 PINCTRL_PIN(10, "GPIO_10"), 24 PINCTRL_PIN(11, "GPIO_11"), 25 PINCTRL_PIN(12, "GPIO_12"), 26 PINCTRL_PIN(13, "GPIO_13"), 27 PINCTRL_PIN(14, "GPIO_14"), 28 PINCTRL_PIN(15, "GPIO_15"), 29 PINCTRL_PIN(16, "GPIO_16"), 30 PINCTRL_PIN(17, "GPIO_17"), 31 PINCTRL_PIN(18, "GPIO_18"), 32 PINCTRL_PIN(19, "GPIO_19"), 33 PINCTRL_PIN(20, "GPIO_20"), 34 PINCTRL_PIN(21, "GPIO_21"), 35 PINCTRL_PIN(22, "GPIO_22"), 36 PINCTRL_PIN(23, "GPIO_23"), 37 PINCTRL_PIN(24, "GPIO_24"), 38 PINCTRL_PIN(25, "GPIO_25"), 39 PINCTRL_PIN(26, "GPIO_26"), 40 PINCTRL_PIN(27, "GPIO_27"), 41 PINCTRL_PIN(28, "GPIO_28"), 42 PINCTRL_PIN(29, "GPIO_29"), 43 PINCTRL_PIN(30, "GPIO_30"), 44 PINCTRL_PIN(31, "GPIO_31"), 45 PINCTRL_PIN(32, "GPIO_32"), 46 PINCTRL_PIN(33, "GPIO_33"), 47 PINCTRL_PIN(34, "GPIO_34"), 48 PINCTRL_PIN(35, "GPIO_35"), 49 PINCTRL_PIN(36, "GPIO_36"), 50 PINCTRL_PIN(37, "GPIO_37"), 51 PINCTRL_PIN(38, "GPIO_38"), 52 PINCTRL_PIN(39, "GPIO_39"), 53 PINCTRL_PIN(40, "GPIO_40"), 54 PINCTRL_PIN(41, "GPIO_41"), 55 PINCTRL_PIN(42, "GPIO_42"), 56 PINCTRL_PIN(43, "GPIO_43"), 57 PINCTRL_PIN(44, "GPIO_44"), 58 PINCTRL_PIN(45, "GPIO_45"), 59 PINCTRL_PIN(46, "GPIO_46"), 60 PINCTRL_PIN(47, "GPIO_47"), 61 PINCTRL_PIN(48, "GPIO_48"), 62 PINCTRL_PIN(49, "GPIO_49"), 63 PINCTRL_PIN(50, "GPIO_50"), 64 PINCTRL_PIN(51, "GPIO_51"), 65 PINCTRL_PIN(52, "GPIO_52"), 66 PINCTRL_PIN(53, "GPIO_53"), 67 PINCTRL_PIN(54, "GPIO_54"), 68 PINCTRL_PIN(55, "GPIO_55"), 69 PINCTRL_PIN(56, "GPIO_56"), 70 PINCTRL_PIN(57, "GPIO_57"), 71 PINCTRL_PIN(58, "GPIO_58"), 72 PINCTRL_PIN(59, "GPIO_59"), 73 PINCTRL_PIN(60, "GPIO_60"), 74 PINCTRL_PIN(61, "GPIO_61"), 75 PINCTRL_PIN(62, "GPIO_62"), 76 PINCTRL_PIN(63, "GPIO_63"), 77 PINCTRL_PIN(64, "GPIO_64"), 78 PINCTRL_PIN(65, "GPIO_65"), 79 PINCTRL_PIN(66, "GPIO_66"), 80 PINCTRL_PIN(67, "GPIO_67"), 81 PINCTRL_PIN(68, "GPIO_68"), 82 PINCTRL_PIN(69, "GPIO_69"), 83 PINCTRL_PIN(70, "GPIO_70"), 84 PINCTRL_PIN(71, "GPIO_71"), 85 PINCTRL_PIN(72, "GPIO_72"), 86 PINCTRL_PIN(73, "GPIO_73"), 87 PINCTRL_PIN(74, "GPIO_74"), 88 PINCTRL_PIN(75, "GPIO_75"), 89 PINCTRL_PIN(76, "GPIO_76"), 90 PINCTRL_PIN(77, "GPIO_77"), 91 PINCTRL_PIN(78, "GPIO_78"), 92 PINCTRL_PIN(79, "GPIO_79"), 93 PINCTRL_PIN(80, "GPIO_80"), 94 PINCTRL_PIN(81, "GPIO_81"), 95 PINCTRL_PIN(82, "GPIO_82"), 96 PINCTRL_PIN(83, "GPIO_83"), 97 PINCTRL_PIN(84, "GPIO_84"), 98 PINCTRL_PIN(85, "GPIO_85"), 99 PINCTRL_PIN(86, "GPIO_86"), 100 PINCTRL_PIN(87, "GPIO_87"), 101 PINCTRL_PIN(88, "GPIO_88"), 102 PINCTRL_PIN(89, "GPIO_89"), 103 PINCTRL_PIN(90, "GPIO_90"), 104 PINCTRL_PIN(91, "GPIO_91"), 105 PINCTRL_PIN(92, "GPIO_92"), 106 PINCTRL_PIN(93, "GPIO_93"), 107 PINCTRL_PIN(94, "GPIO_94"), 108 PINCTRL_PIN(95, "GPIO_95"), 109 PINCTRL_PIN(96, "GPIO_96"), 110 PINCTRL_PIN(97, "GPIO_97"), 111 PINCTRL_PIN(98, "GPIO_98"), 112 PINCTRL_PIN(99, "GPIO_99"), 113 PINCTRL_PIN(100, "GPIO_100"), 114 PINCTRL_PIN(101, "GPIO_101"), 115 PINCTRL_PIN(102, "GPIO_102"), 116 PINCTRL_PIN(103, "GPIO_103"), 117 PINCTRL_PIN(104, "GPIO_104"), 118 PINCTRL_PIN(105, "GPIO_105"), 119 PINCTRL_PIN(106, "GPIO_106"), 120 PINCTRL_PIN(107, "GPIO_107"), 121 PINCTRL_PIN(108, "GPIO_108"), 122 PINCTRL_PIN(109, "GPIO_109"), 123 PINCTRL_PIN(110, "GPIO_110"), 124 PINCTRL_PIN(111, "GPIO_111"), 125 PINCTRL_PIN(112, "GPIO_112"), 126 PINCTRL_PIN(113, "GPIO_113"), 127 PINCTRL_PIN(114, "GPIO_114"), 128 PINCTRL_PIN(115, "GPIO_115"), 129 PINCTRL_PIN(116, "GPIO_116"), 130 PINCTRL_PIN(117, "GPIO_117"), 131 PINCTRL_PIN(118, "GPIO_118"), 132 PINCTRL_PIN(119, "GPIO_119"), 133 PINCTRL_PIN(120, "GPIO_120"), 134 PINCTRL_PIN(121, "GPIO_121"), 135 PINCTRL_PIN(122, "GPIO_122"), 136 PINCTRL_PIN(123, "GPIO_123"), 137 PINCTRL_PIN(124, "GPIO_124"), 138 PINCTRL_PIN(125, "GPIO_125"), 139 PINCTRL_PIN(126, "GPIO_126"), 140 PINCTRL_PIN(127, "GPIO_127"), 141 PINCTRL_PIN(128, "GPIO_128"), 142 PINCTRL_PIN(129, "GPIO_129"), 143 PINCTRL_PIN(130, "GPIO_130"), 144 PINCTRL_PIN(131, "GPIO_131"), 145 PINCTRL_PIN(132, "GPIO_132"), 146 PINCTRL_PIN(133, "GPIO_133"), 147 PINCTRL_PIN(134, "GPIO_134"), 148 PINCTRL_PIN(135, "GPIO_135"), 149 PINCTRL_PIN(136, "GPIO_136"), 150 PINCTRL_PIN(137, "GPIO_137"), 151 PINCTRL_PIN(138, "GPIO_138"), 152 PINCTRL_PIN(139, "GPIO_139"), 153 PINCTRL_PIN(140, "GPIO_140"), 154 PINCTRL_PIN(141, "GPIO_141"), 155 PINCTRL_PIN(142, "GPIO_142"), 156 PINCTRL_PIN(143, "GPIO_143"), 157 PINCTRL_PIN(144, "GPIO_144"), 158 PINCTRL_PIN(145, "GPIO_145"), 159 160 PINCTRL_PIN(146, "SDC1_CLK"), 161 PINCTRL_PIN(147, "SDC1_CMD"), 162 PINCTRL_PIN(148, "SDC1_DATA"), 163 PINCTRL_PIN(149, "SDC2_CLK"), 164 PINCTRL_PIN(150, "SDC2_CMD"), 165 PINCTRL_PIN(151, "SDC2_DATA"), 166 PINCTRL_PIN(152, "HSIC_STROBE"), 167 PINCTRL_PIN(153, "HSIC_DATA"), 168 }; 169 170 #define DECLARE_MSM_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin } 171 DECLARE_MSM_GPIO_PINS(0); 172 DECLARE_MSM_GPIO_PINS(1); 173 DECLARE_MSM_GPIO_PINS(2); 174 DECLARE_MSM_GPIO_PINS(3); 175 DECLARE_MSM_GPIO_PINS(4); 176 DECLARE_MSM_GPIO_PINS(5); 177 DECLARE_MSM_GPIO_PINS(6); 178 DECLARE_MSM_GPIO_PINS(7); 179 DECLARE_MSM_GPIO_PINS(8); 180 DECLARE_MSM_GPIO_PINS(9); 181 DECLARE_MSM_GPIO_PINS(10); 182 DECLARE_MSM_GPIO_PINS(11); 183 DECLARE_MSM_GPIO_PINS(12); 184 DECLARE_MSM_GPIO_PINS(13); 185 DECLARE_MSM_GPIO_PINS(14); 186 DECLARE_MSM_GPIO_PINS(15); 187 DECLARE_MSM_GPIO_PINS(16); 188 DECLARE_MSM_GPIO_PINS(17); 189 DECLARE_MSM_GPIO_PINS(18); 190 DECLARE_MSM_GPIO_PINS(19); 191 DECLARE_MSM_GPIO_PINS(20); 192 DECLARE_MSM_GPIO_PINS(21); 193 DECLARE_MSM_GPIO_PINS(22); 194 DECLARE_MSM_GPIO_PINS(23); 195 DECLARE_MSM_GPIO_PINS(24); 196 DECLARE_MSM_GPIO_PINS(25); 197 DECLARE_MSM_GPIO_PINS(26); 198 DECLARE_MSM_GPIO_PINS(27); 199 DECLARE_MSM_GPIO_PINS(28); 200 DECLARE_MSM_GPIO_PINS(29); 201 DECLARE_MSM_GPIO_PINS(30); 202 DECLARE_MSM_GPIO_PINS(31); 203 DECLARE_MSM_GPIO_PINS(32); 204 DECLARE_MSM_GPIO_PINS(33); 205 DECLARE_MSM_GPIO_PINS(34); 206 DECLARE_MSM_GPIO_PINS(35); 207 DECLARE_MSM_GPIO_PINS(36); 208 DECLARE_MSM_GPIO_PINS(37); 209 DECLARE_MSM_GPIO_PINS(38); 210 DECLARE_MSM_GPIO_PINS(39); 211 DECLARE_MSM_GPIO_PINS(40); 212 DECLARE_MSM_GPIO_PINS(41); 213 DECLARE_MSM_GPIO_PINS(42); 214 DECLARE_MSM_GPIO_PINS(43); 215 DECLARE_MSM_GPIO_PINS(44); 216 DECLARE_MSM_GPIO_PINS(45); 217 DECLARE_MSM_GPIO_PINS(46); 218 DECLARE_MSM_GPIO_PINS(47); 219 DECLARE_MSM_GPIO_PINS(48); 220 DECLARE_MSM_GPIO_PINS(49); 221 DECLARE_MSM_GPIO_PINS(50); 222 DECLARE_MSM_GPIO_PINS(51); 223 DECLARE_MSM_GPIO_PINS(52); 224 DECLARE_MSM_GPIO_PINS(53); 225 DECLARE_MSM_GPIO_PINS(54); 226 DECLARE_MSM_GPIO_PINS(55); 227 DECLARE_MSM_GPIO_PINS(56); 228 DECLARE_MSM_GPIO_PINS(57); 229 DECLARE_MSM_GPIO_PINS(58); 230 DECLARE_MSM_GPIO_PINS(59); 231 DECLARE_MSM_GPIO_PINS(60); 232 DECLARE_MSM_GPIO_PINS(61); 233 DECLARE_MSM_GPIO_PINS(62); 234 DECLARE_MSM_GPIO_PINS(63); 235 DECLARE_MSM_GPIO_PINS(64); 236 DECLARE_MSM_GPIO_PINS(65); 237 DECLARE_MSM_GPIO_PINS(66); 238 DECLARE_MSM_GPIO_PINS(67); 239 DECLARE_MSM_GPIO_PINS(68); 240 DECLARE_MSM_GPIO_PINS(69); 241 DECLARE_MSM_GPIO_PINS(70); 242 DECLARE_MSM_GPIO_PINS(71); 243 DECLARE_MSM_GPIO_PINS(72); 244 DECLARE_MSM_GPIO_PINS(73); 245 DECLARE_MSM_GPIO_PINS(74); 246 DECLARE_MSM_GPIO_PINS(75); 247 DECLARE_MSM_GPIO_PINS(76); 248 DECLARE_MSM_GPIO_PINS(77); 249 DECLARE_MSM_GPIO_PINS(78); 250 DECLARE_MSM_GPIO_PINS(79); 251 DECLARE_MSM_GPIO_PINS(80); 252 DECLARE_MSM_GPIO_PINS(81); 253 DECLARE_MSM_GPIO_PINS(82); 254 DECLARE_MSM_GPIO_PINS(83); 255 DECLARE_MSM_GPIO_PINS(84); 256 DECLARE_MSM_GPIO_PINS(85); 257 DECLARE_MSM_GPIO_PINS(86); 258 DECLARE_MSM_GPIO_PINS(87); 259 DECLARE_MSM_GPIO_PINS(88); 260 DECLARE_MSM_GPIO_PINS(89); 261 DECLARE_MSM_GPIO_PINS(90); 262 DECLARE_MSM_GPIO_PINS(91); 263 DECLARE_MSM_GPIO_PINS(92); 264 DECLARE_MSM_GPIO_PINS(93); 265 DECLARE_MSM_GPIO_PINS(94); 266 DECLARE_MSM_GPIO_PINS(95); 267 DECLARE_MSM_GPIO_PINS(96); 268 DECLARE_MSM_GPIO_PINS(97); 269 DECLARE_MSM_GPIO_PINS(98); 270 DECLARE_MSM_GPIO_PINS(99); 271 DECLARE_MSM_GPIO_PINS(100); 272 DECLARE_MSM_GPIO_PINS(101); 273 DECLARE_MSM_GPIO_PINS(102); 274 DECLARE_MSM_GPIO_PINS(103); 275 DECLARE_MSM_GPIO_PINS(104); 276 DECLARE_MSM_GPIO_PINS(105); 277 DECLARE_MSM_GPIO_PINS(106); 278 DECLARE_MSM_GPIO_PINS(107); 279 DECLARE_MSM_GPIO_PINS(108); 280 DECLARE_MSM_GPIO_PINS(109); 281 DECLARE_MSM_GPIO_PINS(110); 282 DECLARE_MSM_GPIO_PINS(111); 283 DECLARE_MSM_GPIO_PINS(112); 284 DECLARE_MSM_GPIO_PINS(113); 285 DECLARE_MSM_GPIO_PINS(114); 286 DECLARE_MSM_GPIO_PINS(115); 287 DECLARE_MSM_GPIO_PINS(116); 288 DECLARE_MSM_GPIO_PINS(117); 289 DECLARE_MSM_GPIO_PINS(118); 290 DECLARE_MSM_GPIO_PINS(119); 291 DECLARE_MSM_GPIO_PINS(120); 292 DECLARE_MSM_GPIO_PINS(121); 293 DECLARE_MSM_GPIO_PINS(122); 294 DECLARE_MSM_GPIO_PINS(123); 295 DECLARE_MSM_GPIO_PINS(124); 296 DECLARE_MSM_GPIO_PINS(125); 297 DECLARE_MSM_GPIO_PINS(126); 298 DECLARE_MSM_GPIO_PINS(127); 299 DECLARE_MSM_GPIO_PINS(128); 300 DECLARE_MSM_GPIO_PINS(129); 301 DECLARE_MSM_GPIO_PINS(130); 302 DECLARE_MSM_GPIO_PINS(131); 303 DECLARE_MSM_GPIO_PINS(132); 304 DECLARE_MSM_GPIO_PINS(133); 305 DECLARE_MSM_GPIO_PINS(134); 306 DECLARE_MSM_GPIO_PINS(135); 307 DECLARE_MSM_GPIO_PINS(136); 308 DECLARE_MSM_GPIO_PINS(137); 309 DECLARE_MSM_GPIO_PINS(138); 310 DECLARE_MSM_GPIO_PINS(139); 311 DECLARE_MSM_GPIO_PINS(140); 312 DECLARE_MSM_GPIO_PINS(141); 313 DECLARE_MSM_GPIO_PINS(142); 314 DECLARE_MSM_GPIO_PINS(143); 315 DECLARE_MSM_GPIO_PINS(144); 316 DECLARE_MSM_GPIO_PINS(145); 317 318 static const unsigned int sdc1_clk_pins[] = { 146 }; 319 static const unsigned int sdc1_cmd_pins[] = { 147 }; 320 static const unsigned int sdc1_data_pins[] = { 148 }; 321 static const unsigned int sdc2_clk_pins[] = { 149 }; 322 static const unsigned int sdc2_cmd_pins[] = { 150 }; 323 static const unsigned int sdc2_data_pins[] = { 151 }; 324 static const unsigned int hsic_strobe_pins[] = { 152 }; 325 static const unsigned int hsic_data_pins[] = { 153 }; 326 327 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7) \ 328 { \ 329 .grp = PINCTRL_PINGROUP("gpio" #id, \ 330 gpio##id##_pins, \ 331 ARRAY_SIZE(gpio##id##_pins)), \ 332 .funcs = (int[]){ \ 333 msm_mux_gpio, \ 334 msm_mux_##f1, \ 335 msm_mux_##f2, \ 336 msm_mux_##f3, \ 337 msm_mux_##f4, \ 338 msm_mux_##f5, \ 339 msm_mux_##f6, \ 340 msm_mux_##f7 \ 341 }, \ 342 .nfuncs = 8, \ 343 .ctl_reg = 0x1000 + 0x10 * id, \ 344 .io_reg = 0x1004 + 0x10 * id, \ 345 .intr_cfg_reg = 0x1008 + 0x10 * id, \ 346 .intr_status_reg = 0x100c + 0x10 * id, \ 347 .mux_bit = 2, \ 348 .pull_bit = 0, \ 349 .drv_bit = 6, \ 350 .oe_bit = 9, \ 351 .in_bit = 0, \ 352 .out_bit = 1, \ 353 .intr_enable_bit = 0, \ 354 .intr_status_bit = 0, \ 355 .intr_target_bit = 5, \ 356 .intr_target_kpss_val = 4, \ 357 .intr_raw_status_bit = 4, \ 358 .intr_polarity_bit = 1, \ 359 .intr_detection_bit = 2, \ 360 .intr_detection_width = 2, \ 361 } 362 363 #define SDC_PINGROUP(pg_name, ctl, pull, drv) \ 364 { \ 365 .grp = PINCTRL_PINGROUP(#pg_name, \ 366 pg_name##_pins, \ 367 ARRAY_SIZE(pg_name##_pins)), \ 368 .ctl_reg = ctl, \ 369 .io_reg = 0, \ 370 .intr_cfg_reg = 0, \ 371 .intr_status_reg = 0, \ 372 .mux_bit = -1, \ 373 .pull_bit = pull, \ 374 .drv_bit = drv, \ 375 .oe_bit = -1, \ 376 .in_bit = -1, \ 377 .out_bit = -1, \ 378 .intr_enable_bit = -1, \ 379 .intr_status_bit = -1, \ 380 .intr_target_bit = -1, \ 381 .intr_target_kpss_val = -1, \ 382 .intr_raw_status_bit = -1, \ 383 .intr_polarity_bit = -1, \ 384 .intr_detection_bit = -1, \ 385 .intr_detection_width = -1, \ 386 } 387 388 #define HSIC_PINGROUP(pg_name, ctl) \ 389 { \ 390 .grp = PINCTRL_PINGROUP(#pg_name, \ 391 pg_name##_pins, \ 392 ARRAY_SIZE(pg_name##_pins)), \ 393 .funcs = (int[]){ \ 394 msm_mux_gpio, \ 395 msm_mux_hsic_ctl, \ 396 }, \ 397 .nfuncs = 2, \ 398 .ctl_reg = ctl, \ 399 .io_reg = 0, \ 400 .intr_cfg_reg = 0, \ 401 .intr_status_reg = 0, \ 402 .mux_bit = 25, \ 403 .pull_bit = -1, \ 404 .drv_bit = -1, \ 405 .oe_bit = -1, \ 406 .in_bit = -1, \ 407 .out_bit = -1, \ 408 .intr_enable_bit = -1, \ 409 .intr_status_bit = -1, \ 410 .intr_target_bit = -1, \ 411 .intr_target_kpss_val = -1, \ 412 .intr_raw_status_bit = -1, \ 413 .intr_polarity_bit = -1, \ 414 .intr_detection_bit = -1, \ 415 .intr_detection_width = -1, \ 416 } 417 418 /* 419 * TODO: Add the rest of the possible functions and fill out 420 * the pingroup table below. 421 */ 422 enum msm8x74_functions { 423 msm_mux_gpio, 424 msm_mux_cci_i2c0, 425 msm_mux_cci_i2c1, 426 msm_mux_blsp_i2c1, 427 msm_mux_blsp_i2c2, 428 msm_mux_blsp_i2c3, 429 msm_mux_blsp_i2c4, 430 msm_mux_blsp_i2c5, 431 msm_mux_blsp_i2c6, 432 msm_mux_blsp_i2c7, 433 msm_mux_blsp_i2c8, 434 msm_mux_blsp_i2c9, 435 msm_mux_blsp_i2c10, 436 msm_mux_blsp_i2c11, 437 msm_mux_blsp_i2c12, 438 msm_mux_blsp_spi1, 439 msm_mux_blsp_spi1_cs1, 440 msm_mux_blsp_spi1_cs2, 441 msm_mux_blsp_spi1_cs3, 442 msm_mux_blsp_spi2, 443 msm_mux_blsp_spi2_cs1, 444 msm_mux_blsp_spi2_cs2, 445 msm_mux_blsp_spi2_cs3, 446 msm_mux_blsp_spi3, 447 msm_mux_blsp_spi4, 448 msm_mux_blsp_spi5, 449 msm_mux_blsp_spi6, 450 msm_mux_blsp_spi7, 451 msm_mux_blsp_spi8, 452 msm_mux_blsp_spi9, 453 msm_mux_blsp_spi10, 454 msm_mux_blsp_spi10_cs1, 455 msm_mux_blsp_spi10_cs2, 456 msm_mux_blsp_spi10_cs3, 457 msm_mux_blsp_spi11, 458 msm_mux_blsp_spi12, 459 msm_mux_blsp_uart1, 460 msm_mux_blsp_uart2, 461 msm_mux_blsp_uart3, 462 msm_mux_blsp_uart4, 463 msm_mux_blsp_uart5, 464 msm_mux_blsp_uart6, 465 msm_mux_blsp_uart7, 466 msm_mux_blsp_uart8, 467 msm_mux_blsp_uart9, 468 msm_mux_blsp_uart10, 469 msm_mux_blsp_uart11, 470 msm_mux_blsp_uart12, 471 msm_mux_blsp_uim1, 472 msm_mux_blsp_uim2, 473 msm_mux_blsp_uim3, 474 msm_mux_blsp_uim4, 475 msm_mux_blsp_uim5, 476 msm_mux_blsp_uim6, 477 msm_mux_blsp_uim7, 478 msm_mux_blsp_uim8, 479 msm_mux_blsp_uim9, 480 msm_mux_blsp_uim10, 481 msm_mux_blsp_uim11, 482 msm_mux_blsp_uim12, 483 msm_mux_uim1, 484 msm_mux_uim2, 485 msm_mux_uim_batt_alarm, 486 msm_mux_sdc3, 487 msm_mux_sdc4, 488 msm_mux_gcc_gp_clk1, 489 msm_mux_gcc_gp_clk2, 490 msm_mux_gcc_gp_clk3, 491 msm_mux_qua_mi2s, 492 msm_mux_pri_mi2s, 493 msm_mux_spkr_mi2s, 494 msm_mux_ter_mi2s, 495 msm_mux_sec_mi2s, 496 msm_mux_hdmi_cec, 497 msm_mux_hdmi_ddc, 498 msm_mux_hdmi_hpd, 499 msm_mux_edp_hpd, 500 msm_mux_mdp_vsync, 501 msm_mux_cam_mclk0, 502 msm_mux_cam_mclk1, 503 msm_mux_cam_mclk2, 504 msm_mux_cam_mclk3, 505 msm_mux_cci_timer0, 506 msm_mux_cci_timer1, 507 msm_mux_cci_timer2, 508 msm_mux_cci_timer3, 509 msm_mux_cci_timer4, 510 msm_mux_cci_async_in0, 511 msm_mux_cci_async_in1, 512 msm_mux_cci_async_in2, 513 msm_mux_gp_pdm0, 514 msm_mux_gp_pdm1, 515 msm_mux_gp_pdm2, 516 msm_mux_gp0_clk, 517 msm_mux_gp1_clk, 518 msm_mux_gp_mn, 519 msm_mux_tsif1, 520 msm_mux_tsif2, 521 msm_mux_hsic, 522 msm_mux_grfc, 523 msm_mux_audio_ref_clk, 524 msm_mux_bt, 525 msm_mux_fm, 526 msm_mux_wlan, 527 msm_mux_slimbus, 528 msm_mux_hsic_ctl, 529 msm_mux_NA, 530 }; 531 532 static const char * const gpio_groups[] = { 533 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 534 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", 535 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", 536 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", 537 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 538 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", 539 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", 540 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", 541 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", 542 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", 543 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", 544 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84", 545 "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91", 546 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98", 547 "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104", 548 "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110", 549 "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116", 550 "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122", 551 "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128", 552 "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134", 553 "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140", 554 "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", "hsic_data", 555 "hsic_strobe", 556 }; 557 558 static const char * const blsp_uart1_groups[] = { 559 "gpio0", "gpio1", "gpio2", "gpio3" 560 }; 561 static const char * const blsp_uim1_groups[] = { "gpio0", "gpio1" }; 562 static const char * const blsp_i2c1_groups[] = { "gpio2", "gpio3" }; 563 static const char * const blsp_spi1_groups[] = { 564 "gpio0", "gpio1", "gpio2", "gpio3" 565 }; 566 static const char * const blsp_spi1_cs1_groups[] = { "gpio8" }; 567 static const char * const blsp_spi1_cs2_groups[] = { "gpio9", "gpio11" }; 568 static const char * const blsp_spi1_cs3_groups[] = { "gpio10" }; 569 570 static const char * const blsp_uart2_groups[] = { 571 "gpio4", "gpio5", "gpio6", "gpio7" 572 }; 573 static const char * const blsp_uim2_groups[] = { "gpio4", "gpio5" }; 574 static const char * const blsp_i2c2_groups[] = { "gpio6", "gpio7" }; 575 static const char * const blsp_spi2_groups[] = { 576 "gpio4", "gpio5", "gpio6", "gpio7" 577 }; 578 static const char * const blsp_spi2_cs1_groups[] = { "gpio53", "gpio62" }; 579 static const char * const blsp_spi2_cs2_groups[] = { "gpio54", "gpio63" }; 580 static const char * const blsp_spi2_cs3_groups[] = { "gpio66" }; 581 582 static const char * const blsp_uart3_groups[] = { 583 "gpio8", "gpio9", "gpio10", "gpio11" 584 }; 585 static const char * const blsp_uim3_groups[] = { "gpio8", "gpio9" }; 586 static const char * const blsp_i2c3_groups[] = { "gpio10", "gpio11" }; 587 static const char * const blsp_spi3_groups[] = { 588 "gpio8", "gpio9", "gpio10", "gpio11" 589 }; 590 591 static const char * const cci_i2c0_groups[] = { "gpio19", "gpio20" }; 592 static const char * const cci_i2c1_groups[] = { "gpio21", "gpio22" }; 593 594 static const char * const blsp_uart4_groups[] = { 595 "gpio19", "gpio20", "gpio21", "gpio22" 596 }; 597 static const char * const blsp_uim4_groups[] = { "gpio19", "gpio20" }; 598 static const char * const blsp_i2c4_groups[] = { "gpio21", "gpio22" }; 599 static const char * const blsp_spi4_groups[] = { 600 "gpio19", "gpio20", "gpio21", "gpio22" 601 }; 602 603 static const char * const blsp_uart5_groups[] = { 604 "gpio23", "gpio24", "gpio25", "gpio26" 605 }; 606 static const char * const blsp_uim5_groups[] = { "gpio23", "gpio24" }; 607 static const char * const blsp_i2c5_groups[] = { "gpio25", "gpio26" }; 608 static const char * const blsp_spi5_groups[] = { 609 "gpio23", "gpio24", "gpio25", "gpio26" 610 }; 611 612 static const char * const blsp_uart6_groups[] = { 613 "gpio27", "gpio28", "gpio29", "gpio30" 614 }; 615 static const char * const blsp_uim6_groups[] = { "gpio27", "gpio28" }; 616 static const char * const blsp_i2c6_groups[] = { "gpio29", "gpio30" }; 617 static const char * const blsp_spi6_groups[] = { 618 "gpio27", "gpio28", "gpio29", "gpio30" 619 }; 620 621 static const char * const blsp_uart7_groups[] = { 622 "gpio41", "gpio42", "gpio43", "gpio44" 623 }; 624 static const char * const blsp_uim7_groups[] = { "gpio41", "gpio42" }; 625 static const char * const blsp_i2c7_groups[] = { "gpio43", "gpio44" }; 626 static const char * const blsp_spi7_groups[] = { 627 "gpio41", "gpio42", "gpio43", "gpio44" 628 }; 629 630 static const char * const blsp_uart8_groups[] = { 631 "gpio45", "gpio46", "gpio47", "gpio48" 632 }; 633 static const char * const blsp_uim8_groups[] = { "gpio45", "gpio46" }; 634 static const char * const blsp_i2c8_groups[] = { "gpio47", "gpio48" }; 635 static const char * const blsp_spi8_groups[] = { 636 "gpio45", "gpio46", "gpio47", "gpio48" 637 }; 638 639 static const char * const blsp_uart9_groups[] = { 640 "gpio49", "gpio50", "gpio51", "gpio52" 641 }; 642 static const char * const blsp_uim9_groups[] = { "gpio49", "gpio50" }; 643 static const char * const blsp_i2c9_groups[] = { "gpio51", "gpio52" }; 644 static const char * const blsp_spi9_groups[] = { 645 "gpio49", "gpio50", "gpio51", "gpio52" 646 }; 647 648 static const char * const blsp_uart10_groups[] = { 649 "gpio53", "gpio54", "gpio55", "gpio56" 650 }; 651 static const char * const blsp_uim10_groups[] = { "gpio53", "gpio54" }; 652 static const char * const blsp_i2c10_groups[] = { "gpio55", "gpio56" }; 653 static const char * const blsp_spi10_groups[] = { 654 "gpio53", "gpio54", "gpio55", "gpio56" 655 }; 656 static const char * const blsp_spi10_cs1_groups[] = { "gpio47", "gpio67" }; 657 static const char * const blsp_spi10_cs2_groups[] = { "gpio48", "gpio68" }; 658 static const char * const blsp_spi10_cs3_groups[] = { "gpio90" }; 659 660 static const char * const blsp_uart11_groups[] = { 661 "gpio81", "gpio82", "gpio83", "gpio84" 662 }; 663 static const char * const blsp_uim11_groups[] = { "gpio81", "gpio82" }; 664 static const char * const blsp_i2c11_groups[] = { "gpio83", "gpio84" }; 665 static const char * const blsp_spi11_groups[] = { 666 "gpio81", "gpio82", "gpio83", "gpio84" 667 }; 668 669 static const char * const blsp_uart12_groups[] = { 670 "gpio85", "gpio86", "gpio87", "gpio88" 671 }; 672 static const char * const blsp_uim12_groups[] = { "gpio85", "gpio86" }; 673 static const char * const blsp_i2c12_groups[] = { "gpio87", "gpio88" }; 674 static const char * const blsp_spi12_groups[] = { 675 "gpio85", "gpio86", "gpio87", "gpio88" 676 }; 677 678 static const char * const uim1_groups[] = { 679 "gpio97", "gpio98", "gpio99", "gpio100" 680 }; 681 682 static const char * const uim2_groups[] = { 683 "gpio49", "gpio50", "gpio51", "gpio52" 684 }; 685 686 static const char * const uim_batt_alarm_groups[] = { "gpio101" }; 687 688 static const char * const sdc3_groups[] = { 689 "gpio35", "gpio36", "gpio37", "gpio38", "gpio39", "gpio40" 690 }; 691 692 static const char * const sdc4_groups[] = { 693 "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96" 694 }; 695 696 static const char * const gp0_clk_groups[] = { "gpio26" }; 697 static const char * const gp1_clk_groups[] = { "gpio27", "gpio57", "gpio78" }; 698 static const char * const gp_mn_groups[] = { "gpio29" }; 699 static const char * const gcc_gp_clk1_groups[] = { "gpio57", "gpio78" }; 700 static const char * const gcc_gp_clk2_groups[] = { "gpio58", "gpio81" }; 701 static const char * const gcc_gp_clk3_groups[] = { "gpio59", "gpio82" }; 702 703 static const char * const qua_mi2s_groups[] = { 704 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", 705 }; 706 707 static const char * const pri_mi2s_groups[] = { 708 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68" 709 }; 710 711 static const char * const spkr_mi2s_groups[] = { 712 "gpio69", "gpio70", "gpio71", "gpio72" 713 }; 714 715 static const char * const ter_mi2s_groups[] = { 716 "gpio73", "gpio74", "gpio75", "gpio76", "gpio77" 717 }; 718 719 static const char * const sec_mi2s_groups[] = { 720 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82" 721 }; 722 723 static const char * const hdmi_cec_groups[] = { "gpio31" }; 724 static const char * const hdmi_ddc_groups[] = { "gpio32", "gpio33" }; 725 static const char * const hdmi_hpd_groups[] = { "gpio34" }; 726 static const char * const edp_hpd_groups[] = { "gpio102" }; 727 728 static const char * const mdp_vsync_groups[] = { "gpio12", "gpio13", "gpio14" }; 729 static const char * const cam_mclk0_groups[] = { "gpio15" }; 730 static const char * const cam_mclk1_groups[] = { "gpio16" }; 731 static const char * const cam_mclk2_groups[] = { "gpio17" }; 732 static const char * const cam_mclk3_groups[] = { "gpio18" }; 733 734 static const char * const cci_timer0_groups[] = { "gpio23" }; 735 static const char * const cci_timer1_groups[] = { "gpio24" }; 736 static const char * const cci_timer2_groups[] = { "gpio25" }; 737 static const char * const cci_timer3_groups[] = { "gpio26" }; 738 static const char * const cci_timer4_groups[] = { "gpio27" }; 739 static const char * const cci_async_in0_groups[] = { "gpio28" }; 740 static const char * const cci_async_in1_groups[] = { "gpio26" }; 741 static const char * const cci_async_in2_groups[] = { "gpio27" }; 742 743 static const char * const gp_pdm0_groups[] = { "gpio54", "gpio68" }; 744 static const char * const gp_pdm1_groups[] = { "gpio74", "gpio86" }; 745 static const char * const gp_pdm2_groups[] = { "gpio63", "gpio79" }; 746 747 static const char * const tsif1_groups[] = { 748 "gpio89", "gpio90", "gpio91", "gpio92" 749 }; 750 751 static const char * const tsif2_groups[] = { 752 "gpio93", "gpio94", "gpio95", "gpio96" 753 }; 754 755 static const char * const hsic_groups[] = { "gpio144", "gpio145" }; 756 static const char * const grfc_groups[] = { 757 "gpio104", "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", 758 "gpio110", "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", 759 "gpio116", "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", 760 "gpio122", "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", 761 "gpio128", "gpio136", "gpio137", "gpio141", "gpio143" 762 }; 763 764 static const char * const audio_ref_clk_groups[] = { "gpio69" }; 765 766 static const char * const bt_groups[] = { "gpio35", "gpio43", "gpio44" }; 767 768 static const char * const fm_groups[] = { "gpio41", "gpio42" }; 769 770 static const char * const wlan_groups[] = { 771 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40" 772 }; 773 774 static const char * const slimbus_groups[] = { "gpio70", "gpio71" }; 775 static const char * const hsic_ctl_groups[] = { "hsic_strobe", "hsic_data" }; 776 777 static const struct pinfunction msm8x74_functions[] = { 778 MSM_GPIO_PIN_FUNCTION(gpio), 779 MSM_PIN_FUNCTION(cci_i2c0), 780 MSM_PIN_FUNCTION(cci_i2c1), 781 MSM_PIN_FUNCTION(uim1), 782 MSM_PIN_FUNCTION(uim2), 783 MSM_PIN_FUNCTION(uim_batt_alarm), 784 MSM_PIN_FUNCTION(blsp_uim1), 785 MSM_PIN_FUNCTION(blsp_uim2), 786 MSM_PIN_FUNCTION(blsp_uim3), 787 MSM_PIN_FUNCTION(blsp_uim4), 788 MSM_PIN_FUNCTION(blsp_uim5), 789 MSM_PIN_FUNCTION(blsp_uim6), 790 MSM_PIN_FUNCTION(blsp_uim7), 791 MSM_PIN_FUNCTION(blsp_uim8), 792 MSM_PIN_FUNCTION(blsp_uim9), 793 MSM_PIN_FUNCTION(blsp_uim10), 794 MSM_PIN_FUNCTION(blsp_uim11), 795 MSM_PIN_FUNCTION(blsp_uim12), 796 MSM_PIN_FUNCTION(blsp_i2c1), 797 MSM_PIN_FUNCTION(blsp_i2c2), 798 MSM_PIN_FUNCTION(blsp_i2c3), 799 MSM_PIN_FUNCTION(blsp_i2c4), 800 MSM_PIN_FUNCTION(blsp_i2c5), 801 MSM_PIN_FUNCTION(blsp_i2c6), 802 MSM_PIN_FUNCTION(blsp_i2c7), 803 MSM_PIN_FUNCTION(blsp_i2c8), 804 MSM_PIN_FUNCTION(blsp_i2c9), 805 MSM_PIN_FUNCTION(blsp_i2c10), 806 MSM_PIN_FUNCTION(blsp_i2c11), 807 MSM_PIN_FUNCTION(blsp_i2c12), 808 MSM_PIN_FUNCTION(blsp_spi1), 809 MSM_PIN_FUNCTION(blsp_spi1_cs1), 810 MSM_PIN_FUNCTION(blsp_spi1_cs2), 811 MSM_PIN_FUNCTION(blsp_spi1_cs3), 812 MSM_PIN_FUNCTION(blsp_spi2), 813 MSM_PIN_FUNCTION(blsp_spi2_cs1), 814 MSM_PIN_FUNCTION(blsp_spi2_cs2), 815 MSM_PIN_FUNCTION(blsp_spi2_cs3), 816 MSM_PIN_FUNCTION(blsp_spi3), 817 MSM_PIN_FUNCTION(blsp_spi4), 818 MSM_PIN_FUNCTION(blsp_spi5), 819 MSM_PIN_FUNCTION(blsp_spi6), 820 MSM_PIN_FUNCTION(blsp_spi7), 821 MSM_PIN_FUNCTION(blsp_spi8), 822 MSM_PIN_FUNCTION(blsp_spi9), 823 MSM_PIN_FUNCTION(blsp_spi10), 824 MSM_PIN_FUNCTION(blsp_spi10_cs1), 825 MSM_PIN_FUNCTION(blsp_spi10_cs2), 826 MSM_PIN_FUNCTION(blsp_spi10_cs3), 827 MSM_PIN_FUNCTION(blsp_spi11), 828 MSM_PIN_FUNCTION(blsp_spi12), 829 MSM_PIN_FUNCTION(blsp_uart1), 830 MSM_PIN_FUNCTION(blsp_uart2), 831 MSM_PIN_FUNCTION(blsp_uart3), 832 MSM_PIN_FUNCTION(blsp_uart4), 833 MSM_PIN_FUNCTION(blsp_uart5), 834 MSM_PIN_FUNCTION(blsp_uart6), 835 MSM_PIN_FUNCTION(blsp_uart7), 836 MSM_PIN_FUNCTION(blsp_uart8), 837 MSM_PIN_FUNCTION(blsp_uart9), 838 MSM_PIN_FUNCTION(blsp_uart10), 839 MSM_PIN_FUNCTION(blsp_uart11), 840 MSM_PIN_FUNCTION(blsp_uart12), 841 MSM_PIN_FUNCTION(sdc3), 842 MSM_PIN_FUNCTION(sdc4), 843 MSM_PIN_FUNCTION(gcc_gp_clk1), 844 MSM_PIN_FUNCTION(gcc_gp_clk2), 845 MSM_PIN_FUNCTION(gcc_gp_clk3), 846 MSM_PIN_FUNCTION(qua_mi2s), 847 MSM_PIN_FUNCTION(pri_mi2s), 848 MSM_PIN_FUNCTION(spkr_mi2s), 849 MSM_PIN_FUNCTION(ter_mi2s), 850 MSM_PIN_FUNCTION(sec_mi2s), 851 MSM_PIN_FUNCTION(mdp_vsync), 852 MSM_PIN_FUNCTION(cam_mclk0), 853 MSM_PIN_FUNCTION(cam_mclk1), 854 MSM_PIN_FUNCTION(cam_mclk2), 855 MSM_PIN_FUNCTION(cam_mclk3), 856 MSM_PIN_FUNCTION(cci_timer0), 857 MSM_PIN_FUNCTION(cci_timer1), 858 MSM_PIN_FUNCTION(cci_timer2), 859 MSM_PIN_FUNCTION(cci_timer3), 860 MSM_PIN_FUNCTION(cci_timer4), 861 MSM_PIN_FUNCTION(cci_async_in0), 862 MSM_PIN_FUNCTION(cci_async_in1), 863 MSM_PIN_FUNCTION(cci_async_in2), 864 MSM_PIN_FUNCTION(hdmi_cec), 865 MSM_PIN_FUNCTION(hdmi_ddc), 866 MSM_PIN_FUNCTION(hdmi_hpd), 867 MSM_PIN_FUNCTION(edp_hpd), 868 MSM_PIN_FUNCTION(gp_pdm0), 869 MSM_PIN_FUNCTION(gp_pdm1), 870 MSM_PIN_FUNCTION(gp_pdm2), 871 MSM_PIN_FUNCTION(gp0_clk), 872 MSM_PIN_FUNCTION(gp1_clk), 873 MSM_PIN_FUNCTION(gp_mn), 874 MSM_PIN_FUNCTION(tsif1), 875 MSM_PIN_FUNCTION(tsif2), 876 MSM_PIN_FUNCTION(hsic), 877 MSM_PIN_FUNCTION(grfc), 878 MSM_PIN_FUNCTION(audio_ref_clk), 879 MSM_PIN_FUNCTION(bt), 880 MSM_PIN_FUNCTION(fm), 881 MSM_PIN_FUNCTION(wlan), 882 MSM_PIN_FUNCTION(slimbus), 883 MSM_PIN_FUNCTION(hsic_ctl), 884 }; 885 886 static const struct msm_pingroup msm8x74_groups[] = { 887 PINGROUP(0, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA), 888 PINGROUP(1, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA), 889 PINGROUP(2, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA), 890 PINGROUP(3, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA), 891 PINGROUP(4, blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA), 892 PINGROUP(5, blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA), 893 PINGROUP(6, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA), 894 PINGROUP(7, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA), 895 PINGROUP(8, blsp_spi3, blsp_uart3, blsp_uim3, blsp_spi1_cs1, NA, NA, NA), 896 PINGROUP(9, blsp_spi3, blsp_uart3, blsp_uim3, blsp_spi1_cs2, NA, NA, NA), 897 PINGROUP(10, blsp_spi3, blsp_uart3, blsp_i2c3, blsp_spi1_cs3, NA, NA, NA), 898 PINGROUP(11, blsp_spi3, blsp_uart3, blsp_i2c3, blsp_spi1_cs2, NA, NA, NA), 899 PINGROUP(12, mdp_vsync, NA, NA, NA, NA, NA, NA), 900 PINGROUP(13, mdp_vsync, NA, NA, NA, NA, NA, NA), 901 PINGROUP(14, mdp_vsync, NA, NA, NA, NA, NA, NA), 902 PINGROUP(15, cam_mclk0, NA, NA, NA, NA, NA, NA), 903 PINGROUP(16, cam_mclk1, NA, NA, NA, NA, NA, NA), 904 PINGROUP(17, cam_mclk2, NA, NA, NA, NA, NA, NA), 905 PINGROUP(18, cam_mclk3, NA, NA, NA, NA, NA, NA), 906 PINGROUP(19, cci_i2c0, blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA), 907 PINGROUP(20, cci_i2c0, blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA), 908 PINGROUP(21, cci_i2c1, blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA), 909 PINGROUP(22, cci_i2c1, blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA), 910 PINGROUP(23, cci_timer0, blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA), 911 PINGROUP(24, cci_timer1, blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA), 912 PINGROUP(25, cci_timer2, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA), 913 PINGROUP(26, cci_timer3, cci_async_in1, blsp_spi5, blsp_uart5, blsp_i2c5, gp0_clk, NA), 914 PINGROUP(27, cci_timer4, cci_async_in2, blsp_spi6, blsp_uart6, blsp_i2c6, gp1_clk, NA), 915 PINGROUP(28, cci_async_in0, blsp_spi6, blsp_uart6, blsp_uim6, NA, NA, NA), 916 PINGROUP(29, blsp_spi6, blsp_uart6, blsp_i2c6, gp_mn, NA, NA, NA), 917 PINGROUP(30, blsp_spi6, blsp_uart6, blsp_i2c6, NA, NA, NA, NA), 918 PINGROUP(31, hdmi_cec, NA, NA, NA, NA, NA, NA), 919 PINGROUP(32, hdmi_ddc, NA, NA, NA, NA, NA, NA), 920 PINGROUP(33, hdmi_ddc, NA, NA, NA, NA, NA, NA), 921 PINGROUP(34, hdmi_hpd, NA, NA, NA, NA, NA, NA), 922 PINGROUP(35, bt, sdc3, NA, NA, NA, NA, NA), 923 PINGROUP(36, wlan, sdc3, NA, NA, NA, NA, NA), 924 PINGROUP(37, wlan, sdc3, NA, NA, NA, NA, NA), 925 PINGROUP(38, wlan, sdc3, NA, NA, NA, NA, NA), 926 PINGROUP(39, wlan, sdc3, NA, NA, NA, NA, NA), 927 PINGROUP(40, wlan, sdc3, NA, NA, NA, NA, NA), 928 PINGROUP(41, fm, blsp_spi7, blsp_uart7, blsp_uim7, NA, NA, NA), 929 PINGROUP(42, fm, blsp_spi7, blsp_uart7, blsp_uim7, NA, NA, NA), 930 PINGROUP(43, bt, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA), 931 PINGROUP(44, bt, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA), 932 PINGROUP(45, blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA), 933 PINGROUP(46, blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA), 934 PINGROUP(47, blsp_spi8, blsp_uart8, blsp_i2c8, blsp_spi10_cs1, NA, NA, NA), 935 PINGROUP(48, blsp_spi8, blsp_uart8, blsp_i2c8, blsp_spi10_cs2, NA, NA, NA), 936 PINGROUP(49, uim2, blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA), 937 PINGROUP(50, uim2, blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA), 938 PINGROUP(51, uim2, blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA), 939 PINGROUP(52, uim2, blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA), 940 PINGROUP(53, blsp_spi10, blsp_uart10, blsp_uim10, blsp_spi2_cs1, NA, NA, NA), 941 PINGROUP(54, blsp_spi10, blsp_uart10, blsp_uim10, blsp_spi2_cs2, gp_pdm0, NA, NA), 942 PINGROUP(55, blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA, NA, NA), 943 PINGROUP(56, blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA, NA, NA), 944 PINGROUP(57, qua_mi2s, gcc_gp_clk1, NA, NA, NA, NA, NA), 945 PINGROUP(58, qua_mi2s, gcc_gp_clk2, NA, NA, NA, NA, NA), 946 PINGROUP(59, qua_mi2s, gcc_gp_clk3, NA, NA, NA, NA, NA), 947 PINGROUP(60, qua_mi2s, NA, NA, NA, NA, NA, NA), 948 PINGROUP(61, qua_mi2s, NA, NA, NA, NA, NA, NA), 949 PINGROUP(62, qua_mi2s, blsp_spi2_cs1, NA, NA, NA, NA, NA), 950 PINGROUP(63, qua_mi2s, blsp_spi2_cs2, gp_pdm2, NA, NA, NA, NA), 951 PINGROUP(64, pri_mi2s, NA, NA, NA, NA, NA, NA), 952 PINGROUP(65, pri_mi2s, NA, NA, NA, NA, NA, NA), 953 PINGROUP(66, pri_mi2s, blsp_spi2_cs3, NA, NA, NA, NA, NA), 954 PINGROUP(67, pri_mi2s, blsp_spi10_cs1, NA, NA, NA, NA, NA), 955 PINGROUP(68, pri_mi2s, blsp_spi10_cs2, gp_pdm0, NA, NA, NA, NA), 956 PINGROUP(69, spkr_mi2s, audio_ref_clk, NA, NA, NA, NA, NA), 957 PINGROUP(70, slimbus, spkr_mi2s, NA, NA, NA, NA, NA), 958 PINGROUP(71, slimbus, spkr_mi2s, NA, NA, NA, NA, NA), 959 PINGROUP(72, spkr_mi2s, NA, NA, NA, NA, NA, NA), 960 PINGROUP(73, ter_mi2s, NA, NA, NA, NA, NA, NA), 961 PINGROUP(74, ter_mi2s, gp_pdm1, NA, NA, NA, NA, NA), 962 PINGROUP(75, ter_mi2s, NA, NA, NA, NA, NA, NA), 963 PINGROUP(76, ter_mi2s, NA, NA, NA, NA, NA, NA), 964 PINGROUP(77, ter_mi2s, NA, NA, NA, NA, NA, NA), 965 PINGROUP(78, sec_mi2s, gcc_gp_clk1, NA, NA, NA, NA, NA), 966 PINGROUP(79, sec_mi2s, gp_pdm2, NA, NA, NA, NA, NA), 967 PINGROUP(80, sec_mi2s, NA, NA, NA, NA, NA, NA), 968 PINGROUP(81, sec_mi2s, blsp_spi11, blsp_uart11, blsp_uim11, gcc_gp_clk2, NA, NA), 969 PINGROUP(82, sec_mi2s, blsp_spi11, blsp_uart11, blsp_uim11, gcc_gp_clk3, NA, NA), 970 PINGROUP(83, blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA), 971 PINGROUP(84, blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA), 972 PINGROUP(85, blsp_spi12, blsp_uart12, blsp_uim12, NA, NA, NA, NA), 973 PINGROUP(86, blsp_spi12, blsp_uart12, blsp_uim12, gp_pdm1, NA, NA, NA), 974 PINGROUP(87, blsp_spi12, blsp_uart12, blsp_i2c12, NA, NA, NA, NA), 975 PINGROUP(88, blsp_spi12, blsp_uart12, blsp_i2c12, NA, NA, NA, NA), 976 PINGROUP(89, tsif1, NA, NA, NA, NA, NA, NA), 977 PINGROUP(90, tsif1, blsp_spi10_cs3, NA, NA, NA, NA, NA), 978 PINGROUP(91, tsif1, sdc4, NA, NA, NA, NA, NA), 979 PINGROUP(92, tsif1, sdc4, NA, NA, NA, NA, NA), 980 PINGROUP(93, tsif2, sdc4, NA, NA, NA, NA, NA), 981 PINGROUP(94, tsif2, sdc4, NA, NA, NA, NA, NA), 982 PINGROUP(95, tsif2, sdc4, NA, NA, NA, NA, NA), 983 PINGROUP(96, tsif2, sdc4, NA, NA, NA, NA, NA), 984 PINGROUP(97, uim1, NA, NA, NA, NA, NA, NA), 985 PINGROUP(98, uim1, NA, NA, NA, NA, NA, NA), 986 PINGROUP(99, uim1, NA, NA, NA, NA, NA, NA), 987 PINGROUP(100, uim1, NA, NA, NA, NA, NA, NA), 988 PINGROUP(101, uim_batt_alarm, NA, NA, NA, NA, NA, NA), 989 PINGROUP(102, edp_hpd, NA, NA, NA, NA, NA, NA), 990 PINGROUP(103, NA, NA, NA, NA, NA, NA, NA), 991 PINGROUP(104, grfc, NA, NA, NA, NA, NA, NA), 992 PINGROUP(105, grfc, NA, NA, NA, NA, NA, NA), 993 PINGROUP(106, grfc, NA, NA, NA, NA, NA, NA), 994 PINGROUP(107, grfc, NA, NA, NA, NA, NA, NA), 995 PINGROUP(108, grfc, NA, NA, NA, NA, NA, NA), 996 PINGROUP(109, grfc, NA, NA, NA, NA, NA, NA), 997 PINGROUP(110, grfc, NA, NA, NA, NA, NA, NA), 998 PINGROUP(111, grfc, NA, NA, NA, NA, NA, NA), 999 PINGROUP(112, grfc, NA, NA, NA, NA, NA, NA), 1000 PINGROUP(113, grfc, NA, NA, NA, NA, NA, NA), 1001 PINGROUP(114, grfc, NA, NA, NA, NA, NA, NA), 1002 PINGROUP(115, grfc, NA, NA, NA, NA, NA, NA), 1003 PINGROUP(116, grfc, NA, NA, NA, NA, NA, NA), 1004 PINGROUP(117, grfc, NA, NA, NA, NA, NA, NA), 1005 PINGROUP(118, grfc, NA, NA, NA, NA, NA, NA), 1006 PINGROUP(119, grfc, NA, NA, NA, NA, NA, NA), 1007 PINGROUP(120, grfc, NA, NA, NA, NA, NA, NA), 1008 PINGROUP(121, grfc, NA, NA, NA, NA, NA, NA), 1009 PINGROUP(122, grfc, NA, NA, NA, NA, NA, NA), 1010 PINGROUP(123, grfc, NA, NA, NA, NA, NA, NA), 1011 PINGROUP(124, grfc, NA, NA, NA, NA, NA, NA), 1012 PINGROUP(125, grfc, NA, NA, NA, NA, NA, NA), 1013 PINGROUP(126, grfc, NA, NA, NA, NA, NA, NA), 1014 PINGROUP(127, grfc, NA, NA, NA, NA, NA, NA), 1015 PINGROUP(128, NA, grfc, NA, NA, NA, NA, NA), 1016 PINGROUP(129, NA, NA, NA, NA, NA, NA, NA), 1017 PINGROUP(130, NA, NA, NA, NA, NA, NA, NA), 1018 PINGROUP(131, NA, NA, NA, NA, NA, NA, NA), 1019 PINGROUP(132, NA, NA, NA, NA, NA, NA, NA), 1020 PINGROUP(133, NA, NA, NA, NA, NA, NA, NA), 1021 PINGROUP(134, NA, NA, NA, NA, NA, NA, NA), 1022 PINGROUP(135, NA, NA, NA, NA, NA, NA, NA), 1023 PINGROUP(136, NA, grfc, NA, NA, NA, NA, NA), 1024 PINGROUP(137, NA, grfc, NA, NA, NA, NA, NA), 1025 PINGROUP(138, NA, NA, NA, NA, NA, NA, NA), 1026 PINGROUP(139, NA, NA, NA, NA, NA, NA, NA), 1027 PINGROUP(140, NA, NA, NA, NA, NA, NA, NA), 1028 PINGROUP(141, NA, grfc, NA, NA, NA, NA, NA), 1029 PINGROUP(142, NA, NA, NA, NA, NA, NA, NA), 1030 PINGROUP(143, NA, grfc, NA, NA, NA, NA, NA), 1031 PINGROUP(144, hsic, NA, NA, NA, NA, NA, NA), 1032 PINGROUP(145, hsic, NA, NA, NA, NA, NA, NA), 1033 SDC_PINGROUP(sdc1_clk, 0x2044, 13, 6), 1034 SDC_PINGROUP(sdc1_cmd, 0x2044, 11, 3), 1035 SDC_PINGROUP(sdc1_data, 0x2044, 9, 0), 1036 SDC_PINGROUP(sdc2_clk, 0x2048, 14, 6), 1037 SDC_PINGROUP(sdc2_cmd, 0x2048, 11, 3), 1038 SDC_PINGROUP(sdc2_data, 0x2048, 9, 0), 1039 HSIC_PINGROUP(hsic_strobe, 0x2050), 1040 HSIC_PINGROUP(hsic_data, 0x2054), 1041 }; 1042 1043 #define NUM_GPIO_PINGROUPS 146 1044 1045 static const struct msm_gpio_wakeirq_map msm8x74_mpm_map[] = { 1046 { 1, 4 }, { 5, 5 }, { 9, 6 }, { 18, 7 }, { 20, 8 }, { 24, 9 }, 1047 { 27, 10 }, { 28, 11 }, { 34, 12 }, { 35, 13 }, { 37, 14 }, { 42, 15 }, 1048 { 44, 16 }, { 46, 17 }, { 50, 18 }, { 54, 19 }, { 59, 20 }, { 61, 21 }, 1049 { 62, 22 }, { 64, 23 }, { 65, 24 }, { 66, 25 }, { 67, 26 }, { 68, 27 }, 1050 { 71, 28 }, { 72, 29 }, { 73, 30 }, { 74, 31 }, { 75, 32 }, { 77, 33 }, 1051 { 79, 34 }, { 80, 35 }, { 82, 36 }, { 86, 37 }, { 92, 38 }, { 93, 39 }, 1052 { 95, 40 }, { 102, 3 }, { 144, 41 }, 1053 }; 1054 1055 static const struct msm_pinctrl_soc_data msm8x74_pinctrl = { 1056 .pins = msm8x74_pins, 1057 .npins = ARRAY_SIZE(msm8x74_pins), 1058 .functions = msm8x74_functions, 1059 .nfunctions = ARRAY_SIZE(msm8x74_functions), 1060 .groups = msm8x74_groups, 1061 .ngroups = ARRAY_SIZE(msm8x74_groups), 1062 .ngpios = NUM_GPIO_PINGROUPS, 1063 .wakeirq_map = msm8x74_mpm_map, 1064 .nwakeirq_map = ARRAY_SIZE(msm8x74_mpm_map), 1065 }; 1066 1067 static int msm8x74_pinctrl_probe(struct platform_device *pdev) 1068 { 1069 return msm_pinctrl_probe(pdev, &msm8x74_pinctrl); 1070 } 1071 1072 static const struct of_device_id msm8x74_pinctrl_of_match[] = { 1073 { .compatible = "qcom,msm8974-pinctrl", }, 1074 { }, 1075 }; 1076 MODULE_DEVICE_TABLE(of, msm8x74_pinctrl_of_match); 1077 1078 static struct platform_driver msm8x74_pinctrl_driver = { 1079 .driver = { 1080 .name = "msm8x74-pinctrl", 1081 .of_match_table = msm8x74_pinctrl_of_match, 1082 }, 1083 .probe = msm8x74_pinctrl_probe, 1084 }; 1085 1086 static int __init msm8x74_pinctrl_init(void) 1087 { 1088 return platform_driver_register(&msm8x74_pinctrl_driver); 1089 } 1090 arch_initcall(msm8x74_pinctrl_init); 1091 1092 static void __exit msm8x74_pinctrl_exit(void) 1093 { 1094 platform_driver_unregister(&msm8x74_pinctrl_driver); 1095 } 1096 module_exit(msm8x74_pinctrl_exit); 1097 1098 MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>"); 1099 MODULE_DESCRIPTION("Qualcomm MSM8x74 pinctrl driver"); 1100 MODULE_LICENSE("GPL v2"); 1101 1102