xref: /linux/drivers/pinctrl/qcom/pinctrl-msm8994.c (revision bba2c3615bd6cfee7456d1130f2e6b01b3f4e9ba)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2016, The Linux Foundation. All rights reserved.
4  */
5 
6 #include <linux/module.h>
7 #include <linux/of.h>
8 #include <linux/platform_device.h>
9 
10 #include "pinctrl-msm.h"
11 
12 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11)	\
13 	{						\
14 		.grp = PINCTRL_PINGROUP("gpio" #id, 	\
15 			gpio##id##_pins, 		\
16 			ARRAY_SIZE(gpio##id##_pins)),	\
17 		.funcs = (int[]){			\
18 			msm_mux_gpio,			\
19 			msm_mux_##f1,			\
20 			msm_mux_##f2,			\
21 			msm_mux_##f3,			\
22 			msm_mux_##f4,			\
23 			msm_mux_##f5,			\
24 			msm_mux_##f6,			\
25 			msm_mux_##f7,			\
26 			msm_mux_##f8,			\
27 			msm_mux_##f9,			\
28 			msm_mux_##f10,			\
29 			msm_mux_##f11			\
30 		},					\
31 		.nfuncs = 12,				\
32 		.ctl_reg = 0x1000 + 0x10 * id,		\
33 		.io_reg = 0x1004 + 0x10 * id,		\
34 		.intr_cfg_reg = 0x1008 + 0x10 * id,	\
35 		.intr_status_reg = 0x100c + 0x10 * id,	\
36 		.mux_bit = 2,				\
37 		.pull_bit = 0,				\
38 		.drv_bit = 6,				\
39 		.oe_bit = 9,				\
40 		.in_bit = 0,				\
41 		.out_bit = 1,				\
42 		.intr_enable_bit = 0,			\
43 		.intr_status_bit = 0,			\
44 		.intr_target_bit = 5,			\
45 		.intr_target_kpss_val = 4,		\
46 		.intr_raw_status_bit = 4,		\
47 		.intr_polarity_bit = 1,			\
48 		.intr_detection_bit = 2,		\
49 		.intr_detection_width = 2,		\
50 	}
51 
52 #define SDC_PINGROUP(pg_name, ctl, pull, drv)		\
53 	{						\
54 		.grp = PINCTRL_PINGROUP(#pg_name, 	\
55 			pg_name##_pins, 		\
56 			ARRAY_SIZE(pg_name##_pins)),	\
57 		.ctl_reg = ctl,				\
58 		.io_reg = 0,				\
59 		.intr_cfg_reg = 0,			\
60 		.intr_status_reg = 0,			\
61 		.mux_bit = -1,				\
62 		.pull_bit = pull,			\
63 		.drv_bit = drv,				\
64 		.oe_bit = -1,				\
65 		.in_bit = -1,				\
66 		.out_bit = -1,				\
67 		.intr_enable_bit = -1,			\
68 		.intr_status_bit = -1,			\
69 		.intr_target_bit = -1,			\
70 		.intr_target_kpss_val = -1,		\
71 		.intr_raw_status_bit = -1,		\
72 		.intr_polarity_bit = -1,		\
73 		.intr_detection_bit = -1,		\
74 		.intr_detection_width = -1,		\
75 	}
76 static const struct pinctrl_pin_desc msm8994_pins[] = {
77 	PINCTRL_PIN(0, "GPIO_0"),
78 	PINCTRL_PIN(1, "GPIO_1"),
79 	PINCTRL_PIN(2, "GPIO_2"),
80 	PINCTRL_PIN(3, "GPIO_3"),
81 	PINCTRL_PIN(4, "GPIO_4"),
82 	PINCTRL_PIN(5, "GPIO_5"),
83 	PINCTRL_PIN(6, "GPIO_6"),
84 	PINCTRL_PIN(7, "GPIO_7"),
85 	PINCTRL_PIN(8, "GPIO_8"),
86 	PINCTRL_PIN(9, "GPIO_9"),
87 	PINCTRL_PIN(10, "GPIO_10"),
88 	PINCTRL_PIN(11, "GPIO_11"),
89 	PINCTRL_PIN(12, "GPIO_12"),
90 	PINCTRL_PIN(13, "GPIO_13"),
91 	PINCTRL_PIN(14, "GPIO_14"),
92 	PINCTRL_PIN(15, "GPIO_15"),
93 	PINCTRL_PIN(16, "GPIO_16"),
94 	PINCTRL_PIN(17, "GPIO_17"),
95 	PINCTRL_PIN(18, "GPIO_18"),
96 	PINCTRL_PIN(19, "GPIO_19"),
97 	PINCTRL_PIN(20, "GPIO_20"),
98 	PINCTRL_PIN(21, "GPIO_21"),
99 	PINCTRL_PIN(22, "GPIO_22"),
100 	PINCTRL_PIN(23, "GPIO_23"),
101 	PINCTRL_PIN(24, "GPIO_24"),
102 	PINCTRL_PIN(25, "GPIO_25"),
103 	PINCTRL_PIN(26, "GPIO_26"),
104 	PINCTRL_PIN(27, "GPIO_27"),
105 	PINCTRL_PIN(28, "GPIO_28"),
106 	PINCTRL_PIN(29, "GPIO_29"),
107 	PINCTRL_PIN(30, "GPIO_30"),
108 	PINCTRL_PIN(31, "GPIO_31"),
109 	PINCTRL_PIN(32, "GPIO_32"),
110 	PINCTRL_PIN(33, "GPIO_33"),
111 	PINCTRL_PIN(34, "GPIO_34"),
112 	PINCTRL_PIN(35, "GPIO_35"),
113 	PINCTRL_PIN(36, "GPIO_36"),
114 	PINCTRL_PIN(37, "GPIO_37"),
115 	PINCTRL_PIN(38, "GPIO_38"),
116 	PINCTRL_PIN(39, "GPIO_39"),
117 	PINCTRL_PIN(40, "GPIO_40"),
118 	PINCTRL_PIN(41, "GPIO_41"),
119 	PINCTRL_PIN(42, "GPIO_42"),
120 	PINCTRL_PIN(43, "GPIO_43"),
121 	PINCTRL_PIN(44, "GPIO_44"),
122 	PINCTRL_PIN(45, "GPIO_45"),
123 	PINCTRL_PIN(46, "GPIO_46"),
124 	PINCTRL_PIN(47, "GPIO_47"),
125 	PINCTRL_PIN(48, "GPIO_48"),
126 	PINCTRL_PIN(49, "GPIO_49"),
127 	PINCTRL_PIN(50, "GPIO_50"),
128 	PINCTRL_PIN(51, "GPIO_51"),
129 	PINCTRL_PIN(52, "GPIO_52"),
130 	PINCTRL_PIN(53, "GPIO_53"),
131 	PINCTRL_PIN(54, "GPIO_54"),
132 	PINCTRL_PIN(55, "GPIO_55"),
133 	PINCTRL_PIN(56, "GPIO_56"),
134 	PINCTRL_PIN(57, "GPIO_57"),
135 	PINCTRL_PIN(58, "GPIO_58"),
136 	PINCTRL_PIN(59, "GPIO_59"),
137 	PINCTRL_PIN(60, "GPIO_60"),
138 	PINCTRL_PIN(61, "GPIO_61"),
139 	PINCTRL_PIN(62, "GPIO_62"),
140 	PINCTRL_PIN(63, "GPIO_63"),
141 	PINCTRL_PIN(64, "GPIO_64"),
142 	PINCTRL_PIN(65, "GPIO_65"),
143 	PINCTRL_PIN(66, "GPIO_66"),
144 	PINCTRL_PIN(67, "GPIO_67"),
145 	PINCTRL_PIN(68, "GPIO_68"),
146 	PINCTRL_PIN(69, "GPIO_69"),
147 	PINCTRL_PIN(70, "GPIO_70"),
148 	PINCTRL_PIN(71, "GPIO_71"),
149 	PINCTRL_PIN(72, "GPIO_72"),
150 	PINCTRL_PIN(73, "GPIO_73"),
151 	PINCTRL_PIN(74, "GPIO_74"),
152 	PINCTRL_PIN(75, "GPIO_75"),
153 	PINCTRL_PIN(76, "GPIO_76"),
154 	PINCTRL_PIN(77, "GPIO_77"),
155 	PINCTRL_PIN(78, "GPIO_78"),
156 	PINCTRL_PIN(79, "GPIO_79"),
157 	PINCTRL_PIN(80, "GPIO_80"),
158 	PINCTRL_PIN(81, "GPIO_81"),
159 	PINCTRL_PIN(82, "GPIO_82"),
160 	PINCTRL_PIN(83, "GPIO_83"),
161 	PINCTRL_PIN(84, "GPIO_84"),
162 	PINCTRL_PIN(85, "GPIO_85"),
163 	PINCTRL_PIN(86, "GPIO_86"),
164 	PINCTRL_PIN(87, "GPIO_87"),
165 	PINCTRL_PIN(88, "GPIO_88"),
166 	PINCTRL_PIN(89, "GPIO_89"),
167 	PINCTRL_PIN(90, "GPIO_90"),
168 	PINCTRL_PIN(91, "GPIO_91"),
169 	PINCTRL_PIN(92, "GPIO_92"),
170 	PINCTRL_PIN(93, "GPIO_93"),
171 	PINCTRL_PIN(94, "GPIO_94"),
172 	PINCTRL_PIN(95, "GPIO_95"),
173 	PINCTRL_PIN(96, "GPIO_96"),
174 	PINCTRL_PIN(97, "GPIO_97"),
175 	PINCTRL_PIN(98, "GPIO_98"),
176 	PINCTRL_PIN(99, "GPIO_99"),
177 	PINCTRL_PIN(100, "GPIO_100"),
178 	PINCTRL_PIN(101, "GPIO_101"),
179 	PINCTRL_PIN(102, "GPIO_102"),
180 	PINCTRL_PIN(103, "GPIO_103"),
181 	PINCTRL_PIN(104, "GPIO_104"),
182 	PINCTRL_PIN(105, "GPIO_105"),
183 	PINCTRL_PIN(106, "GPIO_106"),
184 	PINCTRL_PIN(107, "GPIO_107"),
185 	PINCTRL_PIN(108, "GPIO_108"),
186 	PINCTRL_PIN(109, "GPIO_109"),
187 	PINCTRL_PIN(110, "GPIO_110"),
188 	PINCTRL_PIN(111, "GPIO_111"),
189 	PINCTRL_PIN(112, "GPIO_112"),
190 	PINCTRL_PIN(113, "GPIO_113"),
191 	PINCTRL_PIN(114, "GPIO_114"),
192 	PINCTRL_PIN(115, "GPIO_115"),
193 	PINCTRL_PIN(116, "GPIO_116"),
194 	PINCTRL_PIN(117, "GPIO_117"),
195 	PINCTRL_PIN(118, "GPIO_118"),
196 	PINCTRL_PIN(119, "GPIO_119"),
197 	PINCTRL_PIN(120, "GPIO_120"),
198 	PINCTRL_PIN(121, "GPIO_121"),
199 	PINCTRL_PIN(122, "GPIO_122"),
200 	PINCTRL_PIN(123, "GPIO_123"),
201 	PINCTRL_PIN(124, "GPIO_124"),
202 	PINCTRL_PIN(125, "GPIO_125"),
203 	PINCTRL_PIN(126, "GPIO_126"),
204 	PINCTRL_PIN(127, "GPIO_127"),
205 	PINCTRL_PIN(128, "GPIO_128"),
206 	PINCTRL_PIN(129, "GPIO_129"),
207 	PINCTRL_PIN(130, "GPIO_130"),
208 	PINCTRL_PIN(131, "GPIO_131"),
209 	PINCTRL_PIN(132, "GPIO_132"),
210 	PINCTRL_PIN(133, "GPIO_133"),
211 	PINCTRL_PIN(134, "GPIO_134"),
212 	PINCTRL_PIN(135, "GPIO_135"),
213 	PINCTRL_PIN(136, "GPIO_136"),
214 	PINCTRL_PIN(137, "GPIO_137"),
215 	PINCTRL_PIN(138, "GPIO_138"),
216 	PINCTRL_PIN(139, "GPIO_139"),
217 	PINCTRL_PIN(140, "GPIO_140"),
218 	PINCTRL_PIN(141, "GPIO_141"),
219 	PINCTRL_PIN(142, "GPIO_142"),
220 	PINCTRL_PIN(143, "GPIO_143"),
221 	PINCTRL_PIN(144, "GPIO_144"),
222 	PINCTRL_PIN(145, "GPIO_145"),
223 	PINCTRL_PIN(146, "SDC1_RCLK"),
224 	PINCTRL_PIN(147, "SDC1_CLK"),
225 	PINCTRL_PIN(148, "SDC1_CMD"),
226 	PINCTRL_PIN(149, "SDC1_DATA"),
227 	PINCTRL_PIN(150, "SDC2_CLK"),
228 	PINCTRL_PIN(151, "SDC2_CMD"),
229 	PINCTRL_PIN(152, "SDC2_DATA"),
230 	PINCTRL_PIN(153, "SDC3_CLK"),
231 	PINCTRL_PIN(154, "SDC3_CMD"),
232 	PINCTRL_PIN(155, "SDC3_DATA"),
233 };
234 
235 #define DECLARE_MSM_GPIO_PINS(pin) \
236 	static const unsigned int gpio##pin##_pins[] = { pin }
237 DECLARE_MSM_GPIO_PINS(0);
238 DECLARE_MSM_GPIO_PINS(1);
239 DECLARE_MSM_GPIO_PINS(2);
240 DECLARE_MSM_GPIO_PINS(3);
241 DECLARE_MSM_GPIO_PINS(4);
242 DECLARE_MSM_GPIO_PINS(5);
243 DECLARE_MSM_GPIO_PINS(6);
244 DECLARE_MSM_GPIO_PINS(7);
245 DECLARE_MSM_GPIO_PINS(8);
246 DECLARE_MSM_GPIO_PINS(9);
247 DECLARE_MSM_GPIO_PINS(10);
248 DECLARE_MSM_GPIO_PINS(11);
249 DECLARE_MSM_GPIO_PINS(12);
250 DECLARE_MSM_GPIO_PINS(13);
251 DECLARE_MSM_GPIO_PINS(14);
252 DECLARE_MSM_GPIO_PINS(15);
253 DECLARE_MSM_GPIO_PINS(16);
254 DECLARE_MSM_GPIO_PINS(17);
255 DECLARE_MSM_GPIO_PINS(18);
256 DECLARE_MSM_GPIO_PINS(19);
257 DECLARE_MSM_GPIO_PINS(20);
258 DECLARE_MSM_GPIO_PINS(21);
259 DECLARE_MSM_GPIO_PINS(22);
260 DECLARE_MSM_GPIO_PINS(23);
261 DECLARE_MSM_GPIO_PINS(24);
262 DECLARE_MSM_GPIO_PINS(25);
263 DECLARE_MSM_GPIO_PINS(26);
264 DECLARE_MSM_GPIO_PINS(27);
265 DECLARE_MSM_GPIO_PINS(28);
266 DECLARE_MSM_GPIO_PINS(29);
267 DECLARE_MSM_GPIO_PINS(30);
268 DECLARE_MSM_GPIO_PINS(31);
269 DECLARE_MSM_GPIO_PINS(32);
270 DECLARE_MSM_GPIO_PINS(33);
271 DECLARE_MSM_GPIO_PINS(34);
272 DECLARE_MSM_GPIO_PINS(35);
273 DECLARE_MSM_GPIO_PINS(36);
274 DECLARE_MSM_GPIO_PINS(37);
275 DECLARE_MSM_GPIO_PINS(38);
276 DECLARE_MSM_GPIO_PINS(39);
277 DECLARE_MSM_GPIO_PINS(40);
278 DECLARE_MSM_GPIO_PINS(41);
279 DECLARE_MSM_GPIO_PINS(42);
280 DECLARE_MSM_GPIO_PINS(43);
281 DECLARE_MSM_GPIO_PINS(44);
282 DECLARE_MSM_GPIO_PINS(45);
283 DECLARE_MSM_GPIO_PINS(46);
284 DECLARE_MSM_GPIO_PINS(47);
285 DECLARE_MSM_GPIO_PINS(48);
286 DECLARE_MSM_GPIO_PINS(49);
287 DECLARE_MSM_GPIO_PINS(50);
288 DECLARE_MSM_GPIO_PINS(51);
289 DECLARE_MSM_GPIO_PINS(52);
290 DECLARE_MSM_GPIO_PINS(53);
291 DECLARE_MSM_GPIO_PINS(54);
292 DECLARE_MSM_GPIO_PINS(55);
293 DECLARE_MSM_GPIO_PINS(56);
294 DECLARE_MSM_GPIO_PINS(57);
295 DECLARE_MSM_GPIO_PINS(58);
296 DECLARE_MSM_GPIO_PINS(59);
297 DECLARE_MSM_GPIO_PINS(60);
298 DECLARE_MSM_GPIO_PINS(61);
299 DECLARE_MSM_GPIO_PINS(62);
300 DECLARE_MSM_GPIO_PINS(63);
301 DECLARE_MSM_GPIO_PINS(64);
302 DECLARE_MSM_GPIO_PINS(65);
303 DECLARE_MSM_GPIO_PINS(66);
304 DECLARE_MSM_GPIO_PINS(67);
305 DECLARE_MSM_GPIO_PINS(68);
306 DECLARE_MSM_GPIO_PINS(69);
307 DECLARE_MSM_GPIO_PINS(70);
308 DECLARE_MSM_GPIO_PINS(71);
309 DECLARE_MSM_GPIO_PINS(72);
310 DECLARE_MSM_GPIO_PINS(73);
311 DECLARE_MSM_GPIO_PINS(74);
312 DECLARE_MSM_GPIO_PINS(75);
313 DECLARE_MSM_GPIO_PINS(76);
314 DECLARE_MSM_GPIO_PINS(77);
315 DECLARE_MSM_GPIO_PINS(78);
316 DECLARE_MSM_GPIO_PINS(79);
317 DECLARE_MSM_GPIO_PINS(80);
318 DECLARE_MSM_GPIO_PINS(81);
319 DECLARE_MSM_GPIO_PINS(82);
320 DECLARE_MSM_GPIO_PINS(83);
321 DECLARE_MSM_GPIO_PINS(84);
322 DECLARE_MSM_GPIO_PINS(85);
323 DECLARE_MSM_GPIO_PINS(86);
324 DECLARE_MSM_GPIO_PINS(87);
325 DECLARE_MSM_GPIO_PINS(88);
326 DECLARE_MSM_GPIO_PINS(89);
327 DECLARE_MSM_GPIO_PINS(90);
328 DECLARE_MSM_GPIO_PINS(91);
329 DECLARE_MSM_GPIO_PINS(92);
330 DECLARE_MSM_GPIO_PINS(93);
331 DECLARE_MSM_GPIO_PINS(94);
332 DECLARE_MSM_GPIO_PINS(95);
333 DECLARE_MSM_GPIO_PINS(96);
334 DECLARE_MSM_GPIO_PINS(97);
335 DECLARE_MSM_GPIO_PINS(98);
336 DECLARE_MSM_GPIO_PINS(99);
337 DECLARE_MSM_GPIO_PINS(100);
338 DECLARE_MSM_GPIO_PINS(101);
339 DECLARE_MSM_GPIO_PINS(102);
340 DECLARE_MSM_GPIO_PINS(103);
341 DECLARE_MSM_GPIO_PINS(104);
342 DECLARE_MSM_GPIO_PINS(105);
343 DECLARE_MSM_GPIO_PINS(106);
344 DECLARE_MSM_GPIO_PINS(107);
345 DECLARE_MSM_GPIO_PINS(108);
346 DECLARE_MSM_GPIO_PINS(109);
347 DECLARE_MSM_GPIO_PINS(110);
348 DECLARE_MSM_GPIO_PINS(111);
349 DECLARE_MSM_GPIO_PINS(112);
350 DECLARE_MSM_GPIO_PINS(113);
351 DECLARE_MSM_GPIO_PINS(114);
352 DECLARE_MSM_GPIO_PINS(115);
353 DECLARE_MSM_GPIO_PINS(116);
354 DECLARE_MSM_GPIO_PINS(117);
355 DECLARE_MSM_GPIO_PINS(118);
356 DECLARE_MSM_GPIO_PINS(119);
357 DECLARE_MSM_GPIO_PINS(120);
358 DECLARE_MSM_GPIO_PINS(121);
359 DECLARE_MSM_GPIO_PINS(122);
360 DECLARE_MSM_GPIO_PINS(123);
361 DECLARE_MSM_GPIO_PINS(124);
362 DECLARE_MSM_GPIO_PINS(125);
363 DECLARE_MSM_GPIO_PINS(126);
364 DECLARE_MSM_GPIO_PINS(127);
365 DECLARE_MSM_GPIO_PINS(128);
366 DECLARE_MSM_GPIO_PINS(129);
367 DECLARE_MSM_GPIO_PINS(130);
368 DECLARE_MSM_GPIO_PINS(131);
369 DECLARE_MSM_GPIO_PINS(132);
370 DECLARE_MSM_GPIO_PINS(133);
371 DECLARE_MSM_GPIO_PINS(134);
372 DECLARE_MSM_GPIO_PINS(135);
373 DECLARE_MSM_GPIO_PINS(136);
374 DECLARE_MSM_GPIO_PINS(137);
375 DECLARE_MSM_GPIO_PINS(138);
376 DECLARE_MSM_GPIO_PINS(139);
377 DECLARE_MSM_GPIO_PINS(140);
378 DECLARE_MSM_GPIO_PINS(141);
379 DECLARE_MSM_GPIO_PINS(142);
380 DECLARE_MSM_GPIO_PINS(143);
381 DECLARE_MSM_GPIO_PINS(144);
382 DECLARE_MSM_GPIO_PINS(145);
383 
384 static const unsigned int sdc1_rclk_pins[] = { 146 };
385 static const unsigned int sdc1_clk_pins[] = { 147 };
386 static const unsigned int sdc1_cmd_pins[] = { 148 };
387 static const unsigned int sdc1_data_pins[] = { 149 };
388 static const unsigned int sdc2_clk_pins[] = { 150 };
389 static const unsigned int sdc2_cmd_pins[] = { 151 };
390 static const unsigned int sdc2_data_pins[] = { 152 };
391 static const unsigned int sdc3_clk_pins[] = { 153 };
392 static const unsigned int sdc3_cmd_pins[] = { 154 };
393 static const unsigned int sdc3_data_pins[] = { 155 };
394 
395 enum msm8994_functions {
396 	msm_mux_audio_ref_clk,
397 	msm_mux_blsp_i2c1,
398 	msm_mux_blsp_i2c2,
399 	msm_mux_blsp_i2c3,
400 	msm_mux_blsp_i2c4,
401 	msm_mux_blsp_i2c5,
402 	msm_mux_blsp_i2c6,
403 	msm_mux_blsp_i2c7,
404 	msm_mux_blsp_i2c8,
405 	msm_mux_blsp_i2c9,
406 	msm_mux_blsp_i2c10,
407 	msm_mux_blsp_i2c11,
408 	msm_mux_blsp_i2c12,
409 	msm_mux_blsp_spi1,
410 	msm_mux_blsp_spi1_cs1,
411 	msm_mux_blsp_spi1_cs2,
412 	msm_mux_blsp_spi1_cs3,
413 	msm_mux_blsp_spi2,
414 	msm_mux_blsp_spi2_cs1,
415 	msm_mux_blsp_spi2_cs2,
416 	msm_mux_blsp_spi2_cs3,
417 	msm_mux_blsp_spi3,
418 	msm_mux_blsp_spi4,
419 	msm_mux_blsp_spi5,
420 	msm_mux_blsp_spi6,
421 	msm_mux_blsp_spi7,
422 	msm_mux_blsp_spi8,
423 	msm_mux_blsp_spi9,
424 	msm_mux_blsp_spi10,
425 	msm_mux_blsp_spi10_cs1,
426 	msm_mux_blsp_spi10_cs2,
427 	msm_mux_blsp_spi10_cs3,
428 	msm_mux_blsp_spi11,
429 	msm_mux_blsp_spi12,
430 	msm_mux_blsp_uart1,
431 	msm_mux_blsp_uart2,
432 	msm_mux_blsp_uart3,
433 	msm_mux_blsp_uart4,
434 	msm_mux_blsp_uart5,
435 	msm_mux_blsp_uart6,
436 	msm_mux_blsp_uart7,
437 	msm_mux_blsp_uart8,
438 	msm_mux_blsp_uart9,
439 	msm_mux_blsp_uart10,
440 	msm_mux_blsp_uart11,
441 	msm_mux_blsp_uart12,
442 	msm_mux_blsp_uim1,
443 	msm_mux_blsp_uim2,
444 	msm_mux_blsp_uim3,
445 	msm_mux_blsp_uim4,
446 	msm_mux_blsp_uim5,
447 	msm_mux_blsp_uim6,
448 	msm_mux_blsp_uim7,
449 	msm_mux_blsp_uim8,
450 	msm_mux_blsp_uim9,
451 	msm_mux_blsp_uim10,
452 	msm_mux_blsp_uim11,
453 	msm_mux_blsp_uim12,
454 	msm_mux_blsp11_i2c_scl_b,
455 	msm_mux_blsp11_i2c_sda_b,
456 	msm_mux_blsp11_uart_rx_b,
457 	msm_mux_blsp11_uart_tx_b,
458 	msm_mux_cam_mclk0,
459 	msm_mux_cam_mclk1,
460 	msm_mux_cam_mclk2,
461 	msm_mux_cam_mclk3,
462 	msm_mux_cci_async_in0,
463 	msm_mux_cci_async_in1,
464 	msm_mux_cci_async_in2,
465 	msm_mux_cci_i2c0,
466 	msm_mux_cci_i2c1,
467 	msm_mux_cci_timer0,
468 	msm_mux_cci_timer1,
469 	msm_mux_cci_timer2,
470 	msm_mux_cci_timer3,
471 	msm_mux_cci_timer4,
472 	msm_mux_gcc_gp1_clk_a,
473 	msm_mux_gcc_gp1_clk_b,
474 	msm_mux_gcc_gp2_clk_a,
475 	msm_mux_gcc_gp2_clk_b,
476 	msm_mux_gcc_gp3_clk_a,
477 	msm_mux_gcc_gp3_clk_b,
478 	msm_mux_gp_mn,
479 	msm_mux_gp_pdm0,
480 	msm_mux_gp_pdm1,
481 	msm_mux_gp_pdm2,
482 	msm_mux_gp0_clk,
483 	msm_mux_gp1_clk,
484 	msm_mux_gps_tx,
485 	msm_mux_gsm_tx,
486 	msm_mux_hdmi_cec,
487 	msm_mux_hdmi_ddc,
488 	msm_mux_hdmi_hpd,
489 	msm_mux_hdmi_rcv,
490 	msm_mux_mdp_vsync,
491 	msm_mux_mss_lte,
492 	msm_mux_nav_pps,
493 	msm_mux_nav_tsync,
494 	msm_mux_qdss_cti_trig_in_a,
495 	msm_mux_qdss_cti_trig_in_b,
496 	msm_mux_qdss_cti_trig_in_c,
497 	msm_mux_qdss_cti_trig_in_d,
498 	msm_mux_qdss_cti_trig_out_a,
499 	msm_mux_qdss_cti_trig_out_b,
500 	msm_mux_qdss_cti_trig_out_c,
501 	msm_mux_qdss_cti_trig_out_d,
502 	msm_mux_qdss_traceclk_a,
503 	msm_mux_qdss_traceclk_b,
504 	msm_mux_qdss_tracectl_a,
505 	msm_mux_qdss_tracectl_b,
506 	msm_mux_qdss_tracedata_a,
507 	msm_mux_qdss_tracedata_b,
508 	msm_mux_qua_mi2s,
509 	msm_mux_pci_e0,
510 	msm_mux_pci_e1,
511 	msm_mux_pri_mi2s,
512 	msm_mux_sdc4,
513 	msm_mux_sec_mi2s,
514 	msm_mux_slimbus,
515 	msm_mux_spkr_i2s,
516 	msm_mux_ter_mi2s,
517 	msm_mux_tsif1,
518 	msm_mux_tsif2,
519 	msm_mux_uim1,
520 	msm_mux_uim2,
521 	msm_mux_uim3,
522 	msm_mux_uim4,
523 	msm_mux_uim_batt_alarm,
524 	msm_mux_gpio,
525 	msm_mux_NA,
526 };
527 
528 static const char * const gpio_groups[] = {
529 	"gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
530 	"gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
531 	"gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
532 	"gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
533 	"gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
534 	"gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
535 	"gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
536 	"gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
537 	"gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
538 	"gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
539 	"gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
540 	"gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
541 	"gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
542 	"gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
543 	"gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
544 	"gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
545 	"gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
546 	"gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
547 	"gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
548 	"gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
549 	"gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
550 	"gpio141", "gpio142", "gpio143", "gpio144", "gpio145",
551 };
552 
553 static const char * const blsp_spi1_groups[] = {
554 	"gpio0", "gpio1", "gpio2", "gpio3"
555 };
556 static const char * const blsp_uart1_groups[] = {
557 	"gpio0", "gpio1", "gpio2", "gpio3"
558 };
559 static const char * const blsp_uim1_groups[] = {
560 	"gpio0", "gpio1"
561 };
562 static const char * const hdmi_rcv_groups[] = {
563 	"gpio0"
564 };
565 static const char * const blsp_i2c1_groups[] = {
566 	"gpio2", "gpio3"
567 };
568 static const char * const blsp_spi2_groups[] = {
569 	"gpio4", "gpio5", "gpio6", "gpio7"
570 };
571 static const char * const blsp_uart2_groups[] = {
572 	"gpio4", "gpio5", "gpio6", "gpio7"
573 };
574 static const char * const blsp_uim2_groups[] = {
575 	"gpio4", "gpio5"
576 };
577 static const char * const qdss_cti_trig_out_b_groups[] = {
578 	"gpio4",
579 };
580 static const char * const qdss_cti_trig_in_b_groups[] = {
581 	"gpio5",
582 };
583 static const char * const blsp_i2c2_groups[] = {
584 	"gpio6", "gpio7"
585 };
586 static const char * const blsp_spi3_groups[] = {
587 	"gpio8", "gpio9", "gpio10", "gpio11"
588 };
589 static const char * const blsp_uart3_groups[] = {
590 	"gpio8", "gpio9", "gpio10", "gpio11"
591 };
592 static const char * const blsp_uim3_groups[] = {
593 	"gpio8", "gpio9"
594 };
595 static const char * const blsp_spi1_cs1_groups[] = {
596 	"gpio8"
597 };
598 static const char * const blsp_spi1_cs2_groups[] = {
599 	"gpio9", "gpio11"
600 };
601 static const char * const mdp_vsync_groups[] = {
602 	"gpio10", "gpio11", "gpio12"
603 };
604 static const char * const blsp_i2c3_groups[] = {
605 	"gpio10", "gpio11"
606 };
607 static const char * const blsp_spi1_cs3_groups[] = {
608 	"gpio10"
609 };
610 static const char * const qdss_tracedata_b_groups[] = {
611 	"gpio13", "gpio14", "gpio15", "gpio16", "gpio17", "gpio18",
612 	"gpio19", "gpio21", "gpio22", "gpio23", "gpio25", "gpio26",
613 	"gpio57", "gpio58", "gpio92", "gpio93",
614 };
615 static const char * const cam_mclk0_groups[] = {
616 	"gpio13"
617 };
618 static const char * const cam_mclk1_groups[] = {
619 	"gpio14"
620 };
621 static const char * const cam_mclk2_groups[] = {
622 	"gpio15"
623 };
624 static const char * const cam_mclk3_groups[] = {
625 	"gpio16"
626 };
627 static const char * const cci_i2c0_groups[] = {
628 	"gpio17", "gpio18"
629 };
630 static const char * const blsp_spi4_groups[] = {
631 	"gpio17", "gpio18", "gpio19", "gpio20"
632 };
633 static const char * const blsp_uart4_groups[] = {
634 	"gpio17", "gpio18", "gpio19", "gpio20"
635 };
636 static const char * const blsp_uim4_groups[] = {
637 	"gpio17", "gpio18"
638 };
639 static const char * const cci_i2c1_groups[] = {
640 	"gpio19", "gpio20"
641 };
642 static const char * const blsp_i2c4_groups[] = {
643 	"gpio19", "gpio20"
644 };
645 static const char * const cci_timer0_groups[] = {
646 	"gpio21"
647 };
648 static const char * const blsp_spi5_groups[] = {
649 	"gpio21", "gpio22", "gpio23", "gpio24"
650 };
651 static const char * const blsp_uart5_groups[] = {
652 	"gpio21", "gpio22", "gpio23", "gpio24"
653 };
654 static const char * const blsp_uim5_groups[] = {
655 	"gpio21", "gpio22"
656 };
657 static const char * const cci_timer1_groups[] = {
658 	"gpio22"
659 };
660 static const char * const cci_timer2_groups[] = {
661 	"gpio23"
662 };
663 static const char * const blsp_i2c5_groups[] = {
664 	"gpio23", "gpio24"
665 };
666 static const char * const cci_timer3_groups[] = {
667 	"gpio24"
668 };
669 static const char * const cci_async_in1_groups[] = {
670 	"gpio24"
671 };
672 static const char * const cci_timer4_groups[] = {
673 	"gpio25"
674 };
675 static const char * const cci_async_in2_groups[] = {
676 	"gpio25"
677 };
678 static const char * const blsp_spi6_groups[] = {
679 	"gpio25", "gpio26", "gpio27", "gpio28"
680 };
681 static const char * const blsp_uart6_groups[] = {
682 	"gpio25", "gpio26", "gpio27", "gpio28"
683 };
684 static const char * const blsp_uim6_groups[] = {
685 	"gpio25", "gpio26"
686 };
687 static const char * const cci_async_in0_groups[] = {
688 	"gpio26"
689 };
690 static const char * const gp0_clk_groups[] = {
691 	"gpio26"
692 };
693 static const char * const gp1_clk_groups[] = {
694 	"gpio27", "gpio57", "gpio78"
695 };
696 static const char * const blsp_i2c6_groups[] = {
697 	"gpio27", "gpio28"
698 };
699 static const char * const qdss_tracectl_a_groups[] = {
700 	"gpio27",
701 };
702 static const char * const qdss_traceclk_a_groups[] = {
703 	"gpio28",
704 };
705 static const char * const gp_mn_groups[] = {
706 	"gpio29"
707 };
708 static const char * const hdmi_cec_groups[] = {
709 	"gpio31"
710 };
711 static const char * const hdmi_ddc_groups[] = {
712 	"gpio32", "gpio33"
713 };
714 static const char * const hdmi_hpd_groups[] = {
715 	"gpio34"
716 };
717 static const char * const uim3_groups[] = {
718 	"gpio35", "gpio36", "gpio37", "gpio38"
719 };
720 static const char * const pci_e1_groups[] = {
721 	"gpio35", "gpio36",
722 };
723 static const char * const blsp_spi7_groups[] = {
724 	"gpio41", "gpio42", "gpio43", "gpio44"
725 };
726 static const char * const blsp_uart7_groups[] = {
727 	"gpio41", "gpio42", "gpio43", "gpio44"
728 };
729 static const char * const blsp_uim7_groups[] = {
730 	"gpio41", "gpio42"
731 };
732 static const char * const qdss_cti_trig_out_c_groups[] = {
733 	"gpio41",
734 };
735 static const char * const qdss_cti_trig_in_c_groups[] = {
736 	"gpio42",
737 };
738 static const char * const blsp_i2c7_groups[] = {
739 	"gpio43", "gpio44"
740 };
741 static const char * const blsp_spi8_groups[] = {
742 	"gpio45", "gpio46", "gpio47", "gpio48"
743 };
744 static const char * const blsp_uart8_groups[] = {
745 	"gpio45", "gpio46", "gpio47", "gpio48"
746 };
747 static const char * const blsp_uim8_groups[] = {
748 	"gpio45", "gpio46"
749 };
750 static const char * const blsp_i2c8_groups[] = {
751 	"gpio47", "gpio48"
752 };
753 static const char * const blsp_spi10_cs1_groups[] = {
754 	"gpio47", "gpio67"
755 };
756 static const char * const blsp_spi10_cs2_groups[] = {
757 	"gpio48", "gpio68"
758 };
759 static const char * const uim2_groups[] = {
760 	"gpio49", "gpio50", "gpio51", "gpio52"
761 };
762 static const char * const blsp_spi9_groups[] = {
763 	"gpio49", "gpio50", "gpio51", "gpio52"
764 };
765 static const char * const blsp_uart9_groups[] = {
766 	"gpio49", "gpio50", "gpio51", "gpio52"
767 };
768 static const char * const blsp_uim9_groups[] = {
769 	"gpio49", "gpio50"
770 };
771 static const char * const blsp_i2c9_groups[] = {
772 	"gpio51", "gpio52"
773 };
774 static const char * const pci_e0_groups[] = {
775 	"gpio53", "gpio54",
776 };
777 static const char * const uim4_groups[] = {
778 	"gpio53", "gpio54", "gpio55", "gpio56"
779 };
780 static const char * const blsp_spi10_groups[] = {
781 	"gpio53", "gpio54", "gpio55", "gpio56"
782 };
783 static const char * const blsp_uart10_groups[] = {
784 	"gpio53", "gpio54", "gpio55", "gpio56"
785 };
786 static const char * const blsp_uim10_groups[] = {
787 	"gpio53", "gpio54"
788 };
789 static const char * const qdss_tracedata_a_groups[] = {
790 	"gpio53", "gpio54", "gpio63", "gpio64", "gpio65",
791 	"gpio66", "gpio67", "gpio74", "gpio75", "gpio76",
792 	"gpio77", "gpio85", "gpio86", "gpio87", "gpio89",
793 	"gpio90"
794 };
795 static const char * const gp_pdm0_groups[] = {
796 	"gpio54", "gpio95"
797 };
798 static const char * const blsp_i2c10_groups[] = {
799 	"gpio55", "gpio56"
800 };
801 static const char * const qdss_cti_trig_in_a_groups[] = {
802 	"gpio55",
803 };
804 static const char * const qdss_cti_trig_out_a_groups[] = {
805 	"gpio56",
806 };
807 static const char * const qua_mi2s_groups[] = {
808 	"gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
809 };
810 static const char * const gcc_gp1_clk_a_groups[] = {
811 	"gpio57"
812 };
813 static const char * const gcc_gp2_clk_a_groups[] = {
814 	"gpio58"
815 };
816 static const char * const gcc_gp3_clk_a_groups[] = {
817 	"gpio59"
818 };
819 static const char * const blsp_spi2_cs1_groups[] = {
820 	"gpio62"
821 };
822 static const char * const blsp_spi2_cs2_groups[] = {
823 	"gpio63"
824 };
825 static const char * const gp_pdm2_groups[] = {
826 	"gpio63", "gpio79"
827 };
828 static const char * const pri_mi2s_groups[] = {
829 	"gpio64", "gpio65", "gpio66", "gpio67", "gpio68"
830 };
831 static const char * const blsp_spi2_cs3_groups[] = {
832 	"gpio66"
833 };
834 static const char * const spkr_i2s_groups[] = {
835 	"gpio69", "gpio70", "gpio71", "gpio72"
836 };
837 static const char * const audio_ref_clk_groups[] = {
838 	"gpio69"
839 };
840 static const char * const slimbus_groups[] = {
841 	"gpio70", "gpio71"
842 };
843 static const char * const ter_mi2s_groups[] = {
844 	"gpio73", "gpio74", "gpio75", "gpio76", "gpio77"
845 };
846 static const char * const gp_pdm1_groups[] = {
847 	"gpio74", "gpio86"
848 };
849 static const char * const sec_mi2s_groups[] = {
850 	"gpio78", "gpio79", "gpio80", "gpio81", "gpio82"
851 };
852 static const char * const gcc_gp1_clk_b_groups[] = {
853 	"gpio78"
854 };
855 static const char * const blsp_spi11_groups[] = {
856 	"gpio81", "gpio82", "gpio83", "gpio84"
857 };
858 static const char * const blsp_uart11_groups[] = {
859 	"gpio81", "gpio82", "gpio83", "gpio84"
860 };
861 static const char * const blsp_uim11_groups[] = {
862 	"gpio81", "gpio82"
863 };
864 static const char * const gcc_gp2_clk_b_groups[] = {
865 	"gpio81"
866 };
867 static const char * const gcc_gp3_clk_b_groups[] = {
868 	"gpio82"
869 };
870 static const char * const blsp_i2c11_groups[] = {
871 	"gpio83", "gpio84"
872 };
873 static const char * const blsp_uart12_groups[] = {
874 	"gpio85", "gpio86", "gpio87", "gpio88"
875 };
876 static const char * const blsp_uim12_groups[] = {
877 	"gpio85", "gpio86"
878 };
879 static const char * const blsp_i2c12_groups[] = {
880 	"gpio87", "gpio88"
881 };
882 static const char * const blsp_spi12_groups[] = {
883 	"gpio85", "gpio86", "gpio87", "gpio88"
884 };
885 static const char * const tsif1_groups[] = {
886 	"gpio89", "gpio90", "gpio91", "gpio110", "gpio111"
887 };
888 static const char * const blsp_spi10_cs3_groups[] = {
889 	"gpio90"
890 };
891 static const char * const sdc4_groups[] = {
892 	"gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96"
893 };
894 static const char * const qdss_traceclk_b_groups[] = {
895 	"gpio91",
896 };
897 static const char * const tsif2_groups[] = {
898 	"gpio92", "gpio93", "gpio94", "gpio95", "gpio96"
899 };
900 static const char * const qdss_tracectl_b_groups[] = {
901 	"gpio94",
902 };
903 static const char * const qdss_cti_trig_out_d_groups[] = {
904 	"gpio95",
905 };
906 static const char * const qdss_cti_trig_in_d_groups[] = {
907 	"gpio96",
908 };
909 static const char * const uim1_groups[] = {
910 	"gpio97", "gpio98", "gpio99", "gpio100"
911 };
912 static const char * const uim_batt_alarm_groups[] = {
913 	"gpio101"
914 };
915 static const char * const blsp11_uart_tx_b_groups[] = {
916 	"gpio111"
917 };
918 static const char * const blsp11_uart_rx_b_groups[] = {
919 	"gpio112"
920 };
921 static const char * const blsp11_i2c_sda_b_groups[] = {
922 	"gpio113"
923 };
924 static const char * const blsp11_i2c_scl_b_groups[] = {
925 	"gpio114"
926 };
927 static const char * const gsm_tx_groups[] = {
928 	"gpio126", "gpio131", "gpio132", "gpio133"
929 };
930 static const char * const nav_tsync_groups[] = {
931 	"gpio127"
932 };
933 static const char * const nav_pps_groups[] = {
934 	"gpio127"
935 };
936 static const char * const gps_tx_groups[] = {
937 	"gpio130"
938 };
939 static const char * const mss_lte_groups[] = {
940 	"gpio134", "gpio135"
941 };
942 
943 static const struct pinfunction msm8994_functions[] = {
944 	MSM_PIN_FUNCTION(audio_ref_clk),
945 	MSM_PIN_FUNCTION(blsp_i2c1),
946 	MSM_PIN_FUNCTION(blsp_i2c2),
947 	MSM_PIN_FUNCTION(blsp_i2c3),
948 	MSM_PIN_FUNCTION(blsp_i2c4),
949 	MSM_PIN_FUNCTION(blsp_i2c5),
950 	MSM_PIN_FUNCTION(blsp_i2c6),
951 	MSM_PIN_FUNCTION(blsp_i2c7),
952 	MSM_PIN_FUNCTION(blsp_i2c8),
953 	MSM_PIN_FUNCTION(blsp_i2c9),
954 	MSM_PIN_FUNCTION(blsp_i2c10),
955 	MSM_PIN_FUNCTION(blsp_i2c11),
956 	MSM_PIN_FUNCTION(blsp_i2c12),
957 	MSM_PIN_FUNCTION(blsp_spi1),
958 	MSM_PIN_FUNCTION(blsp_spi1_cs1),
959 	MSM_PIN_FUNCTION(blsp_spi1_cs2),
960 	MSM_PIN_FUNCTION(blsp_spi1_cs3),
961 	MSM_PIN_FUNCTION(blsp_spi2),
962 	MSM_PIN_FUNCTION(blsp_spi2_cs1),
963 	MSM_PIN_FUNCTION(blsp_spi2_cs2),
964 	MSM_PIN_FUNCTION(blsp_spi2_cs3),
965 	MSM_PIN_FUNCTION(blsp_spi3),
966 	MSM_PIN_FUNCTION(blsp_spi4),
967 	MSM_PIN_FUNCTION(blsp_spi5),
968 	MSM_PIN_FUNCTION(blsp_spi6),
969 	MSM_PIN_FUNCTION(blsp_spi7),
970 	MSM_PIN_FUNCTION(blsp_spi8),
971 	MSM_PIN_FUNCTION(blsp_spi9),
972 	MSM_PIN_FUNCTION(blsp_spi10),
973 	MSM_PIN_FUNCTION(blsp_spi10_cs1),
974 	MSM_PIN_FUNCTION(blsp_spi10_cs2),
975 	MSM_PIN_FUNCTION(blsp_spi10_cs3),
976 	MSM_PIN_FUNCTION(blsp_spi11),
977 	MSM_PIN_FUNCTION(blsp_spi12),
978 	MSM_PIN_FUNCTION(blsp_uart1),
979 	MSM_PIN_FUNCTION(blsp_uart2),
980 	MSM_PIN_FUNCTION(blsp_uart3),
981 	MSM_PIN_FUNCTION(blsp_uart4),
982 	MSM_PIN_FUNCTION(blsp_uart5),
983 	MSM_PIN_FUNCTION(blsp_uart6),
984 	MSM_PIN_FUNCTION(blsp_uart7),
985 	MSM_PIN_FUNCTION(blsp_uart8),
986 	MSM_PIN_FUNCTION(blsp_uart9),
987 	MSM_PIN_FUNCTION(blsp_uart10),
988 	MSM_PIN_FUNCTION(blsp_uart11),
989 	MSM_PIN_FUNCTION(blsp_uart12),
990 	MSM_PIN_FUNCTION(blsp_uim1),
991 	MSM_PIN_FUNCTION(blsp_uim2),
992 	MSM_PIN_FUNCTION(blsp_uim3),
993 	MSM_PIN_FUNCTION(blsp_uim4),
994 	MSM_PIN_FUNCTION(blsp_uim5),
995 	MSM_PIN_FUNCTION(blsp_uim6),
996 	MSM_PIN_FUNCTION(blsp_uim7),
997 	MSM_PIN_FUNCTION(blsp_uim8),
998 	MSM_PIN_FUNCTION(blsp_uim9),
999 	MSM_PIN_FUNCTION(blsp_uim10),
1000 	MSM_PIN_FUNCTION(blsp_uim11),
1001 	MSM_PIN_FUNCTION(blsp_uim12),
1002 	MSM_PIN_FUNCTION(blsp11_i2c_scl_b),
1003 	MSM_PIN_FUNCTION(blsp11_i2c_sda_b),
1004 	MSM_PIN_FUNCTION(blsp11_uart_rx_b),
1005 	MSM_PIN_FUNCTION(blsp11_uart_tx_b),
1006 	MSM_PIN_FUNCTION(cam_mclk0),
1007 	MSM_PIN_FUNCTION(cam_mclk1),
1008 	MSM_PIN_FUNCTION(cam_mclk2),
1009 	MSM_PIN_FUNCTION(cam_mclk3),
1010 	MSM_PIN_FUNCTION(cci_async_in0),
1011 	MSM_PIN_FUNCTION(cci_async_in1),
1012 	MSM_PIN_FUNCTION(cci_async_in2),
1013 	MSM_PIN_FUNCTION(cci_i2c0),
1014 	MSM_PIN_FUNCTION(cci_i2c1),
1015 	MSM_PIN_FUNCTION(cci_timer0),
1016 	MSM_PIN_FUNCTION(cci_timer1),
1017 	MSM_PIN_FUNCTION(cci_timer2),
1018 	MSM_PIN_FUNCTION(cci_timer3),
1019 	MSM_PIN_FUNCTION(cci_timer4),
1020 	MSM_PIN_FUNCTION(gcc_gp1_clk_a),
1021 	MSM_PIN_FUNCTION(gcc_gp1_clk_b),
1022 	MSM_PIN_FUNCTION(gcc_gp2_clk_a),
1023 	MSM_PIN_FUNCTION(gcc_gp2_clk_b),
1024 	MSM_PIN_FUNCTION(gcc_gp3_clk_a),
1025 	MSM_PIN_FUNCTION(gcc_gp3_clk_b),
1026 	MSM_PIN_FUNCTION(gp_mn),
1027 	MSM_PIN_FUNCTION(gp_pdm0),
1028 	MSM_PIN_FUNCTION(gp_pdm1),
1029 	MSM_PIN_FUNCTION(gp_pdm2),
1030 	MSM_PIN_FUNCTION(gp0_clk),
1031 	MSM_PIN_FUNCTION(gp1_clk),
1032 	MSM_PIN_FUNCTION(gps_tx),
1033 	MSM_PIN_FUNCTION(gsm_tx),
1034 	MSM_PIN_FUNCTION(hdmi_cec),
1035 	MSM_PIN_FUNCTION(hdmi_ddc),
1036 	MSM_PIN_FUNCTION(hdmi_hpd),
1037 	MSM_PIN_FUNCTION(hdmi_rcv),
1038 	MSM_PIN_FUNCTION(mdp_vsync),
1039 	MSM_PIN_FUNCTION(mss_lte),
1040 	MSM_PIN_FUNCTION(nav_pps),
1041 	MSM_PIN_FUNCTION(nav_tsync),
1042 	MSM_PIN_FUNCTION(qdss_cti_trig_in_a),
1043 	MSM_PIN_FUNCTION(qdss_cti_trig_in_b),
1044 	MSM_PIN_FUNCTION(qdss_cti_trig_in_c),
1045 	MSM_PIN_FUNCTION(qdss_cti_trig_in_d),
1046 	MSM_PIN_FUNCTION(qdss_cti_trig_out_a),
1047 	MSM_PIN_FUNCTION(qdss_cti_trig_out_b),
1048 	MSM_PIN_FUNCTION(qdss_cti_trig_out_c),
1049 	MSM_PIN_FUNCTION(qdss_cti_trig_out_d),
1050 	MSM_PIN_FUNCTION(qdss_traceclk_a),
1051 	MSM_PIN_FUNCTION(qdss_traceclk_b),
1052 	MSM_PIN_FUNCTION(qdss_tracectl_a),
1053 	MSM_PIN_FUNCTION(qdss_tracectl_b),
1054 	MSM_PIN_FUNCTION(qdss_tracedata_a),
1055 	MSM_PIN_FUNCTION(qdss_tracedata_b),
1056 	MSM_PIN_FUNCTION(qua_mi2s),
1057 	MSM_PIN_FUNCTION(pci_e0),
1058 	MSM_PIN_FUNCTION(pci_e1),
1059 	MSM_PIN_FUNCTION(pri_mi2s),
1060 	MSM_PIN_FUNCTION(sdc4),
1061 	MSM_PIN_FUNCTION(sec_mi2s),
1062 	MSM_PIN_FUNCTION(slimbus),
1063 	MSM_PIN_FUNCTION(spkr_i2s),
1064 	MSM_PIN_FUNCTION(ter_mi2s),
1065 	MSM_PIN_FUNCTION(tsif1),
1066 	MSM_PIN_FUNCTION(tsif2),
1067 	MSM_PIN_FUNCTION(uim_batt_alarm),
1068 	MSM_PIN_FUNCTION(uim1),
1069 	MSM_PIN_FUNCTION(uim2),
1070 	MSM_PIN_FUNCTION(uim3),
1071 	MSM_PIN_FUNCTION(uim4),
1072 	MSM_GPIO_PIN_FUNCTION(gpio),
1073 };
1074 
1075 static const struct msm_pingroup msm8994_groups[] = {
1076 	PINGROUP(0,   blsp_spi1, blsp_uart1, blsp_uim1, hdmi_rcv, NA, NA, NA,
1077 		 NA, NA, NA, NA),
1078 	PINGROUP(1,   blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA, NA, NA,
1079 		 NA, NA),
1080 	PINGROUP(2,   blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA, NA, NA,
1081 		 NA, NA),
1082 	PINGROUP(3,   blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA, NA, NA,
1083 		 NA, NA),
1084 	PINGROUP(4,   blsp_spi2, blsp_uart2, blsp_uim2, NA, qdss_cti_trig_out_b,
1085 		 NA, NA, NA, NA, NA, NA),
1086 	PINGROUP(5,   blsp_spi2, blsp_uart2, blsp_uim2, NA, qdss_cti_trig_in_b,
1087 		 NA, NA, NA, NA, NA, NA),
1088 	PINGROUP(6,   blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA, NA, NA,
1089 		 NA, NA),
1090 	PINGROUP(7,   blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA, NA, NA,
1091 		 NA, NA),
1092 	PINGROUP(8,   blsp_spi3, blsp_uart3, blsp_uim3, blsp_spi1_cs1, NA, NA,
1093 		 NA, NA, NA, NA, NA),
1094 	PINGROUP(9,   blsp_spi3, blsp_uart3, blsp_uim3, blsp_spi1_cs2, NA, NA,
1095 		 NA, NA, NA, NA, NA),
1096 	PINGROUP(10,  mdp_vsync, blsp_spi3, blsp_uart3, blsp_i2c3,
1097 		 blsp_spi1_cs3, NA, NA, NA, NA, NA, NA),
1098 	PINGROUP(11,  mdp_vsync, blsp_spi3, blsp_uart3, blsp_i2c3,
1099 		 blsp_spi1_cs2, NA, NA, NA, NA, NA, NA),
1100 	PINGROUP(12,  mdp_vsync, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1101 	PINGROUP(13,  cam_mclk0, NA, NA, qdss_tracedata_b, NA, NA, NA, NA, NA,
1102 		 NA, NA),
1103 	PINGROUP(14,  cam_mclk1, NA, NA, qdss_tracedata_b, NA, NA, NA, NA, NA,
1104 		 NA, NA),
1105 	PINGROUP(15,  cam_mclk2, NA, qdss_tracedata_b, NA, NA, NA, NA, NA, NA,
1106 		 NA, NA),
1107 	PINGROUP(16,  cam_mclk3, NA, qdss_tracedata_b, NA, NA, NA, NA, NA, NA,
1108 		 NA, NA),
1109 	PINGROUP(17,  cci_i2c0, blsp_spi4, blsp_uart4, blsp_uim4, NA,
1110 		 qdss_tracedata_b, NA, NA, NA, NA, NA),
1111 	PINGROUP(18,  cci_i2c0, blsp_spi4, blsp_uart4, blsp_uim4, NA,
1112 		 qdss_tracedata_b, NA, NA, NA, NA, NA),
1113 	PINGROUP(19,  cci_i2c1, blsp_spi4, blsp_uart4, blsp_i2c4, NA,
1114 		 qdss_tracedata_b, NA, NA, NA, NA, NA),
1115 	PINGROUP(20,  cci_i2c1, blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA,
1116 		 NA, NA, NA, NA),
1117 	PINGROUP(21,  cci_timer0, blsp_spi5, blsp_uart5, blsp_uim5, NA,
1118 		 qdss_tracedata_b, NA, NA, NA, NA, NA),
1119 	PINGROUP(22,  cci_timer1, blsp_spi5, blsp_uart5, blsp_uim5, NA,
1120 		 qdss_tracedata_b, NA, NA, NA, NA, NA),
1121 	PINGROUP(23,  cci_timer2, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA,
1122 		 qdss_tracedata_b, NA, NA, NA, NA),
1123 	PINGROUP(24,  cci_timer3, cci_async_in1, blsp_spi5, blsp_uart5,
1124 		 blsp_i2c5, NA, NA, NA, NA, NA, NA),
1125 	PINGROUP(25,  cci_timer4, cci_async_in2, blsp_spi6, blsp_uart6,
1126 		 blsp_uim6, NA, NA, qdss_tracedata_b, NA, NA, NA),
1127 	PINGROUP(26,  cci_async_in0, blsp_spi6, blsp_uart6, blsp_uim6, gp0_clk,
1128 		 NA, qdss_tracedata_b, NA, NA, NA, NA),
1129 	PINGROUP(27,  blsp_spi6, blsp_uart6, blsp_i2c6, gp1_clk,
1130 		 qdss_tracectl_a, NA, NA, NA, NA, NA, NA),
1131 	PINGROUP(28,  blsp_spi6, blsp_uart6, blsp_i2c6, qdss_traceclk_a, NA,
1132 		 NA, NA, NA, NA, NA, NA),
1133 	PINGROUP(29,  gp_mn, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1134 	PINGROUP(30,  NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1135 	PINGROUP(31,  hdmi_cec, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1136 	PINGROUP(32,  hdmi_ddc, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1137 	PINGROUP(33,  hdmi_ddc, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1138 	PINGROUP(34,  hdmi_hpd, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1139 	PINGROUP(35,  uim3, pci_e1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1140 	PINGROUP(36,  uim3, pci_e1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1141 	PINGROUP(37,  uim3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1142 	PINGROUP(38,  uim3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1143 	PINGROUP(39,  NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1144 	PINGROUP(40,  NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1145 	PINGROUP(41,  blsp_spi7, blsp_uart7, blsp_uim7, qdss_cti_trig_out_c,
1146 		 NA, NA, NA, NA, NA, NA, NA),
1147 	PINGROUP(42,  blsp_spi7, blsp_uart7, blsp_uim7, qdss_cti_trig_in_c, NA,
1148 		 NA, NA, NA, NA, NA, NA),
1149 	PINGROUP(43,  blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA, NA, NA, NA,
1150 		 NA, NA),
1151 	PINGROUP(44,  blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA, NA, NA, NA,
1152 		 NA, NA),
1153 	PINGROUP(45,  blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA, NA, NA,
1154 		 NA, NA),
1155 	PINGROUP(46,  blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA, NA, NA,
1156 		 NA, NA),
1157 	PINGROUP(47,  blsp_spi8, blsp_uart8, blsp_i2c8, blsp_spi10_cs1, NA, NA,
1158 		 NA, NA, NA, NA, NA),
1159 	PINGROUP(48,  blsp_spi8, blsp_uart8, blsp_i2c8, blsp_spi10_cs2, NA, NA,
1160 		 NA, NA, NA, NA, NA),
1161 	PINGROUP(49,  uim2, blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA, NA,
1162 		 NA, NA, NA),
1163 	PINGROUP(50,  uim2, blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA, NA,
1164 		 NA, NA, NA),
1165 	PINGROUP(51,  uim2, blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA, NA,
1166 		 NA, NA, NA),
1167 	PINGROUP(52,  uim2, blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA, NA,
1168 		 NA, NA, NA),
1169 	PINGROUP(53,  uim4, pci_e0, blsp_spi10, blsp_uart10, blsp_uim10, NA,
1170 		 NA, qdss_tracedata_a, NA, NA, NA),
1171 	PINGROUP(54,  uim4, pci_e0, blsp_spi10, blsp_uart10, blsp_uim10,
1172 		 gp_pdm0, NA, NA, qdss_tracedata_a, NA, NA),
1173 	PINGROUP(55,  uim4, blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA, NA,
1174 		 qdss_cti_trig_in_a, NA, NA, NA),
1175 	PINGROUP(56,  uim4, blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA,
1176 		 qdss_cti_trig_out_a, NA, NA, NA, NA),
1177 	PINGROUP(57,  qua_mi2s, gcc_gp1_clk_a, NA, NA, qdss_tracedata_b, NA, NA,
1178 		 NA, NA, NA, NA),
1179 	PINGROUP(58,  qua_mi2s, gcc_gp2_clk_a, NA, NA, qdss_tracedata_b, NA, NA,
1180 		 NA, NA, NA, NA),
1181 	PINGROUP(59,  qua_mi2s, gcc_gp3_clk_a, NA, NA, NA, NA, NA, NA, NA, NA,
1182 		 NA),
1183 	PINGROUP(60,  qua_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1184 	PINGROUP(61,  qua_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1185 	PINGROUP(62,  qua_mi2s, blsp_spi2_cs1, NA, NA, NA, NA, NA, NA, NA, NA,
1186 		 NA),
1187 	PINGROUP(63,  qua_mi2s, blsp_spi2_cs2, gp_pdm2, NA, NA, NA, NA, NA,
1188 		 qdss_tracedata_a, NA, NA),
1189 	PINGROUP(64,  pri_mi2s, NA, NA, NA, qdss_tracedata_a, NA, NA, NA, NA,
1190 		 NA, NA),
1191 	PINGROUP(65,  pri_mi2s, NA, NA, NA, qdss_tracedata_a, NA, NA, NA, NA,
1192 		 NA, NA),
1193 	PINGROUP(66,  pri_mi2s, blsp_spi2_cs3, NA, NA, NA, qdss_tracedata_a,
1194 		 NA, NA, NA, NA, NA),
1195 	PINGROUP(67,  pri_mi2s, blsp_spi10_cs1, NA, NA, NA, qdss_tracedata_a,
1196 		 NA, NA, NA, NA, NA),
1197 	PINGROUP(68,  pri_mi2s, blsp_spi10_cs2, NA, NA, NA, NA, NA, NA, NA, NA,
1198 		 NA),
1199 	PINGROUP(69,  spkr_i2s, audio_ref_clk, NA, NA, NA, NA, NA, NA, NA, NA,
1200 		 NA),
1201 	PINGROUP(70,  slimbus, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1202 	PINGROUP(71,  slimbus, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1203 	PINGROUP(72,  spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1204 	PINGROUP(73,  ter_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1205 	PINGROUP(74,  ter_mi2s, gp_pdm1, NA, NA, NA, qdss_tracedata_a, NA, NA,
1206 		 NA, NA, NA),
1207 	PINGROUP(75,  ter_mi2s, NA, NA, qdss_tracedata_a, NA, NA, NA, NA, NA,
1208 		 NA, NA),
1209 	PINGROUP(76,  ter_mi2s, NA, NA, qdss_tracedata_a, NA, NA, NA, NA, NA,
1210 		 NA, NA),
1211 	PINGROUP(77,  ter_mi2s, NA, NA, qdss_tracedata_a, NA, NA, NA, NA, NA,
1212 		 NA, NA),
1213 	PINGROUP(78,  sec_mi2s, gcc_gp1_clk_b, NA, NA, NA, NA, NA, NA, NA, NA,
1214 		 NA),
1215 	PINGROUP(79,  sec_mi2s, gp_pdm2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1216 	PINGROUP(80,  sec_mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1217 	PINGROUP(81,  sec_mi2s, blsp_spi11, blsp_uart11, blsp_uim11,
1218 		 gcc_gp2_clk_b, NA, NA, NA, NA, NA, NA),
1219 	PINGROUP(82,  sec_mi2s, blsp_spi11, blsp_uart11, blsp_uim11,
1220 		 gcc_gp3_clk_b, NA, NA, NA, NA, NA, NA),
1221 	PINGROUP(83,  blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA, NA,
1222 		 NA, NA, NA),
1223 	PINGROUP(84,  blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA, NA,
1224 		 NA, NA, NA),
1225 	PINGROUP(85,  blsp_spi12, blsp_uart12, blsp_uim12, NA, NA,
1226 		 qdss_tracedata_a, NA, NA, NA, NA, NA),
1227 	PINGROUP(86,  blsp_spi12, blsp_uart12, blsp_uim12, gp_pdm1, NA,
1228 		 qdss_tracedata_a, NA, NA, NA, NA, NA),
1229 	PINGROUP(87,  blsp_spi12, blsp_uart12, blsp_i2c12, NA,
1230 		 qdss_tracedata_a, NA, NA, NA, NA, NA, NA),
1231 	PINGROUP(88,  blsp_spi12, blsp_uart12, blsp_i2c12, NA, NA, NA, NA, NA,
1232 		 NA, NA, NA),
1233 	PINGROUP(89,  tsif1, NA, qdss_tracedata_a, NA, NA, NA, NA, NA, NA, NA,
1234 		 NA),
1235 	PINGROUP(90,  tsif1, blsp_spi10_cs3, qdss_tracedata_a, NA, NA, NA, NA,
1236 		 NA, NA, NA, NA),
1237 	PINGROUP(91,  tsif1, sdc4, NA, NA, NA, NA, qdss_traceclk_b, NA, NA, NA,
1238 		 NA),
1239 	PINGROUP(92,  tsif2, sdc4, NA, NA, qdss_tracedata_b, NA, NA, NA, NA,
1240 		 NA, NA),
1241 	PINGROUP(93,  tsif2, sdc4, NA, NA, NA, NA, qdss_tracedata_b, NA, NA,
1242 		 NA, NA),
1243 	PINGROUP(94,  tsif2, sdc4, NA, NA, NA, NA, qdss_tracectl_b, NA, NA, NA,
1244 		 NA),
1245 	PINGROUP(95,  tsif2, sdc4, gp_pdm0, NA, NA, NA, qdss_cti_trig_out_d,
1246 		 NA, NA, NA, NA),
1247 	PINGROUP(96,  tsif2, sdc4, qdss_cti_trig_in_d, NA, NA, NA, NA, NA, NA,
1248 		 NA, NA),
1249 	PINGROUP(97,  uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1250 	PINGROUP(98,  uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1251 	PINGROUP(99,  uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1252 	PINGROUP(100, uim1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1253 	PINGROUP(101, uim_batt_alarm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1254 	PINGROUP(102, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1255 	PINGROUP(103, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1256 	PINGROUP(104, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1257 	PINGROUP(105, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1258 	PINGROUP(106, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1259 	PINGROUP(107, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1260 	PINGROUP(108, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1261 	PINGROUP(109, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1262 	PINGROUP(110, tsif1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1263 	PINGROUP(111, tsif1, blsp11_uart_tx_b, NA, NA, NA, NA, NA, NA, NA, NA,
1264 		 NA),
1265 	PINGROUP(112, blsp11_uart_rx_b, NA, NA, NA, NA, NA, NA, NA, NA, NA,
1266 		 NA),
1267 	PINGROUP(113, blsp11_i2c_sda_b, NA, NA, NA, NA, NA, NA, NA, NA, NA,
1268 		 NA),
1269 	PINGROUP(114, blsp11_i2c_scl_b, NA, NA, NA, NA, NA, NA, NA, NA, NA,
1270 		 NA),
1271 	PINGROUP(115, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1272 	PINGROUP(116, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1273 	PINGROUP(117, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1274 	PINGROUP(118, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1275 	PINGROUP(119, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1276 	PINGROUP(120, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1277 	PINGROUP(121, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1278 	PINGROUP(122, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1279 	PINGROUP(123, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1280 	PINGROUP(124, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1281 	PINGROUP(125, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1282 	PINGROUP(126, NA, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1283 	PINGROUP(127, NA, nav_tsync, nav_pps, NA, NA, NA, NA, NA, NA, NA,
1284 		 NA),
1285 	PINGROUP(128, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1286 	PINGROUP(129, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1287 	PINGROUP(130, gps_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1288 	PINGROUP(131, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1289 	PINGROUP(132, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1290 	PINGROUP(133, gsm_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1291 	PINGROUP(134, mss_lte, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1292 	PINGROUP(135, mss_lte, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1293 	PINGROUP(136, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1294 	PINGROUP(137, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1295 	PINGROUP(138, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1296 	PINGROUP(139, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1297 	PINGROUP(140, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1298 	PINGROUP(141, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1299 	PINGROUP(142, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1300 	PINGROUP(143, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1301 	PINGROUP(144, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1302 	PINGROUP(145, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1303 	SDC_PINGROUP(sdc1_rclk, 0x2044, 15, 0),
1304 	SDC_PINGROUP(sdc1_clk, 0x2044, 13, 6),
1305 	SDC_PINGROUP(sdc1_cmd, 0x2044, 11, 3),
1306 	SDC_PINGROUP(sdc1_data, 0x2044, 9, 0),
1307 	SDC_PINGROUP(sdc2_clk, 0x2048, 14, 6),
1308 	SDC_PINGROUP(sdc2_cmd, 0x2048, 11, 3),
1309 	SDC_PINGROUP(sdc2_data, 0x2048, 9, 0),
1310 	SDC_PINGROUP(sdc3_clk, 0x206c, 14, 6),
1311 	SDC_PINGROUP(sdc3_cmd, 0x206c, 11, 3),
1312 	SDC_PINGROUP(sdc3_data, 0x206c, 9, 0),
1313 };
1314 
1315 #define NUM_GPIO_PINGROUPS 146
1316 
1317 static const struct msm_pinctrl_soc_data msm8994_pinctrl = {
1318 	.pins = msm8994_pins,
1319 	.npins = ARRAY_SIZE(msm8994_pins),
1320 	.functions = msm8994_functions,
1321 	.nfunctions = ARRAY_SIZE(msm8994_functions),
1322 	.groups = msm8994_groups,
1323 	.ngroups = ARRAY_SIZE(msm8994_groups),
1324 	.ngpios = NUM_GPIO_PINGROUPS,
1325 };
1326 
1327 static int msm8994_pinctrl_probe(struct platform_device *pdev)
1328 {
1329 	return msm_pinctrl_probe(pdev, &msm8994_pinctrl);
1330 }
1331 
1332 static const struct of_device_id msm8994_pinctrl_of_match[] = {
1333 	{ .compatible = "qcom,msm8992-pinctrl", },
1334 	{ .compatible = "qcom,msm8994-pinctrl", },
1335 	{ }
1336 };
1337 MODULE_DEVICE_TABLE(of, msm8994_pinctrl_of_match);
1338 
1339 static struct platform_driver msm8994_pinctrl_driver = {
1340 	.driver = {
1341 		.name = "msm8994-pinctrl",
1342 		.of_match_table = msm8994_pinctrl_of_match,
1343 	},
1344 	.probe = msm8994_pinctrl_probe,
1345 };
1346 
1347 static int __init msm8994_pinctrl_init(void)
1348 {
1349 	return platform_driver_register(&msm8994_pinctrl_driver);
1350 }
1351 arch_initcall(msm8994_pinctrl_init);
1352 
1353 static void __exit msm8994_pinctrl_exit(void)
1354 {
1355 	platform_driver_unregister(&msm8994_pinctrl_driver);
1356 }
1357 module_exit(msm8994_pinctrl_exit);
1358 
1359 MODULE_DESCRIPTION("Qualcomm MSM8994 pinctrl driver");
1360 MODULE_LICENSE("GPL v2");
1361