xref: /linux/drivers/pinctrl/qcom/pinctrl-msm8226.c (revision 24bce201d79807b668bf9d9e0aca801c5c0d5f78)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2020, The Linux Foundation. All rights reserved.
4  */
5 
6 #include <linux/module.h>
7 #include <linux/of.h>
8 #include <linux/platform_device.h>
9 #include <linux/pinctrl/pinctrl.h>
10 
11 #include "pinctrl-msm.h"
12 
13 static const struct pinctrl_pin_desc msm8226_pins[] = {
14 	PINCTRL_PIN(0, "GPIO_0"),
15 	PINCTRL_PIN(1, "GPIO_1"),
16 	PINCTRL_PIN(2, "GPIO_2"),
17 	PINCTRL_PIN(3, "GPIO_3"),
18 	PINCTRL_PIN(4, "GPIO_4"),
19 	PINCTRL_PIN(5, "GPIO_5"),
20 	PINCTRL_PIN(6, "GPIO_6"),
21 	PINCTRL_PIN(7, "GPIO_7"),
22 	PINCTRL_PIN(8, "GPIO_8"),
23 	PINCTRL_PIN(9, "GPIO_9"),
24 	PINCTRL_PIN(10, "GPIO_10"),
25 	PINCTRL_PIN(11, "GPIO_11"),
26 	PINCTRL_PIN(12, "GPIO_12"),
27 	PINCTRL_PIN(13, "GPIO_13"),
28 	PINCTRL_PIN(14, "GPIO_14"),
29 	PINCTRL_PIN(15, "GPIO_15"),
30 	PINCTRL_PIN(16, "GPIO_16"),
31 	PINCTRL_PIN(17, "GPIO_17"),
32 	PINCTRL_PIN(18, "GPIO_18"),
33 	PINCTRL_PIN(19, "GPIO_19"),
34 	PINCTRL_PIN(20, "GPIO_20"),
35 	PINCTRL_PIN(21, "GPIO_21"),
36 	PINCTRL_PIN(22, "GPIO_22"),
37 	PINCTRL_PIN(23, "GPIO_23"),
38 	PINCTRL_PIN(24, "GPIO_24"),
39 	PINCTRL_PIN(25, "GPIO_25"),
40 	PINCTRL_PIN(26, "GPIO_26"),
41 	PINCTRL_PIN(27, "GPIO_27"),
42 	PINCTRL_PIN(28, "GPIO_28"),
43 	PINCTRL_PIN(29, "GPIO_29"),
44 	PINCTRL_PIN(30, "GPIO_30"),
45 	PINCTRL_PIN(31, "GPIO_31"),
46 	PINCTRL_PIN(32, "GPIO_32"),
47 	PINCTRL_PIN(33, "GPIO_33"),
48 	PINCTRL_PIN(34, "GPIO_34"),
49 	PINCTRL_PIN(35, "GPIO_35"),
50 	PINCTRL_PIN(36, "GPIO_36"),
51 	PINCTRL_PIN(37, "GPIO_37"),
52 	PINCTRL_PIN(38, "GPIO_38"),
53 	PINCTRL_PIN(39, "GPIO_39"),
54 	PINCTRL_PIN(40, "GPIO_40"),
55 	PINCTRL_PIN(41, "GPIO_41"),
56 	PINCTRL_PIN(42, "GPIO_42"),
57 	PINCTRL_PIN(43, "GPIO_43"),
58 	PINCTRL_PIN(44, "GPIO_44"),
59 	PINCTRL_PIN(45, "GPIO_45"),
60 	PINCTRL_PIN(46, "GPIO_46"),
61 	PINCTRL_PIN(47, "GPIO_47"),
62 	PINCTRL_PIN(48, "GPIO_48"),
63 	PINCTRL_PIN(49, "GPIO_49"),
64 	PINCTRL_PIN(50, "GPIO_50"),
65 	PINCTRL_PIN(51, "GPIO_51"),
66 	PINCTRL_PIN(52, "GPIO_52"),
67 	PINCTRL_PIN(53, "GPIO_53"),
68 	PINCTRL_PIN(54, "GPIO_54"),
69 	PINCTRL_PIN(55, "GPIO_55"),
70 	PINCTRL_PIN(56, "GPIO_56"),
71 	PINCTRL_PIN(57, "GPIO_57"),
72 	PINCTRL_PIN(58, "GPIO_58"),
73 	PINCTRL_PIN(59, "GPIO_59"),
74 	PINCTRL_PIN(60, "GPIO_60"),
75 	PINCTRL_PIN(61, "GPIO_61"),
76 	PINCTRL_PIN(62, "GPIO_62"),
77 	PINCTRL_PIN(63, "GPIO_63"),
78 	PINCTRL_PIN(64, "GPIO_64"),
79 	PINCTRL_PIN(65, "GPIO_65"),
80 	PINCTRL_PIN(66, "GPIO_66"),
81 	PINCTRL_PIN(67, "GPIO_67"),
82 	PINCTRL_PIN(68, "GPIO_68"),
83 	PINCTRL_PIN(69, "GPIO_69"),
84 	PINCTRL_PIN(70, "GPIO_70"),
85 	PINCTRL_PIN(71, "GPIO_71"),
86 	PINCTRL_PIN(72, "GPIO_72"),
87 	PINCTRL_PIN(73, "GPIO_73"),
88 	PINCTRL_PIN(74, "GPIO_74"),
89 	PINCTRL_PIN(75, "GPIO_75"),
90 	PINCTRL_PIN(76, "GPIO_76"),
91 	PINCTRL_PIN(77, "GPIO_77"),
92 	PINCTRL_PIN(78, "GPIO_78"),
93 	PINCTRL_PIN(79, "GPIO_79"),
94 	PINCTRL_PIN(80, "GPIO_80"),
95 	PINCTRL_PIN(81, "GPIO_81"),
96 	PINCTRL_PIN(82, "GPIO_82"),
97 	PINCTRL_PIN(83, "GPIO_83"),
98 	PINCTRL_PIN(84, "GPIO_84"),
99 	PINCTRL_PIN(85, "GPIO_85"),
100 	PINCTRL_PIN(86, "GPIO_86"),
101 	PINCTRL_PIN(87, "GPIO_87"),
102 	PINCTRL_PIN(88, "GPIO_88"),
103 	PINCTRL_PIN(89, "GPIO_89"),
104 	PINCTRL_PIN(90, "GPIO_90"),
105 	PINCTRL_PIN(91, "GPIO_91"),
106 	PINCTRL_PIN(92, "GPIO_92"),
107 	PINCTRL_PIN(93, "GPIO_93"),
108 	PINCTRL_PIN(94, "GPIO_94"),
109 	PINCTRL_PIN(95, "GPIO_95"),
110 	PINCTRL_PIN(96, "GPIO_96"),
111 	PINCTRL_PIN(97, "GPIO_97"),
112 	PINCTRL_PIN(98, "GPIO_98"),
113 	PINCTRL_PIN(99, "GPIO_99"),
114 	PINCTRL_PIN(100, "GPIO_100"),
115 	PINCTRL_PIN(101, "GPIO_101"),
116 	PINCTRL_PIN(102, "GPIO_102"),
117 	PINCTRL_PIN(103, "GPIO_103"),
118 	PINCTRL_PIN(104, "GPIO_104"),
119 	PINCTRL_PIN(105, "GPIO_105"),
120 	PINCTRL_PIN(106, "GPIO_106"),
121 	PINCTRL_PIN(107, "GPIO_107"),
122 	PINCTRL_PIN(108, "GPIO_108"),
123 	PINCTRL_PIN(109, "GPIO_109"),
124 	PINCTRL_PIN(110, "GPIO_110"),
125 	PINCTRL_PIN(111, "GPIO_111"),
126 	PINCTRL_PIN(112, "GPIO_112"),
127 	PINCTRL_PIN(113, "GPIO_113"),
128 	PINCTRL_PIN(114, "GPIO_114"),
129 	PINCTRL_PIN(115, "GPIO_115"),
130 	PINCTRL_PIN(116, "GPIO_116"),
131 
132 	PINCTRL_PIN(117, "SDC1_CLK"),
133 	PINCTRL_PIN(118, "SDC1_CMD"),
134 	PINCTRL_PIN(119, "SDC1_DATA"),
135 	PINCTRL_PIN(120, "SDC2_CLK"),
136 	PINCTRL_PIN(121, "SDC2_CMD"),
137 	PINCTRL_PIN(122, "SDC2_DATA"),
138 };
139 
140 #define DECLARE_MSM_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin }
141 DECLARE_MSM_GPIO_PINS(0);
142 DECLARE_MSM_GPIO_PINS(1);
143 DECLARE_MSM_GPIO_PINS(2);
144 DECLARE_MSM_GPIO_PINS(3);
145 DECLARE_MSM_GPIO_PINS(4);
146 DECLARE_MSM_GPIO_PINS(5);
147 DECLARE_MSM_GPIO_PINS(6);
148 DECLARE_MSM_GPIO_PINS(7);
149 DECLARE_MSM_GPIO_PINS(8);
150 DECLARE_MSM_GPIO_PINS(9);
151 DECLARE_MSM_GPIO_PINS(10);
152 DECLARE_MSM_GPIO_PINS(11);
153 DECLARE_MSM_GPIO_PINS(12);
154 DECLARE_MSM_GPIO_PINS(13);
155 DECLARE_MSM_GPIO_PINS(14);
156 DECLARE_MSM_GPIO_PINS(15);
157 DECLARE_MSM_GPIO_PINS(16);
158 DECLARE_MSM_GPIO_PINS(17);
159 DECLARE_MSM_GPIO_PINS(18);
160 DECLARE_MSM_GPIO_PINS(19);
161 DECLARE_MSM_GPIO_PINS(20);
162 DECLARE_MSM_GPIO_PINS(21);
163 DECLARE_MSM_GPIO_PINS(22);
164 DECLARE_MSM_GPIO_PINS(23);
165 DECLARE_MSM_GPIO_PINS(24);
166 DECLARE_MSM_GPIO_PINS(25);
167 DECLARE_MSM_GPIO_PINS(26);
168 DECLARE_MSM_GPIO_PINS(27);
169 DECLARE_MSM_GPIO_PINS(28);
170 DECLARE_MSM_GPIO_PINS(29);
171 DECLARE_MSM_GPIO_PINS(30);
172 DECLARE_MSM_GPIO_PINS(31);
173 DECLARE_MSM_GPIO_PINS(32);
174 DECLARE_MSM_GPIO_PINS(33);
175 DECLARE_MSM_GPIO_PINS(34);
176 DECLARE_MSM_GPIO_PINS(35);
177 DECLARE_MSM_GPIO_PINS(36);
178 DECLARE_MSM_GPIO_PINS(37);
179 DECLARE_MSM_GPIO_PINS(38);
180 DECLARE_MSM_GPIO_PINS(39);
181 DECLARE_MSM_GPIO_PINS(40);
182 DECLARE_MSM_GPIO_PINS(41);
183 DECLARE_MSM_GPIO_PINS(42);
184 DECLARE_MSM_GPIO_PINS(43);
185 DECLARE_MSM_GPIO_PINS(44);
186 DECLARE_MSM_GPIO_PINS(45);
187 DECLARE_MSM_GPIO_PINS(46);
188 DECLARE_MSM_GPIO_PINS(47);
189 DECLARE_MSM_GPIO_PINS(48);
190 DECLARE_MSM_GPIO_PINS(49);
191 DECLARE_MSM_GPIO_PINS(50);
192 DECLARE_MSM_GPIO_PINS(51);
193 DECLARE_MSM_GPIO_PINS(52);
194 DECLARE_MSM_GPIO_PINS(53);
195 DECLARE_MSM_GPIO_PINS(54);
196 DECLARE_MSM_GPIO_PINS(55);
197 DECLARE_MSM_GPIO_PINS(56);
198 DECLARE_MSM_GPIO_PINS(57);
199 DECLARE_MSM_GPIO_PINS(58);
200 DECLARE_MSM_GPIO_PINS(59);
201 DECLARE_MSM_GPIO_PINS(60);
202 DECLARE_MSM_GPIO_PINS(61);
203 DECLARE_MSM_GPIO_PINS(62);
204 DECLARE_MSM_GPIO_PINS(63);
205 DECLARE_MSM_GPIO_PINS(64);
206 DECLARE_MSM_GPIO_PINS(65);
207 DECLARE_MSM_GPIO_PINS(66);
208 DECLARE_MSM_GPIO_PINS(67);
209 DECLARE_MSM_GPIO_PINS(68);
210 DECLARE_MSM_GPIO_PINS(69);
211 DECLARE_MSM_GPIO_PINS(70);
212 DECLARE_MSM_GPIO_PINS(71);
213 DECLARE_MSM_GPIO_PINS(72);
214 DECLARE_MSM_GPIO_PINS(73);
215 DECLARE_MSM_GPIO_PINS(74);
216 DECLARE_MSM_GPIO_PINS(75);
217 DECLARE_MSM_GPIO_PINS(76);
218 DECLARE_MSM_GPIO_PINS(77);
219 DECLARE_MSM_GPIO_PINS(78);
220 DECLARE_MSM_GPIO_PINS(79);
221 DECLARE_MSM_GPIO_PINS(80);
222 DECLARE_MSM_GPIO_PINS(81);
223 DECLARE_MSM_GPIO_PINS(82);
224 DECLARE_MSM_GPIO_PINS(83);
225 DECLARE_MSM_GPIO_PINS(84);
226 DECLARE_MSM_GPIO_PINS(85);
227 DECLARE_MSM_GPIO_PINS(86);
228 DECLARE_MSM_GPIO_PINS(87);
229 DECLARE_MSM_GPIO_PINS(88);
230 DECLARE_MSM_GPIO_PINS(89);
231 DECLARE_MSM_GPIO_PINS(90);
232 DECLARE_MSM_GPIO_PINS(91);
233 DECLARE_MSM_GPIO_PINS(92);
234 DECLARE_MSM_GPIO_PINS(93);
235 DECLARE_MSM_GPIO_PINS(94);
236 DECLARE_MSM_GPIO_PINS(95);
237 DECLARE_MSM_GPIO_PINS(96);
238 DECLARE_MSM_GPIO_PINS(97);
239 DECLARE_MSM_GPIO_PINS(98);
240 DECLARE_MSM_GPIO_PINS(99);
241 DECLARE_MSM_GPIO_PINS(100);
242 DECLARE_MSM_GPIO_PINS(101);
243 DECLARE_MSM_GPIO_PINS(102);
244 DECLARE_MSM_GPIO_PINS(103);
245 DECLARE_MSM_GPIO_PINS(104);
246 DECLARE_MSM_GPIO_PINS(105);
247 DECLARE_MSM_GPIO_PINS(106);
248 DECLARE_MSM_GPIO_PINS(107);
249 DECLARE_MSM_GPIO_PINS(108);
250 DECLARE_MSM_GPIO_PINS(109);
251 DECLARE_MSM_GPIO_PINS(110);
252 DECLARE_MSM_GPIO_PINS(111);
253 DECLARE_MSM_GPIO_PINS(112);
254 DECLARE_MSM_GPIO_PINS(113);
255 DECLARE_MSM_GPIO_PINS(114);
256 DECLARE_MSM_GPIO_PINS(115);
257 DECLARE_MSM_GPIO_PINS(116);
258 
259 static const unsigned int sdc1_clk_pins[] = { 117 };
260 static const unsigned int sdc1_cmd_pins[] = { 118 };
261 static const unsigned int sdc1_data_pins[] = { 119 };
262 static const unsigned int sdc2_clk_pins[] = { 120 };
263 static const unsigned int sdc2_cmd_pins[] = { 121 };
264 static const unsigned int sdc2_data_pins[] = { 122 };
265 
266 #define FUNCTION(fname)					\
267 	[MSM_MUX_##fname] = {				\
268 		.name = #fname,				\
269 		.groups = fname##_groups,		\
270 		.ngroups = ARRAY_SIZE(fname##_groups),	\
271 	}
272 
273 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7)	\
274 	{						\
275 		.name = "gpio" #id,			\
276 		.pins = gpio##id##_pins,		\
277 		.npins = ARRAY_SIZE(gpio##id##_pins),	\
278 		.funcs = (int[]){			\
279 			MSM_MUX_gpio,			\
280 			MSM_MUX_##f1,			\
281 			MSM_MUX_##f2,			\
282 			MSM_MUX_##f3,			\
283 			MSM_MUX_##f4,			\
284 			MSM_MUX_##f5,			\
285 			MSM_MUX_##f6,			\
286 			MSM_MUX_##f7			\
287 		},					\
288 		.nfuncs = 8,				\
289 		.ctl_reg = 0x1000 + 0x10 * id,		\
290 		.io_reg = 0x1004 + 0x10 * id,		\
291 		.intr_cfg_reg = 0x1008 + 0x10 * id,	\
292 		.intr_status_reg = 0x100c + 0x10 * id,	\
293 		.intr_target_reg = 0x1008 + 0x10 * id,	\
294 		.mux_bit = 2,				\
295 		.pull_bit = 0,				\
296 		.drv_bit = 6,				\
297 		.oe_bit = 9,				\
298 		.in_bit = 0,				\
299 		.out_bit = 1,				\
300 		.intr_enable_bit = 0,			\
301 		.intr_status_bit = 0,			\
302 		.intr_target_bit = 5,			\
303 		.intr_target_kpss_val = 4,		\
304 		.intr_raw_status_bit = 4,		\
305 		.intr_polarity_bit = 1,			\
306 		.intr_detection_bit = 2,		\
307 		.intr_detection_width = 2,		\
308 	}
309 
310 #define SDC_PINGROUP(pg_name, ctl, pull, drv)		\
311 	{						\
312 		.name = #pg_name,			\
313 		.pins = pg_name##_pins,			\
314 		.npins = ARRAY_SIZE(pg_name##_pins),	\
315 		.ctl_reg = ctl,				\
316 		.io_reg = 0,				\
317 		.intr_cfg_reg = 0,			\
318 		.intr_status_reg = 0,			\
319 		.intr_target_reg = 0,			\
320 		.mux_bit = -1,				\
321 		.pull_bit = pull,			\
322 		.drv_bit = drv,				\
323 		.oe_bit = -1,				\
324 		.in_bit = -1,				\
325 		.out_bit = -1,				\
326 		.intr_enable_bit = -1,			\
327 		.intr_status_bit = -1,			\
328 		.intr_target_bit = -1,			\
329 		.intr_target_kpss_val = -1,		\
330 		.intr_raw_status_bit = -1,		\
331 		.intr_polarity_bit = -1,		\
332 		.intr_detection_bit = -1,		\
333 		.intr_detection_width = -1,		\
334 	}
335 
336 /*
337  * TODO: Add the rest of the possible functions and fill out
338  * the pingroup table below.
339  */
340 enum msm8226_functions {
341 	MSM_MUX_audio_pcm,
342 	MSM_MUX_blsp_i2c1,
343 	MSM_MUX_blsp_i2c2,
344 	MSM_MUX_blsp_i2c3,
345 	MSM_MUX_blsp_i2c4,
346 	MSM_MUX_blsp_i2c5,
347 	MSM_MUX_blsp_spi1,
348 	MSM_MUX_blsp_spi2,
349 	MSM_MUX_blsp_spi3,
350 	MSM_MUX_blsp_spi4,
351 	MSM_MUX_blsp_spi5,
352 	MSM_MUX_blsp_uart1,
353 	MSM_MUX_blsp_uart2,
354 	MSM_MUX_blsp_uart3,
355 	MSM_MUX_blsp_uart4,
356 	MSM_MUX_blsp_uart5,
357 	MSM_MUX_blsp_uim1,
358 	MSM_MUX_blsp_uim2,
359 	MSM_MUX_blsp_uim3,
360 	MSM_MUX_blsp_uim4,
361 	MSM_MUX_blsp_uim5,
362 	MSM_MUX_cam_mclk0,
363 	MSM_MUX_cam_mclk1,
364 	MSM_MUX_cci_i2c0,
365 	MSM_MUX_gpio,
366 	MSM_MUX_sdc3,
367 	MSM_MUX_wlan,
368 	MSM_MUX_NA,
369 };
370 
371 static const char * const gpio_groups[] = {
372 	"gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
373 	"gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
374 	"gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
375 	"gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
376 	"gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
377 	"gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
378 	"gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
379 	"gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
380 	"gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
381 	"gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
382 	"gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
383 	"gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
384 	"gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
385 	"gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
386 	"gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
387 	"gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
388 	"gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
389 };
390 
391 static const char * const audio_pcm_groups[] = {
392 	"gpio63", "gpio64", "gpio65", "gpio66"
393 };
394 
395 static const char * const blsp_uart1_groups[] = {
396 	"gpio0", "gpio1", "gpio2", "gpio3"
397 };
398 
399 static const char * const blsp_uim1_groups[] = { "gpio0", "gpio1" };
400 static const char * const blsp_i2c1_groups[] = { "gpio2", "gpio3" };
401 static const char * const blsp_spi1_groups[] = {
402 	"gpio0", "gpio1", "gpio2", "gpio3"
403 };
404 
405 static const char * const blsp_uart2_groups[] = {
406 	"gpio4", "gpio5", "gpio6", "gpio7"
407 };
408 
409 static const char * const blsp_uim2_groups[] = { "gpio4", "gpio5" };
410 static const char * const blsp_i2c2_groups[] = { "gpio6", "gpio7" };
411 static const char * const blsp_spi2_groups[] = {
412 	"gpio4", "gpio5", "gpio6", "gpio7"
413 };
414 
415 static const char * const blsp_uart3_groups[] = {
416 	"gpio8", "gpio9", "gpio10", "gpio11"
417 };
418 
419 static const char * const blsp_uim3_groups[] = { "gpio8", "gpio9" };
420 static const char * const blsp_i2c3_groups[] = { "gpio10", "gpio11" };
421 static const char * const blsp_spi3_groups[] = {
422 	"gpio8", "gpio9", "gpio10", "gpio11"
423 };
424 
425 static const char * const blsp_uart4_groups[] = {
426 	"gpio12", "gpio13", "gpio14", "gpio15"
427 };
428 
429 static const char * const blsp_uim4_groups[] = { "gpio12", "gpio13" };
430 static const char * const blsp_i2c4_groups[] = { "gpio14", "gpio15" };
431 static const char * const blsp_spi4_groups[] = {
432 	"gpio12", "gpio13", "gpio14", "gpio15"
433 };
434 
435 static const char * const blsp_uart5_groups[] = {
436 	"gpio16", "gpio17", "gpio18", "gpio19"
437 };
438 
439 static const char * const blsp_uim5_groups[] = { "gpio16", "gpio17" };
440 static const char * const blsp_i2c5_groups[] = { "gpio18", "gpio19" };
441 static const char * const blsp_spi5_groups[] = {
442 	"gpio16", "gpio17", "gpio18", "gpio19"
443 };
444 
445 static const char * const cci_i2c0_groups[] = { "gpio29", "gpio30" };
446 
447 static const char * const cam_mclk0_groups[] = { "gpio26" };
448 static const char * const cam_mclk1_groups[] = { "gpio27" };
449 
450 static const char * const sdc3_groups[] = {
451 	"gpio39", "gpio40", "gpio41", "gpio42", "gpio43", "gpio44"
452 };
453 
454 static const char * const wlan_groups[] = {
455 	"gpio40", "gpio41", "gpio42", "gpio43", "gpio44"
456 };
457 
458 static const struct msm_function msm8226_functions[] = {
459 	FUNCTION(audio_pcm),
460 	FUNCTION(blsp_i2c1),
461 	FUNCTION(blsp_i2c2),
462 	FUNCTION(blsp_i2c3),
463 	FUNCTION(blsp_i2c4),
464 	FUNCTION(blsp_i2c5),
465 	FUNCTION(blsp_spi1),
466 	FUNCTION(blsp_spi2),
467 	FUNCTION(blsp_spi3),
468 	FUNCTION(blsp_spi4),
469 	FUNCTION(blsp_spi5),
470 	FUNCTION(blsp_uart1),
471 	FUNCTION(blsp_uart2),
472 	FUNCTION(blsp_uart3),
473 	FUNCTION(blsp_uart4),
474 	FUNCTION(blsp_uart5),
475 	FUNCTION(blsp_uim1),
476 	FUNCTION(blsp_uim2),
477 	FUNCTION(blsp_uim3),
478 	FUNCTION(blsp_uim4),
479 	FUNCTION(blsp_uim5),
480 	FUNCTION(cam_mclk0),
481 	FUNCTION(cam_mclk1),
482 	FUNCTION(cci_i2c0),
483 	FUNCTION(gpio),
484 	FUNCTION(sdc3),
485 	FUNCTION(wlan),
486 };
487 
488 static const struct msm_pingroup msm8226_groups[] = {
489 	PINGROUP(0,   blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA),
490 	PINGROUP(1,   blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA),
491 	PINGROUP(2,   blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA),
492 	PINGROUP(3,   blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA),
493 	PINGROUP(4,   blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA),
494 	PINGROUP(5,   blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA),
495 	PINGROUP(6,   blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA),
496 	PINGROUP(7,   blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA),
497 	PINGROUP(8,   blsp_spi3, blsp_uart3, blsp_uim3, NA, NA, NA, NA),
498 	PINGROUP(9,   blsp_spi3, blsp_uart3, blsp_uim3, NA, NA, NA, NA),
499 	PINGROUP(10,  blsp_spi3, blsp_uart3, blsp_i2c3, NA, NA, NA, NA),
500 	PINGROUP(11,  blsp_spi3, blsp_uart3, blsp_i2c3, NA, NA, NA, NA),
501 	PINGROUP(12,  blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA, NA),
502 	PINGROUP(13,  blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA, NA),
503 	PINGROUP(14,  blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA, NA),
504 	PINGROUP(15,  blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA, NA),
505 	PINGROUP(16,  blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA, NA),
506 	PINGROUP(17,  blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA, NA),
507 	PINGROUP(18,  blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA),
508 	PINGROUP(19,  blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA),
509 	PINGROUP(20,  NA, NA, NA, NA, NA, NA, NA),
510 	PINGROUP(21,  NA, NA, NA, NA, NA, NA, NA),
511 	PINGROUP(22,  NA, NA, NA, NA, NA, NA, NA),
512 	PINGROUP(23,  NA, NA, NA, NA, NA, NA, NA),
513 	PINGROUP(24,  NA, NA, NA, NA, NA, NA, NA),
514 	PINGROUP(25,  NA, NA, NA, NA, NA, NA, NA),
515 	PINGROUP(26,  cam_mclk0, NA, NA, NA, NA, NA, NA),
516 	PINGROUP(27,  cam_mclk1, NA, NA, NA, NA, NA, NA),
517 	PINGROUP(28,  NA, NA, NA, NA, NA, NA, NA),
518 	PINGROUP(29,  cci_i2c0, NA, NA, NA, NA, NA, NA),
519 	PINGROUP(30,  cci_i2c0, NA, NA, NA, NA, NA, NA),
520 	PINGROUP(31,  NA, NA, NA, NA, NA, NA, NA),
521 	PINGROUP(32,  NA, NA, NA, NA, NA, NA, NA),
522 	PINGROUP(33,  NA, NA, NA, NA, NA, NA, NA),
523 	PINGROUP(34,  NA, NA, NA, NA, NA, NA, NA),
524 	PINGROUP(35,  NA, NA, NA, NA, NA, NA, NA),
525 	PINGROUP(36,  NA, NA, NA, NA, NA, NA, NA),
526 	PINGROUP(37,  NA, NA, NA, NA, NA, NA, NA),
527 	PINGROUP(38,  NA, NA, NA, NA, NA, NA, NA),
528 	PINGROUP(39,  NA, sdc3, NA, NA, NA, NA, NA),
529 	PINGROUP(40,  wlan, sdc3, NA, NA, NA, NA, NA),
530 	PINGROUP(41,  wlan, sdc3, NA, NA, NA, NA, NA),
531 	PINGROUP(42,  wlan, sdc3, NA, NA, NA, NA, NA),
532 	PINGROUP(43,  wlan, sdc3, NA, NA, NA, NA, NA),
533 	PINGROUP(44,  wlan, sdc3, NA, NA, NA, NA, NA),
534 	PINGROUP(45,  NA, NA, NA, NA, NA, NA, NA),
535 	PINGROUP(46,  NA, NA, NA, NA, NA, NA, NA),
536 	PINGROUP(47,  NA, NA, NA, NA, NA, NA, NA),
537 	PINGROUP(48,  NA, NA, NA, NA, NA, NA, NA),
538 	PINGROUP(49,  NA, NA, NA, NA, NA, NA, NA),
539 	PINGROUP(50,  NA, NA, NA, NA, NA, NA, NA),
540 	PINGROUP(51,  NA, NA, NA, NA, NA, NA, NA),
541 	PINGROUP(52,  NA, NA, NA, NA, NA, NA, NA),
542 	PINGROUP(53,  NA, NA, NA, NA, NA, NA, NA),
543 	PINGROUP(54,  NA, NA, NA, NA, NA, NA, NA),
544 	PINGROUP(55,  NA, NA, NA, NA, NA, NA, NA),
545 	PINGROUP(56,  NA, NA, NA, NA, NA, NA, NA),
546 	PINGROUP(57,  NA, NA, NA, NA, NA, NA, NA),
547 	PINGROUP(58,  NA, NA, NA, NA, NA, NA, NA),
548 	PINGROUP(59,  NA, NA, NA, NA, NA, NA, NA),
549 	PINGROUP(60,  NA, NA, NA, NA, NA, NA, NA),
550 	PINGROUP(61,  NA, NA, NA, NA, NA, NA, NA),
551 	PINGROUP(62,  NA, NA, NA, NA, NA, NA, NA),
552 	PINGROUP(63,  audio_pcm, NA, NA, NA, NA, NA, NA),
553 	PINGROUP(64,  audio_pcm, NA, NA, NA, NA, NA, NA),
554 	PINGROUP(65,  audio_pcm, NA, NA, NA, NA, NA, NA),
555 	PINGROUP(66,  audio_pcm, NA, NA, NA, NA, NA, NA),
556 	PINGROUP(67,  NA, NA, NA, NA, NA, NA, NA),
557 	PINGROUP(68,  NA, NA, NA, NA, NA, NA, NA),
558 	PINGROUP(69,  NA, NA, NA, NA, NA, NA, NA),
559 	PINGROUP(70,  NA, NA, NA, NA, NA, NA, NA),
560 	PINGROUP(71,  NA, NA, NA, NA, NA, NA, NA),
561 	PINGROUP(72,  NA, NA, NA, NA, NA, NA, NA),
562 	PINGROUP(73,  NA, NA, NA, NA, NA, NA, NA),
563 	PINGROUP(74,  NA, NA, NA, NA, NA, NA, NA),
564 	PINGROUP(75,  NA, NA, NA, NA, NA, NA, NA),
565 	PINGROUP(76,  NA, NA, NA, NA, NA, NA, NA),
566 	PINGROUP(77,  NA, NA, NA, NA, NA, NA, NA),
567 	PINGROUP(78,  NA, NA, NA, NA, NA, NA, NA),
568 	PINGROUP(79,  NA, NA, NA, NA, NA, NA, NA),
569 	PINGROUP(80,  NA, NA, NA, NA, NA, NA, NA),
570 	PINGROUP(81,  NA, NA, NA, NA, NA, NA, NA),
571 	PINGROUP(82,  NA, NA, NA, NA, NA, NA, NA),
572 	PINGROUP(83,  NA, NA, NA, NA, NA, NA, NA),
573 	PINGROUP(84,  NA, NA, NA, NA, NA, NA, NA),
574 	PINGROUP(85,  NA, NA, NA, NA, NA, NA, NA),
575 	PINGROUP(86,  NA, NA, NA, NA, NA, NA, NA),
576 	PINGROUP(87,  NA, NA, NA, NA, NA, NA, NA),
577 	PINGROUP(88,  NA, NA, NA, NA, NA, NA, NA),
578 	PINGROUP(89,  NA, NA, NA, NA, NA, NA, NA),
579 	PINGROUP(90,  NA, NA, NA, NA, NA, NA, NA),
580 	PINGROUP(91,  NA, NA, NA, NA, NA, NA, NA),
581 	PINGROUP(92,  NA, NA, NA, NA, NA, NA, NA),
582 	PINGROUP(93,  NA, NA, NA, NA, NA, NA, NA),
583 	PINGROUP(94,  NA, NA, NA, NA, NA, NA, NA),
584 	PINGROUP(95,  NA, NA, NA, NA, NA, NA, NA),
585 	PINGROUP(96,  NA, NA, NA, NA, NA, NA, NA),
586 	PINGROUP(97,  NA, NA, NA, NA, NA, NA, NA),
587 	PINGROUP(98,  NA, NA, NA, NA, NA, NA, NA),
588 	PINGROUP(99,  NA, NA, NA, NA, NA, NA, NA),
589 	PINGROUP(100, NA, NA, NA, NA, NA, NA, NA),
590 	PINGROUP(101, NA, NA, NA, NA, NA, NA, NA),
591 	PINGROUP(102, NA, NA, NA, NA, NA, NA, NA),
592 	PINGROUP(103, NA, NA, NA, NA, NA, NA, NA),
593 	PINGROUP(104, NA, NA, NA, NA, NA, NA, NA),
594 	PINGROUP(105, NA, NA, NA, NA, NA, NA, NA),
595 	PINGROUP(106, NA, NA, NA, NA, NA, NA, NA),
596 	PINGROUP(107, NA, NA, NA, NA, NA, NA, NA),
597 	PINGROUP(108, NA, NA, NA, NA, NA, NA, NA),
598 	PINGROUP(109, NA, NA, NA, NA, NA, NA, NA),
599 	PINGROUP(110, NA, NA, NA, NA, NA, NA, NA),
600 	PINGROUP(111, NA, NA, NA, NA, NA, NA, NA),
601 	PINGROUP(112, NA, NA, NA, NA, NA, NA, NA),
602 	PINGROUP(113, NA, NA, NA, NA, NA, NA, NA),
603 	PINGROUP(114, NA, NA, NA, NA, NA, NA, NA),
604 	PINGROUP(115, NA, NA, NA, NA, NA, NA, NA),
605 	PINGROUP(116, NA, NA, NA, NA, NA, NA, NA),
606 	SDC_PINGROUP(sdc1_clk, 0x2044, 13, 6),
607 	SDC_PINGROUP(sdc1_cmd, 0x2044, 11, 3),
608 	SDC_PINGROUP(sdc1_data, 0x2044, 9, 0),
609 	SDC_PINGROUP(sdc2_clk, 0x2048, 14, 6),
610 	SDC_PINGROUP(sdc2_cmd, 0x2048, 11, 3),
611 	SDC_PINGROUP(sdc2_data, 0x2048, 9, 0),
612 };
613 
614 #define NUM_GPIO_PINGROUPS 117
615 
616 static const struct msm_pinctrl_soc_data msm8226_pinctrl = {
617 	.pins = msm8226_pins,
618 	.npins = ARRAY_SIZE(msm8226_pins),
619 	.functions = msm8226_functions,
620 	.nfunctions = ARRAY_SIZE(msm8226_functions),
621 	.groups = msm8226_groups,
622 	.ngroups = ARRAY_SIZE(msm8226_groups),
623 	.ngpios = NUM_GPIO_PINGROUPS,
624 };
625 
626 static int msm8226_pinctrl_probe(struct platform_device *pdev)
627 {
628 	return msm_pinctrl_probe(pdev, &msm8226_pinctrl);
629 }
630 
631 static const struct of_device_id msm8226_pinctrl_of_match[] = {
632 	{ .compatible = "qcom,msm8226-pinctrl", },
633 	{ },
634 };
635 
636 static struct platform_driver msm8226_pinctrl_driver = {
637 	.driver = {
638 		.name = "msm8226-pinctrl",
639 		.of_match_table = msm8226_pinctrl_of_match,
640 	},
641 	.probe = msm8226_pinctrl_probe,
642 	.remove = msm_pinctrl_remove,
643 };
644 
645 static int __init msm8226_pinctrl_init(void)
646 {
647 	return platform_driver_register(&msm8226_pinctrl_driver);
648 }
649 arch_initcall(msm8226_pinctrl_init);
650 
651 static void __exit msm8226_pinctrl_exit(void)
652 {
653 	platform_driver_unregister(&msm8226_pinctrl_driver);
654 }
655 module_exit(msm8226_pinctrl_exit);
656 
657 MODULE_AUTHOR("Bartosz Dudziak <bartosz.dudziak@snejp.pl>");
658 MODULE_DESCRIPTION("Qualcomm MSM8226 pinctrl driver");
659 MODULE_LICENSE("GPL v2");
660 MODULE_DEVICE_TABLE(of, msm8226_pinctrl_of_match);
661